2 * Copyright (c) 2000,2001 Jonathan Chen.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions, and the following disclaimer,
10 * without modification, immediately at the beginning of the file.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in
13 * the documentation and/or other materials provided with the
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * Copyright (c) 1998, 1999 and 2000
33 * HAYAKAWA Koichi. All rights reserved.
35 * Redistribution and use in source and binary forms, with or without
36 * modification, are permitted provided that the following conditions
38 * 1. Redistributions of source code must retain the above copyright
39 * notice, this list of conditions and the following disclaimer.
40 * 2. Redistributions in binary form must reproduce the above copyright
41 * notice, this list of conditions and the following disclaimer in the
42 * documentation and/or other materials provided with the distribution.
43 * 3. All advertising materials mentioning features or use of this software
44 * must display the following acknowledgement:
45 * This product includes software developed by HAYAKAWA Koichi.
46 * 4. The name of the author may not be used to endorse or promote products
47 * derived from this software without specific prior written permission.
49 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
50 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
51 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
52 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
53 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
54 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
55 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
56 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
57 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
58 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
62 * Driver for PCI to Cardbus Bridge chips
66 * http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS
68 * Written by Jonathan Chen <jon@freebsd.org>
69 * The author would like to acknowledge:
70 * * HAYAKAWA Koichi: Author of the NetBSD code for the same thing
71 * * Warner Losh: Newbus/newcard guru and author of the pccard side of things
72 * * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver
73 * * David Cross: Author of the initial ugly hack for a specific cardbus card
76 #include <sys/param.h>
77 #include <sys/systm.h>
78 #include <sys/errno.h>
79 #include <sys/kernel.h>
81 #include <sys/malloc.h>
82 #include <sys/mutex.h>
83 #include <sys/sysctl.h>
84 #include <sys/kthread.h>
86 #include <machine/bus.h>
88 #include <machine/resource.h>
90 #include <pci/pcireg.h>
91 #include <pci/pcivar.h>
92 #include <machine/clock.h>
94 #include <dev/pccard/pccardreg.h>
95 #include <dev/pccard/pccardvar.h>
97 #include <dev/exca/excareg.h>
98 #include <dev/exca/excavar.h>
100 #include <dev/pccbb/pccbbreg.h>
101 #include <dev/pccbb/pccbbvar.h>
103 #include "power_if.h"
107 #define DPRINTF(x) do { if (cbb_debug) printf x; } while (0)
108 #define DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0)
110 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE) \
111 pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE)
112 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE) \
113 pci_write_config(DEV, REG, ( \
114 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE)
116 #define PCCBB_START_MEM 0x84000000
117 #define PCCBB_START_32_IO 0x1000
118 #define PCCBB_START_16_IO 0x100
120 struct yenta_chipinfo {
125 /* Texas Instruments chips */
126 {PCI_DEVICE_ID_PCIC_TI1031, "TI1031 PCI-PC Card Bridge", CB_TI113X},
127 {PCI_DEVICE_ID_PCIC_TI1130, "TI1130 PCI-CardBus Bridge", CB_TI113X},
128 {PCI_DEVICE_ID_PCIC_TI1131, "TI1131 PCI-CardBus Bridge", CB_TI113X},
130 {PCI_DEVICE_ID_PCIC_TI1210, "TI1210 PCI-CardBus Bridge", CB_TI12XX},
131 {PCI_DEVICE_ID_PCIC_TI1211, "TI1211 PCI-CardBus Bridge", CB_TI12XX},
132 {PCI_DEVICE_ID_PCIC_TI1220, "TI1220 PCI-CardBus Bridge", CB_TI12XX},
133 {PCI_DEVICE_ID_PCIC_TI1221, "TI1221 PCI-CardBus Bridge", CB_TI12XX},
134 {PCI_DEVICE_ID_PCIC_TI1225, "TI1225 PCI-CardBus Bridge", CB_TI12XX},
135 {PCI_DEVICE_ID_PCIC_TI1250, "TI1250 PCI-CardBus Bridge", CB_TI12XX},
136 {PCI_DEVICE_ID_PCIC_TI1251, "TI1251 PCI-CardBus Bridge", CB_TI12XX},
137 {PCI_DEVICE_ID_PCIC_TI1251B,"TI1251B PCI-CardBus Bridge",CB_TI12XX},
138 {PCI_DEVICE_ID_PCIC_TI1260, "TI1260 PCI-CardBus Bridge", CB_TI12XX},
139 {PCI_DEVICE_ID_PCIC_TI1260B,"TI1260B PCI-CardBus Bridge",CB_TI12XX},
140 {PCI_DEVICE_ID_PCIC_TI1410, "TI1410 PCI-CardBus Bridge", CB_TI12XX},
141 {PCI_DEVICE_ID_PCIC_TI1420, "TI1420 PCI-CardBus Bridge", CB_TI12XX},
142 {PCI_DEVICE_ID_PCIC_TI1421, "TI1421 PCI-CardBus Bridge", CB_TI12XX},
143 {PCI_DEVICE_ID_PCIC_TI1450, "TI1450 PCI-CardBus Bridge", CB_TI12XX},
144 {PCI_DEVICE_ID_PCIC_TI1451, "TI1451 PCI-CardBus Bridge", CB_TI12XX},
145 {PCI_DEVICE_ID_PCIC_TI4410, "TI4410 PCI-CardBus Bridge", CB_TI12XX},
146 {PCI_DEVICE_ID_PCIC_TI4450, "TI4450 PCI-CardBus Bridge", CB_TI12XX},
147 {PCI_DEVICE_ID_PCIC_TI4451, "TI4451 PCI-CardBus Bridge", CB_TI12XX},
150 {PCI_DEVICE_ID_RICOH_RL5C465, "RF5C465 PCI-CardBus Bridge",
152 {PCI_DEVICE_ID_RICOH_RL5C466, "RF5C466 PCI-CardBus Bridge",
154 {PCI_DEVICE_ID_RICOH_RL5C475, "RF5C475 PCI-CardBus Bridge",
156 {PCI_DEVICE_ID_RICOH_RL5C476, "RF5C476 PCI-CardBus Bridge",
158 {PCI_DEVICE_ID_RICOH_RL5C477, "RF5C477 PCI-CardBus Bridge",
160 {PCI_DEVICE_ID_RICOH_RL5C478, "RF5C478 PCI-CardBus Bridge",
163 /* Toshiba products */
164 {PCI_DEVICE_ID_TOSHIBA_TOPIC95, "ToPIC95 PCI-CardBus Bridge",
166 {PCI_DEVICE_ID_TOSHIBA_TOPIC95B, "ToPIC95B PCI-CardBus Bridge",
168 {PCI_DEVICE_ID_TOSHIBA_TOPIC97, "ToPIC97 PCI-CardBus Bridge",
170 {PCI_DEVICE_ID_TOSHIBA_TOPIC100, "ToPIC100 PCI-CardBus Bridge",
174 {PCI_DEVICE_ID_PCIC_CLPD6832, "CLPD6832 PCI-CardBus Bridge",
176 {PCI_DEVICE_ID_PCIC_CLPD6833, "CLPD6833 PCI-CardBus Bridge",
178 {PCI_DEVICE_ID_PCIC_CLPD6834, "CLPD6834 PCI-CardBus Bridge",
182 {PCI_DEVICE_ID_PCIC_OZ6832, "O2Mirco OZ6832/6833 PCI-CardBus Bridge",
184 {PCI_DEVICE_ID_PCIC_OZ6860, "O2Mirco OZ6836/6860 PCI-CardBus Bridge",
186 {PCI_DEVICE_ID_PCIC_OZ6872, "O2Mirco OZ6812/6872 PCI-CardBus Bridge",
188 {PCI_DEVICE_ID_PCIC_OZ6912, "O2Mirco OZ6912/6972 PCI-CardBus Bridge",
190 {PCI_DEVICE_ID_PCIC_OZ6922, "O2Mirco OZ6822 PCI-CardBus Bridge",
192 {PCI_DEVICE_ID_PCIC_OZ6933, "O2Mirco OZ6833 PCI-CardBus Bridge",
196 {0 /* null id */, "unknown", CB_UNKNOWN},
200 SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters");
202 /* There's no way to say TUNEABLE_LONG to get the right types */
203 u_long pccbb_start_mem = PCCBB_START_MEM;
204 TUNABLE_INT("hw.cbb.start_memory", (int *)&pccbb_start_mem);
205 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RW,
206 &pccbb_start_mem, PCCBB_START_MEM,
207 "Starting address for memory allocations");
209 u_long pccbb_start_16_io = PCCBB_START_16_IO;
210 TUNABLE_INT("hw.cbb.start_16_io", (int *)&pccbb_start_16_io);
211 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RW,
212 &pccbb_start_16_io, PCCBB_START_16_IO,
213 "Starting ioport for 16-bit cards");
215 u_long pccbb_start_32_io = PCCBB_START_32_IO;
216 TUNABLE_INT("hw.cbb.start_32_io", (int *)&pccbb_start_32_io);
217 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RW,
218 &pccbb_start_32_io, PCCBB_START_32_IO,
219 "Starting ioport for 32-bit cards");
222 TUNABLE_INT("hw.cbb.debug", &cbb_debug);
223 SYSCTL_ULONG(_hw_cbb, OID_AUTO, debug, CTLFLAG_RW, &cbb_debug, 0,
224 "Verbose cardbus bridge debugging");
226 static int pccbb_chipset(uint32_t pci_id, const char **namep);
227 static int pccbb_probe(device_t brdev);
228 static void pccbb_chipinit(struct pccbb_softc *sc);
229 static int pccbb_attach(device_t brdev);
230 static int pccbb_detach(device_t brdev);
231 static int pccbb_shutdown(device_t brdev);
232 static void pccbb_driver_added(device_t brdev, driver_t *driver);
233 static void pccbb_child_detached(device_t brdev, device_t child);
234 static int pccbb_card_reprobe(device_t brdev, device_t busdev);
235 static void pccbb_event_thread(void *arg);
236 static void pccbb_insert(struct pccbb_softc *sc);
237 static void pccbb_removal(struct pccbb_softc *sc);
238 static void pccbb_intr(void *arg);
239 static int pccbb_detect_voltage(device_t brdev);
240 static int pccbb_power(device_t brdev, int volts);
241 static void pccbb_cardbus_reset(device_t brdev);
242 static int pccbb_cardbus_power_enable_socket(device_t brdev,
244 static void pccbb_cardbus_power_disable_socket(device_t brdev,
246 static int pccbb_cardbus_io_open(device_t brdev, int win, uint32_t start,
248 static int pccbb_cardbus_mem_open(device_t brdev, int win,
249 uint32_t start, uint32_t end);
250 static void pccbb_cardbus_auto_open(struct pccbb_softc *sc, int type);
251 static int pccbb_cardbus_activate_resource(device_t brdev, device_t child,
252 int type, int rid, struct resource *res);
253 static int pccbb_cardbus_deactivate_resource(device_t brdev,
254 device_t child, int type, int rid, struct resource *res);
255 static struct resource *pccbb_cardbus_alloc_resource(device_t brdev,
256 device_t child, int type, int *rid, u_long start,
257 u_long end, u_long count, uint flags);
258 static int pccbb_cardbus_release_resource(device_t brdev, device_t child,
259 int type, int rid, struct resource *res);
260 static int pccbb_power_enable_socket(device_t brdev, device_t child);
261 static void pccbb_power_disable_socket(device_t brdev, device_t child);
262 static int pccbb_activate_resource(device_t brdev, device_t child,
263 int type, int rid, struct resource *r);
264 static int pccbb_deactivate_resource(device_t brdev, device_t child,
265 int type, int rid, struct resource *r);
266 static struct resource *pccbb_alloc_resource(device_t brdev, device_t child,
267 int type, int *rid, u_long start, u_long end, u_long count,
269 static int pccbb_release_resource(device_t brdev, device_t child,
270 int type, int rid, struct resource *r);
271 static int pccbb_read_ivar(device_t brdev, device_t child, int which,
273 static int pccbb_write_ivar(device_t brdev, device_t child, int which,
275 static int pccbb_maxslots(device_t brdev);
276 static uint32_t pccbb_read_config(device_t brdev, int b, int s, int f,
278 static void pccbb_write_config(device_t brdev, int b, int s, int f,
279 int reg, uint32_t val, int width);
284 pccbb_set(struct pccbb_softc *sc, uint32_t reg, uint32_t val)
286 bus_space_write_4(sc->bst, sc->bsh, reg, val);
289 static __inline uint32_t
290 pccbb_get(struct pccbb_softc *sc, uint32_t reg)
292 return (bus_space_read_4(sc->bst, sc->bsh, reg));
296 pccbb_setb(struct pccbb_softc *sc, uint32_t reg, uint32_t bits)
298 pccbb_set(sc, reg, pccbb_get(sc, reg) | bits);
302 pccbb_clrb(struct pccbb_softc *sc, uint32_t reg, uint32_t bits)
304 pccbb_set(sc, reg, pccbb_get(sc, reg) & ~bits);
307 static __inline uint8_t
308 pccbb_pcic_read(struct exca_softc *sc, int reg)
310 return (bus_space_read_1(sc->bst, sc->bsh, sc->offset + reg));
314 pccbb_pcic_write(struct exca_softc *sc, int reg, uint8_t val)
316 return (bus_space_write_1(sc->bst, sc->bsh, sc->offset + reg, val));
320 pccbb_remove_res(struct pccbb_softc *sc, struct resource *res)
322 struct pccbb_reslist *rle;
324 SLIST_FOREACH(rle, &sc->rl, link) {
325 if (rle->res == res) {
326 SLIST_REMOVE(&sc->rl, rle, pccbb_reslist, link);
333 static struct resource *
334 pccbb_find_res(struct pccbb_softc *sc, int type, int rid)
336 struct pccbb_reslist *rle;
338 SLIST_FOREACH(rle, &sc->rl, link)
339 if (SYS_RES_MEMORY == rle->type && rid == rle->rid)
345 pccbb_insert_res(struct pccbb_softc *sc, struct resource *res, int type,
348 struct pccbb_reslist *rle;
351 * Need to record allocated resource so we can iterate through
354 rle = malloc(sizeof(struct pccbb_reslist), M_DEVBUF, M_NOWAIT);
356 panic("pccbb_cardbus_alloc_resource: can't record entry!");
360 SLIST_INSERT_HEAD(&sc->rl, rle, link);
364 pccbb_destroy_res(struct pccbb_softc *sc)
366 struct pccbb_reslist *rle;
368 while ((rle = SLIST_FIRST(&sc->rl)) != NULL) {
369 device_printf(sc->dev, "Danger Will Robinson: Resource "
370 "left allocated! This is a bug... "
371 "(rid=%x, type=%d, addr=%lx)\n", rle->rid, rle->type,
372 rman_get_start(rle->res));
373 SLIST_REMOVE_HEAD(&sc->rl, link);
378 /************************************************************************/
380 /************************************************************************/
383 pccbb_chipset(uint32_t pci_id, const char **namep)
385 struct yenta_chipinfo *ycp;
387 for (ycp = yc_chipsets; ycp->yc_id != 0 && pci_id != ycp->yc_id; ++ycp)
390 *namep = ycp->yc_name;
391 return (ycp->yc_chiptype);
395 pccbb_probe(device_t brdev)
402 * Do we know that we support the chipset? If so, then we
405 if (pccbb_chipset(pci_get_devid(brdev), &name) != CB_UNKNOWN) {
406 device_set_desc(brdev, name);
411 * We do support generic CardBus bridges. All that we've seen
412 * to date have progif 0 (the Yenta spec, and successors mandate
413 * this). We do not support PCI PCMCIA bridges (with one exception)
414 * with this driver since they generally are I/O mapped. Those
415 * are supported by the pcic driver. This should help us be more
418 subclass = pci_get_subclass(brdev);
419 progif = pci_get_progif(brdev);
420 if (subclass == PCIS_BRIDGE_CARDBUS && progif == 0) {
421 device_set_desc(brdev, "PCI-CardBus Bridge");
429 pccbb_chipinit(struct pccbb_softc *sc)
431 /* Set CardBus latency timer */
432 if (pci_read_config(sc->dev, PCIR_SECLAT_1, 1) < 0x20)
433 pci_write_config(sc->dev, PCIR_SECLAT_1, 0x20, 1);
435 /* Set PCI latency timer */
436 if (pci_read_config(sc->dev, PCIR_LATTIMER, 1) < 0x20)
437 pci_write_config(sc->dev, PCIR_LATTIMER, 0x20, 1);
439 /* Enable memory access */
440 PCI_MASK_CONFIG(sc->dev, PCIR_COMMAND,
443 | PCIM_CMD_BUSMASTEREN, 2);
445 /* disable Legacy IO */
446 switch (sc->chipset) {
448 PCI_MASK_CONFIG(sc->dev, CBBR_BRIDGECTRL,
449 & ~(CBBM_BRIDGECTRL_RL_3E0_EN |
450 CBBM_BRIDGECTRL_RL_3E2_EN), 2);
453 pci_write_config(sc->dev, CBBR_LEGACY, 0x0, 4);
457 /* Use PCI interrupt for interrupt routing */
458 PCI_MASK2_CONFIG(sc->dev, CBBR_BRIDGECTRL,
459 & ~(CBBM_BRIDGECTRL_MASTER_ABORT |
460 CBBM_BRIDGECTRL_INTR_IREQ_EN),
461 | CBBM_BRIDGECTRL_WRITE_POST_EN,
465 * XXX this should be a function table, ala OLDCARD. This means
466 * that we could more easily support ISA interrupts for pccard
467 * cards if we had to.
469 switch (sc->chipset) {
472 * The TI 1031, TI 1130 and TI 1131 all require another bit
473 * be set to enable PCI routing of interrupts, and then
474 * a bit for each of the CSC and Function interrupts we
477 PCI_MASK_CONFIG(sc->dev, CBBR_CBCTRL,
478 | CBBM_CBCTRL_113X_PCI_INTR |
479 CBBM_CBCTRL_113X_PCI_CSC | CBBM_CBCTRL_113X_PCI_IRQ_EN,
481 PCI_MASK_CONFIG(sc->dev, CBBR_DEVCTRL,
482 & ~(CBBM_DEVCTRL_INT_SERIAL |
483 CBBM_DEVCTRL_INT_PCI), 1);
487 * Disable Zoom Video, ToPIC 97, 100.
489 pci_write_config(sc->dev, CBBR_TOPIC_ZV_CONTROL, 0, 1);
492 * At offset 0xa1: INTERRUPT CONTROL register
493 * 0x1: Turn on INT interrupts.
495 PCI_MASK_CONFIG(sc->dev, CBBR_TOPIC_INTCTRL,
496 | CBBM_TOPIC_INTCTRL_INTIRQSEL, 1);
500 * SOCKETCTRL appears to be TOPIC 95/B specific
502 PCI_MASK_CONFIG(sc->dev, CBBR_TOPIC_SOCKETCTRL,
503 | CBBM_TOPIC_SOCKETCTRL_SCR_IRQSEL, 4);
507 * At offset 0xa0: SLOT CONTROL
508 * 0x80 Enable Cardbus Functionality
509 * 0x40 Enable Cardbus and PC Card registers
510 * 0x20 Lock ID in exca regs
511 * 0x10 Write protect ID in config regs
512 * Clear the rest of the bits, which defaults the slot
513 * in legacy mode to 0x3e0 and offset 0. (legacy
514 * mode is determined elsewhere)
516 pci_write_config(sc->dev, CBBR_TOPIC_SLOTCTRL,
517 CBBM_TOPIC_SLOTCTRL_SLOTON |
518 CBBM_TOPIC_SLOTCTRL_SLOTEN |
519 CBBM_TOPIC_SLOTCTRL_ID_LOCK |
520 CBBM_TOPIC_SLOTCTRL_ID_WP, 1);
523 * At offset 0xa3 Card Detect Control Register
524 * 0x80 CARDBUS enbale
525 * 0x01 Cleared for hardware change detect
527 PCI_MASK2_CONFIG(sc->dev, CBBR_TOPIC_CDC,
528 | CBBM_TOPIC_CDC_CARDBUS,
529 & ~CBBM_TOPIC_CDC_SWDETECT, 4);
534 * Need to tell ExCA registers to route via PCI interrupts. There
535 * are two ways to do this. Once is to set INTR_ENABLE and the
536 * other is to set CSC to 0. Since both methods are mutually
537 * compatible, we do both.
539 exca_write(&sc->exca, EXCA_INTR, EXCA_INTR_ENABLE);
540 exca_write(&sc->exca, EXCA_CSC_INTR, 0);
542 /* close all memory and io windows */
543 pci_write_config(sc->dev, CBBR_MEMBASE0, 0xffffffff, 4);
544 pci_write_config(sc->dev, CBBR_MEMLIMIT0, 0, 4);
545 pci_write_config(sc->dev, CBBR_MEMBASE1, 0xffffffff, 4);
546 pci_write_config(sc->dev, CBBR_MEMLIMIT1, 0, 4);
547 pci_write_config(sc->dev, CBBR_IOBASE0, 0xffffffff, 4);
548 pci_write_config(sc->dev, CBBR_IOLIMIT0, 0, 4);
549 pci_write_config(sc->dev, CBBR_IOBASE1, 0xffffffff, 4);
550 pci_write_config(sc->dev, CBBR_IOLIMIT1, 0, 4);
554 pccbb_attach(device_t brdev)
556 struct pccbb_softc *sc = (struct pccbb_softc *)device_get_softc(brdev);
560 mtx_init(&sc->mtx, device_get_nameunit(brdev), "pccbb", MTX_DEF);
561 sc->chipset = pccbb_chipset(pci_get_devid(brdev), NULL);
564 sc->pccarddev = NULL;
565 sc->secbus = pci_read_config(brdev, PCIR_SECBUS_2, 1);
566 sc->subbus = pci_read_config(brdev, PCIR_SUBBUS_2, 1);
570 * The PCI bus code should assign us memory in the absense
571 * of the BIOS doing so. However, 'should' isn't 'is,' so we kludge
572 * up something here until the PCI/acpi code properly assigns the
576 sc->base_res = bus_alloc_resource(brdev, SYS_RES_MEMORY, &rid,
577 0, ~0, 1, RF_ACTIVE);
580 * Generally, the BIOS will assign this memory for us.
581 * However, newer BIOSes do not because the MS design
582 * documents have mandated that this is for the OS
583 * to assign rather than the BIOS. This driver shouldn't
584 * be doing this, but until the pci bus code (or acpi)
585 * does this, we allow CardBus bridges to work on more
588 sockbase = pci_read_config(brdev, rid, 4);
589 if (sockbase < 0x100000 || sockbase >= 0xfffffff0) {
590 pci_write_config(brdev, rid, 0xffffffff, 4);
591 sockbase = pci_read_config(brdev, rid, 4);
592 sockbase = (sockbase & 0xfffffff0) &
593 -(sockbase & 0xfffffff0);
594 sc->base_res = bus_generic_alloc_resource(
595 device_get_parent(brdev), brdev, SYS_RES_MEMORY,
596 &rid, pccbb_start_mem, ~0, sockbase,
597 RF_ACTIVE|rman_make_alignment_flags(sockbase));
600 "Could not grab register memory\n");
601 mtx_destroy(&sc->mtx);
604 pci_write_config(brdev, CBBR_SOCKBASE,
605 rman_get_start(sc->base_res), 4);
606 DEVPRINTF((brdev, "PCI Memory allocated: %08lx\n",
607 rman_get_start(sc->base_res)));
609 device_printf(brdev, "Could not map register memory\n");
610 mtx_destroy(&sc->mtx);
615 sc->bst = rman_get_bustag(sc->base_res);
616 sc->bsh = rman_get_bushandle(sc->base_res);
617 exca_init(&sc->exca, brdev, &pccbb_pcic_write, &pccbb_pcic_read,
618 sc->bst, sc->bsh, 0x800);
621 /* attach children */
622 sc->cbdev = device_add_child(brdev, "cardbus", -1);
623 if (sc->cbdev == NULL)
624 DEVPRINTF((brdev, "WARNING: cannot add cardbus bus.\n"));
625 else if (device_probe_and_attach(sc->cbdev) != 0) {
626 DEVPRINTF((brdev, "WARNING: cannot attach cardbus bus!\n"));
630 sc->pccarddev = device_add_child(brdev, "pccard", -1);
631 if (sc->pccarddev == NULL)
632 DEVPRINTF((brdev, "WARNING: cannot add pccard bus.\n"));
633 else if (device_probe_and_attach(sc->pccarddev) != 0) {
634 DEVPRINTF((brdev, "WARNING: cannot attach pccard bus.\n"));
635 sc->pccarddev = NULL;
638 /* Map and establish the interrupt. */
640 sc->irq_res = bus_alloc_resource(brdev, SYS_RES_IRQ, &rid, 0, ~0, 1,
641 RF_SHAREABLE | RF_ACTIVE);
642 if (sc->irq_res == NULL) {
643 printf("pccbb: Unable to map IRQ...\n");
644 bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE,
646 mtx_destroy(&sc->mtx);
650 if (bus_setup_intr(brdev, sc->irq_res, INTR_TYPE_AV, pccbb_intr, sc,
652 device_printf(brdev, "couldn't establish interrupt");
653 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res);
654 bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE,
656 mtx_destroy(&sc->mtx);
660 /* CSC Interrupt: Card detect interrupt on */
661 pccbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD);
663 /* reset interrupt */
664 pccbb_set(sc, CBB_SOCKET_EVENT, pccbb_get(sc, CBB_SOCKET_EVENT));
666 /* Start the thread */
667 if (kthread_create(pccbb_event_thread, sc, &sc->event_thread, 0,
668 "%s%d", device_get_name(sc->dev), device_get_unit(sc->dev))) {
669 device_printf (sc->dev, "unable to create event thread.\n");
670 panic ("pccbb_create_event_thread");
677 pccbb_detach(device_t brdev)
679 struct pccbb_softc *sc = device_get_softc(brdev);
685 device_get_children(brdev, &devlist, &numdevs);
688 for (tmp = 0; tmp < numdevs; tmp++) {
689 if (device_detach(devlist[tmp]) == 0)
690 device_delete_child(brdev, devlist[tmp]);
694 free(devlist, M_TEMP);
699 bus_teardown_intr(brdev, sc->irq_res, sc->intrhand);
700 sc->flags |= PCCBB_KTHREAD_DONE;
701 if (sc->flags & PCCBB_KTHREAD_RUNNING) {
703 mtx_unlock(&sc->mtx);
704 DEVPRINTF((brdev, "waiting for kthread exit..."));
705 error = tsleep(sc, PWAIT, "pccbb-detach-wait", 60 * hz);
707 DPRINTF(("timeout\n"));
711 mtx_unlock(&sc->mtx);
714 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res);
715 bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE,
717 mtx_destroy(&sc->mtx);
722 pccbb_shutdown(device_t brdev)
724 struct pccbb_softc *sc = (struct pccbb_softc *)device_get_softc(brdev);
725 /* properly reset everything at shutdown */
727 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2);
728 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET);
730 pccbb_set(sc, CBB_SOCKET_MASK, 0);
732 pccbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
734 exca_write(&sc->exca, EXCA_ADDRWIN_ENABLE, 0);
735 pci_write_config(brdev, CBBR_MEMBASE0, 0, 4);
736 pci_write_config(brdev, CBBR_MEMLIMIT0, 0, 4);
737 pci_write_config(brdev, CBBR_MEMBASE1, 0, 4);
738 pci_write_config(brdev, CBBR_MEMLIMIT1, 0, 4);
739 pci_write_config(brdev, CBBR_IOBASE0, 0, 4);
740 pci_write_config(brdev, CBBR_IOLIMIT0, 0, 4);
741 pci_write_config(brdev, CBBR_IOBASE1, 0, 4);
742 pci_write_config(brdev, CBBR_IOLIMIT1, 0, 4);
743 pci_write_config(brdev, PCIR_COMMAND, 0, 2);
748 pccbb_setup_intr(device_t dev, device_t child, struct resource *irq,
749 int flags, driver_intr_t *intr, void *arg, void **cookiep)
754 * You aren't allowed to have fast interrupts for pccard/cardbus
755 * things since those interrupts are PCI and shared. Since we use
756 * the PCI interrupt for the status change interrupts, it can't be
757 * free for use by the driver. Fast interrupts must not be shared.
759 if ((flags & INTR_FAST) != 0)
761 err = bus_generic_setup_intr(dev, child, irq, flags, intr, arg,
764 * XXX need to turn on ISA interrupts, if we ever support them, but
765 * XXX for now that's all we need to do.
771 pccbb_teardown_intr(device_t dev, device_t child, struct resource *irq,
774 /* XXX Need to do different things for ISA interrupts. */
775 return (bus_generic_teardown_intr(dev, child, irq, cookie));
780 pccbb_driver_added(device_t brdev, driver_t *driver)
782 struct pccbb_softc *sc = device_get_softc(brdev);
789 DEVICE_IDENTIFY(driver, brdev);
790 device_get_children(brdev, &devlist, &numdevs);
792 sockstate = pccbb_get(sc, CBB_SOCKET_STATE);
793 for (tmp = 0; tmp < numdevs; tmp++) {
794 if (device_get_state(devlist[tmp]) == DS_NOTPRESENT &&
795 device_probe_and_attach(devlist[tmp]) == 0) {
796 if (devlist[tmp] == NULL)
798 else if (strcmp(driver->name, "cardbus") == 0) {
799 sc->cbdev = devlist[tmp];
800 if (((sockstate & CBB_SOCKET_STAT_CD) == 0) &&
801 (sockstate & CBB_SOCKET_STAT_CB))
803 } else if (strcmp(driver->name, "pccard") == 0) {
804 sc->pccarddev = devlist[tmp];
805 if (((sockstate & CBB_SOCKET_STAT_CD) == 0) &&
806 (sockstate & CBB_SOCKET_STAT_16BIT))
810 "Unsupported child bus: %s\n",
814 free(devlist, M_TEMP);
817 if ((pccbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD)
821 mtx_unlock(&sc->mtx);
827 pccbb_child_detached(device_t brdev, device_t child)
829 struct pccbb_softc *sc = device_get_softc(brdev);
831 if (child == sc->cbdev)
833 else if (child == sc->pccarddev)
834 sc->pccarddev = NULL;
836 device_printf(brdev, "Unknown child detached: %s %p/%p\n",
837 device_get_nameunit(child), sc->cbdev, sc->pccarddev);
841 pccbb_card_reprobe(device_t brdev, device_t busdev)
843 struct pccbb_softc *sc = device_get_softc(brdev);
847 sockstate = pccbb_get(sc, CBB_SOCKET_STATE);
849 if ((sockstate & CBB_SOCKET_STAT_CD) == 0) {
850 if (busdev == sc->cbdev &&
851 (sockstate & CBB_SOCKET_STAT_CB))
853 else if (busdev == sc->pccarddev &&
854 (sockstate & CBB_SOCKET_STAT_16BIT))
860 mtx_unlock(&sc->mtx);
868 /************************************************************************/
870 /************************************************************************/
873 pccbb_event_thread(void *arg)
875 struct pccbb_softc *sc = arg;
880 * We take out Giant here because we drop it in tsleep
881 * and need it for kthread_exit, which drops it.
884 sc->flags |= PCCBB_KTHREAD_RUNNING;
887 * Check to see if we have anything first so that
888 * if there's a card already inserted, we do the
892 if (sc->flags & PCCBB_KTHREAD_DONE)
895 status = pccbb_get(sc, CBB_SOCKET_STATE);
896 if ((status & CBB_SOCKET_STAT_CD) == 0)
900 mtx_unlock(&sc->mtx);
902 * Wait until it has been 1s since the last time we
903 * get an interrupt. We handle the rest of the interrupt
904 * at the top of the loop.
906 tsleep (sc, PWAIT, "pccbbev", 0);
908 err = tsleep (sc, PWAIT, "pccbbev", 1 * hz);
909 } while (err != EWOULDBLOCK &&
910 (sc->flags & PCCBB_KTHREAD_DONE) == 0);
912 mtx_unlock(&sc->mtx);
913 sc->flags &= ~PCCBB_KTHREAD_RUNNING;
915 * XXX I think there's a race here. If we wakeup in the other
916 * thread before kthread_exit is called and this routine returns,
917 * and that thread causes us to be unmapped, then we are setting
918 * ourselves up for a panic. Make sure that I check out
919 * jhb's crash.c for a fix.
925 /************************************************************************/
927 /************************************************************************/
930 pccbb_insert(struct pccbb_softc *sc)
932 uint32_t sockevent, sockstate;
936 * Debounce interrupt. However, most of the debounce
937 * is done in the thread's timeout routines.
940 sockevent = pccbb_get(sc, CBB_SOCKET_EVENT);
941 sockstate = pccbb_get(sc, CBB_SOCKET_STATE);
942 } while (sockstate & CBB_SOCKET_STAT_CD && --timeout > 0);
945 device_printf (sc->dev, "insert timeout");
949 DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n",
950 sockevent, sockstate));
952 if (sockstate & CBB_SOCKET_STAT_16BIT) {
953 if (sc->pccarddev != NULL) {
954 sc->flags |= PCCBB_16BIT_CARD;
955 if (CARD_ATTACH_CARD(sc->pccarddev) != 0)
956 device_printf(sc->dev,
957 "PC Card card activation failed\n");
959 device_printf(sc->dev,
960 "PC Card inserted, but no pccard bus.\n");
962 } else if (sockstate & CBB_SOCKET_STAT_CB) {
963 if (sc->cbdev != NULL) {
964 sc->flags &= ~PCCBB_16BIT_CARD;
965 if (CARD_ATTACH_CARD(sc->cbdev) != 0)
966 device_printf(sc->dev,
967 "CardBus card activation failed\n");
969 device_printf(sc->dev,
970 "CardBUS card inserted, but no cardbus bus.\n");
974 * We should power the card down, and try again a couple of
975 * times if this happens. XXX
977 device_printf (sc->dev, "Unsupported card type detected\n");
982 pccbb_removal(struct pccbb_softc *sc)
984 if (sc->flags & PCCBB_16BIT_CARD && sc->pccarddev != NULL)
985 CARD_DETACH_CARD(sc->pccarddev, DETACH_FORCE);
986 else if ((!(sc->flags & PCCBB_16BIT_CARD)) && sc->cbdev != NULL)
987 CARD_DETACH_CARD(sc->cbdev, DETACH_FORCE);
988 pccbb_destroy_res(sc);
991 /************************************************************************/
992 /* Interrupt Handler */
993 /************************************************************************/
996 pccbb_intr(void *arg)
998 struct pccbb_softc *sc = arg;
1002 * This ISR needs work XXX
1004 sockevent = pccbb_get(sc, CBB_SOCKET_EVENT);
1006 /* ack the interrupt */
1007 pccbb_setb(sc, CBB_SOCKET_EVENT, sockevent);
1009 if (sockevent & CBB_SOCKET_EVENT_CD) {
1012 mtx_unlock(&sc->mtx);
1014 if (sockevent & CBB_SOCKET_EVENT_CSTS) {
1015 DPRINTF((" cstsevent occured: 0x%08x\n",
1016 pccbb_get(sc, CBB_SOCKET_STATE)));
1018 if (sockevent & CBB_SOCKET_EVENT_POWER) {
1019 DPRINTF((" pwrevent occured: 0x%08x\n",
1020 pccbb_get(sc, CBB_SOCKET_STATE)));
1025 /* Call the interrupt if we still have the card */
1028 /************************************************************************/
1029 /* Generic Power functions */
1030 /************************************************************************/
1033 pccbb_detect_voltage(device_t brdev)
1035 struct pccbb_softc *sc = device_get_softc(brdev);
1037 int vol = CARD_UKN_CARD;
1039 psr = pccbb_get(sc, CBB_SOCKET_STATE);
1041 if (psr & CBB_SOCKET_STAT_5VCARD)
1042 vol |= CARD_5V_CARD;
1043 if (psr & CBB_SOCKET_STAT_3VCARD)
1044 vol |= CARD_3V_CARD;
1045 if (psr & CBB_SOCKET_STAT_XVCARD)
1046 vol |= CARD_XV_CARD;
1047 if (psr & CBB_SOCKET_STAT_YVCARD)
1048 vol |= CARD_YV_CARD;
1054 pccbb_power(device_t brdev, int volts)
1056 uint32_t status, sock_ctrl;
1057 struct pccbb_softc *sc = device_get_softc(brdev);
1061 DEVPRINTF((sc->dev, "pccbb_power: %s and %s [%x]\n",
1062 (volts & CARD_VCCMASK) == CARD_VCC_UC ? "CARD_VCC_UC" :
1063 (volts & CARD_VCCMASK) == CARD_VCC_5V ? "CARD_VCC_5V" :
1064 (volts & CARD_VCCMASK) == CARD_VCC_3V ? "CARD_VCC_3V" :
1065 (volts & CARD_VCCMASK) == CARD_VCC_XV ? "CARD_VCC_XV" :
1066 (volts & CARD_VCCMASK) == CARD_VCC_YV ? "CARD_VCC_YV" :
1067 (volts & CARD_VCCMASK) == CARD_VCC_0V ? "CARD_VCC_0V" :
1069 (volts & CARD_VPPMASK) == CARD_VPP_UC ? "CARD_VPP_UC" :
1070 (volts & CARD_VPPMASK) == CARD_VPP_12V ? "CARD_VPP_12V" :
1071 (volts & CARD_VPPMASK) == CARD_VPP_VCC ? "CARD_VPP_VCC" :
1072 (volts & CARD_VPPMASK) == CARD_VPP_0V ? "CARD_VPP_0V" :
1076 status = pccbb_get(sc, CBB_SOCKET_STATE);
1077 sock_ctrl = pccbb_get(sc, CBB_SOCKET_CONTROL);
1079 switch (volts & CARD_VCCMASK) {
1083 if (CBB_SOCKET_STAT_5VCARD & status) { /* check 5 V card */
1084 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK;
1085 sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V;
1087 device_printf(sc->dev,
1088 "BAD voltage request: no 5 V card\n");
1092 if (CBB_SOCKET_STAT_3VCARD & status) {
1093 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK;
1094 sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V;
1096 device_printf(sc->dev,
1097 "BAD voltage request: no 3.3 V card\n");
1101 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK;
1104 return (0); /* power NEVER changed */
1108 switch (volts & CARD_VPPMASK) {
1112 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK;
1115 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK;
1116 sock_ctrl |= ((sock_ctrl >> 4) & 0x07);
1119 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK;
1120 sock_ctrl |= CBB_SOCKET_CTRL_VPP_12V;
1124 if (pccbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl)
1125 return (1); /* no change necessary */
1127 pccbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl);
1128 status = pccbb_get(sc, CBB_SOCKET_STATE);
1131 * XXX This busy wait is bogus. We should wait for a power
1132 * interrupt and then whine if the status is bad. If we're
1133 * worried about the card not coming up, then we should also
1134 * schedule a timeout which we can cacel in the power interrupt.
1139 sockevent = pccbb_get(sc, CBB_SOCKET_EVENT);
1140 } while (!(sockevent & CBB_SOCKET_EVENT_POWER) && --timeout > 0);
1141 /* reset event status */
1142 /* XXX should only reset EVENT_POWER */
1143 pccbb_set(sc, CBB_SOCKET_EVENT, sockevent);
1145 printf ("VCC supply failed.\n");
1150 * delay 400 ms: thgough the standard defines that the Vcc set-up time
1151 * is 20 ms, some PC-Card bridge requires longer duration.
1152 * XXX Note: We should check the stutus AFTER the delay to give time
1153 * for things to stabilize.
1157 if (status & CBB_SOCKET_STAT_BADVCC) {
1158 device_printf(sc->dev,
1159 "bad Vcc request. ctrl=0x%x, status=0x%x\n",
1161 printf("pccbb_power: %s and %s [%x]\n",
1162 (volts & CARD_VCCMASK) == CARD_VCC_UC ? "CARD_VCC_UC" :
1163 (volts & CARD_VCCMASK) == CARD_VCC_5V ? "CARD_VCC_5V" :
1164 (volts & CARD_VCCMASK) == CARD_VCC_3V ? "CARD_VCC_3V" :
1165 (volts & CARD_VCCMASK) == CARD_VCC_XV ? "CARD_VCC_XV" :
1166 (volts & CARD_VCCMASK) == CARD_VCC_YV ? "CARD_VCC_YV" :
1167 (volts & CARD_VCCMASK) == CARD_VCC_0V ? "CARD_VCC_0V" :
1169 (volts & CARD_VPPMASK) == CARD_VPP_UC ? "CARD_VPP_UC" :
1170 (volts & CARD_VPPMASK) == CARD_VPP_12V ? "CARD_VPP_12V":
1171 (volts & CARD_VPPMASK) == CARD_VPP_VCC ? "CARD_VPP_VCC":
1172 (volts & CARD_VPPMASK) == CARD_VPP_0V ? "CARD_VPP_0V" :
1177 return (1); /* power changed correctly */
1181 * detect the voltage for the card, and set it. Since the power
1182 * used is the square of the voltage, lower voltages is a big win
1183 * and what Windows does (and what Microsoft prefers). The MS paper
1184 * also talks about preferring the CIS entry as well.
1187 pccbb_do_power(device_t brdev)
1191 /* Prefer lowest voltage supported */
1192 voltage = pccbb_detect_voltage(brdev);
1193 pccbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
1194 if (voltage & CARD_YV_CARD)
1195 pccbb_power(brdev, CARD_VCC_YV | CARD_VPP_VCC);
1196 else if (voltage & CARD_XV_CARD)
1197 pccbb_power(brdev, CARD_VCC_XV | CARD_VPP_VCC);
1198 else if (voltage & CARD_3V_CARD)
1199 pccbb_power(brdev, CARD_VCC_3V | CARD_VPP_VCC);
1200 else if (voltage & CARD_5V_CARD)
1201 pccbb_power(brdev, CARD_VCC_5V | CARD_VPP_VCC);
1203 device_printf(brdev, "Unknown card voltage\n");
1209 /************************************************************************/
1210 /* Cardbus power functions */
1211 /************************************************************************/
1214 pccbb_cardbus_reset(device_t brdev)
1216 struct pccbb_softc *sc = device_get_softc(brdev);
1219 delay_us = sc->chipset == CB_RF5C47X ? 400*1000 : 20*1000;
1221 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2);
1225 /* If a card exists, unreset it! */
1226 if ((pccbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD) == 0) {
1227 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL,
1228 &~CBBM_BRIDGECTRL_RESET, 2);
1234 pccbb_cardbus_power_enable_socket(device_t brdev, device_t child)
1236 struct pccbb_softc *sc = device_get_softc(brdev);
1239 if ((pccbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD) ==
1243 err = pccbb_do_power(brdev);
1246 pccbb_cardbus_reset(brdev);
1251 pccbb_cardbus_power_disable_socket(device_t brdev, device_t child)
1253 pccbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
1254 pccbb_cardbus_reset(brdev);
1257 /************************************************************************/
1258 /* Cardbus Resource */
1259 /************************************************************************/
1262 pccbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end)
1267 if ((win < 0) || (win > 1)) {
1269 "pccbb_cardbus_io_open: window out of range %d\n", win));
1273 basereg = win * 8 + CBBR_IOBASE0;
1274 limitreg = win * 8 + CBBR_IOLIMIT0;
1276 pci_write_config(brdev, basereg, start, 4);
1277 pci_write_config(brdev, limitreg, end, 4);
1282 pccbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end)
1287 if ((win < 0) || (win > 1)) {
1289 "pccbb_cardbus_mem_open: window out of range %d\n", win));
1293 basereg = win*8 + CBBR_MEMBASE0;
1294 limitreg = win*8 + CBBR_MEMLIMIT0;
1296 pci_write_config(brdev, basereg, start, 4);
1297 pci_write_config(brdev, limitreg, end, 4);
1302 * XXX The following function belongs in the pci bus layer.
1305 pccbb_cardbus_auto_open(struct pccbb_softc *sc, int type)
1309 struct pccbb_reslist *rle;
1311 int prefetchable[2];
1314 starts[0] = starts[1] = 0xffffffff;
1315 ends[0] = ends[1] = 0;
1317 if (type == SYS_RES_MEMORY)
1318 align = CBB_MEMALIGN;
1319 else if (type == SYS_RES_IOPORT)
1320 align = CBB_IOALIGN;
1324 SLIST_FOREACH(rle, &sc->rl, link) {
1325 if (rle->type != type)
1327 else if (rle->res == NULL) {
1328 device_printf(sc->dev, "WARNING: Resource not reserved? "
1329 "(type=%d, addr=%lx)\n",
1330 rle->type, rman_get_start(rle->res));
1331 } else if (!(rman_get_flags(rle->res) & RF_ACTIVE)) {
1333 } else if (starts[0] == 0xffffffff) {
1334 starts[0] = rman_get_start(rle->res);
1335 ends[0] = rman_get_end(rle->res);
1337 rman_get_flags(rle->res) & RF_PREFETCHABLE;
1338 } else if (rman_get_end(rle->res) > ends[0] &&
1339 rman_get_start(rle->res) - ends[0] <
1340 PCCBB_AUTO_OPEN_SMALLHOLE && prefetchable[0] ==
1341 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) {
1342 ends[0] = rman_get_end(rle->res);
1343 } else if (rman_get_start(rle->res) < starts[0] &&
1344 starts[0] - rman_get_end(rle->res) <
1345 PCCBB_AUTO_OPEN_SMALLHOLE && prefetchable[0] ==
1346 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) {
1347 starts[0] = rman_get_start(rle->res);
1348 } else if (starts[1] == 0xffffffff) {
1349 starts[1] = rman_get_start(rle->res);
1350 ends[1] = rman_get_end(rle->res);
1352 rman_get_flags(rle->res) & RF_PREFETCHABLE;
1353 } else if (rman_get_end(rle->res) > ends[1] &&
1354 rman_get_start(rle->res) - ends[1] <
1355 PCCBB_AUTO_OPEN_SMALLHOLE && prefetchable[1] ==
1356 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) {
1357 ends[1] = rman_get_end(rle->res);
1358 } else if (rman_get_start(rle->res) < starts[1] &&
1359 starts[1] - rman_get_end(rle->res) <
1360 PCCBB_AUTO_OPEN_SMALLHOLE && prefetchable[1] ==
1361 (rman_get_flags(rle->res) & RF_PREFETCHABLE)) {
1362 starts[1] = rman_get_start(rle->res);
1367 diffs[0] = diffs[1] = 0xffffffff;
1368 if (rman_get_start(rle->res) > ends[0])
1369 diffs[0] = rman_get_start(rle->res) - ends[0];
1370 else if (rman_get_end(rle->res) < starts[0])
1371 diffs[0] = starts[0] - rman_get_end(rle->res);
1372 if (rman_get_start(rle->res) > ends[1])
1373 diffs[1] = rman_get_start(rle->res) - ends[1];
1374 else if (rman_get_end(rle->res) < starts[1])
1375 diffs[1] = starts[1] - rman_get_end(rle->res);
1377 win = (diffs[0] <= diffs[1])?0:1;
1378 if (rman_get_start(rle->res) > ends[win])
1379 ends[win] = rman_get_end(rle->res);
1380 else if (rman_get_end(rle->res) < starts[win])
1381 starts[win] = rman_get_start(rle->res);
1382 if (!(rman_get_flags(rle->res) & RF_PREFETCHABLE))
1383 prefetchable[win] = 0;
1386 if (starts[0] != 0xffffffff)
1387 starts[0] -= starts[0] % align;
1388 if (starts[1] != 0xffffffff)
1389 starts[1] -= starts[1] % align;
1390 if (ends[0] % align != 0)
1391 ends[0] += align - ends[0]%align - 1;
1392 if (ends[1] % align != 0)
1393 ends[1] += align - ends[1]%align - 1;
1396 if (type == SYS_RES_MEMORY) {
1397 pccbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]);
1398 pccbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]);
1399 reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2);
1400 reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0|
1401 CBBM_BRIDGECTRL_PREFETCH_1);
1402 reg |= (prefetchable[0]?CBBM_BRIDGECTRL_PREFETCH_0:0)|
1403 (prefetchable[1]?CBBM_BRIDGECTRL_PREFETCH_1:0);
1404 pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2);
1405 } else if (type == SYS_RES_IOPORT) {
1406 pccbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]);
1407 pccbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]);
1412 pccbb_cardbus_activate_resource(device_t brdev, device_t child, int type,
1413 int rid, struct resource *res)
1417 ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child,
1421 pccbb_cardbus_auto_open(device_get_softc(brdev), type);
1426 pccbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type,
1427 int rid, struct resource *res)
1431 ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child,
1435 pccbb_cardbus_auto_open(device_get_softc(brdev), type);
1439 static struct resource *
1440 pccbb_cardbus_alloc_resource(device_t brdev, device_t child, int type,
1441 int *rid, u_long start, u_long end, u_long count, uint flags)
1443 struct pccbb_softc *sc = device_get_softc(brdev);
1445 struct resource *res;
1449 tmp = rman_get_start(sc->irq_res);
1450 if (start > tmp || end < tmp || count != 1) {
1451 device_printf(child, "requested interrupt %ld-%ld,"
1452 "count = %ld not supported by pccbb\n",
1458 case SYS_RES_IOPORT:
1459 if (start <= pccbb_start_32_io)
1460 start = pccbb_start_32_io;
1464 case SYS_RES_MEMORY:
1465 if (start <= pccbb_start_mem)
1466 start = pccbb_start_mem;
1472 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid,
1473 start, end, count, flags & ~RF_ACTIVE);
1475 printf("pccbb alloc res fail\n");
1478 pccbb_insert_res(sc, res, type, *rid);
1479 if (flags & RF_ACTIVE)
1480 if (bus_activate_resource(child, type, *rid, res) != 0) {
1481 bus_release_resource(child, type, *rid, res);
1489 pccbb_cardbus_release_resource(device_t brdev, device_t child, int type,
1490 int rid, struct resource *res)
1492 struct pccbb_softc *sc = device_get_softc(brdev);
1495 if (rman_get_flags(res) & RF_ACTIVE) {
1496 error = bus_deactivate_resource(child, type, rid, res);
1500 pccbb_remove_res(sc, res);
1501 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child,
1505 /************************************************************************/
1506 /* PC Card Power Functions */
1507 /************************************************************************/
1510 pccbb_pcic_power_enable_socket(device_t brdev, device_t child)
1512 struct pccbb_softc *sc = device_get_softc(brdev);
1515 DPRINTF(("pccbb_pcic_socket_enable:\n"));
1517 /* power down/up the socket to reset */
1518 err = pccbb_do_power(brdev);
1521 exca_reset(&sc->exca, child);
1527 pccbb_pcic_power_disable_socket(device_t brdev, device_t child)
1529 struct pccbb_softc *sc = device_get_softc(brdev);
1531 DPRINTF(("pccbb_pcic_socket_disable\n"));
1533 /* reset signal asserting... */
1534 exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET);
1537 /* power down the socket */
1538 pccbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
1539 exca_clrb(&sc->exca, EXCA_PWRCTL, EXCA_PWRCTL_OE);
1541 /* wait 300ms until power fails (Tpf). */
1545 /************************************************************************/
1547 /************************************************************************/
1550 pccbb_power_enable_socket(device_t brdev, device_t child)
1552 struct pccbb_softc *sc = device_get_softc(brdev);
1554 if (sc->flags & PCCBB_16BIT_CARD)
1555 return (pccbb_pcic_power_enable_socket(brdev, child));
1557 return (pccbb_cardbus_power_enable_socket(brdev, child));
1561 pccbb_power_disable_socket(device_t brdev, device_t child)
1563 struct pccbb_softc *sc = device_get_softc(brdev);
1564 if (sc->flags & PCCBB_16BIT_CARD)
1565 pccbb_pcic_power_disable_socket(brdev, child);
1567 pccbb_cardbus_power_disable_socket(brdev, child);
1570 pccbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid,
1571 struct resource *res)
1574 struct pccbb_softc *sc = device_get_softc(brdev);
1575 if (!(rman_get_flags(res) & RF_ACTIVE)) { /* not already activated */
1577 case SYS_RES_IOPORT:
1578 err = exca_io_map(&sc->exca, 0, res);
1580 case SYS_RES_MEMORY:
1581 err = exca_mem_map(&sc->exca, 0, res);
1591 return (BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child,
1596 pccbb_pcic_deactivate_resource(device_t brdev, device_t child, int type,
1597 int rid, struct resource *res)
1599 struct pccbb_softc *sc = device_get_softc(brdev);
1601 if (rman_get_flags(res) & RF_ACTIVE) { /* if activated */
1603 case SYS_RES_IOPORT:
1604 if (exca_io_unmap_res(&sc->exca, res))
1607 case SYS_RES_MEMORY:
1608 if (exca_mem_unmap_res(&sc->exca, res))
1613 return (BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child,
1617 static struct resource *
1618 pccbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid,
1619 u_long start, u_long end, u_long count, uint flags)
1621 struct resource *res = NULL;
1622 struct pccbb_softc *sc = device_get_softc(brdev);
1626 case SYS_RES_MEMORY:
1627 if (start < pccbb_start_mem)
1628 start = pccbb_start_mem;
1631 flags = (flags & ~RF_ALIGNMENT_MASK) |
1632 rman_make_alignment_flags(CBB_MEMALIGN);
1634 case SYS_RES_IOPORT:
1635 if (start < pccbb_start_16_io)
1636 start = pccbb_start_16_io;
1641 tmp = rman_get_start(sc->irq_res);
1642 if (start > tmp || end < tmp || count != 1) {
1643 device_printf(child, "requested interrupt %ld-%ld,"
1644 "count = %ld not supported by pccbb\n",
1648 flags |= RF_SHAREABLE;
1649 start = end = rman_get_start(sc->irq_res);
1652 res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid,
1653 start, end, count, flags & ~RF_ACTIVE);
1656 pccbb_insert_res(sc, res, type, *rid);
1657 if (flags & RF_ACTIVE) {
1658 if (bus_activate_resource(child, type, *rid, res) != 0) {
1659 bus_release_resource(child, type, *rid, res);
1668 pccbb_pcic_release_resource(device_t brdev, device_t child, int type,
1669 int rid, struct resource *res)
1671 struct pccbb_softc *sc = device_get_softc(brdev);
1674 if (rman_get_flags(res) & RF_ACTIVE) {
1675 error = bus_deactivate_resource(child, type, rid, res);
1679 pccbb_remove_res(sc, res);
1680 return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child,
1684 /************************************************************************/
1685 /* PC Card methods */
1686 /************************************************************************/
1689 pccbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid,
1692 struct pccbb_softc *sc = device_get_softc(brdev);
1693 struct resource *res;
1695 if (type != SYS_RES_MEMORY)
1697 res = pccbb_find_res(sc, type, rid);
1699 device_printf(brdev,
1700 "set_res_flags: specified rid not found\n");
1703 return (exca_mem_set_flags(&sc->exca, res, flags));
1707 pccbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid,
1708 uint32_t cardaddr, uint32_t *deltap)
1710 struct pccbb_softc *sc = device_get_softc(brdev);
1711 struct resource *res;
1713 res = pccbb_find_res(sc, SYS_RES_MEMORY, rid);
1715 device_printf(brdev,
1716 "set_memory_offset: specified rid not found\n");
1719 return (exca_mem_set_offset(&sc->exca, res, cardaddr, deltap));
1722 /************************************************************************/
1724 /************************************************************************/
1728 pccbb_activate_resource(device_t brdev, device_t child, int type, int rid,
1731 struct pccbb_softc *sc = device_get_softc(brdev);
1733 if (sc->flags & PCCBB_16BIT_CARD)
1734 return (pccbb_pcic_activate_resource(brdev, child, type, rid, r));
1736 return (pccbb_cardbus_activate_resource(brdev, child, type, rid,
1741 pccbb_deactivate_resource(device_t brdev, device_t child, int type,
1742 int rid, struct resource *r)
1744 struct pccbb_softc *sc = device_get_softc(brdev);
1746 if (sc->flags & PCCBB_16BIT_CARD)
1747 return (pccbb_pcic_deactivate_resource(brdev, child, type,
1750 return (pccbb_cardbus_deactivate_resource(brdev, child, type,
1754 static struct resource *
1755 pccbb_alloc_resource(device_t brdev, device_t child, int type, int *rid,
1756 u_long start, u_long end, u_long count, uint flags)
1758 struct pccbb_softc *sc = device_get_softc(brdev);
1760 if (sc->flags & PCCBB_16BIT_CARD)
1761 return (pccbb_pcic_alloc_resource(brdev, child, type, rid,
1762 start, end, count, flags));
1764 return (pccbb_cardbus_alloc_resource(brdev, child, type, rid,
1765 start, end, count, flags));
1769 pccbb_release_resource(device_t brdev, device_t child, int type, int rid,
1772 struct pccbb_softc *sc = device_get_softc(brdev);
1774 if (sc->flags & PCCBB_16BIT_CARD)
1775 return (pccbb_pcic_release_resource(brdev, child, type,
1778 return (pccbb_cardbus_release_resource(brdev, child, type,
1783 pccbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result)
1785 struct pccbb_softc *sc = device_get_softc(brdev);
1789 *result = sc->secbus;
1796 pccbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value)
1798 struct pccbb_softc *sc = device_get_softc(brdev);
1808 /************************************************************************/
1809 /* PCI compat methods */
1810 /************************************************************************/
1813 pccbb_maxslots(device_t brdev)
1819 pccbb_read_config(device_t brdev, int b, int s, int f, int reg, int width)
1822 * Pass through to the next ppb up the chain (i.e. our grandparent).
1824 return (PCIB_READ_CONFIG(device_get_parent(device_get_parent(brdev)),
1825 b, s, f, reg, width));
1829 pccbb_write_config(device_t brdev, int b, int s, int f, int reg, uint32_t val,
1833 * Pass through to the next ppb up the chain (i.e. our grandparent).
1835 PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(brdev)),
1836 b, s, f, reg, val, width);
1840 pccbb_suspend(device_t self)
1843 struct pccbb_softc* sc = device_get_softc(self);
1845 bus_teardown_intr(self, sc->irq_res, sc->intrhand);
1846 error = bus_generic_suspend(self);
1851 pccbb_resume(device_t self)
1854 struct pccbb_softc *sc = (struct pccbb_softc *)device_get_softc(self);
1857 pci_write_config(self, CBBR_SOCKBASE, rman_get_start(sc->base_res), 4);
1858 DEVPRINTF((self, "PCI Memory allocated: %08lx\n",
1859 rman_get_start(sc->base_res)));
1863 /* re-establish the interrupt. */
1864 if (bus_setup_intr(self, sc->irq_res, INTR_TYPE_AV, pccbb_intr, sc,
1866 device_printf(self, "couldn't re-establish interrupt");
1867 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res);
1868 bus_release_resource(self, SYS_RES_MEMORY, CBBR_SOCKBASE,
1871 sc->base_res = NULL;
1875 /* CSC Interrupt: Card detect interrupt on */
1876 pccbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD);
1878 /* reset interrupt */
1879 tmp = pccbb_get(sc, CBB_SOCKET_EVENT);
1880 pccbb_set(sc, CBB_SOCKET_EVENT, tmp);
1883 * Some BIOSes will not save the BARs for the pci chips, so we
1884 * must do it ourselves. If the BAR is reset to 0 for an I/O
1885 * device, it will read back as 0x1, so no explicit test for
1886 * memory devices are needed.
1888 * Note: The PCI bus code should do this automatically for us on
1889 * suspend/resume, but until it does, we have to cope.
1891 if (pci_read_config(self, CBBR_SOCKBASE, 4) == 0)
1892 pci_write_config(self, CBBR_SOCKBASE,
1893 rman_get_start(sc->base_res), 4);
1895 error = bus_generic_resume(self);
1900 static device_method_t pccbb_methods[] = {
1901 /* Device interface */
1902 DEVMETHOD(device_probe, pccbb_probe),
1903 DEVMETHOD(device_attach, pccbb_attach),
1904 DEVMETHOD(device_detach, pccbb_detach),
1905 DEVMETHOD(device_shutdown, pccbb_shutdown),
1906 DEVMETHOD(device_suspend, pccbb_suspend),
1907 DEVMETHOD(device_resume, pccbb_resume),
1910 DEVMETHOD(bus_print_child, bus_generic_print_child),
1911 DEVMETHOD(bus_read_ivar, pccbb_read_ivar),
1912 DEVMETHOD(bus_write_ivar, pccbb_write_ivar),
1913 DEVMETHOD(bus_alloc_resource, pccbb_alloc_resource),
1914 DEVMETHOD(bus_release_resource, pccbb_release_resource),
1915 DEVMETHOD(bus_activate_resource, pccbb_activate_resource),
1916 DEVMETHOD(bus_deactivate_resource, pccbb_deactivate_resource),
1917 DEVMETHOD(bus_driver_added, pccbb_driver_added),
1918 DEVMETHOD(bus_child_detached, pccbb_child_detached),
1919 DEVMETHOD(bus_setup_intr, pccbb_setup_intr),
1920 DEVMETHOD(bus_teardown_intr, pccbb_teardown_intr),
1922 /* 16-bit card interface */
1923 DEVMETHOD(card_set_res_flags, pccbb_pcic_set_res_flags),
1924 DEVMETHOD(card_set_memory_offset, pccbb_pcic_set_memory_offset),
1925 DEVMETHOD(card_reprobe_card, pccbb_card_reprobe),
1927 /* power interface */
1928 DEVMETHOD(power_enable_socket, pccbb_power_enable_socket),
1929 DEVMETHOD(power_disable_socket, pccbb_power_disable_socket),
1931 /* pcib compatibility interface */
1932 DEVMETHOD(pcib_maxslots, pccbb_maxslots),
1933 DEVMETHOD(pcib_read_config, pccbb_read_config),
1934 DEVMETHOD(pcib_write_config, pccbb_write_config),
1938 static driver_t pccbb_driver = {
1941 sizeof(struct pccbb_softc)
1944 static devclass_t pccbb_devclass;
1946 DRIVER_MODULE(pccbb, pci, pccbb_driver, pccbb_devclass, 0, 0);