sys/dev/pccbb/pccbb.c

   1 /*
   2  * Copyright (c) 2002 M. Warner Losh.
   3  * Copyright (c) 2000,2001 Jonathan Chen.
   4  * All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions, and the following disclaimer,
  11  *    without modification, immediately at the beginning of the file.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in
  14  *    the documentation and/or other materials provided with the
  15  *    distribution.
  16  *
  17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  20  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
  21  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  27  * SUCH DAMAGE.
  28  *
  29  * $FreeBSD$
  30  */
  31
  32 /*
  33  * Copyright (c) 1998, 1999 and 2000
  34  *      HAYAKAWA Koichi.  All rights reserved.
  35  *
  36  * Redistribution and use in source and binary forms, with or without
  37  * modification, are permitted provided that the following conditions
  38  * are met:
  39  * 1. Redistributions of source code must retain the above copyright
  40  *    notice, this list of conditions and the following disclaimer.
  41  * 2. Redistributions in binary form must reproduce the above copyright
  42  *    notice, this list of conditions and the following disclaimer in the
  43  *    documentation and/or other materials provided with the distribution.
  44  * 3. All advertising materials mentioning features or use of this software
  45  *    must display the following acknowledgement:
  46  *      This product includes software developed by HAYAKAWA Koichi.
  47  * 4. The name of the author may not be used to endorse or promote products
  48  *    derived from this software without specific prior written permission.
  49  *
  50  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  51  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  52  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  53  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  54  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  55  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  56  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  57  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  58  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  59  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  60  */
  61
  62 /*
  63  * Driver for PCI to Cardbus Bridge chips
  64  *
  65  * References:
  66  *  TI Datasheets:
  67  *   http://www-s.ti.com/cgi-bin/sc/generic2.cgi?family=PCI+CARDBUS+CONTROLLERS
  68  *
  69  * Written by Jonathan Chen <jon@freebsd.org>
  70  * The author would like to acknowledge:
  71  *  * HAYAKAWA Koichi: Author of the NetBSD code for the same thing
  72  *  * Warner Losh: Newbus/newcard guru and author of the pccard side of things
  73  *  * YAMAMOTO Shigeru: Author of another FreeBSD cardbus driver
  74  *  * David Cross: Author of the initial ugly hack for a specific cardbus card
  75  */
  76
  77 #include <sys/param.h>
  78 #include <sys/systm.h>
  79 #include <sys/proc.h>
  80 #include <sys/condvar.h>
  81 #include <sys/errno.h>
  82 #include <sys/kernel.h>
  83 #include <sys/lock.h>
  84 #include <sys/malloc.h>
  85 #include <sys/mutex.h>
  86 #include <sys/sysctl.h>
  87 #include <sys/kthread.h>
  88 #include <sys/bus.h>
  89 #include <machine/bus.h>
  90 #include <sys/rman.h>
  91 #include <machine/resource.h>
  92
  93 #include <pci/pcireg.h>
  94 #include <pci/pcivar.h>
  95 #include <machine/clock.h>
  96
  97 #include <dev/pccard/pccardreg.h>
  98 #include <dev/pccard/pccardvar.h>
  99
 100 #include <dev/exca/excareg.h>
 101 #include <dev/exca/excavar.h>
 102
 103 #include <dev/pccbb/pccbbreg.h>
 104 #include <dev/pccbb/pccbbvar.h>
 105
 106 #include "power_if.h"
 107 #include "card_if.h"
 108 #include "pcib_if.h"
 109
 110 #define DPRINTF(x) do { if (cbb_debug) printf x; } while (0)
 111 #define DEVPRINTF(x) do { if (cbb_debug) device_printf x; } while (0)
 112
 113 #define PCI_MASK_CONFIG(DEV,REG,MASK,SIZE)                              \
 114         pci_write_config(DEV, REG, pci_read_config(DEV, REG, SIZE) MASK, SIZE)
 115 #define PCI_MASK2_CONFIG(DEV,REG,MASK1,MASK2,SIZE)                      \
 116         pci_write_config(DEV, REG, (                                    \
 117                 pci_read_config(DEV, REG, SIZE) MASK1) MASK2, SIZE)
 118
 119 #define PCCBB_START_MEM 0x88000000
 120 #define PCCBB_START_32_IO 0x1000
 121 #define PCCBB_START_16_IO 0x100
 122
 123 struct yenta_chipinfo {
 124         uint32_t yc_id;
 125         const   char *yc_name;
 126         int     yc_chiptype;
 127 } yc_chipsets[] = {
 128         /* Texas Instruments chips */
 129         {PCIC_ID_TI1031, "TI1031 PCI-PC Card Bridge", CB_TI113X},
 130         {PCIC_ID_TI1130, "TI1130 PCI-CardBus Bridge", CB_TI113X},
 131         {PCIC_ID_TI1131, "TI1131 PCI-CardBus Bridge", CB_TI113X},
 132
 133         {PCIC_ID_TI1210, "TI1210 PCI-CardBus Bridge", CB_TI12XX},
 134         {PCIC_ID_TI1211, "TI1211 PCI-CardBus Bridge", CB_TI12XX},
 135         {PCIC_ID_TI1220, "TI1220 PCI-CardBus Bridge", CB_TI12XX},
 136         {PCIC_ID_TI1221, "TI1221 PCI-CardBus Bridge", CB_TI12XX},
 137         {PCIC_ID_TI1225, "TI1225 PCI-CardBus Bridge", CB_TI12XX},
 138         {PCIC_ID_TI1250, "TI1250 PCI-CardBus Bridge", CB_TI125X},
 139         {PCIC_ID_TI1251, "TI1251 PCI-CardBus Bridge", CB_TI125X},
 140         {PCIC_ID_TI1251B,"TI1251B PCI-CardBus Bridge",CB_TI125X},
 141         {PCIC_ID_TI1260, "TI1260 PCI-CardBus Bridge", CB_TI12XX},
 142         {PCIC_ID_TI1260B,"TI1260B PCI-CardBus Bridge",CB_TI12XX},
 143         {PCIC_ID_TI1410, "TI1410 PCI-CardBus Bridge", CB_TI12XX},
 144         {PCIC_ID_TI1420, "TI1420 PCI-CardBus Bridge", CB_TI12XX},
 145         {PCIC_ID_TI1421, "TI1421 PCI-CardBus Bridge", CB_TI12XX},
 146         {PCIC_ID_TI1450, "TI1450 PCI-CardBus Bridge", CB_TI125X},
 147         {PCIC_ID_TI1451, "TI1451 PCI-CardBus Bridge", CB_TI12XX},
 148         {PCIC_ID_TI1510, "TI1510 PCI-CardBus Bridge", CB_TI12XX},
 149         {PCIC_ID_TI1520, "TI1520 PCI-CardBus Bridge", CB_TI12XX},
 150         {PCIC_ID_TI4410, "TI4410 PCI-CardBus Bridge", CB_TI12XX},
 151         {PCIC_ID_TI4450, "TI4450 PCI-CardBus Bridge", CB_TI12XX},
 152         {PCIC_ID_TI4451, "TI4451 PCI-CardBus Bridge", CB_TI12XX},
 153         {PCIC_ID_TI4510, "TI4510 PCI-CardBus Bridge", CB_TI12XX},
 154
 155         /* Ricoh chips */
 156         {PCIC_ID_RICOH_RL5C465, "RF5C465 PCI-CardBus Bridge", CB_RF5C46X},
 157         {PCIC_ID_RICOH_RL5C466, "RF5C466 PCI-CardBus Bridge", CB_RF5C46X},
 158         {PCIC_ID_RICOH_RL5C475, "RF5C475 PCI-CardBus Bridge", CB_RF5C47X},
 159         {PCIC_ID_RICOH_RL5C476, "RF5C476 PCI-CardBus Bridge", CB_RF5C47X},
 160         {PCIC_ID_RICOH_RL5C477, "RF5C477 PCI-CardBus Bridge", CB_RF5C47X},
 161         {PCIC_ID_RICOH_RL5C478, "RF5C478 PCI-CardBus Bridge", CB_RF5C47X},
 162
 163         /* Toshiba products */
 164         {PCIC_ID_TOPIC95, "ToPIC95 PCI-CardBus Bridge", CB_TOPIC95},
 165         {PCIC_ID_TOPIC95B, "ToPIC95B PCI-CardBus Bridge", CB_TOPIC95},
 166         {PCIC_ID_TOPIC97, "ToPIC97 PCI-CardBus Bridge", CB_TOPIC97},
 167         {PCIC_ID_TOPIC100, "ToPIC100 PCI-CardBus Bridge", CB_TOPIC97},
 168
 169         /* Cirrus Logic */
 170         {PCIC_ID_CLPD6832, "CLPD6832 PCI-CardBus Bridge", CB_CIRRUS},
 171         {PCIC_ID_CLPD6833, "CLPD6833 PCI-CardBus Bridge", CB_CIRRUS},
 172         {PCIC_ID_CLPD6834, "CLPD6834 PCI-CardBus Bridge", CB_CIRRUS},
 173
 174         /* 02Micro */
 175         {PCIC_ID_OZ6832, "O2Mirco OZ6832/6833 PCI-CardBus Bridge", CB_CIRRUS},
 176         {PCIC_ID_OZ6860, "O2Mirco OZ6836/6860 PCI-CardBus Bridge", CB_CIRRUS},
 177         {PCIC_ID_OZ6872, "O2Mirco OZ6812/6872 PCI-CardBus Bridge", CB_CIRRUS},
 178         {PCIC_ID_OZ6912, "O2Mirco OZ6912/6972 PCI-CardBus Bridge", CB_CIRRUS},
 179         {PCIC_ID_OZ6922, "O2Mirco OZ6822 PCI-CardBus Bridge", CB_CIRRUS},
 180         {PCIC_ID_OZ6933, "O2Mirco OZ6833 PCI-CardBus Bridge", CB_CIRRUS},
 181
 182         /* sentinel */
 183         {0 /* null id */, "unknown", CB_UNKNOWN},
 184 };
 185
 186 /* sysctl vars */
 187 SYSCTL_NODE(_hw, OID_AUTO, cbb, CTLFLAG_RD, 0, "CBB parameters");
 188
 189 /* There's no way to say TUNEABLE_LONG to get the right types */
 190 u_long pccbb_start_mem = PCCBB_START_MEM;
 191 TUNABLE_INT("hw.cbb.start_memory", (int *)&pccbb_start_mem);
 192 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_memory, CTLFLAG_RW,
 193     &pccbb_start_mem, PCCBB_START_MEM,
 194     "Starting address for memory allocations");
 195
 196 u_long pccbb_start_16_io = PCCBB_START_16_IO;
 197 TUNABLE_INT("hw.cbb.start_16_io", (int *)&pccbb_start_16_io);
 198 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_16_io, CTLFLAG_RW,
 199     &pccbb_start_16_io, PCCBB_START_16_IO,
 200     "Starting ioport for 16-bit cards");
 201
 202 u_long pccbb_start_32_io = PCCBB_START_32_IO;
 203 TUNABLE_INT("hw.cbb.start_32_io", (int *)&pccbb_start_32_io);
 204 SYSCTL_ULONG(_hw_cbb, OID_AUTO, start_32_io, CTLFLAG_RW,
 205     &pccbb_start_32_io, PCCBB_START_32_IO,
 206     "Starting ioport for 32-bit cards");
 207
 208 int cbb_debug = 0;
 209 TUNABLE_INT("hw.cbb.debug", &cbb_debug);
 210 SYSCTL_ULONG(_hw_cbb, OID_AUTO, debug, CTLFLAG_RW, &cbb_debug, 0,
 211     "Verbose cardbus bridge debugging");
 212
 213 static int      pccbb_chipset(uint32_t pci_id, const char **namep);
 214 static int      pccbb_probe(device_t brdev);
 215 static void     pccbb_chipinit(struct pccbb_softc *sc);
 216 static int      pccbb_attach(device_t brdev);
 217 static int      pccbb_detach(device_t brdev);
 218 static int      pccbb_shutdown(device_t brdev);
 219 static void     pccbb_driver_added(device_t brdev, driver_t *driver);
 220 static void     pccbb_child_detached(device_t brdev, device_t child);
 221 static int      pccbb_card_reprobe(device_t brdev, device_t busdev);
 222 static void     pccbb_event_thread(void *arg);
 223 static void     pccbb_insert(struct pccbb_softc *sc);
 224 static void     pccbb_removal(struct pccbb_softc *sc);
 225 static void     pccbb_intr(void *arg);
 226 static int      pccbb_detect_voltage(device_t brdev);
 227 static int      pccbb_power(device_t brdev, int volts);
 228 static void     pccbb_cardbus_reset(device_t brdev);
 229 static int      pccbb_cardbus_power_enable_socket(device_t brdev,
 230                     device_t child);
 231 static void     pccbb_cardbus_power_disable_socket(device_t brdev,
 232                     device_t child);
 233 static int      pccbb_cardbus_io_open(device_t brdev, int win, uint32_t start,
 234                     uint32_t end);
 235 static int      pccbb_cardbus_mem_open(device_t brdev, int win,
 236                     uint32_t start, uint32_t end);
 237 static void     pccbb_cardbus_auto_open(struct pccbb_softc *sc, int type);
 238 static int      pccbb_cardbus_activate_resource(device_t brdev, device_t child,
 239                     int type, int rid, struct resource *res);
 240 static int      pccbb_cardbus_deactivate_resource(device_t brdev,
 241                     device_t child, int type, int rid, struct resource *res);
 242 static struct resource  *pccbb_cardbus_alloc_resource(device_t brdev,
 243                     device_t child, int type, int *rid, u_long start,
 244                     u_long end, u_long count, uint flags);
 245 static int      pccbb_cardbus_release_resource(device_t brdev, device_t child,
 246                     int type, int rid, struct resource *res);
 247 static int      pccbb_power_enable_socket(device_t brdev, device_t child);
 248 static void     pccbb_power_disable_socket(device_t brdev, device_t child);
 249 static int      pccbb_activate_resource(device_t brdev, device_t child,
 250                     int type, int rid, struct resource *r);
 251 static int      pccbb_deactivate_resource(device_t brdev, device_t child,
 252                     int type, int rid, struct resource *r);
 253 static struct resource  *pccbb_alloc_resource(device_t brdev, device_t child,
 254                     int type, int *rid, u_long start, u_long end, u_long count,
 255                     uint flags);
 256 static int      pccbb_release_resource(device_t brdev, device_t child,
 257                     int type, int rid, struct resource *r);
 258 static int      pccbb_read_ivar(device_t brdev, device_t child, int which,
 259                     uintptr_t *result);
 260 static int      pccbb_write_ivar(device_t brdev, device_t child, int which,
 261                     uintptr_t value);
 262 static int      pccbb_maxslots(device_t brdev);
 263 static uint32_t pccbb_read_config(device_t brdev, int b, int s, int f,
 264                     int reg, int width);
 265 static void     pccbb_write_config(device_t brdev, int b, int s, int f,
 266                     int reg, uint32_t val, int width);
 267
 268 /*
 269  */
 270 static __inline void
 271 pccbb_set(struct pccbb_softc *sc, uint32_t reg, uint32_t val)
 272 {
 273         bus_space_write_4(sc->bst, sc->bsh, reg, val);
 274 }
 275
 276 static __inline uint32_t
 277 pccbb_get(struct pccbb_softc *sc, uint32_t reg)
 278 {
 279         return (bus_space_read_4(sc->bst, sc->bsh, reg));
 280 }
 281
 282 static __inline void
 283 pccbb_setb(struct pccbb_softc *sc, uint32_t reg, uint32_t bits)
 284 {
 285         pccbb_set(sc, reg, pccbb_get(sc, reg) | bits);
 286 }
 287
 288 static __inline void
 289 pccbb_clrb(struct pccbb_softc *sc, uint32_t reg, uint32_t bits)
 290 {
 291         pccbb_set(sc, reg, pccbb_get(sc, reg) & ~bits);
 292 }
 293
 294 static void
 295 pccbb_remove_res(struct pccbb_softc *sc, struct resource *res)
 296 {
 297         struct pccbb_reslist *rle;
 298
 299         SLIST_FOREACH(rle, &sc->rl, link) {
 300                 if (rle->res == res) {
 301                         SLIST_REMOVE(&sc->rl, rle, pccbb_reslist, link);
 302                         free(rle, M_DEVBUF);
 303                         return;
 304                 }
 305         }
 306 }
 307
 308 static struct resource *
 309 pccbb_find_res(struct pccbb_softc *sc, int type, int rid)
 310 {
 311         struct pccbb_reslist *rle;
 312
 313         SLIST_FOREACH(rle, &sc->rl, link)
 314                 if (SYS_RES_MEMORY == rle->type && rid == rle->rid)
 315                         return (rle->res);
 316         return (NULL);
 317 }
 318
 319 static void
 320 pccbb_insert_res(struct pccbb_softc *sc, struct resource *res, int type,
 321     int rid)
 322 {
 323         struct pccbb_reslist *rle;
 324
 325         /*
 326          * Need to record allocated resource so we can iterate through
 327          * it later.
 328          */
 329         rle = malloc(sizeof(struct pccbb_reslist), M_DEVBUF, M_NOWAIT);
 330         if (!res)
 331                 panic("pccbb_cardbus_alloc_resource: can't record entry!");
 332         rle->res = res;
 333         rle->type = type;
 334         rle->rid = rid;
 335         SLIST_INSERT_HEAD(&sc->rl, rle, link);
 336 }
 337
 338 static void
 339 pccbb_destroy_res(struct pccbb_softc *sc)
 340 {
 341         struct pccbb_reslist *rle;
 342
 343         while ((rle = SLIST_FIRST(&sc->rl)) != NULL) {
 344                 device_printf(sc->dev, "Danger Will Robinson: Resource "
 345                     "left allocated!  This is a bug... "
 346                     "(rid=%x, type=%d, addr=%lx)\n", rle->rid, rle->type,
 347                     rman_get_start(rle->res));
 348                 SLIST_REMOVE_HEAD(&sc->rl, link);
 349                 free(rle, M_DEVBUF);
 350         }
 351 }
 352
 353 /************************************************************************/
 354 /* Probe/Attach                                                         */
 355 /************************************************************************/
 356
 357 static int
 358 pccbb_chipset(uint32_t pci_id, const char **namep)
 359 {
 360         struct yenta_chipinfo *ycp;
 361
 362         for (ycp = yc_chipsets; ycp->yc_id != 0 && pci_id != ycp->yc_id; ++ycp)
 363             continue;
 364         if (namep != NULL)
 365                 *namep = ycp->yc_name;
 366         return (ycp->yc_chiptype);
 367 }
 368
 369 static int
 370 pccbb_probe(device_t brdev)
 371 {
 372         const char *name;
 373         uint32_t progif;
 374         uint32_t subclass;
 375
 376         /*
 377          * Do we know that we support the chipset?  If so, then we
 378          * accept the device.
 379          */
 380         if (pccbb_chipset(pci_get_devid(brdev), &name) != CB_UNKNOWN) {
 381                 device_set_desc(brdev, name);
 382                 return (0);
 383         }
 384
 385         /*
 386          * We do support generic CardBus bridges.  All that we've seen
 387          * to date have progif 0 (the Yenta spec, and successors mandate
 388          * this).  We do not support PCI PCMCIA bridges (with one exception)
 389          * with this driver since they generally are I/O mapped.  Those
 390          * are supported by the pcic driver.  This should help us be more
 391          * future proof.
 392          */
 393         subclass = pci_get_subclass(brdev);
 394         progif = pci_get_progif(brdev);
 395         if (subclass == PCIS_BRIDGE_CARDBUS && progif == 0) {
 396                 device_set_desc(brdev, "PCI-CardBus Bridge");
 397                 return (0);
 398         }
 399         return (ENXIO);
 400 }
 401
 402
 403 static void
 404 pccbb_chipinit(struct pccbb_softc *sc)
 405 {
 406         uint32_t mux, sysctrl;
 407
 408         /* Set CardBus latency timer */
 409         if (pci_read_config(sc->dev, PCIR_SECLAT_1, 1) < 0x20)
 410                 pci_write_config(sc->dev, PCIR_SECLAT_1, 0x20, 1);
 411
 412         /* Set PCI latency timer */
 413         if (pci_read_config(sc->dev, PCIR_LATTIMER, 1) < 0x20)
 414                 pci_write_config(sc->dev, PCIR_LATTIMER, 0x20, 1);
 415
 416         /* Enable memory access */
 417         PCI_MASK_CONFIG(sc->dev, PCIR_COMMAND,
 418             | PCIM_CMD_MEMEN
 419             | PCIM_CMD_PORTEN
 420             | PCIM_CMD_BUSMASTEREN, 2);
 421
 422         /* disable Legacy IO */
 423         switch (sc->chipset) {
 424         case CB_RF5C46X:
 425                 PCI_MASK_CONFIG(sc->dev, CBBR_BRIDGECTRL,
 426                     & ~(CBBM_BRIDGECTRL_RL_3E0_EN |
 427                     CBBM_BRIDGECTRL_RL_3E2_EN), 2);
 428                 break;
 429         default:
 430                 pci_write_config(sc->dev, CBBR_LEGACY, 0x0, 4);
 431                 break;
 432         }
 433
 434         /* Use PCI interrupt for interrupt routing */
 435         PCI_MASK2_CONFIG(sc->dev, CBBR_BRIDGECTRL,
 436             & ~(CBBM_BRIDGECTRL_MASTER_ABORT |
 437             CBBM_BRIDGECTRL_INTR_IREQ_EN),
 438             | CBBM_BRIDGECTRL_WRITE_POST_EN,
 439             2);
 440
 441         /*
 442          * XXX this should be a function table, ala OLDCARD.  This means
 443          * that we could more easily support ISA interrupts for pccard
 444          * cards if we had to.
 445          */
 446         switch (sc->chipset) {
 447         case CB_TI113X:
 448                 /*
 449                  * The TI 1031, TI 1130 and TI 1131 all require another bit
 450                  * be set to enable PCI routing of interrupts, and then
 451                  * a bit for each of the CSC and Function interrupts we
 452                  * want routed.
 453                  */
 454                 PCI_MASK_CONFIG(sc->dev, CBBR_CBCTRL,
 455                     | CBBM_CBCTRL_113X_PCI_INTR |
 456                     CBBM_CBCTRL_113X_PCI_CSC | CBBM_CBCTRL_113X_PCI_IRQ_EN,
 457                     1);
 458                 PCI_MASK_CONFIG(sc->dev, CBBR_DEVCTRL,
 459                     & ~(CBBM_DEVCTRL_INT_SERIAL |
 460                     CBBM_DEVCTRL_INT_PCI), 1);
 461                 break;
 462         case CB_TI12XX:
 463                 /*
 464                  * Some TI 12xx (and [14][45]xx) based pci cards
 465                  * sometimes have issues with the MFUNC register not
 466                  * being initialized due to a bad EEPROM on board.
 467                  * Laptops that this matters on have this register
 468                  * properly initialized.
 469                  *
 470                  * The TI125X parts have a different register.
 471                  */
 472                 mux = pci_read_config(sc->dev, CBBR_MFUNC, 4);
 473                 sysctrl = pci_read_config(sc->dev, CBBR_SYSCTRL, 4);
 474                 if (mux == 0) {
 475                         mux = (mux & ~CBBM_MFUNC_PIN0) |
 476                             CBBM_MFUNC_PIN0_INTA;
 477                         if ((sysctrl & CBBM_SYSCTRL_INTRTIE) == 0)
 478                                 mux = (mux & ~CBBM_MFUNC_PIN1) |
 479                                     CBBM_MFUNC_PIN1_INTB;
 480                         pci_write_config(sc->dev, CBBR_MFUNC, mux, 4);
 481                 }
 482                 /*FALLTHROUGH*/
 483         case CB_TI125X:
 484                 /*
 485                  * Disable zoom video.  Some machines initialize this
 486                  * improperly and exerpience has shown that this helps
 487                  * on some machines.
 488                  */
 489                 pci_write_config(sc->dev, CBBR_MMCTRL, 0, 4);
 490                 break;
 491         case CB_TOPIC97:
 492                 /*
 493                  * Disable Zoom Video, ToPIC 97, 100.
 494                  */
 495                 pci_write_config(sc->dev, CBBR_TOPIC_ZV_CONTROL, 0, 1);
 496                 /*
 497                  * ToPIC 97, 100
 498                  * At offset 0xa1: INTERRUPT CONTROL register
 499                  * 0x1: Turn on INT interrupts.
 500                  */
 501                 PCI_MASK_CONFIG(sc->dev, CBBR_TOPIC_INTCTRL,
 502                     | CBBM_TOPIC_INTCTRL_INTIRQSEL, 1);
 503                 goto topic_common;
 504         case CB_TOPIC95:
 505                 /*
 506                  * SOCKETCTRL appears to be TOPIC 95/B specific
 507                  */
 508                 PCI_MASK_CONFIG(sc->dev, CBBR_TOPIC_SOCKETCTRL,
 509                     | CBBM_TOPIC_SOCKETCTRL_SCR_IRQSEL, 4);
 510
 511         topic_common:;
 512                 /*
 513                  * At offset 0xa0: SLOT CONTROL
 514                  * 0x80 Enable Cardbus Functionality
 515                  * 0x40 Enable Cardbus and PC Card registers
 516                  * 0x20 Lock ID in exca regs
 517                  * 0x10 Write protect ID in config regs
 518                  * Clear the rest of the bits, which defaults the slot
 519                  * in legacy mode to 0x3e0 and offset 0. (legacy
 520                  * mode is determined elsewhere)
 521                  */
 522                 pci_write_config(sc->dev, CBBR_TOPIC_SLOTCTRL,
 523                     CBBM_TOPIC_SLOTCTRL_SLOTON |
 524                     CBBM_TOPIC_SLOTCTRL_SLOTEN |
 525                     CBBM_TOPIC_SLOTCTRL_ID_LOCK |
 526                     CBBM_TOPIC_SLOTCTRL_ID_WP, 1);
 527
 528                 /*
 529                  * At offset 0xa3 Card Detect Control Register
 530                  * 0x80 CARDBUS enbale
 531                  * 0x01 Cleared for hardware change detect
 532                  */
 533                 PCI_MASK2_CONFIG(sc->dev, CBBR_TOPIC_CDC,
 534                     | CBBM_TOPIC_CDC_CARDBUS,
 535                     & ~CBBM_TOPIC_CDC_SWDETECT, 4);
 536                 break;
 537         }
 538
 539         /*
 540          * Need to tell ExCA registers to route via PCI interrupts.  There
 541          * are two ways to do this.  Once is to set INTR_ENABLE and the
 542          * other is to set CSC to 0.  Since both methods are mutually
 543          * compatible, we do both.
 544          */
 545         exca_write(&sc->exca, EXCA_INTR, EXCA_INTR_ENABLE);
 546         exca_write(&sc->exca, EXCA_CSC_INTR, 0);
 547
 548         /* close all memory and io windows */
 549         pci_write_config(sc->dev, CBBR_MEMBASE0, 0xffffffff, 4);
 550         pci_write_config(sc->dev, CBBR_MEMLIMIT0, 0, 4);
 551         pci_write_config(sc->dev, CBBR_MEMBASE1, 0xffffffff, 4);
 552         pci_write_config(sc->dev, CBBR_MEMLIMIT1, 0, 4);
 553         pci_write_config(sc->dev, CBBR_IOBASE0, 0xffffffff, 4);
 554         pci_write_config(sc->dev, CBBR_IOLIMIT0, 0, 4);
 555         pci_write_config(sc->dev, CBBR_IOBASE1, 0xffffffff, 4);
 556         pci_write_config(sc->dev, CBBR_IOLIMIT1, 0, 4);
 557 }
 558
 559 static int
 560 pccbb_attach(device_t brdev)
 561 {
 562         struct pccbb_softc *sc = (struct pccbb_softc *)device_get_softc(brdev);
 563         int rid;
 564
 565         mtx_init(&sc->mtx, device_get_nameunit(brdev), "pccbb", MTX_DEF);
 566         cv_init(&sc->cv, "pccbb cv");
 567         sc->chipset = pccbb_chipset(pci_get_devid(brdev), NULL);
 568         sc->dev = brdev;
 569         sc->cbdev = NULL;
 570         sc->pccarddev = NULL;
 571         sc->secbus = pci_read_config(brdev, PCIR_SECBUS_2, 1);
 572         sc->subbus = pci_read_config(brdev, PCIR_SUBBUS_2, 1);
 573         SLIST_INIT(&sc->rl);
 574
 575         /*
 576          * The PCI bus code should assign us memory in the absense
 577          * of the BIOS doing so.  However, 'should' isn't 'is,' so we kludge
 578          * up something here until the PCI/acpi code properly assigns the
 579          * resource.
 580          */
 581         rid = CBBR_SOCKBASE;
 582         sc->base_res = bus_alloc_resource(brdev, SYS_RES_MEMORY, &rid,
 583             0, ~0, 1, RF_ACTIVE);
 584         if (!sc->base_res) {
 585                 /*
 586                  * Generally, the BIOS will assign this memory for us.
 587                  * However, newer BIOSes do not because the MS design
 588                  * documents have mandated that this is for the OS
 589                  * to assign rather than the BIOS.  This driver shouldn't
 590                  * be doing this, but until the pci bus code (or acpi)
 591                  * does this, we allow CardBus bridges to work on more
 592                  * machines.
 593                  */
 594                 sockbase = pci_read_config(brdev, rid, 4);
 595                 if (sockbase < 0x100000 || sockbase >= 0xfffffff0) {
 596                         pci_write_config(brdev, rid, 0xffffffff, 4);
 597                         sockbase = pci_read_config(brdev, rid, 4);
 598                         sockbase = (sockbase & 0xfffffff0) &
 599                             -(sockbase & 0xfffffff0);
 600                         sc->base_res = bus_generic_alloc_resource(
 601                             device_get_parent(brdev), brdev, SYS_RES_MEMORY,
 602                             &rid, pccbb_start_mem, ~0, sockbase,
 603                             RF_ACTIVE|rman_make_alignment_flags(sockbase));
 604                         if (!sc->base_res) {
 605                                 device_printf(brdev,
 606                                     "Could not grab register memory\n");
 607                                 mtx_destroy(&sc->mtx);
 608                                 cv_destroy(&sc->cv);
 609                                 return (ENOMEM);
 610                         }
 611                         pci_write_config(brdev, CBBR_SOCKBASE,
 612                             rman_get_start(sc->base_res), 4);
 613                         DEVPRINTF((brdev, "PCI Memory allocated: %08lx\n",
 614                             rman_get_start(sc->base_res)));
 615                 } else {
 616                         device_printf(brdev, "Could not map register memory\n");
 617                         mtx_destroy(&sc->mtx);
 618                         cv_destroy(&sc->cv);
 619                         return (ENOMEM);
 620                 }
 621         }
 622
 623         sc->bst = rman_get_bustag(sc->base_res);
 624         sc->bsh = rman_get_bushandle(sc->base_res);
 625         exca_init(&sc->exca, brdev, sc->bst, sc->bsh, CBB_EXCA_OFFSET);
 626         sc->exca.flags |= EXCA_HAS_MEMREG_WIN;
 627         pccbb_chipinit(sc);
 628
 629         /* attach children */
 630         sc->cbdev = device_add_child(brdev, "cardbus", -1);
 631         if (sc->cbdev == NULL)
 632                 DEVPRINTF((brdev, "WARNING: cannot add cardbus bus.\n"));
 633         else if (device_probe_and_attach(sc->cbdev) != 0) {
 634                 DEVPRINTF((brdev, "WARNING: cannot attach cardbus bus!\n"));
 635                 sc->cbdev = NULL;
 636         }
 637
 638         sc->pccarddev = device_add_child(brdev, "pccard", -1);
 639         if (sc->pccarddev == NULL)
 640                 DEVPRINTF((brdev, "WARNING: cannot add pccard bus.\n"));
 641         else if (device_probe_and_attach(sc->pccarddev) != 0) {
 642                 DEVPRINTF((brdev, "WARNING: cannot attach pccard bus.\n"));
 643                 sc->pccarddev = NULL;
 644         }
 645
 646         /* Map and establish the interrupt. */
 647         rid = 0;
 648         sc->irq_res = bus_alloc_resource(brdev, SYS_RES_IRQ, &rid, 0, ~0, 1,
 649             RF_SHAREABLE | RF_ACTIVE);
 650         if (sc->irq_res == NULL) {
 651                 printf("pccbb: Unable to map IRQ...\n");
 652                 bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE,
 653                     sc->base_res);
 654                 mtx_destroy(&sc->mtx);
 655                 cv_destroy(&sc->cv);
 656                 return (ENOMEM);
 657         }
 658
 659         if (bus_setup_intr(brdev, sc->irq_res, INTR_TYPE_AV, pccbb_intr, sc,
 660             &sc->intrhand)) {
 661                 device_printf(brdev, "couldn't establish interrupt");
 662                 bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res);
 663                 bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE,
 664                     sc->base_res);
 665                 mtx_destroy(&sc->mtx);
 666                 cv_destroy(&sc->cv);
 667                 return (ENOMEM);
 668         }
 669
 670         /* reset 16-bit pcmcia bus */
 671         exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET);
 672
 673         /* turn off power */
 674         pccbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
 675
 676         /* CSC Interrupt: Card detect interrupt on */
 677         pccbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD);
 678
 679         /* reset interrupt */
 680         pccbb_set(sc, CBB_SOCKET_EVENT, pccbb_get(sc, CBB_SOCKET_EVENT));
 681
 682         /* Start the thread */
 683         if (kthread_create(pccbb_event_thread, sc, &sc->event_thread, 0,
 684                 "%s%d", device_get_name(sc->dev), device_get_unit(sc->dev))) {
 685                 device_printf (sc->dev, "unable to create event thread.\n");
 686                 panic ("pccbb_create_event_thread");
 687         }
 688
 689         return (0);
 690 }
 691
 692 static int
 693 pccbb_detach(device_t brdev)
 694 {
 695         struct pccbb_softc *sc = device_get_softc(brdev);
 696         int numdevs;
 697         device_t *devlist;
 698         int tmp;
 699         int error;
 700
 701         device_get_children(brdev, &devlist, &numdevs);
 702
 703         error = 0;
 704         for (tmp = 0; tmp < numdevs; tmp++) {
 705                 if (device_detach(devlist[tmp]) == 0)
 706                         device_delete_child(brdev, devlist[tmp]);
 707                 else
 708                         error++;
 709         }
 710         free(devlist, M_TEMP);
 711         if (error > 0)
 712                 return (ENXIO);
 713
 714         mtx_lock(&sc->mtx);
 715         bus_teardown_intr(brdev, sc->irq_res, sc->intrhand);
 716         sc->flags |= PCCBB_KTHREAD_DONE;
 717         if (sc->flags & PCCBB_KTHREAD_RUNNING) {
 718                 wakeup(sc);
 719                 mtx_unlock(&sc->mtx);
 720                 DEVPRINTF((brdev, "waiting for kthread exit..."));
 721                 error = tsleep(sc, PWAIT, "pccbb-detach-wait", 60 * hz);
 722                 if (error)
 723                         DPRINTF(("timeout\n"));
 724                 else
 725                         DPRINTF(("done\n"));
 726         } else {
 727                 mtx_unlock(&sc->mtx);
 728         }
 729
 730         bus_release_resource(brdev, SYS_RES_IRQ, 0, sc->irq_res);
 731         bus_release_resource(brdev, SYS_RES_MEMORY, CBBR_SOCKBASE,
 732             sc->base_res);
 733         mtx_destroy(&sc->mtx);
 734         cv_destroy(&sc->cv);
 735         return (0);
 736 }
 737
 738 static int
 739 pccbb_shutdown(device_t brdev)
 740 {
 741         struct pccbb_softc *sc = (struct pccbb_softc *)device_get_softc(brdev);
 742         /* properly reset everything at shutdown */
 743
 744         PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2);
 745         exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET);
 746
 747         pccbb_set(sc, CBB_SOCKET_MASK, 0);
 748
 749         pccbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
 750
 751         exca_write(&sc->exca, EXCA_ADDRWIN_ENABLE, 0);
 752         pci_write_config(brdev, CBBR_MEMBASE0, 0, 4);
 753         pci_write_config(brdev, CBBR_MEMLIMIT0, 0, 4);
 754         pci_write_config(brdev, CBBR_MEMBASE1, 0, 4);
 755         pci_write_config(brdev, CBBR_MEMLIMIT1, 0, 4);
 756         pci_write_config(brdev, CBBR_IOBASE0, 0, 4);
 757         pci_write_config(brdev, CBBR_IOLIMIT0, 0, 4);
 758         pci_write_config(brdev, CBBR_IOBASE1, 0, 4);
 759         pci_write_config(brdev, CBBR_IOLIMIT1, 0, 4);
 760         pci_write_config(brdev, PCIR_COMMAND, 0, 2);
 761         return (0);
 762 }
 763
 764 static int
 765 pccbb_setup_intr(device_t dev, device_t child, struct resource *irq,
 766   int flags, driver_intr_t *intr, void *arg, void **cookiep)
 767 {
 768         int err;
 769
 770         /*
 771          * You aren't allowed to have fast interrupts for pccard/cardbus
 772          * things since those interrupts are PCI and shared.  Since we use
 773          * the PCI interrupt for the status change interrupts, it can't be
 774          * free for use by the driver.  Fast interrupts must not be shared.
 775          */
 776         if ((flags & INTR_FAST) != 0)
 777                 return (EINVAL);
 778         err = bus_generic_setup_intr(dev, child, irq, flags, intr, arg,
 779             cookiep);
 780         /*
 781          * XXX need to turn on ISA interrupts, if we ever support them, but
 782          * XXX for now that's all we need to do.
 783          */
 784         return (err);
 785 }
 786
 787 static int
 788 pccbb_teardown_intr(device_t dev, device_t child, struct resource *irq,
 789     void *cookie)
 790 {
 791         /* XXX Need to do different things for ISA interrupts. */
 792         return (bus_generic_teardown_intr(dev, child, irq, cookie));
 793 }
 794
 795
 796 static void
 797 pccbb_driver_added(device_t brdev, driver_t *driver)
 798 {
 799         struct pccbb_softc *sc = device_get_softc(brdev);
 800         device_t *devlist;
 801         int tmp;
 802         int numdevs;
 803         int wake;
 804         uint32_t sockstate;
 805
 806         DEVICE_IDENTIFY(driver, brdev);
 807         device_get_children(brdev, &devlist, &numdevs);
 808         wake = 0;
 809         sockstate = pccbb_get(sc, CBB_SOCKET_STATE);
 810         for (tmp = 0; tmp < numdevs; tmp++) {
 811                 if (device_get_state(devlist[tmp]) == DS_NOTPRESENT &&
 812                     device_probe_and_attach(devlist[tmp]) == 0) {
 813                         if (devlist[tmp] == NULL)
 814                                 /* NOTHING */;
 815                         else if (strcmp(driver->name, "cardbus") == 0) {
 816                                 sc->cbdev = devlist[tmp];
 817                                 if (((sockstate & CBB_SOCKET_STAT_CD) == 0) &&
 818                                     (sockstate & CBB_SOCKET_STAT_CB))
 819                                         wake++;
 820                         } else if (strcmp(driver->name, "pccard") == 0) {
 821                                 sc->pccarddev = devlist[tmp];
 822                                 if (((sockstate & CBB_SOCKET_STAT_CD) == 0) &&
 823                                     (sockstate & CBB_SOCKET_STAT_16BIT))
 824                                         wake++;
 825                         } else
 826                                 device_printf(brdev,
 827                                     "Unsupported child bus: %s\n",
 828                                     driver->name);
 829                 }
 830         }
 831         free(devlist, M_TEMP);
 832
 833         if (wake > 0) {
 834                 if ((pccbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD)
 835                     == 0) {
 836                         mtx_lock(&sc->mtx);
 837                         wakeup(sc);
 838                         mtx_unlock(&sc->mtx);
 839                 }
 840         }
 841 }
 842
 843 static void
 844 pccbb_child_detached(device_t brdev, device_t child)
 845 {
 846         struct pccbb_softc *sc = device_get_softc(brdev);
 847
 848         if (child == sc->cbdev)
 849                 sc->cbdev = NULL;
 850         else if (child == sc->pccarddev)
 851                 sc->pccarddev = NULL;
 852         else
 853                 device_printf(brdev, "Unknown child detached: %s %p/%p\n",
 854                     device_get_nameunit(child), sc->cbdev, sc->pccarddev);
 855 }
 856
 857 static int
 858 pccbb_card_reprobe(device_t brdev, device_t busdev)
 859 {
 860         struct pccbb_softc *sc = device_get_softc(brdev);
 861         int wake = 0;
 862         uint32_t sockstate;
 863
 864         sockstate = pccbb_get(sc, CBB_SOCKET_STATE);
 865
 866         if ((sockstate & CBB_SOCKET_STAT_CD) == 0) {
 867                 if (busdev == sc->cbdev &&
 868                     (sockstate & CBB_SOCKET_STAT_CB))
 869                         wake++;
 870                 else if (busdev == sc->pccarddev &&
 871                     (sockstate & CBB_SOCKET_STAT_16BIT))
 872                         wake++;
 873
 874                 if (wake > 0) {
 875                         mtx_lock(&sc->mtx);
 876                         wakeup(sc);
 877                         mtx_unlock(&sc->mtx);
 878                         return (0);
 879                 }
 880                 return (EBUSY);
 881         }
 882         return (ENOENT);
 883 }
 884
 885 /************************************************************************/
 886 /* Kthreads                                                             */
 887 /************************************************************************/
 888
 889 static void
 890 pccbb_event_thread(void *arg)
 891 {
 892         struct pccbb_softc *sc = arg;
 893         uint32_t status;
 894         int err;
 895
 896         /*
 897          * We take out Giant here because we drop it in tsleep
 898          * and need it for kthread_exit, which drops it.
 899          */
 900         mtx_lock(&Giant);
 901         sc->flags |= PCCBB_KTHREAD_RUNNING;
 902         while (1) {
 903                 /*
 904                  * Check to see if we have anything first so that
 905                  * if there's a card already inserted, we do the
 906                  * right thing.
 907                  */
 908                 if (sc->flags & PCCBB_KTHREAD_DONE)
 909                         break;
 910
 911                 status = pccbb_get(sc, CBB_SOCKET_STATE);
 912                 if ((status & CBB_SOCKET_STAT_CD) == 0)
 913                         pccbb_insert(sc);
 914                 else
 915                         pccbb_removal(sc);
 916                 /*
 917                  * Wait until it has been 1s since the last time we
 918                  * get an interrupt.  We handle the rest of the interrupt
 919                  * at the top of the loop.
 920                  */
 921                 mtx_lock(&sc->mtx);
 922                 cv_wait(&sc->cv, &sc->mtx);
 923                 do {
 924                         err = cv_timedwait(&sc->cv, &sc->mtx, 1 * hz);
 925                 } while (err != EWOULDBLOCK &&
 926                     (sc->flags & PCCBB_KTHREAD_DONE) == 0);
 927                 mtx_unlock(&sc->mtx);
 928         }
 929         sc->flags &= ~PCCBB_KTHREAD_RUNNING;
 930         /*
 931          * XXX I think there's a race here.  If we wakeup in the other
 932          * thread before kthread_exit is called and this routine returns,
 933          * and that thread causes us to be unmapped, then we are setting
 934          * ourselves up for a panic.  Make sure that I check out
 935          * jhb's crash.c for a fix.
 936          */
 937         wakeup(sc);
 938         kthread_exit(0);
 939 }
 940
 941 /************************************************************************/
 942 /* Insert/removal                                                       */
 943 /************************************************************************/
 944
 945 static void
 946 pccbb_insert(struct pccbb_softc *sc)
 947 {
 948         uint32_t sockevent, sockstate;
 949         int timeout = 30;
 950
 951         /*
 952          * Debounce interrupt.  However, most of the debounce
 953          * is done in the thread's timeout routines.
 954          */
 955         do {
 956                 sockevent = pccbb_get(sc, CBB_SOCKET_EVENT);
 957                 sockstate = pccbb_get(sc, CBB_SOCKET_STATE);
 958         } while (sockstate & CBB_SOCKET_STAT_CD && --timeout > 0);
 959
 960         if (timeout < 0) {
 961                 device_printf (sc->dev, "insert timeout");
 962                 return;
 963         }
 964
 965         DEVPRINTF((sc->dev, "card inserted: event=0x%08x, state=%08x\n",
 966             sockevent, sockstate));
 967
 968         if (sockstate & CBB_SOCKET_STAT_16BIT) {
 969                 if (sc->pccarddev != NULL) {
 970                         sc->flags |= PCCBB_16BIT_CARD;
 971                         if (CARD_ATTACH_CARD(sc->pccarddev) != 0)
 972                                 device_printf(sc->dev,
 973                                     "PC Card card activation failed\n");
 974                 } else {
 975                         device_printf(sc->dev,
 976                             "PC Card inserted, but no pccard bus.\n");
 977                 }
 978         } else if (sockstate & CBB_SOCKET_STAT_CB) {
 979                 if (sc->cbdev != NULL) {
 980                         sc->flags &= ~PCCBB_16BIT_CARD;
 981                         if (CARD_ATTACH_CARD(sc->cbdev) != 0)
 982                                 device_printf(sc->dev,
 983                                     "CardBus card activation failed\n");
 984                 } else {
 985                         device_printf(sc->dev,
 986                             "CardBUS card inserted, but no cardbus bus.\n");
 987                 }
 988         } else {
 989                 /*
 990                  * We should power the card down, and try again a couple of
 991                  * times if this happens. XXX
 992                  */
 993                 device_printf (sc->dev, "Unsupported card type detected\n");
 994         }
 995 }
 996
 997 static void
 998 pccbb_removal(struct pccbb_softc *sc)
 999 {
1000         if (sc->flags & PCCBB_16BIT_CARD && sc->pccarddev != NULL)
1001                 CARD_DETACH_CARD(sc->pccarddev, DETACH_FORCE);
1002         else if ((!(sc->flags & PCCBB_16BIT_CARD)) && sc->cbdev != NULL)
1003                 CARD_DETACH_CARD(sc->cbdev, DETACH_FORCE);
1004         pccbb_destroy_res(sc);
1005 }
1006
1007 /************************************************************************/
1008 /* Interrupt Handler                                                    */
1009 /************************************************************************/
1010
1011 static void
1012 pccbb_intr(void *arg)
1013 {
1014         struct pccbb_softc *sc = arg;
1015         uint32_t sockevent;
1016
1017         /*
1018          * This ISR needs work XXX
1019          */
1020         sockevent = pccbb_get(sc, CBB_SOCKET_EVENT);
1021         if (sockevent) {
1022                 /* ack the interrupt */
1023                 pccbb_setb(sc, CBB_SOCKET_EVENT, sockevent);
1024
1025                 if (sockevent & CBB_SOCKET_EVENT_CD) {
1026                         mtx_lock(&sc->mtx);
1027                         cv_signal(&sc->cv);
1028                         mtx_unlock(&sc->mtx);
1029                 }
1030                 if (sockevent & CBB_SOCKET_EVENT_CSTS) {
1031                         DPRINTF((" cstsevent occured: 0x%08x\n",
1032                             pccbb_get(sc, CBB_SOCKET_STATE)));
1033                 }
1034                 if (sockevent & CBB_SOCKET_EVENT_POWER) {
1035                         DPRINTF((" pwrevent occured: 0x%08x\n",
1036                             pccbb_get(sc, CBB_SOCKET_STATE)));
1037                 }
1038                 /* Other bits? */
1039         }
1040
1041         /* Call the interrupt if we still have the card */
1042 }
1043
1044 /************************************************************************/
1045 /* Generic Power functions                                              */
1046 /************************************************************************/
1047
1048 static int
1049 pccbb_detect_voltage(device_t brdev)
1050 {
1051         struct pccbb_softc *sc = device_get_softc(brdev);
1052         uint32_t psr;
1053         int vol = CARD_UKN_CARD;
1054
1055         psr = pccbb_get(sc, CBB_SOCKET_STATE);
1056
1057         if (psr & CBB_SOCKET_STAT_5VCARD)
1058                 vol |= CARD_5V_CARD;
1059         if (psr & CBB_SOCKET_STAT_3VCARD)
1060                 vol |= CARD_3V_CARD;
1061         if (psr & CBB_SOCKET_STAT_XVCARD)
1062                 vol |= CARD_XV_CARD;
1063         if (psr & CBB_SOCKET_STAT_YVCARD)
1064                 vol |= CARD_YV_CARD;
1065
1066         return (vol);
1067 }
1068
1069 static int
1070 pccbb_power(device_t brdev, int volts)
1071 {
1072         uint32_t status, sock_ctrl;
1073         struct pccbb_softc *sc = device_get_softc(brdev);
1074         int timeout;
1075         uint32_t sockevent;
1076
1077         DEVPRINTF((sc->dev, "pccbb_power: %s and %s [%x]\n",
1078             (volts & CARD_VCCMASK) == CARD_VCC_UC ? "CARD_VCC_UC" :
1079             (volts & CARD_VCCMASK) == CARD_VCC_5V ? "CARD_VCC_5V" :
1080             (volts & CARD_VCCMASK) == CARD_VCC_3V ? "CARD_VCC_3V" :
1081             (volts & CARD_VCCMASK) == CARD_VCC_XV ? "CARD_VCC_XV" :
1082             (volts & CARD_VCCMASK) == CARD_VCC_YV ? "CARD_VCC_YV" :
1083             (volts & CARD_VCCMASK) == CARD_VCC_0V ? "CARD_VCC_0V" :
1084             "VCC-UNKNOWN",
1085             (volts & CARD_VPPMASK) == CARD_VPP_UC ? "CARD_VPP_UC" :
1086             (volts & CARD_VPPMASK) == CARD_VPP_12V ? "CARD_VPP_12V" :
1087             (volts & CARD_VPPMASK) == CARD_VPP_VCC ? "CARD_VPP_VCC" :
1088             (volts & CARD_VPPMASK) == CARD_VPP_0V ? "CARD_VPP_0V" :
1089             "VPP-UNKNOWN",
1090             volts));
1091
1092         status = pccbb_get(sc, CBB_SOCKET_STATE);
1093         sock_ctrl = pccbb_get(sc, CBB_SOCKET_CONTROL);
1094
1095         switch (volts & CARD_VCCMASK) {
1096         case CARD_VCC_UC:
1097                 break;
1098         case CARD_VCC_5V:
1099                 if (CBB_SOCKET_STAT_5VCARD & status) { /* check 5 V card */
1100                         sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK;
1101                         sock_ctrl |= CBB_SOCKET_CTRL_VCC_5V;
1102                 } else {
1103                         device_printf(sc->dev,
1104                             "BAD voltage request: no 5 V card\n");
1105                 }
1106                 break;
1107         case CARD_VCC_3V:
1108                 if (CBB_SOCKET_STAT_3VCARD & status) {
1109                         sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK;
1110                         sock_ctrl |= CBB_SOCKET_CTRL_VCC_3V;
1111                 } else {
1112                         device_printf(sc->dev,
1113                             "BAD voltage request: no 3.3 V card\n");
1114                 }
1115                 break;
1116         case CARD_VCC_0V:
1117                 sock_ctrl &= ~CBB_SOCKET_CTRL_VCCMASK;
1118                 break;
1119         default:
1120                 return (0);                     /* power NEVER changed */
1121                 break;
1122         }
1123
1124         switch (volts & CARD_VPPMASK) {
1125         case CARD_VPP_UC:
1126                 break;
1127         case CARD_VPP_0V:
1128                 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK;
1129                 break;
1130         case CARD_VPP_VCC:
1131                 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK;
1132                 sock_ctrl |= ((sock_ctrl >> 4) & 0x07);
1133                 break;
1134         case CARD_VPP_12V:
1135                 sock_ctrl &= ~CBB_SOCKET_CTRL_VPPMASK;
1136                 sock_ctrl |= CBB_SOCKET_CTRL_VPP_12V;
1137                 break;
1138         }
1139
1140         if (pccbb_get(sc, CBB_SOCKET_CONTROL) == sock_ctrl)
1141                 return (1); /* no change necessary */
1142
1143         pccbb_set(sc, CBB_SOCKET_CONTROL, sock_ctrl);
1144         status = pccbb_get(sc, CBB_SOCKET_STATE);
1145
1146         /*
1147          * XXX This busy wait is bogus.  We should wait for a power
1148          * interrupt and then whine if the status is bad.  If we're
1149          * worried about the card not coming up, then we should also
1150          * schedule a timeout which we can cacel in the power interrupt.
1151          */
1152         timeout = 20;
1153         do {
1154                 DELAY(20*1000);
1155                 sockevent = pccbb_get(sc, CBB_SOCKET_EVENT);
1156         } while (!(sockevent & CBB_SOCKET_EVENT_POWER) && --timeout > 0);
1157         /* reset event status */
1158         /* XXX should only reset EVENT_POWER */
1159         pccbb_set(sc, CBB_SOCKET_EVENT, sockevent);
1160         if (timeout < 0) {
1161                 printf ("VCC supply failed.\n");
1162                 return (0);
1163         }
1164
1165         /* XXX
1166          * delay 400 ms: thgough the standard defines that the Vcc set-up time
1167          * is 20 ms, some PC-Card bridge requires longer duration.
1168          * XXX Note: We should check the stutus AFTER the delay to give time
1169          * for things to stabilize.
1170          */
1171         DELAY(400*1000);
1172
1173         if (status & CBB_SOCKET_STAT_BADVCC) {
1174                 device_printf(sc->dev,
1175                     "bad Vcc request. ctrl=0x%x, status=0x%x\n",
1176                     sock_ctrl ,status);
1177                 printf("pccbb_power: %s and %s [%x]\n",
1178                     (volts & CARD_VCCMASK) == CARD_VCC_UC ? "CARD_VCC_UC" :
1179                     (volts & CARD_VCCMASK) == CARD_VCC_5V ? "CARD_VCC_5V" :
1180                     (volts & CARD_VCCMASK) == CARD_VCC_3V ? "CARD_VCC_3V" :
1181                     (volts & CARD_VCCMASK) == CARD_VCC_XV ? "CARD_VCC_XV" :
1182                     (volts & CARD_VCCMASK) == CARD_VCC_YV ? "CARD_VCC_YV" :
1183                     (volts & CARD_VCCMASK) == CARD_VCC_0V ? "CARD_VCC_0V" :
1184                     "VCC-UNKNOWN",
1185                     (volts & CARD_VPPMASK) == CARD_VPP_UC ? "CARD_VPP_UC" :
1186                     (volts & CARD_VPPMASK) == CARD_VPP_12V ? "CARD_VPP_12V":
1187                     (volts & CARD_VPPMASK) == CARD_VPP_VCC ? "CARD_VPP_VCC":
1188                     (volts & CARD_VPPMASK) == CARD_VPP_0V ? "CARD_VPP_0V" :
1189                     "VPP-UNKNOWN",
1190                     volts);
1191                 return (0);
1192         }
1193         return (1);             /* power changed correctly */
1194 }
1195
1196 /*
1197  * detect the voltage for the card, and set it.  Since the power
1198  * used is the square of the voltage, lower voltages is a big win
1199  * and what Windows does (and what Microsoft prefers).  The MS paper
1200  * also talks about preferring the CIS entry as well.
1201  */
1202 static int
1203 pccbb_do_power(device_t brdev)
1204 {
1205         int voltage;
1206
1207         /* Prefer lowest voltage supported */
1208         voltage = pccbb_detect_voltage(brdev);
1209         pccbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
1210         if (voltage & CARD_YV_CARD)
1211                 pccbb_power(brdev, CARD_VCC_YV | CARD_VPP_VCC);
1212         else if (voltage & CARD_XV_CARD)
1213                 pccbb_power(brdev, CARD_VCC_XV | CARD_VPP_VCC);
1214         else if (voltage & CARD_3V_CARD)
1215                 pccbb_power(brdev, CARD_VCC_3V | CARD_VPP_VCC);
1216         else if (voltage & CARD_5V_CARD)
1217                 pccbb_power(brdev, CARD_VCC_5V | CARD_VPP_VCC);
1218         else {
1219                 device_printf(brdev, "Unknown card voltage\n");
1220                 return (ENXIO);
1221         }
1222         return (0);
1223 }
1224
1225 /************************************************************************/
1226 /* Cardbus power functions                                              */
1227 /************************************************************************/
1228
1229 static void
1230 pccbb_cardbus_reset(device_t brdev)
1231 {
1232         struct pccbb_softc *sc = device_get_softc(brdev);
1233         int delay_us;
1234
1235         delay_us = sc->chipset == CB_RF5C47X ? 400*1000 : 20*1000;
1236
1237         PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL, |CBBM_BRIDGECTRL_RESET, 2);
1238
1239         DELAY(delay_us);
1240
1241         /* If a card exists, unreset it! */
1242         if ((pccbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD) == 0) {
1243                 PCI_MASK_CONFIG(brdev, CBBR_BRIDGECTRL,
1244                     &~CBBM_BRIDGECTRL_RESET, 2);
1245                 DELAY(delay_us);
1246         }
1247 }
1248
1249 static int
1250 pccbb_cardbus_power_enable_socket(device_t brdev, device_t child)
1251 {
1252         struct pccbb_softc *sc = device_get_softc(brdev);
1253         int err;
1254
1255         if ((pccbb_get(sc, CBB_SOCKET_STATE) & CBB_SOCKET_STAT_CD) ==
1256             CBB_SOCKET_STAT_CD)
1257                 return (ENODEV);
1258
1259         err = pccbb_do_power(brdev);
1260         if (err)
1261                 return (err);
1262         pccbb_cardbus_reset(brdev);
1263         return (0);
1264 }
1265
1266 static void
1267 pccbb_cardbus_power_disable_socket(device_t brdev, device_t child)
1268 {
1269         pccbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
1270         pccbb_cardbus_reset(brdev);
1271 }
1272
1273 /************************************************************************/
1274 /* Cardbus Resource                                                     */
1275 /************************************************************************/
1276
1277 static int
1278 pccbb_cardbus_io_open(device_t brdev, int win, uint32_t start, uint32_t end)
1279 {
1280         int basereg;
1281         int limitreg;
1282
1283         if ((win < 0) || (win > 1)) {
1284                 DEVPRINTF((brdev,
1285                     "pccbb_cardbus_io_open: window out of range %d\n", win));
1286                 return (EINVAL);
1287         }
1288
1289         basereg = win * 8 + CBBR_IOBASE0;
1290         limitreg = win * 8 + CBBR_IOLIMIT0;
1291
1292         pci_write_config(brdev, basereg, start, 4);
1293         pci_write_config(brdev, limitreg, end, 4);
1294         return (0);
1295 }
1296
1297 static int
1298 pccbb_cardbus_mem_open(device_t brdev, int win, uint32_t start, uint32_t end)
1299 {
1300         int basereg;
1301         int limitreg;
1302
1303         if ((win < 0) || (win > 1)) {
1304                 DEVPRINTF((brdev,
1305                     "pccbb_cardbus_mem_open: window out of range %d\n", win));
1306                 return (EINVAL);
1307         }
1308
1309         basereg = win*8 + CBBR_MEMBASE0;
1310         limitreg = win*8 + CBBR_MEMLIMIT0;
1311
1312         pci_write_config(brdev, basereg, start, 4);
1313         pci_write_config(brdev, limitreg, end, 4);
1314         return (0);
1315 }
1316
1317 /*
1318  * XXX The following function belongs in the pci bus layer.
1319  */
1320 static void
1321 pccbb_cardbus_auto_open(struct pccbb_softc *sc, int type)
1322 {
1323         uint32_t starts[2];
1324         uint32_t ends[2];
1325         struct pccbb_reslist *rle;
1326         int align;
1327         int prefetchable[2];
1328         uint32_t reg;
1329
1330         starts[0] = starts[1] = 0xffffffff;
1331         ends[0] = ends[1] = 0;
1332
1333         if (type == SYS_RES_MEMORY)
1334                 align = CBB_MEMALIGN;
1335         else if (type == SYS_RES_IOPORT)
1336                 align = CBB_IOALIGN;
1337         else
1338                 align = 1;
1339
1340         SLIST_FOREACH(rle, &sc->rl, link) {
1341                 if (rle->type != type)
1342                         ;
1343                 else if (rle->res == NULL) {
1344                         device_printf(sc->dev, "WARNING: Resource not reserved?  "
1345                             "(type=%d, addr=%lx)\n",
1346                             rle->type, rman_get_start(rle->res));
1347                 } else if (!(rman_get_flags(rle->res) & RF_ACTIVE)) {
1348                         /* XXX */
1349                 } else if (starts[0] == 0xffffffff) {
1350                         starts[0] = rman_get_start(rle->res);
1351                         ends[0] = rman_get_end(rle->res);
1352                         prefetchable[0] =
1353                             rman_get_flags(rle->res) & RF_PREFETCHABLE;
1354                 } else if (rman_get_end(rle->res) > ends[0] &&
1355                     rman_get_start(rle->res) - ends[0] <
1356                     PCCBB_AUTO_OPEN_SMALLHOLE && prefetchable[0] ==
1357                     (rman_get_flags(rle->res) & RF_PREFETCHABLE)) {
1358                         ends[0] = rman_get_end(rle->res);
1359                 } else if (rman_get_start(rle->res) < starts[0] &&
1360                     starts[0] - rman_get_end(rle->res) <
1361                     PCCBB_AUTO_OPEN_SMALLHOLE && prefetchable[0] ==
1362                     (rman_get_flags(rle->res) & RF_PREFETCHABLE)) {
1363                         starts[0] = rman_get_start(rle->res);
1364                 } else if (starts[1] == 0xffffffff) {
1365                         starts[1] = rman_get_start(rle->res);
1366                         ends[1] = rman_get_end(rle->res);
1367                         prefetchable[1] =
1368                             rman_get_flags(rle->res) & RF_PREFETCHABLE;
1369                 } else if (rman_get_end(rle->res) > ends[1] &&
1370                     rman_get_start(rle->res) - ends[1] <
1371                     PCCBB_AUTO_OPEN_SMALLHOLE && prefetchable[1] ==
1372                     (rman_get_flags(rle->res) & RF_PREFETCHABLE)) {
1373                         ends[1] = rman_get_end(rle->res);
1374                 } else if (rman_get_start(rle->res) < starts[1] &&
1375                     starts[1] - rman_get_end(rle->res) <
1376                     PCCBB_AUTO_OPEN_SMALLHOLE && prefetchable[1] ==
1377                     (rman_get_flags(rle->res) & RF_PREFETCHABLE)) {
1378                         starts[1] = rman_get_start(rle->res);
1379                 } else {
1380                         uint32_t diffs[2];
1381                         int win;
1382
1383                         diffs[0] = diffs[1] = 0xffffffff;
1384                         if (rman_get_start(rle->res) > ends[0])
1385                                 diffs[0] = rman_get_start(rle->res) - ends[0];
1386                         else if (rman_get_end(rle->res) < starts[0])
1387                                 diffs[0] = starts[0] - rman_get_end(rle->res);
1388                         if (rman_get_start(rle->res) > ends[1])
1389                                 diffs[1] = rman_get_start(rle->res) - ends[1];
1390                         else if (rman_get_end(rle->res) < starts[1])
1391                                 diffs[1] = starts[1] - rman_get_end(rle->res);
1392
1393                         win = (diffs[0] <= diffs[1])?0:1;
1394                         if (rman_get_start(rle->res) > ends[win])
1395                                 ends[win] = rman_get_end(rle->res);
1396                         else if (rman_get_end(rle->res) < starts[win])
1397                                 starts[win] = rman_get_start(rle->res);
1398                         if (!(rman_get_flags(rle->res) & RF_PREFETCHABLE))
1399                                 prefetchable[win] = 0;
1400                 }
1401
1402                 if (starts[0] != 0xffffffff)
1403                         starts[0] -= starts[0] % align;
1404                 if (starts[1] != 0xffffffff)
1405                         starts[1] -= starts[1] % align;
1406                 if (ends[0] % align != 0)
1407                         ends[0] += align - ends[0]%align - 1;
1408                 if (ends[1] % align != 0)
1409                         ends[1] += align - ends[1]%align - 1;
1410         }
1411
1412         if (type == SYS_RES_MEMORY) {
1413                 pccbb_cardbus_mem_open(sc->dev, 0, starts[0], ends[0]);
1414                 pccbb_cardbus_mem_open(sc->dev, 1, starts[1], ends[1]);
1415                 reg = pci_read_config(sc->dev, CBBR_BRIDGECTRL, 2);
1416                 reg &= ~(CBBM_BRIDGECTRL_PREFETCH_0|
1417                     CBBM_BRIDGECTRL_PREFETCH_1);
1418                 reg |= (prefetchable[0]?CBBM_BRIDGECTRL_PREFETCH_0:0)|
1419                     (prefetchable[1]?CBBM_BRIDGECTRL_PREFETCH_1:0);
1420                 pci_write_config(sc->dev, CBBR_BRIDGECTRL, reg, 2);
1421         } else if (type == SYS_RES_IOPORT) {
1422                 pccbb_cardbus_io_open(sc->dev, 0, starts[0], ends[0]);
1423                 pccbb_cardbus_io_open(sc->dev, 1, starts[1], ends[1]);
1424         }
1425 }
1426
1427 static int
1428 pccbb_cardbus_activate_resource(device_t brdev, device_t child, int type,
1429     int rid, struct resource *res)
1430 {
1431         int ret;
1432
1433         ret = BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child,
1434             type, rid, res);
1435         if (ret != 0)
1436                 return (ret);
1437         pccbb_cardbus_auto_open(device_get_softc(brdev), type);
1438         return (0);
1439 }
1440
1441 static int
1442 pccbb_cardbus_deactivate_resource(device_t brdev, device_t child, int type,
1443     int rid, struct resource *res)
1444 {
1445         int ret;
1446
1447         ret = BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child,
1448             type, rid, res);
1449         if (ret != 0)
1450                 return (ret);
1451         pccbb_cardbus_auto_open(device_get_softc(brdev), type);
1452         return (0);
1453 }
1454
1455 static struct resource *
1456 pccbb_cardbus_alloc_resource(device_t brdev, device_t child, int type,
1457     int *rid, u_long start, u_long end, u_long count, uint flags)
1458 {
1459         struct pccbb_softc *sc = device_get_softc(brdev);
1460         int tmp;
1461         struct resource *res;
1462
1463         switch (type) {
1464         case SYS_RES_IRQ:
1465                 tmp = rman_get_start(sc->irq_res);
1466                 if (start > tmp || end < tmp || count != 1) {
1467                         device_printf(child, "requested interrupt %ld-%ld,"
1468                             "count = %ld not supported by pccbb\n",
1469                             start, end, count);
1470                         return (NULL);
1471                 }
1472                 start = end = tmp;
1473                 break;
1474         case SYS_RES_IOPORT:
1475                 if (start <= pccbb_start_32_io)
1476                         start = pccbb_start_32_io;
1477                 if (end < start)
1478                         end = start;
1479                 break;
1480         case SYS_RES_MEMORY:
1481                 if (start <= pccbb_start_mem)
1482                         start = pccbb_start_mem;
1483                 if (end < start)
1484                         end = start;
1485                 break;
1486         }
1487
1488         res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid,
1489             start, end, count, flags & ~RF_ACTIVE);
1490         if (res == NULL) {
1491                 printf("pccbb alloc res fail\n");
1492                 return (NULL);
1493         }
1494         pccbb_insert_res(sc, res, type, *rid);
1495         if (flags & RF_ACTIVE)
1496                 if (bus_activate_resource(child, type, *rid, res) != 0) {
1497                         bus_release_resource(child, type, *rid, res);
1498                         return (NULL);
1499                 }
1500
1501         return (res);
1502 }
1503
1504 static int
1505 pccbb_cardbus_release_resource(device_t brdev, device_t child, int type,
1506     int rid, struct resource *res)
1507 {
1508         struct pccbb_softc *sc = device_get_softc(brdev);
1509         int error;
1510
1511         if (rman_get_flags(res) & RF_ACTIVE) {
1512                 error = bus_deactivate_resource(child, type, rid, res);
1513                 if (error != 0)
1514                         return (error);
1515         }
1516         pccbb_remove_res(sc, res);
1517         return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child,
1518             type, rid, res));
1519 }
1520
1521 /************************************************************************/
1522 /* PC Card Power Functions                                              */
1523 /************************************************************************/
1524
1525 static int
1526 pccbb_pcic_power_enable_socket(device_t brdev, device_t child)
1527 {
1528         struct pccbb_softc *sc = device_get_softc(brdev);
1529         int err;
1530
1531         DPRINTF(("pccbb_pcic_socket_enable:\n"));
1532
1533         /* power down/up the socket to reset */
1534         err = pccbb_do_power(brdev);
1535         if (err)
1536                 return (err);
1537         exca_reset(&sc->exca, child);
1538
1539         return (0);
1540 }
1541
1542 static void
1543 pccbb_pcic_power_disable_socket(device_t brdev, device_t child)
1544 {
1545         struct pccbb_softc *sc = device_get_softc(brdev);
1546
1547         DPRINTF(("pccbb_pcic_socket_disable\n"));
1548
1549         /* reset signal asserting... */
1550         exca_clrb(&sc->exca, EXCA_INTR, EXCA_INTR_RESET);
1551         DELAY(2*1000);
1552
1553         /* power down the socket */
1554         pccbb_power(brdev, CARD_VCC_0V | CARD_VPP_0V);
1555         exca_clrb(&sc->exca, EXCA_PWRCTL, EXCA_PWRCTL_OE);
1556
1557         /* wait 300ms until power fails (Tpf). */
1558         DELAY(300 * 1000);
1559 }
1560
1561 /************************************************************************/
1562 /* POWER methods                                                        */
1563 /************************************************************************/
1564
1565 static int
1566 pccbb_power_enable_socket(device_t brdev, device_t child)
1567 {
1568         struct pccbb_softc *sc = device_get_softc(brdev);
1569
1570         if (sc->flags & PCCBB_16BIT_CARD)
1571                 return (pccbb_pcic_power_enable_socket(brdev, child));
1572         else
1573                 return (pccbb_cardbus_power_enable_socket(brdev, child));
1574 }
1575
1576 static void
1577 pccbb_power_disable_socket(device_t brdev, device_t child)
1578 {
1579         struct pccbb_softc *sc = device_get_softc(brdev);
1580         if (sc->flags & PCCBB_16BIT_CARD)
1581                 pccbb_pcic_power_disable_socket(brdev, child);
1582         else
1583                 pccbb_cardbus_power_disable_socket(brdev, child);
1584 }
1585 static int
1586 pccbb_pcic_activate_resource(device_t brdev, device_t child, int type, int rid,
1587     struct resource *res)
1588 {
1589         int err;
1590         struct pccbb_softc *sc = device_get_softc(brdev);
1591         if (!(rman_get_flags(res) & RF_ACTIVE)) { /* not already activated */
1592                 switch (type) {
1593                 case SYS_RES_IOPORT:
1594                         err = exca_io_map(&sc->exca, 0, res);
1595                         break;
1596                 case SYS_RES_MEMORY:
1597                         err = exca_mem_map(&sc->exca, 0, res);
1598                         break;
1599                 default:
1600                         err = 0;
1601                         break;
1602                 }
1603                 if (err)
1604                         return (err);
1605
1606         }
1607         return (BUS_ACTIVATE_RESOURCE(device_get_parent(brdev), child,
1608             type, rid, res));
1609 }
1610
1611 static int
1612 pccbb_pcic_deactivate_resource(device_t brdev, device_t child, int type,
1613     int rid, struct resource *res)
1614 {
1615         struct pccbb_softc *sc = device_get_softc(brdev);
1616
1617         if (rman_get_flags(res) & RF_ACTIVE) { /* if activated */
1618                 switch (type) {
1619                 case SYS_RES_IOPORT:
1620                         if (exca_io_unmap_res(&sc->exca, res))
1621                                 return (ENOENT);
1622                         break;
1623                 case SYS_RES_MEMORY:
1624                         if (exca_mem_unmap_res(&sc->exca, res))
1625                                 return (ENOENT);
1626                         break;
1627                 }
1628         }
1629         return (BUS_DEACTIVATE_RESOURCE(device_get_parent(brdev), child,
1630             type, rid, res));
1631 }
1632
1633 static struct resource *
1634 pccbb_pcic_alloc_resource(device_t brdev, device_t child, int type, int *rid,
1635     u_long start, u_long end, u_long count, uint flags)
1636 {
1637         struct resource *res = NULL;
1638         struct pccbb_softc *sc = device_get_softc(brdev);
1639         int tmp;
1640
1641         switch (type) {
1642         case SYS_RES_MEMORY:
1643                 if (start < pccbb_start_mem)
1644                         start = pccbb_start_mem;
1645                 if (end < start)
1646                         end = start;
1647                 flags = (flags & ~RF_ALIGNMENT_MASK) |
1648                     rman_make_alignment_flags(CBB_MEMALIGN);
1649                 break;
1650         case SYS_RES_IOPORT:
1651                 if (start < pccbb_start_16_io)
1652                         start = pccbb_start_16_io;
1653                 if (end < start)
1654                         end = start;
1655                 break;
1656         case SYS_RES_IRQ:
1657                 tmp = rman_get_start(sc->irq_res);
1658                 if (start > tmp || end < tmp || count != 1) {
1659                         device_printf(child, "requested interrupt %ld-%ld,"
1660                             "count = %ld not supported by pccbb\n",
1661                             start, end, count);
1662                         return (NULL);
1663                 }
1664                 flags |= RF_SHAREABLE;
1665                 start = end = rman_get_start(sc->irq_res);
1666                 break;
1667         }
1668         res = BUS_ALLOC_RESOURCE(device_get_parent(brdev), child, type, rid,
1669             start, end, count, flags & ~RF_ACTIVE);
1670         if (res == NULL)
1671                 return (NULL);
1672         pccbb_insert_res(sc, res, type, *rid);
1673         if (flags & RF_ACTIVE) {
1674                 if (bus_activate_resource(child, type, *rid, res) != 0) {
1675                         bus_release_resource(child, type, *rid, res);
1676                         return (NULL);
1677                 }
1678         }
1679
1680         return (res);
1681 }
1682
1683 static int
1684 pccbb_pcic_release_resource(device_t brdev, device_t child, int type,
1685     int rid, struct resource *res)
1686 {
1687         struct pccbb_softc *sc = device_get_softc(brdev);
1688         int error;
1689
1690         if (rman_get_flags(res) & RF_ACTIVE) {
1691                 error = bus_deactivate_resource(child, type, rid, res);
1692                 if (error != 0)
1693                         return (error);
1694         }
1695         pccbb_remove_res(sc, res);
1696         return (BUS_RELEASE_RESOURCE(device_get_parent(brdev), child,
1697             type, rid, res));
1698 }
1699
1700 /************************************************************************/
1701 /* PC Card methods                                                      */
1702 /************************************************************************/
1703
1704 static int
1705 pccbb_pcic_set_res_flags(device_t brdev, device_t child, int type, int rid,
1706     uint32_t flags)
1707 {
1708         struct pccbb_softc *sc = device_get_softc(brdev);
1709         struct resource *res;
1710
1711         if (type != SYS_RES_MEMORY)
1712                 return (EINVAL);
1713         res = pccbb_find_res(sc, type, rid);
1714         if (res == NULL) {
1715                 device_printf(brdev,
1716                     "set_res_flags: specified rid not found\n");
1717                 return (ENOENT);
1718         }
1719         return (exca_mem_set_flags(&sc->exca, res, flags));
1720 }
1721
1722 static int
1723 pccbb_pcic_set_memory_offset(device_t brdev, device_t child, int rid,
1724     uint32_t cardaddr, uint32_t *deltap)
1725 {
1726         struct pccbb_softc *sc = device_get_softc(brdev);
1727         struct resource *res;
1728
1729         res = pccbb_find_res(sc, SYS_RES_MEMORY, rid);
1730         if (res == NULL) {
1731                 device_printf(brdev,
1732                     "set_memory_offset: specified rid not found\n");
1733                 return (ENOENT);
1734         }
1735         return (exca_mem_set_offset(&sc->exca, res, cardaddr, deltap));
1736 }
1737
1738 /************************************************************************/
1739 /* BUS Methods                                                          */
1740 /************************************************************************/
1741
1742
1743 static int
1744 pccbb_activate_resource(device_t brdev, device_t child, int type, int rid,
1745     struct resource *r)
1746 {
1747         struct pccbb_softc *sc = device_get_softc(brdev);
1748
1749         if (sc->flags & PCCBB_16BIT_CARD)
1750                 return (pccbb_pcic_activate_resource(brdev, child, type, rid, r));
1751         else
1752                 return (pccbb_cardbus_activate_resource(brdev, child, type, rid,
1753                     r));
1754 }
1755
1756 static int
1757 pccbb_deactivate_resource(device_t brdev, device_t child, int type,
1758     int rid, struct resource *r)
1759 {
1760         struct pccbb_softc *sc = device_get_softc(brdev);
1761
1762         if (sc->flags & PCCBB_16BIT_CARD)
1763                 return (pccbb_pcic_deactivate_resource(brdev, child, type,
1764                     rid, r));
1765         else
1766                 return (pccbb_cardbus_deactivate_resource(brdev, child, type,
1767                     rid, r));
1768 }
1769
1770 static struct resource *
1771 pccbb_alloc_resource(device_t brdev, device_t child, int type, int *rid,
1772     u_long start, u_long end, u_long count, uint flags)
1773 {
1774         struct pccbb_softc *sc = device_get_softc(brdev);
1775
1776         if (sc->flags & PCCBB_16BIT_CARD)
1777                 return (pccbb_pcic_alloc_resource(brdev, child, type, rid,
1778                     start, end, count, flags));
1779         else
1780                 return (pccbb_cardbus_alloc_resource(brdev, child, type, rid,
1781                     start, end, count, flags));
1782 }
1783
1784 static int
1785 pccbb_release_resource(device_t brdev, device_t child, int type, int rid,
1786     struct resource *r)
1787 {
1788         struct pccbb_softc *sc = device_get_softc(brdev);
1789
1790         if (sc->flags & PCCBB_16BIT_CARD)
1791                 return (pccbb_pcic_release_resource(brdev, child, type,
1792                     rid, r));
1793         else
1794                 return (pccbb_cardbus_release_resource(brdev, child, type,
1795                     rid, r));
1796 }
1797
1798 static int
1799 pccbb_read_ivar(device_t brdev, device_t child, int which, uintptr_t *result)
1800 {
1801         struct pccbb_softc *sc = device_get_softc(brdev);
1802
1803         switch (which) {
1804         case PCIB_IVAR_BUS:
1805                 *result = sc->secbus;
1806                 return (0);
1807         }
1808         return (ENOENT);
1809 }
1810
1811 static int
1812 pccbb_write_ivar(device_t brdev, device_t child, int which, uintptr_t value)
1813 {
1814         struct pccbb_softc *sc = device_get_softc(brdev);
1815
1816         switch (which) {
1817         case PCIB_IVAR_BUS:
1818                 sc->secbus = value;
1819                 break;
1820         }
1821         return (ENOENT);
1822 }
1823
1824 /************************************************************************/
1825 /* PCI compat methods                                                   */
1826 /************************************************************************/
1827
1828 static int
1829 pccbb_maxslots(device_t brdev)
1830 {
1831         return (0);
1832 }
1833
1834 static uint32_t
1835 pccbb_read_config(device_t brdev, int b, int s, int f, int reg, int width)
1836 {
1837         /*
1838          * Pass through to the next ppb up the chain (i.e. our grandparent).
1839          */
1840         return (PCIB_READ_CONFIG(device_get_parent(device_get_parent(brdev)),
1841             b, s, f, reg, width));
1842 }
1843
1844 static void
1845 pccbb_write_config(device_t brdev, int b, int s, int f, int reg, uint32_t val,
1846     int width)
1847 {
1848         /*
1849          * Pass through to the next ppb up the chain (i.e. our grandparent).
1850          */
1851         PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(brdev)),
1852             b, s, f, reg, val, width);
1853 }
1854
1855 static int
1856 pccbb_suspend(device_t self)
1857 {
1858         int                     error = 0;
1859         struct pccbb_softc*     sc = device_get_softc(self);
1860
1861         bus_teardown_intr(self, sc->irq_res, sc->intrhand);
1862         error = bus_generic_suspend(self);
1863         return (error);
1864 }
1865
1866 static int
1867 pccbb_resume(device_t self)
1868 {
1869         int     error = 0;
1870         struct pccbb_softc *sc = (struct pccbb_softc *)device_get_softc(self);
1871         uint32_t tmp;
1872
1873         pci_write_config(self, CBBR_SOCKBASE, rman_get_start(sc->base_res), 4);
1874         DEVPRINTF((self, "PCI Memory allocated: %08lx\n",
1875             rman_get_start(sc->base_res)));
1876
1877         pccbb_chipinit(sc);
1878
1879         /* re-establish the interrupt. */
1880         if (bus_setup_intr(self, sc->irq_res, INTR_TYPE_AV, pccbb_intr, sc,
1881             &sc->intrhand)) {
1882                 device_printf(self, "couldn't re-establish interrupt");
1883                 bus_release_resource(self, SYS_RES_IRQ, 0, sc->irq_res);
1884                 bus_release_resource(self, SYS_RES_MEMORY, CBBR_SOCKBASE,
1885                     sc->base_res);
1886                 sc->irq_res = NULL;
1887                 sc->base_res = NULL;
1888                 return (ENOMEM);
1889         }
1890
1891         /* CSC Interrupt: Card detect interrupt on */
1892         pccbb_setb(sc, CBB_SOCKET_MASK, CBB_SOCKET_MASK_CD);
1893
1894         /* reset interrupt */
1895         tmp = pccbb_get(sc, CBB_SOCKET_EVENT);
1896         pccbb_set(sc, CBB_SOCKET_EVENT, tmp);
1897
1898         /*
1899          * Some BIOSes will not save the BARs for the pci chips, so we
1900          * must do it ourselves.  If the BAR is reset to 0 for an I/O
1901          * device, it will read back as 0x1, so no explicit test for
1902          * memory devices are needed.
1903          *
1904          * Note: The PCI bus code should do this automatically for us on
1905          * suspend/resume, but until it does, we have to cope.
1906          */
1907         if (pci_read_config(self, CBBR_SOCKBASE, 4) == 0)
1908                 pci_write_config(self, CBBR_SOCKBASE,
1909                     rman_get_start(sc->base_res), 4);
1910
1911         error = bus_generic_resume(self);
1912
1913         return (error);
1914 }
1915
1916 static device_method_t pccbb_methods[] = {
1917         /* Device interface */
1918         DEVMETHOD(device_probe,                 pccbb_probe),
1919         DEVMETHOD(device_attach,                pccbb_attach),
1920         DEVMETHOD(device_detach,                pccbb_detach),
1921         DEVMETHOD(device_shutdown,              pccbb_shutdown),
1922         DEVMETHOD(device_suspend,               pccbb_suspend),
1923         DEVMETHOD(device_resume,                pccbb_resume),
1924
1925         /* bus methods */
1926         DEVMETHOD(bus_print_child,              bus_generic_print_child),
1927         DEVMETHOD(bus_read_ivar,                pccbb_read_ivar),
1928         DEVMETHOD(bus_write_ivar,               pccbb_write_ivar),
1929         DEVMETHOD(bus_alloc_resource,           pccbb_alloc_resource),
1930         DEVMETHOD(bus_release_resource,         pccbb_release_resource),
1931         DEVMETHOD(bus_activate_resource,        pccbb_activate_resource),
1932         DEVMETHOD(bus_deactivate_resource,      pccbb_deactivate_resource),
1933         DEVMETHOD(bus_driver_added,             pccbb_driver_added),
1934         DEVMETHOD(bus_child_detached,           pccbb_child_detached),
1935         DEVMETHOD(bus_setup_intr,               pccbb_setup_intr),
1936         DEVMETHOD(bus_teardown_intr,            pccbb_teardown_intr),
1937
1938         /* 16-bit card interface */
1939         DEVMETHOD(card_set_res_flags,           pccbb_pcic_set_res_flags),
1940         DEVMETHOD(card_set_memory_offset,       pccbb_pcic_set_memory_offset),
1941         DEVMETHOD(card_reprobe_card,            pccbb_card_reprobe),
1942
1943         /* power interface */
1944         DEVMETHOD(power_enable_socket,          pccbb_power_enable_socket),
1945         DEVMETHOD(power_disable_socket,         pccbb_power_disable_socket),
1946
1947         /* pcib compatibility interface */
1948         DEVMETHOD(pcib_maxslots,                pccbb_maxslots),
1949         DEVMETHOD(pcib_read_config,             pccbb_read_config),
1950         DEVMETHOD(pcib_write_config,            pccbb_write_config),
1951         {0,0}
1952 };
1953
1954 static driver_t pccbb_driver = {
1955         "pccbb",
1956         pccbb_methods,
1957         sizeof(struct pccbb_softc)
1958 };
1959
1960 static devclass_t pccbb_devclass;
1961
1962 DRIVER_MODULE(pccbb, pci, pccbb_driver, pccbb_devclass, 0, 0);
1963 MODULE_VERSION(pccbb, 1);
1964 MODULE_DEPEND(pccbb, exca, 1, 1, 1);
1965 MODULE_DEPEND(pccbb, pccard, 1, 1, 1);
1966 MODULE_DEPEND(pccbb, cardbus, 1, 1, 1);