2 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier
3 * Copyright (c) 2000 Michael Smith <msmith@freebsd.org>
4 * Copyright (c) 2000 BSDi
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
35 * PCI:PCI bridge support.
38 #include <sys/param.h>
40 #include <sys/kernel.h>
41 #include <sys/malloc.h>
42 #include <sys/module.h>
44 #include <sys/sysctl.h>
45 #include <sys/systm.h>
47 #include <dev/pci/pcivar.h>
48 #include <dev/pci/pcireg.h>
49 #include <dev/pci/pci_private.h>
50 #include <dev/pci/pcib_private.h>
54 static int pcib_probe(device_t dev);
55 static int pcib_suspend(device_t dev);
56 static int pcib_resume(device_t dev);
57 static int pcib_power_for_sleep(device_t pcib, device_t dev,
60 static device_method_t pcib_methods[] = {
61 /* Device interface */
62 DEVMETHOD(device_probe, pcib_probe),
63 DEVMETHOD(device_attach, pcib_attach),
64 DEVMETHOD(device_detach, bus_generic_detach),
65 DEVMETHOD(device_shutdown, bus_generic_shutdown),
66 DEVMETHOD(device_suspend, pcib_suspend),
67 DEVMETHOD(device_resume, pcib_resume),
70 DEVMETHOD(bus_read_ivar, pcib_read_ivar),
71 DEVMETHOD(bus_write_ivar, pcib_write_ivar),
72 DEVMETHOD(bus_alloc_resource, pcib_alloc_resource),
74 DEVMETHOD(bus_adjust_resource, pcib_adjust_resource),
75 DEVMETHOD(bus_release_resource, pcib_release_resource),
77 DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource),
78 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
80 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
81 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
82 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
83 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
86 DEVMETHOD(pcib_maxslots, pcib_maxslots),
87 DEVMETHOD(pcib_read_config, pcib_read_config),
88 DEVMETHOD(pcib_write_config, pcib_write_config),
89 DEVMETHOD(pcib_route_interrupt, pcib_route_interrupt),
90 DEVMETHOD(pcib_alloc_msi, pcib_alloc_msi),
91 DEVMETHOD(pcib_release_msi, pcib_release_msi),
92 DEVMETHOD(pcib_alloc_msix, pcib_alloc_msix),
93 DEVMETHOD(pcib_release_msix, pcib_release_msix),
94 DEVMETHOD(pcib_map_msi, pcib_map_msi),
95 DEVMETHOD(pcib_power_for_sleep, pcib_power_for_sleep),
100 static devclass_t pcib_devclass;
102 DEFINE_CLASS_0(pcib, pcib_driver, pcib_methods, sizeof(struct pcib_softc));
103 DRIVER_MODULE(pcib, pci, pcib_driver, pcib_devclass, NULL, NULL);
106 SYSCTL_DECL(_hw_pci);
108 static int pci_clear_pcib;
109 TUNABLE_INT("hw.pci.clear_pcib", &pci_clear_pcib);
110 SYSCTL_INT(_hw_pci, OID_AUTO, clear_pcib, CTLFLAG_RDTUN, &pci_clear_pcib, 0,
111 "Clear firmware-assigned resources for PCI-PCI bridge I/O windows.");
114 * Is a resource from a child device sub-allocated from one of our
118 pcib_is_resource_managed(struct pcib_softc *sc, int type, struct resource *r)
124 return (rman_is_region_manager(r, &sc->bus.rman));
127 return (rman_is_region_manager(r, &sc->io.rman));
129 /* Prefetchable resources may live in either memory rman. */
130 if (rman_get_flags(r) & RF_PREFETCHABLE &&
131 rman_is_region_manager(r, &sc->pmem.rman))
133 return (rman_is_region_manager(r, &sc->mem.rman));
139 pcib_is_window_open(struct pcib_window *pw)
142 return (pw->valid && pw->base < pw->limit);
146 * XXX: If RF_ACTIVE did not also imply allocating a bus space tag and
147 * handle for the resource, we could pass RF_ACTIVE up to the PCI bus
148 * when allocating the resource windows and rely on the PCI bus driver
152 pcib_activate_window(struct pcib_softc *sc, int type)
155 PCI_ENABLE_IO(device_get_parent(sc->dev), sc->dev, type);
159 pcib_write_windows(struct pcib_softc *sc, int mask)
165 if (sc->io.valid && mask & WIN_IO) {
166 val = pci_read_config(dev, PCIR_IOBASEL_1, 1);
167 if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) {
168 pci_write_config(dev, PCIR_IOBASEH_1,
169 sc->io.base >> 16, 2);
170 pci_write_config(dev, PCIR_IOLIMITH_1,
171 sc->io.limit >> 16, 2);
173 pci_write_config(dev, PCIR_IOBASEL_1, sc->io.base >> 8, 1);
174 pci_write_config(dev, PCIR_IOLIMITL_1, sc->io.limit >> 8, 1);
177 if (mask & WIN_MEM) {
178 pci_write_config(dev, PCIR_MEMBASE_1, sc->mem.base >> 16, 2);
179 pci_write_config(dev, PCIR_MEMLIMIT_1, sc->mem.limit >> 16, 2);
182 if (sc->pmem.valid && mask & WIN_PMEM) {
183 val = pci_read_config(dev, PCIR_PMBASEL_1, 2);
184 if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) {
185 pci_write_config(dev, PCIR_PMBASEH_1,
186 sc->pmem.base >> 32, 4);
187 pci_write_config(dev, PCIR_PMLIMITH_1,
188 sc->pmem.limit >> 32, 4);
190 pci_write_config(dev, PCIR_PMBASEL_1, sc->pmem.base >> 16, 2);
191 pci_write_config(dev, PCIR_PMLIMITL_1, sc->pmem.limit >> 16, 2);
196 * This is used to reject I/O port allocations that conflict with an
200 pcib_is_isa_range(struct pcib_softc *sc, u_long start, u_long end, u_long count)
204 if (!(sc->bridgectl & PCIB_BCR_ISA_ENABLE))
207 /* Only check fixed ranges for overlap. */
208 if (start + count - 1 != end)
211 /* ISA aliases are only in the lower 64KB of I/O space. */
215 /* Check for overlap with 0x000 - 0x0ff as a special case. */
220 * If the start address is an alias, the range is an alias.
221 * Otherwise, compute the start of the next alias range and
222 * check if it is before the end of the candidate range.
224 if ((start & 0x300) != 0)
226 next_alias = (start & ~0x3fful) | 0x100;
227 if (next_alias <= end)
233 device_printf(sc->dev,
234 "I/O range %#lx-%#lx overlaps with an ISA alias\n", start,
240 pcib_add_window_resources(struct pcib_window *w, struct resource **res,
243 struct resource **newarray;
246 newarray = malloc(sizeof(struct resource *) * (w->count + count),
249 bcopy(w->res, newarray, sizeof(struct resource *) * w->count);
250 bcopy(res, newarray + w->count, sizeof(struct resource *) * count);
251 free(w->res, M_DEVBUF);
255 for (i = 0; i < count; i++) {
256 error = rman_manage_region(&w->rman, rman_get_start(res[i]),
257 rman_get_end(res[i]));
259 panic("Failed to add resource to rman");
263 typedef void (nonisa_callback)(u_long start, u_long end, void *arg);
266 pcib_walk_nonisa_ranges(u_long start, u_long end, nonisa_callback *cb,
272 * If start is within an ISA alias range, move up to the start
273 * of the next non-alias range. As a special case, addresses
274 * in the range 0x000 - 0x0ff should also be skipped since
275 * those are used for various system I/O devices in ISA
278 if (start <= 65535) {
279 if (start < 0x100 || (start & 0x300) != 0) {
285 /* ISA aliases are only in the lower 64KB of I/O space. */
286 while (start <= MIN(end, 65535)) {
287 next_end = MIN(start | 0xff, end);
288 cb(start, next_end, arg);
297 count_ranges(u_long start, u_long end, void *arg)
306 struct resource **res;
307 struct pcib_softc *sc;
312 alloc_ranges(u_long start, u_long end, void *arg)
314 struct alloc_state *as;
315 struct pcib_window *w;
325 device_printf(as->sc->dev,
326 "allocating non-ISA range %#lx-%#lx\n", start, end);
327 as->res[as->count] = bus_alloc_resource(as->sc->dev, SYS_RES_IOPORT,
328 &rid, start, end, end - start + 1, 0);
329 if (as->res[as->count] == NULL)
336 pcib_alloc_nonisa_ranges(struct pcib_softc *sc, u_long start, u_long end)
338 struct alloc_state as;
341 /* First, see how many ranges we need. */
343 pcib_walk_nonisa_ranges(start, end, count_ranges, &new_count);
345 /* Second, allocate the ranges. */
346 as.res = malloc(sizeof(struct resource *) * new_count, M_DEVBUF,
351 pcib_walk_nonisa_ranges(start, end, alloc_ranges, &as);
353 for (i = 0; i < as.count; i++)
354 bus_release_resource(sc->dev, SYS_RES_IOPORT,
355 sc->io.reg, as.res[i]);
356 free(as.res, M_DEVBUF);
359 KASSERT(as.count == new_count, ("%s: count mismatch", __func__));
361 /* Third, add the ranges to the window. */
362 pcib_add_window_resources(&sc->io, as.res, as.count);
363 free(as.res, M_DEVBUF);
368 pcib_alloc_window(struct pcib_softc *sc, struct pcib_window *w, int type,
369 int flags, pci_addr_t max_address)
371 struct resource *res;
375 if (max_address != (u_long)max_address)
377 w->rman.rm_start = 0;
378 w->rman.rm_end = max_address;
379 w->rman.rm_type = RMAN_ARRAY;
380 snprintf(buf, sizeof(buf), "%s %s window",
381 device_get_nameunit(sc->dev), w->name);
382 w->rman.rm_descr = strdup(buf, M_DEVBUF);
383 error = rman_init(&w->rman);
385 panic("Failed to initialize %s %s rman",
386 device_get_nameunit(sc->dev), w->name);
388 if (!pcib_is_window_open(w))
391 if (w->base > max_address || w->limit > max_address) {
392 device_printf(sc->dev,
393 "initial %s window has too many bits, ignoring\n", w->name);
396 if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE)
397 (void)pcib_alloc_nonisa_ranges(sc, w->base, w->limit);
400 res = bus_alloc_resource(sc->dev, type, &rid, w->base, w->limit,
401 w->limit - w->base + 1, flags);
403 pcib_add_window_resources(w, &res, 1);
405 if (w->res == NULL) {
406 device_printf(sc->dev,
407 "failed to allocate initial %s window: %#jx-%#jx\n",
408 w->name, (uintmax_t)w->base, (uintmax_t)w->limit);
409 w->base = max_address;
411 pcib_write_windows(sc, w->mask);
414 pcib_activate_window(sc, type);
418 * Initialize I/O windows.
421 pcib_probe_windows(struct pcib_softc *sc)
429 if (pci_clear_pcib) {
430 pci_write_config(dev, PCIR_IOBASEL_1, 0xff, 1);
431 pci_write_config(dev, PCIR_IOBASEH_1, 0xffff, 2);
432 pci_write_config(dev, PCIR_IOLIMITL_1, 0, 1);
433 pci_write_config(dev, PCIR_IOLIMITH_1, 0, 2);
434 pci_write_config(dev, PCIR_MEMBASE_1, 0xffff, 2);
435 pci_write_config(dev, PCIR_MEMLIMIT_1, 0, 2);
436 pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2);
437 pci_write_config(dev, PCIR_PMBASEH_1, 0xffffffff, 4);
438 pci_write_config(dev, PCIR_PMLIMITL_1, 0, 2);
439 pci_write_config(dev, PCIR_PMLIMITH_1, 0, 4);
442 /* Determine if the I/O port window is implemented. */
443 val = pci_read_config(dev, PCIR_IOBASEL_1, 1);
446 * If 'val' is zero, then only 16-bits of I/O space
449 pci_write_config(dev, PCIR_IOBASEL_1, 0xff, 1);
450 if (pci_read_config(dev, PCIR_IOBASEL_1, 1) != 0) {
452 pci_write_config(dev, PCIR_IOBASEL_1, 0, 1);
457 /* Read the existing I/O port window. */
459 sc->io.reg = PCIR_IOBASEL_1;
461 sc->io.mask = WIN_IO;
462 sc->io.name = "I/O port";
463 if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) {
464 sc->io.base = PCI_PPBIOBASE(
465 pci_read_config(dev, PCIR_IOBASEH_1, 2), val);
466 sc->io.limit = PCI_PPBIOLIMIT(
467 pci_read_config(dev, PCIR_IOLIMITH_1, 2),
468 pci_read_config(dev, PCIR_IOLIMITL_1, 1));
471 sc->io.base = PCI_PPBIOBASE(0, val);
472 sc->io.limit = PCI_PPBIOLIMIT(0,
473 pci_read_config(dev, PCIR_IOLIMITL_1, 1));
476 pcib_alloc_window(sc, &sc->io, SYS_RES_IOPORT, 0, max);
479 /* Read the existing memory window. */
481 sc->mem.reg = PCIR_MEMBASE_1;
483 sc->mem.mask = WIN_MEM;
484 sc->mem.name = "memory";
485 sc->mem.base = PCI_PPBMEMBASE(0,
486 pci_read_config(dev, PCIR_MEMBASE_1, 2));
487 sc->mem.limit = PCI_PPBMEMLIMIT(0,
488 pci_read_config(dev, PCIR_MEMLIMIT_1, 2));
489 pcib_alloc_window(sc, &sc->mem, SYS_RES_MEMORY, 0, 0xffffffff);
491 /* Determine if the prefetchable memory window is implemented. */
492 val = pci_read_config(dev, PCIR_PMBASEL_1, 2);
495 * If 'val' is zero, then only 32-bits of memory space
498 pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2);
499 if (pci_read_config(dev, PCIR_PMBASEL_1, 2) != 0) {
501 pci_write_config(dev, PCIR_PMBASEL_1, 0, 2);
506 /* Read the existing prefetchable memory window. */
507 if (sc->pmem.valid) {
508 sc->pmem.reg = PCIR_PMBASEL_1;
510 sc->pmem.mask = WIN_PMEM;
511 sc->pmem.name = "prefetch";
512 if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) {
513 sc->pmem.base = PCI_PPBMEMBASE(
514 pci_read_config(dev, PCIR_PMBASEH_1, 4), val);
515 sc->pmem.limit = PCI_PPBMEMLIMIT(
516 pci_read_config(dev, PCIR_PMLIMITH_1, 4),
517 pci_read_config(dev, PCIR_PMLIMITL_1, 2));
518 max = 0xffffffffffffffff;
520 sc->pmem.base = PCI_PPBMEMBASE(0, val);
521 sc->pmem.limit = PCI_PPBMEMLIMIT(0,
522 pci_read_config(dev, PCIR_PMLIMITL_1, 2));
525 pcib_alloc_window(sc, &sc->pmem, SYS_RES_MEMORY,
526 RF_PREFETCHABLE, max);
532 * Allocate a suitable secondary bus for this bridge if needed and
533 * initialize the resource manager for the secondary bus range. Note
534 * that the minimum count is a desired value and this may allocate a
538 pcib_setup_secbus(device_t dev, struct pcib_secbus *bus, int min_count)
543 switch (pci_read_config(dev, PCIR_HDRTYPE, 1) & PCIM_HDRTYPE) {
544 case PCIM_HDRTYPE_BRIDGE:
545 bus->sub_reg = PCIR_SUBBUS_1;
547 case PCIM_HDRTYPE_CARDBUS:
548 bus->sub_reg = PCIR_SUBBUS_2;
551 panic("not a PCI bridge");
554 bus->rman.rm_start = 0;
555 bus->rman.rm_end = PCI_BUSMAX;
556 bus->rman.rm_type = RMAN_ARRAY;
557 snprintf(buf, sizeof(buf), "%s bus numbers", device_get_nameunit(dev));
558 bus->rman.rm_descr = strdup(buf, M_DEVBUF);
559 error = rman_init(&bus->rman);
561 panic("Failed to initialize %s bus number rman",
562 device_get_nameunit(dev));
565 * Allocate a bus range. This will return an existing bus range
566 * if one exists, or a new bus range if one does not.
569 bus->res = bus_alloc_resource(dev, PCI_RES_BUS, &rid, 0ul, ~0ul,
571 if (bus->res == NULL) {
573 * Fall back to just allocating a range of a single bus
576 bus->res = bus_alloc_resource(dev, PCI_RES_BUS, &rid, 0ul, ~0ul,
578 } else if (rman_get_size(bus->res) < min_count)
580 * Attempt to grow the existing range to satisfy the
581 * minimum desired count.
583 (void)bus_adjust_resource(dev, PCI_RES_BUS, bus->res,
584 rman_get_start(bus->res), rman_get_start(bus->res) +
588 * Add the initial resource to the rman.
590 if (bus->res != NULL) {
591 error = rman_manage_region(&bus->rman, rman_get_start(bus->res),
592 rman_get_end(bus->res));
594 panic("Failed to add resource to rman");
595 bus->sec = rman_get_start(bus->res);
596 bus->sub = rman_get_end(bus->res);
600 static struct resource *
601 pcib_suballoc_bus(struct pcib_secbus *bus, device_t child, int *rid,
602 u_long start, u_long end, u_long count, u_int flags)
604 struct resource *res;
606 res = rman_reserve_resource(&bus->rman, start, end, count, flags,
612 device_printf(bus->dev,
613 "allocated bus range (%lu-%lu) for rid %d of %s\n",
614 rman_get_start(res), rman_get_end(res), *rid,
615 pcib_child_name(child));
616 rman_set_rid(res, *rid);
621 * Attempt to grow the secondary bus range. This is much simpler than
622 * for I/O windows as the range can only be grown by increasing
626 pcib_grow_subbus(struct pcib_secbus *bus, u_long new_end)
631 old_end = rman_get_end(bus->res);
632 KASSERT(new_end > old_end, ("attempt to shrink subbus"));
633 error = bus_adjust_resource(bus->dev, PCI_RES_BUS, bus->res,
634 rman_get_start(bus->res), new_end);
638 device_printf(bus->dev, "grew bus range to %lu-%lu\n",
639 rman_get_start(bus->res), rman_get_end(bus->res));
640 error = rman_manage_region(&bus->rman, old_end + 1,
641 rman_get_end(bus->res));
643 panic("Failed to add resource to rman");
644 bus->sub = rman_get_end(bus->res);
645 pci_write_config(bus->dev, bus->sub_reg, bus->sub, 1);
650 pcib_alloc_subbus(struct pcib_secbus *bus, device_t child, int *rid,
651 u_long start, u_long end, u_long count, u_int flags)
653 struct resource *res;
654 u_long start_free, end_free, new_end;
657 * First, see if the request can be satisified by the existing
660 res = pcib_suballoc_bus(bus, child, rid, start, end, count, flags);
665 * Figure out a range to grow the bus range. First, find the
666 * first bus number after the last allocated bus in the rman and
667 * enforce that as a minimum starting point for the range.
669 if (rman_last_free_region(&bus->rman, &start_free, &end_free) != 0 ||
670 end_free != bus->sub)
671 start_free = bus->sub + 1;
672 if (start_free < start)
674 new_end = start_free + count - 1;
677 * See if this new range would satisfy the request if it
683 /* Finally, attempt to grow the existing resource. */
685 device_printf(bus->dev,
686 "attempting to grow bus range for %lu buses\n", count);
687 printf("\tback candidate range: %lu-%lu\n", start_free,
690 if (pcib_grow_subbus(bus, new_end) == 0)
691 return (pcib_suballoc_bus(bus, child, rid, start, end, count,
700 * Is the prefetch window open (eg, can we allocate memory in it?)
703 pcib_is_prefetch_open(struct pcib_softc *sc)
705 return (sc->pmembase > 0 && sc->pmembase < sc->pmemlimit);
709 * Is the nonprefetch window open (eg, can we allocate memory in it?)
712 pcib_is_nonprefetch_open(struct pcib_softc *sc)
714 return (sc->membase > 0 && sc->membase < sc->memlimit);
718 * Is the io window open (eg, can we allocate ports in it?)
721 pcib_is_io_open(struct pcib_softc *sc)
723 return (sc->iobase > 0 && sc->iobase < sc->iolimit);
727 * Get current I/O decode.
730 pcib_get_io_decode(struct pcib_softc *sc)
737 iolow = pci_read_config(dev, PCIR_IOBASEL_1, 1);
738 if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32)
739 sc->iobase = PCI_PPBIOBASE(
740 pci_read_config(dev, PCIR_IOBASEH_1, 2), iolow);
742 sc->iobase = PCI_PPBIOBASE(0, iolow);
744 iolow = pci_read_config(dev, PCIR_IOLIMITL_1, 1);
745 if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32)
746 sc->iolimit = PCI_PPBIOLIMIT(
747 pci_read_config(dev, PCIR_IOLIMITH_1, 2), iolow);
749 sc->iolimit = PCI_PPBIOLIMIT(0, iolow);
753 * Get current memory decode.
756 pcib_get_mem_decode(struct pcib_softc *sc)
763 sc->membase = PCI_PPBMEMBASE(0,
764 pci_read_config(dev, PCIR_MEMBASE_1, 2));
765 sc->memlimit = PCI_PPBMEMLIMIT(0,
766 pci_read_config(dev, PCIR_MEMLIMIT_1, 2));
768 pmemlow = pci_read_config(dev, PCIR_PMBASEL_1, 2);
769 if ((pmemlow & PCIM_BRPM_MASK) == PCIM_BRPM_64)
770 sc->pmembase = PCI_PPBMEMBASE(
771 pci_read_config(dev, PCIR_PMBASEH_1, 4), pmemlow);
773 sc->pmembase = PCI_PPBMEMBASE(0, pmemlow);
775 pmemlow = pci_read_config(dev, PCIR_PMLIMITL_1, 2);
776 if ((pmemlow & PCIM_BRPM_MASK) == PCIM_BRPM_64)
777 sc->pmemlimit = PCI_PPBMEMLIMIT(
778 pci_read_config(dev, PCIR_PMLIMITH_1, 4), pmemlow);
780 sc->pmemlimit = PCI_PPBMEMLIMIT(0, pmemlow);
784 * Restore previous I/O decode.
787 pcib_set_io_decode(struct pcib_softc *sc)
794 iohi = sc->iobase >> 16;
796 pci_write_config(dev, PCIR_IOBASEH_1, iohi, 2);
797 pci_write_config(dev, PCIR_IOBASEL_1, sc->iobase >> 8, 1);
799 iohi = sc->iolimit >> 16;
801 pci_write_config(dev, PCIR_IOLIMITH_1, iohi, 2);
802 pci_write_config(dev, PCIR_IOLIMITL_1, sc->iolimit >> 8, 1);
806 * Restore previous memory decode.
809 pcib_set_mem_decode(struct pcib_softc *sc)
816 pci_write_config(dev, PCIR_MEMBASE_1, sc->membase >> 16, 2);
817 pci_write_config(dev, PCIR_MEMLIMIT_1, sc->memlimit >> 16, 2);
819 pmemhi = sc->pmembase >> 32;
821 pci_write_config(dev, PCIR_PMBASEH_1, pmemhi, 4);
822 pci_write_config(dev, PCIR_PMBASEL_1, sc->pmembase >> 16, 2);
824 pmemhi = sc->pmemlimit >> 32;
826 pci_write_config(dev, PCIR_PMLIMITH_1, pmemhi, 4);
827 pci_write_config(dev, PCIR_PMLIMITL_1, sc->pmemlimit >> 16, 2);
832 * Get current bridge configuration.
835 pcib_cfg_save(struct pcib_softc *sc)
841 sc->command = pci_read_config(dev, PCIR_COMMAND, 2);
842 sc->pribus = pci_read_config(dev, PCIR_PRIBUS_1, 1);
843 sc->bus.sec = pci_read_config(dev, PCIR_SECBUS_1, 1);
844 sc->bus.sub = pci_read_config(dev, PCIR_SUBBUS_1, 1);
845 sc->bridgectl = pci_read_config(dev, PCIR_BRIDGECTL_1, 2);
846 sc->seclat = pci_read_config(dev, PCIR_SECLAT_1, 1);
848 if (sc->command & PCIM_CMD_PORTEN)
849 pcib_get_io_decode(sc);
850 if (sc->command & PCIM_CMD_MEMEN)
851 pcib_get_mem_decode(sc);
856 * Restore previous bridge configuration.
859 pcib_cfg_restore(struct pcib_softc *sc)
865 pci_write_config(dev, PCIR_COMMAND, sc->command, 2);
866 pci_write_config(dev, PCIR_PRIBUS_1, sc->pribus, 1);
867 pci_write_config(dev, PCIR_SECBUS_1, sc->bus.sec, 1);
868 pci_write_config(dev, PCIR_SUBBUS_1, sc->bus.sub, 1);
869 pci_write_config(dev, PCIR_BRIDGECTL_1, sc->bridgectl, 2);
870 pci_write_config(dev, PCIR_SECLAT_1, sc->seclat, 1);
872 pcib_write_windows(sc, WIN_IO | WIN_MEM | WIN_PMEM);
874 if (sc->command & PCIM_CMD_PORTEN)
875 pcib_set_io_decode(sc);
876 if (sc->command & PCIM_CMD_MEMEN)
877 pcib_set_mem_decode(sc);
882 * Generic device interface
885 pcib_probe(device_t dev)
887 if ((pci_get_class(dev) == PCIC_BRIDGE) &&
888 (pci_get_subclass(dev) == PCIS_BRIDGE_PCI)) {
889 device_set_desc(dev, "PCI-PCI bridge");
896 pcib_attach_common(device_t dev)
898 struct pcib_softc *sc;
899 struct sysctl_ctx_list *sctx;
900 struct sysctl_oid *soid;
903 sc = device_get_softc(dev);
907 * Get current bridge configuration.
909 sc->domain = pci_get_domain(dev);
910 sc->secstat = pci_read_config(dev, PCIR_SECSTAT_1, 2);
914 * The primary bus register should always be the bus of the
917 sc->pribus = pci_get_bus(dev);
918 pci_write_config(dev, PCIR_PRIBUS_1, sc->pribus, 1);
921 * Setup sysctl reporting nodes
923 sctx = device_get_sysctl_ctx(dev);
924 soid = device_get_sysctl_tree(dev);
925 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "domain",
926 CTLFLAG_RD, &sc->domain, 0, "Domain number");
927 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "pribus",
928 CTLFLAG_RD, &sc->pribus, 0, "Primary bus number");
929 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "secbus",
930 CTLFLAG_RD, &sc->bus.sec, 0, "Secondary bus number");
931 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "subbus",
932 CTLFLAG_RD, &sc->bus.sub, 0, "Subordinate bus number");
937 switch (pci_get_devid(dev)) {
938 #if !defined(NEW_PCIB) && !defined(PCI_RES_BUS)
939 case 0x12258086: /* Intel 82454KX/GX (Orion) */
943 supbus = pci_read_config(dev, 0x41, 1);
944 if (supbus != 0xff) {
945 sc->bus.sec = supbus + 1;
946 sc->bus.sub = supbus + 1;
953 * The i82380FB mobile docking controller is a PCI-PCI bridge,
954 * and it is a subtractive bridge. However, the ProgIf is wrong
955 * so the normal setting of PCIB_SUBTRACTIVE bit doesn't
956 * happen. There's also a Toshiba bridge that behaves this
959 case 0x124b8086: /* Intel 82380FB Mobile */
960 case 0x060513d7: /* Toshiba ???? */
961 sc->flags |= PCIB_SUBTRACTIVE;
964 #if !defined(NEW_PCIB) && !defined(PCI_RES_BUS)
965 /* Compaq R3000 BIOS sets wrong subordinate bus number. */
970 if ((cp = getenv("smbios.planar.maker")) == NULL)
972 if (strncmp(cp, "Compal", 6) != 0) {
977 if ((cp = getenv("smbios.planar.product")) == NULL)
979 if (strncmp(cp, "08A0", 4) != 0) {
984 if (sc->bus.sub < 0xa) {
985 pci_write_config(dev, PCIR_SUBBUS_1, 0xa, 1);
986 sc->bus.sub = pci_read_config(dev, PCIR_SUBBUS_1, 1);
993 if (pci_msi_device_blacklisted(dev))
994 sc->flags |= PCIB_DISABLE_MSI;
996 if (pci_msix_device_blacklisted(dev))
997 sc->flags |= PCIB_DISABLE_MSIX;
1000 * Intel 815, 845 and other chipsets say they are PCI-PCI bridges,
1001 * but have a ProgIF of 0x80. The 82801 family (AA, AB, BAM/CAM,
1002 * BA/CA/DB and E) PCI bridges are HUB-PCI bridges, in Intelese.
1003 * This means they act as if they were subtractively decoding
1004 * bridges and pass all transactions. Mark them and real ProgIf 1
1005 * parts as subtractive.
1007 if ((pci_get_devid(dev) & 0xff00ffff) == 0x24008086 ||
1008 pci_read_config(dev, PCIR_PROGIF, 1) == PCIP_BRIDGE_PCI_SUBTRACTIVE)
1009 sc->flags |= PCIB_SUBTRACTIVE;
1013 pcib_setup_secbus(dev, &sc->bus, 1);
1015 pcib_probe_windows(sc);
1018 device_printf(dev, " domain %d\n", sc->domain);
1019 device_printf(dev, " secondary bus %d\n", sc->bus.sec);
1020 device_printf(dev, " subordinate bus %d\n", sc->bus.sub);
1022 if (pcib_is_window_open(&sc->io))
1023 device_printf(dev, " I/O decode 0x%jx-0x%jx\n",
1024 (uintmax_t)sc->io.base, (uintmax_t)sc->io.limit);
1025 if (pcib_is_window_open(&sc->mem))
1026 device_printf(dev, " memory decode 0x%jx-0x%jx\n",
1027 (uintmax_t)sc->mem.base, (uintmax_t)sc->mem.limit);
1028 if (pcib_is_window_open(&sc->pmem))
1029 device_printf(dev, " prefetched decode 0x%jx-0x%jx\n",
1030 (uintmax_t)sc->pmem.base, (uintmax_t)sc->pmem.limit);
1032 if (pcib_is_io_open(sc))
1033 device_printf(dev, " I/O decode 0x%x-0x%x\n",
1034 sc->iobase, sc->iolimit);
1035 if (pcib_is_nonprefetch_open(sc))
1036 device_printf(dev, " memory decode 0x%jx-0x%jx\n",
1037 (uintmax_t)sc->membase, (uintmax_t)sc->memlimit);
1038 if (pcib_is_prefetch_open(sc))
1039 device_printf(dev, " prefetched decode 0x%jx-0x%jx\n",
1040 (uintmax_t)sc->pmembase, (uintmax_t)sc->pmemlimit);
1042 if (sc->bridgectl & (PCIB_BCR_ISA_ENABLE | PCIB_BCR_VGA_ENABLE) ||
1043 sc->flags & PCIB_SUBTRACTIVE) {
1044 device_printf(dev, " special decode ");
1046 if (sc->bridgectl & PCIB_BCR_ISA_ENABLE) {
1050 if (sc->bridgectl & PCIB_BCR_VGA_ENABLE) {
1051 printf("%sVGA", comma ? ", " : "");
1054 if (sc->flags & PCIB_SUBTRACTIVE)
1055 printf("%ssubtractive", comma ? ", " : "");
1061 * Always enable busmastering on bridges so that transactions
1062 * initiated on the secondary bus are passed through to the
1065 pci_enable_busmaster(dev);
1069 pcib_attach(device_t dev)
1071 struct pcib_softc *sc;
1074 pcib_attach_common(dev);
1075 sc = device_get_softc(dev);
1076 if (sc->bus.sec != 0) {
1077 child = device_add_child(dev, "pci", sc->bus.sec);
1079 return(bus_generic_attach(dev));
1082 /* no secondary bus; we should have fixed this */
1087 pcib_suspend(device_t dev)
1092 pcib_cfg_save(device_get_softc(dev));
1093 error = bus_generic_suspend(dev);
1094 if (error == 0 && pci_do_power_suspend) {
1095 dstate = PCI_POWERSTATE_D3;
1096 pcib = device_get_parent(device_get_parent(dev));
1097 if (PCIB_POWER_FOR_SLEEP(pcib, dev, &dstate) == 0)
1098 pci_set_powerstate(dev, dstate);
1104 pcib_resume(device_t dev)
1108 if (pci_do_power_resume) {
1109 pcib = device_get_parent(device_get_parent(dev));
1110 if (PCIB_POWER_FOR_SLEEP(pcib, dev, NULL) == 0)
1111 pci_set_powerstate(dev, PCI_POWERSTATE_D0);
1113 pcib_cfg_restore(device_get_softc(dev));
1114 return (bus_generic_resume(dev));
1118 pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
1120 struct pcib_softc *sc = device_get_softc(dev);
1123 case PCIB_IVAR_DOMAIN:
1124 *result = sc->domain;
1127 *result = sc->bus.sec;
1134 pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
1138 case PCIB_IVAR_DOMAIN:
1148 * Attempt to allocate a resource from the existing resources assigned
1151 static struct resource *
1152 pcib_suballoc_resource(struct pcib_softc *sc, struct pcib_window *w,
1153 device_t child, int type, int *rid, u_long start, u_long end, u_long count,
1156 struct resource *res;
1158 if (!pcib_is_window_open(w))
1161 res = rman_reserve_resource(&w->rman, start, end, count,
1162 flags & ~RF_ACTIVE, child);
1167 device_printf(sc->dev,
1168 "allocated %s range (%#lx-%#lx) for rid %x of %s\n",
1169 w->name, rman_get_start(res), rman_get_end(res), *rid,
1170 pcib_child_name(child));
1171 rman_set_rid(res, *rid);
1174 * If the resource should be active, pass that request up the
1175 * tree. This assumes the parent drivers can handle
1176 * activating sub-allocated resources.
1178 if (flags & RF_ACTIVE) {
1179 if (bus_activate_resource(child, type, *rid, res) != 0) {
1180 rman_release_resource(res);
1188 /* Allocate a fresh resource range for an unconfigured window. */
1190 pcib_alloc_new_window(struct pcib_softc *sc, struct pcib_window *w, int type,
1191 u_long start, u_long end, u_long count, u_int flags)
1193 struct resource *res;
1194 u_long base, limit, wmask;
1198 * If this is an I/O window on a bridge with ISA enable set
1199 * and the start address is below 64k, then try to allocate an
1200 * initial window of 0x1000 bytes long starting at address
1201 * 0xf000 and walking down. Note that if the original request
1202 * was larger than the non-aliased range size of 0x100 our
1203 * caller would have raised the start address up to 64k
1206 if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE &&
1208 for (base = 0xf000; (long)base >= 0; base -= 0x1000) {
1209 limit = base + 0xfff;
1212 * Skip ranges that wouldn't work for the
1213 * original request. Note that the actual
1214 * window that overlaps are the non-alias
1215 * ranges within [base, limit], so this isn't
1216 * quite a simple comparison.
1218 if (start + count > limit - 0x400)
1222 * The first open region for the window at
1225 if (end - count + 1 < 0x400)
1228 if (end - count + 1 < base)
1232 if (pcib_alloc_nonisa_ranges(sc, base, limit) == 0) {
1241 wmask = (1ul << w->step) - 1;
1242 if (RF_ALIGNMENT(flags) < w->step) {
1243 flags &= ~RF_ALIGNMENT_MASK;
1244 flags |= RF_ALIGNMENT_LOG2(w->step);
1248 count = roundup2(count, 1ul << w->step);
1250 res = bus_alloc_resource(sc->dev, type, &rid, start, end, count,
1251 flags & ~RF_ACTIVE);
1254 pcib_add_window_resources(w, &res, 1);
1255 pcib_activate_window(sc, type);
1256 w->base = rman_get_start(res);
1257 w->limit = rman_get_end(res);
1261 /* Try to expand an existing window to the requested base and limit. */
1263 pcib_expand_window(struct pcib_softc *sc, struct pcib_window *w, int type,
1264 u_long base, u_long limit)
1266 struct resource *res;
1267 int error, i, force_64k_base;
1269 KASSERT(base <= w->base && limit >= w->limit,
1270 ("attempting to shrink window"));
1273 * XXX: pcib_grow_window() doesn't try to do this anyway and
1274 * the error handling for all the edge cases would be tedious.
1276 KASSERT(limit == w->limit || base == w->base,
1277 ("attempting to grow both ends of a window"));
1280 * Yet more special handling for requests to expand an I/O
1281 * window behind an ISA-enabled bridge. Since I/O windows
1282 * have to grow in 0x1000 increments and the end of the 0xffff
1283 * range is an alias, growing a window below 64k will always
1284 * result in allocating new resources and never adjusting an
1285 * existing resource.
1287 if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE &&
1288 (limit <= 65535 || (base <= 65535 && base != w->base))) {
1289 KASSERT(limit == w->limit || limit <= 65535,
1290 ("attempting to grow both ends across 64k ISA alias"));
1292 if (base != w->base)
1293 error = pcib_alloc_nonisa_ranges(sc, base, w->base - 1);
1295 error = pcib_alloc_nonisa_ranges(sc, w->limit + 1,
1305 * Find the existing resource to adjust. Usually there is only one,
1306 * but for an ISA-enabled bridge we might be growing the I/O window
1307 * above 64k and need to find the existing resource that maps all
1308 * of the area above 64k.
1310 for (i = 0; i < w->count; i++) {
1311 if (rman_get_end(w->res[i]) == w->limit)
1314 KASSERT(i != w->count, ("did not find existing resource"));
1318 * Usually the resource we found should match the window's
1319 * existing range. The one exception is the ISA-enabled case
1320 * mentioned above in which case the resource should start at
1323 if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE &&
1325 KASSERT(rman_get_start(res) == 65536,
1326 ("existing resource mismatch"));
1329 KASSERT(w->base == rman_get_start(res),
1330 ("existing resource mismatch"));
1334 error = bus_adjust_resource(sc->dev, type, res, force_64k_base ?
1335 rman_get_start(res) : base, limit);
1339 /* Add the newly allocated region to the resource manager. */
1340 if (w->base != base) {
1341 error = rman_manage_region(&w->rman, base, w->base - 1);
1344 error = rman_manage_region(&w->rman, w->limit + 1, limit);
1349 device_printf(sc->dev,
1350 "failed to expand %s resource manager\n", w->name);
1351 (void)bus_adjust_resource(sc->dev, type, res, force_64k_base ?
1352 rman_get_start(res) : w->base, w->limit);
1358 * Attempt to grow a window to make room for a given resource request.
1361 pcib_grow_window(struct pcib_softc *sc, struct pcib_window *w, int type,
1362 u_long start, u_long end, u_long count, u_int flags)
1364 u_long align, start_free, end_free, front, back, wmask;
1368 * Clamp the desired resource range to the maximum address
1369 * this window supports. Reject impossible requests.
1371 * For I/O port requests behind a bridge with the ISA enable
1372 * bit set, force large allocations to start above 64k.
1376 if (sc->bridgectl & PCIB_BCR_ISA_ENABLE && count > 0x100 &&
1379 if (end > w->rman.rm_end)
1380 end = w->rman.rm_end;
1381 if (start + count - 1 > end || start + count < start)
1383 wmask = (1ul << w->step) - 1;
1386 * If there is no resource at all, just try to allocate enough
1387 * aligned space for this resource.
1389 if (w->res == NULL) {
1390 error = pcib_alloc_new_window(sc, w, type, start, end, count,
1394 device_printf(sc->dev,
1395 "failed to allocate initial %s window (%#lx-%#lx,%#lx)\n",
1396 w->name, start, end, count);
1400 device_printf(sc->dev,
1401 "allocated initial %s window of %#jx-%#jx\n",
1402 w->name, (uintmax_t)w->base, (uintmax_t)w->limit);
1407 * See if growing the window would help. Compute the minimum
1408 * amount of address space needed on both the front and back
1409 * ends of the existing window to satisfy the allocation.
1411 * For each end, build a candidate region adjusting for the
1412 * required alignment, etc. If there is a free region at the
1413 * edge of the window, grow from the inner edge of the free
1414 * region. Otherwise grow from the window boundary.
1416 * Growing an I/O window below 64k for a bridge with the ISA
1417 * enable bit doesn't require any special magic as the step
1418 * size of an I/O window (1k) always includes multiple
1419 * non-alias ranges when it is grown in either direction.
1421 * XXX: Special case: if w->res is completely empty and the
1422 * request size is larger than w->res, we should find the
1423 * optimal aligned buffer containing w->res and allocate that.
1426 device_printf(sc->dev,
1427 "attempting to grow %s window for (%#lx-%#lx,%#lx)\n",
1428 w->name, start, end, count);
1429 align = 1ul << RF_ALIGNMENT(flags);
1430 if (start < w->base) {
1431 if (rman_first_free_region(&w->rman, &start_free, &end_free) !=
1432 0 || start_free != w->base)
1437 /* Move end_free down until it is properly aligned. */
1438 end_free &= ~(align - 1);
1440 front = end_free - (count - 1);
1443 * The resource would now be allocated at (front,
1444 * end_free). Ensure that fits in the (start, end)
1445 * bounds. end_free is checked above. If 'front' is
1446 * ok, ensure it is properly aligned for this window.
1447 * Also check for underflow.
1449 if (front >= start && front <= end_free) {
1451 printf("\tfront candidate range: %#lx-%#lx\n",
1454 front = w->base - front;
1459 if (end > w->limit) {
1460 if (rman_last_free_region(&w->rman, &start_free, &end_free) !=
1461 0 || end_free != w->limit)
1462 start_free = w->limit + 1;
1463 if (start_free < start)
1466 /* Move start_free up until it is properly aligned. */
1467 start_free = roundup2(start_free, align);
1468 back = start_free + count - 1;
1471 * The resource would now be allocated at (start_free,
1472 * back). Ensure that fits in the (start, end)
1473 * bounds. start_free is checked above. If 'back' is
1474 * ok, ensure it is properly aligned for this window.
1475 * Also check for overflow.
1477 if (back <= end && start_free <= back) {
1479 printf("\tback candidate range: %#lx-%#lx\n",
1489 * Try to allocate the smallest needed region first.
1490 * If that fails, fall back to the other region.
1493 while (front != 0 || back != 0) {
1494 if (front != 0 && (front <= back || back == 0)) {
1495 error = pcib_expand_window(sc, w, type, w->base - front,
1501 error = pcib_expand_window(sc, w, type, w->base,
1512 device_printf(sc->dev, "grew %s window to %#jx-%#jx\n",
1513 w->name, (uintmax_t)w->base, (uintmax_t)w->limit);
1516 /* Write the new window. */
1517 KASSERT((w->base & wmask) == 0, ("start address is not aligned"));
1518 KASSERT((w->limit & wmask) == wmask, ("end address is not aligned"));
1519 pcib_write_windows(sc, w->mask);
1524 * We have to trap resource allocation requests and ensure that the bridge
1525 * is set up to, or capable of handling them.
1528 pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
1529 u_long start, u_long end, u_long count, u_int flags)
1531 struct pcib_softc *sc;
1534 sc = device_get_softc(dev);
1537 * VGA resources are decoded iff the VGA enable bit is set in
1538 * the bridge control register. VGA resources do not fall into
1539 * the resource windows and are passed up to the parent.
1541 if ((type == SYS_RES_IOPORT && pci_is_vga_ioport_range(start, end)) ||
1542 (type == SYS_RES_MEMORY && pci_is_vga_memory_range(start, end))) {
1543 if (sc->bridgectl & PCIB_BCR_VGA_ENABLE)
1544 return (bus_generic_alloc_resource(dev, child, type,
1545 rid, start, end, count, flags));
1553 return (pcib_alloc_subbus(&sc->bus, child, rid, start, end,
1556 case SYS_RES_IOPORT:
1557 if (pcib_is_isa_range(sc, start, end, count))
1559 r = pcib_suballoc_resource(sc, &sc->io, child, type, rid, start,
1561 if (r != NULL || (sc->flags & PCIB_SUBTRACTIVE) != 0)
1563 if (pcib_grow_window(sc, &sc->io, type, start, end, count,
1565 r = pcib_suballoc_resource(sc, &sc->io, child, type,
1566 rid, start, end, count, flags);
1568 case SYS_RES_MEMORY:
1570 * For prefetchable resources, prefer the prefetchable
1571 * memory window, but fall back to the regular memory
1572 * window if that fails. Try both windows before
1573 * attempting to grow a window in case the firmware
1574 * has used a range in the regular memory window to
1575 * map a prefetchable BAR.
1577 if (flags & RF_PREFETCHABLE) {
1578 r = pcib_suballoc_resource(sc, &sc->pmem, child, type,
1579 rid, start, end, count, flags);
1583 r = pcib_suballoc_resource(sc, &sc->mem, child, type, rid,
1584 start, end, count, flags);
1585 if (r != NULL || (sc->flags & PCIB_SUBTRACTIVE) != 0)
1587 if (flags & RF_PREFETCHABLE) {
1588 if (pcib_grow_window(sc, &sc->pmem, type, start, end,
1589 count, flags) == 0) {
1590 r = pcib_suballoc_resource(sc, &sc->pmem, child,
1591 type, rid, start, end, count, flags);
1596 if (pcib_grow_window(sc, &sc->mem, type, start, end, count,
1597 flags & ~RF_PREFETCHABLE) == 0)
1598 r = pcib_suballoc_resource(sc, &sc->mem, child, type,
1599 rid, start, end, count, flags);
1602 return (bus_generic_alloc_resource(dev, child, type, rid,
1603 start, end, count, flags));
1607 * If attempts to suballocate from the window fail but this is a
1608 * subtractive bridge, pass the request up the tree.
1610 if (sc->flags & PCIB_SUBTRACTIVE && r == NULL)
1611 return (bus_generic_alloc_resource(dev, child, type, rid,
1612 start, end, count, flags));
1617 pcib_adjust_resource(device_t bus, device_t child, int type, struct resource *r,
1618 u_long start, u_long end)
1620 struct pcib_softc *sc;
1622 sc = device_get_softc(bus);
1623 if (pcib_is_resource_managed(sc, type, r))
1624 return (rman_adjust_resource(r, start, end));
1625 return (bus_generic_adjust_resource(bus, child, type, r, start, end));
1629 pcib_release_resource(device_t dev, device_t child, int type, int rid,
1632 struct pcib_softc *sc;
1635 sc = device_get_softc(dev);
1636 if (pcib_is_resource_managed(sc, type, r)) {
1637 if (rman_get_flags(r) & RF_ACTIVE) {
1638 error = bus_deactivate_resource(child, type, rid, r);
1642 return (rman_release_resource(r));
1644 return (bus_generic_release_resource(dev, child, type, rid, r));
1648 * We have to trap resource allocation requests and ensure that the bridge
1649 * is set up to, or capable of handling them.
1652 pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
1653 u_long start, u_long end, u_long count, u_int flags)
1655 struct pcib_softc *sc = device_get_softc(dev);
1656 const char *name, *suffix;
1660 * Fail the allocation for this range if it's not supported.
1662 name = device_get_nameunit(child);
1669 case SYS_RES_IOPORT:
1671 if (!pcib_is_io_open(sc))
1673 ok = (start >= sc->iobase && end <= sc->iolimit);
1676 * Make sure we allow access to VGA I/O addresses when the
1677 * bridge has the "VGA Enable" bit set.
1679 if (!ok && pci_is_vga_ioport_range(start, end))
1680 ok = (sc->bridgectl & PCIB_BCR_VGA_ENABLE) ? 1 : 0;
1682 if ((sc->flags & PCIB_SUBTRACTIVE) == 0) {
1684 if (start < sc->iobase)
1686 if (end > sc->iolimit)
1695 * If we overlap with the subtractive range, then
1696 * pick the upper range to use.
1698 if (start < sc->iolimit && end > sc->iobase)
1699 start = sc->iolimit + 1;
1703 device_printf(dev, "ioport: end (%lx) < start (%lx)\n",
1710 device_printf(dev, "%s%srequested unsupported I/O "
1711 "range 0x%lx-0x%lx (decoding 0x%x-0x%x)\n",
1712 name, suffix, start, end, sc->iobase, sc->iolimit);
1717 "%s%srequested I/O range 0x%lx-0x%lx: in range\n",
1718 name, suffix, start, end);
1721 case SYS_RES_MEMORY:
1723 if (pcib_is_nonprefetch_open(sc))
1724 ok = ok || (start >= sc->membase && end <= sc->memlimit);
1725 if (pcib_is_prefetch_open(sc))
1726 ok = ok || (start >= sc->pmembase && end <= sc->pmemlimit);
1729 * Make sure we allow access to VGA memory addresses when the
1730 * bridge has the "VGA Enable" bit set.
1732 if (!ok && pci_is_vga_memory_range(start, end))
1733 ok = (sc->bridgectl & PCIB_BCR_VGA_ENABLE) ? 1 : 0;
1735 if ((sc->flags & PCIB_SUBTRACTIVE) == 0) {
1738 if (flags & RF_PREFETCHABLE) {
1739 if (pcib_is_prefetch_open(sc)) {
1740 if (start < sc->pmembase)
1741 start = sc->pmembase;
1742 if (end > sc->pmemlimit)
1743 end = sc->pmemlimit;
1747 } else { /* non-prefetchable */
1748 if (pcib_is_nonprefetch_open(sc)) {
1749 if (start < sc->membase)
1750 start = sc->membase;
1751 if (end > sc->memlimit)
1759 ok = 1; /* subtractive bridge: always ok */
1761 if (pcib_is_nonprefetch_open(sc)) {
1762 if (start < sc->memlimit && end > sc->membase)
1763 start = sc->memlimit + 1;
1765 if (pcib_is_prefetch_open(sc)) {
1766 if (start < sc->pmemlimit && end > sc->pmembase)
1767 start = sc->pmemlimit + 1;
1772 device_printf(dev, "memory: end (%lx) < start (%lx)\n",
1778 if (!ok && bootverbose)
1780 "%s%srequested unsupported memory range %#lx-%#lx "
1781 "(decoding %#jx-%#jx, %#jx-%#jx)\n",
1782 name, suffix, start, end,
1783 (uintmax_t)sc->membase, (uintmax_t)sc->memlimit,
1784 (uintmax_t)sc->pmembase, (uintmax_t)sc->pmemlimit);
1788 device_printf(dev,"%s%srequested memory range "
1789 "0x%lx-0x%lx: good\n",
1790 name, suffix, start, end);
1797 * Bridge is OK decoding this resource, so pass it up.
1799 return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
1808 pcib_maxslots(device_t dev)
1810 return(PCI_SLOTMAX);
1814 * Since we are a child of a PCI bus, its parent must support the pcib interface.
1817 pcib_read_config(device_t dev, u_int b, u_int s, u_int f, u_int reg, int width)
1819 return(PCIB_READ_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, width));
1823 pcib_write_config(device_t dev, u_int b, u_int s, u_int f, u_int reg, uint32_t val, int width)
1825 PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f, reg, val, width);
1829 * Route an interrupt across a PCI bridge.
1832 pcib_route_interrupt(device_t pcib, device_t dev, int pin)
1840 * The PCI standard defines a swizzle of the child-side device/intpin to
1841 * the parent-side intpin as follows.
1843 * device = device on child bus
1844 * child_intpin = intpin on child bus slot (0-3)
1845 * parent_intpin = intpin on parent bus slot (0-3)
1847 * parent_intpin = (device + child_intpin) % 4
1849 parent_intpin = (pci_get_slot(dev) + (pin - 1)) % 4;
1852 * Our parent is a PCI bus. Its parent must export the pcib interface
1853 * which includes the ability to route interrupts.
1855 bus = device_get_parent(pcib);
1856 intnum = PCIB_ROUTE_INTERRUPT(device_get_parent(bus), pcib, parent_intpin + 1);
1857 if (PCI_INTERRUPT_VALID(intnum) && bootverbose) {
1858 device_printf(pcib, "slot %d INT%c is routed to irq %d\n",
1859 pci_get_slot(dev), 'A' + pin - 1, intnum);
1864 /* Pass request to alloc MSI/MSI-X messages up to the parent bridge. */
1866 pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount, int *irqs)
1868 struct pcib_softc *sc = device_get_softc(pcib);
1871 if (sc->flags & PCIB_DISABLE_MSI)
1873 bus = device_get_parent(pcib);
1874 return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount,
1878 /* Pass request to release MSI/MSI-X messages up to the parent bridge. */
1880 pcib_release_msi(device_t pcib, device_t dev, int count, int *irqs)
1884 bus = device_get_parent(pcib);
1885 return (PCIB_RELEASE_MSI(device_get_parent(bus), dev, count, irqs));
1888 /* Pass request to alloc an MSI-X message up to the parent bridge. */
1890 pcib_alloc_msix(device_t pcib, device_t dev, int *irq)
1892 struct pcib_softc *sc = device_get_softc(pcib);
1895 if (sc->flags & PCIB_DISABLE_MSIX)
1897 bus = device_get_parent(pcib);
1898 return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq));
1901 /* Pass request to release an MSI-X message up to the parent bridge. */
1903 pcib_release_msix(device_t pcib, device_t dev, int irq)
1907 bus = device_get_parent(pcib);
1908 return (PCIB_RELEASE_MSIX(device_get_parent(bus), dev, irq));
1911 /* Pass request to map MSI/MSI-X message up to parent bridge. */
1913 pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
1919 bus = device_get_parent(pcib);
1920 error = PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data);
1924 pci_ht_map_msi(pcib, *addr);
1928 /* Pass request for device power state up to parent bridge. */
1930 pcib_power_for_sleep(device_t pcib, device_t dev, int *pstate)
1934 bus = device_get_parent(pcib);
1935 return (PCIB_POWER_FOR_SLEEP(bus, dev, pstate));