2 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier
3 * Copyright (c) 2000 Michael Smith <msmith@freebsd.org>
4 * Copyright (c) 2000 BSDi
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
35 * PCI:PCI bridge support.
38 #include <sys/param.h>
40 #include <sys/kernel.h>
41 #include <sys/malloc.h>
42 #include <sys/module.h>
44 #include <sys/sysctl.h>
45 #include <sys/systm.h>
47 #include <dev/pci/pcivar.h>
48 #include <dev/pci/pcireg.h>
49 #include <dev/pci/pci_private.h>
50 #include <dev/pci/pcib_private.h>
54 static int pcib_probe(device_t dev);
55 static int pcib_suspend(device_t dev);
56 static int pcib_resume(device_t dev);
57 static int pcib_power_for_sleep(device_t pcib, device_t dev,
59 static uint16_t pcib_ari_get_rid(device_t pcib, device_t dev);
60 static uint32_t pcib_read_config(device_t dev, u_int b, u_int s,
61 u_int f, u_int reg, int width);
62 static void pcib_write_config(device_t dev, u_int b, u_int s,
63 u_int f, u_int reg, uint32_t val, int width);
64 static int pcib_ari_maxslots(device_t dev);
65 static int pcib_ari_maxfuncs(device_t dev);
66 static int pcib_try_enable_ari(device_t pcib, device_t dev);
67 static int pcib_ari_enabled(device_t pcib);
68 static void pcib_ari_decode_rid(device_t pcib, uint16_t rid,
69 int *bus, int *slot, int *func);
71 static device_method_t pcib_methods[] = {
72 /* Device interface */
73 DEVMETHOD(device_probe, pcib_probe),
74 DEVMETHOD(device_attach, pcib_attach),
75 DEVMETHOD(device_detach, bus_generic_detach),
76 DEVMETHOD(device_shutdown, bus_generic_shutdown),
77 DEVMETHOD(device_suspend, pcib_suspend),
78 DEVMETHOD(device_resume, pcib_resume),
81 DEVMETHOD(bus_read_ivar, pcib_read_ivar),
82 DEVMETHOD(bus_write_ivar, pcib_write_ivar),
83 DEVMETHOD(bus_alloc_resource, pcib_alloc_resource),
85 DEVMETHOD(bus_adjust_resource, pcib_adjust_resource),
86 DEVMETHOD(bus_release_resource, pcib_release_resource),
88 DEVMETHOD(bus_adjust_resource, bus_generic_adjust_resource),
89 DEVMETHOD(bus_release_resource, bus_generic_release_resource),
91 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
92 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
93 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
94 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
97 DEVMETHOD(pcib_maxslots, pcib_ari_maxslots),
98 DEVMETHOD(pcib_maxfuncs, pcib_ari_maxfuncs),
99 DEVMETHOD(pcib_read_config, pcib_read_config),
100 DEVMETHOD(pcib_write_config, pcib_write_config),
101 DEVMETHOD(pcib_route_interrupt, pcib_route_interrupt),
102 DEVMETHOD(pcib_alloc_msi, pcib_alloc_msi),
103 DEVMETHOD(pcib_release_msi, pcib_release_msi),
104 DEVMETHOD(pcib_alloc_msix, pcib_alloc_msix),
105 DEVMETHOD(pcib_release_msix, pcib_release_msix),
106 DEVMETHOD(pcib_map_msi, pcib_map_msi),
107 DEVMETHOD(pcib_power_for_sleep, pcib_power_for_sleep),
108 DEVMETHOD(pcib_get_rid, pcib_ari_get_rid),
109 DEVMETHOD(pcib_try_enable_ari, pcib_try_enable_ari),
110 DEVMETHOD(pcib_ari_enabled, pcib_ari_enabled),
111 DEVMETHOD(pcib_decode_rid, pcib_ari_decode_rid),
116 static devclass_t pcib_devclass;
118 DEFINE_CLASS_0(pcib, pcib_driver, pcib_methods, sizeof(struct pcib_softc));
119 DRIVER_MODULE(pcib, pci, pcib_driver, pcib_devclass, NULL, NULL);
122 SYSCTL_DECL(_hw_pci);
124 static int pci_clear_pcib;
125 SYSCTL_INT(_hw_pci, OID_AUTO, clear_pcib, CTLFLAG_RDTUN, &pci_clear_pcib, 0,
126 "Clear firmware-assigned resources for PCI-PCI bridge I/O windows.");
129 * Is a resource from a child device sub-allocated from one of our
133 pcib_is_resource_managed(struct pcib_softc *sc, int type, struct resource *r)
139 return (rman_is_region_manager(r, &sc->bus.rman));
142 return (rman_is_region_manager(r, &sc->io.rman));
144 /* Prefetchable resources may live in either memory rman. */
145 if (rman_get_flags(r) & RF_PREFETCHABLE &&
146 rman_is_region_manager(r, &sc->pmem.rman))
148 return (rman_is_region_manager(r, &sc->mem.rman));
154 pcib_is_window_open(struct pcib_window *pw)
157 return (pw->valid && pw->base < pw->limit);
161 * XXX: If RF_ACTIVE did not also imply allocating a bus space tag and
162 * handle for the resource, we could pass RF_ACTIVE up to the PCI bus
163 * when allocating the resource windows and rely on the PCI bus driver
167 pcib_activate_window(struct pcib_softc *sc, int type)
170 PCI_ENABLE_IO(device_get_parent(sc->dev), sc->dev, type);
174 pcib_write_windows(struct pcib_softc *sc, int mask)
180 if (sc->io.valid && mask & WIN_IO) {
181 val = pci_read_config(dev, PCIR_IOBASEL_1, 1);
182 if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) {
183 pci_write_config(dev, PCIR_IOBASEH_1,
184 sc->io.base >> 16, 2);
185 pci_write_config(dev, PCIR_IOLIMITH_1,
186 sc->io.limit >> 16, 2);
188 pci_write_config(dev, PCIR_IOBASEL_1, sc->io.base >> 8, 1);
189 pci_write_config(dev, PCIR_IOLIMITL_1, sc->io.limit >> 8, 1);
192 if (mask & WIN_MEM) {
193 pci_write_config(dev, PCIR_MEMBASE_1, sc->mem.base >> 16, 2);
194 pci_write_config(dev, PCIR_MEMLIMIT_1, sc->mem.limit >> 16, 2);
197 if (sc->pmem.valid && mask & WIN_PMEM) {
198 val = pci_read_config(dev, PCIR_PMBASEL_1, 2);
199 if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) {
200 pci_write_config(dev, PCIR_PMBASEH_1,
201 sc->pmem.base >> 32, 4);
202 pci_write_config(dev, PCIR_PMLIMITH_1,
203 sc->pmem.limit >> 32, 4);
205 pci_write_config(dev, PCIR_PMBASEL_1, sc->pmem.base >> 16, 2);
206 pci_write_config(dev, PCIR_PMLIMITL_1, sc->pmem.limit >> 16, 2);
211 * This is used to reject I/O port allocations that conflict with an
215 pcib_is_isa_range(struct pcib_softc *sc, rman_res_t start, rman_res_t end,
218 rman_res_t next_alias;
220 if (!(sc->bridgectl & PCIB_BCR_ISA_ENABLE))
223 /* Only check fixed ranges for overlap. */
224 if (start + count - 1 != end)
227 /* ISA aliases are only in the lower 64KB of I/O space. */
231 /* Check for overlap with 0x000 - 0x0ff as a special case. */
236 * If the start address is an alias, the range is an alias.
237 * Otherwise, compute the start of the next alias range and
238 * check if it is before the end of the candidate range.
240 if ((start & 0x300) != 0)
242 next_alias = (start & ~0x3fful) | 0x100;
243 if (next_alias <= end)
249 device_printf(sc->dev,
250 "I/O range %#lx-%#lx overlaps with an ISA alias\n", start,
256 pcib_add_window_resources(struct pcib_window *w, struct resource **res,
259 struct resource **newarray;
262 newarray = malloc(sizeof(struct resource *) * (w->count + count),
265 bcopy(w->res, newarray, sizeof(struct resource *) * w->count);
266 bcopy(res, newarray + w->count, sizeof(struct resource *) * count);
267 free(w->res, M_DEVBUF);
271 for (i = 0; i < count; i++) {
272 error = rman_manage_region(&w->rman, rman_get_start(res[i]),
273 rman_get_end(res[i]));
275 panic("Failed to add resource to rman");
279 typedef void (nonisa_callback)(rman_res_t start, rman_res_t end, void *arg);
282 pcib_walk_nonisa_ranges(rman_res_t start, rman_res_t end, nonisa_callback *cb,
288 * If start is within an ISA alias range, move up to the start
289 * of the next non-alias range. As a special case, addresses
290 * in the range 0x000 - 0x0ff should also be skipped since
291 * those are used for various system I/O devices in ISA
294 if (start <= 65535) {
295 if (start < 0x100 || (start & 0x300) != 0) {
301 /* ISA aliases are only in the lower 64KB of I/O space. */
302 while (start <= MIN(end, 65535)) {
303 next_end = MIN(start | 0xff, end);
304 cb(start, next_end, arg);
313 count_ranges(rman_res_t start, rman_res_t end, void *arg)
322 struct resource **res;
323 struct pcib_softc *sc;
328 alloc_ranges(rman_res_t start, rman_res_t end, void *arg)
330 struct alloc_state *as;
331 struct pcib_window *w;
341 device_printf(as->sc->dev,
342 "allocating non-ISA range %#lx-%#lx\n", start, end);
343 as->res[as->count] = bus_alloc_resource(as->sc->dev, SYS_RES_IOPORT,
344 &rid, start, end, end - start + 1, 0);
345 if (as->res[as->count] == NULL)
352 pcib_alloc_nonisa_ranges(struct pcib_softc *sc, rman_res_t start, rman_res_t end)
354 struct alloc_state as;
357 /* First, see how many ranges we need. */
359 pcib_walk_nonisa_ranges(start, end, count_ranges, &new_count);
361 /* Second, allocate the ranges. */
362 as.res = malloc(sizeof(struct resource *) * new_count, M_DEVBUF,
367 pcib_walk_nonisa_ranges(start, end, alloc_ranges, &as);
369 for (i = 0; i < as.count; i++)
370 bus_release_resource(sc->dev, SYS_RES_IOPORT,
371 sc->io.reg, as.res[i]);
372 free(as.res, M_DEVBUF);
375 KASSERT(as.count == new_count, ("%s: count mismatch", __func__));
377 /* Third, add the ranges to the window. */
378 pcib_add_window_resources(&sc->io, as.res, as.count);
379 free(as.res, M_DEVBUF);
384 pcib_alloc_window(struct pcib_softc *sc, struct pcib_window *w, int type,
385 int flags, pci_addr_t max_address)
387 struct resource *res;
391 if (max_address != (rman_res_t)max_address)
393 w->rman.rm_start = 0;
394 w->rman.rm_end = max_address;
395 w->rman.rm_type = RMAN_ARRAY;
396 snprintf(buf, sizeof(buf), "%s %s window",
397 device_get_nameunit(sc->dev), w->name);
398 w->rman.rm_descr = strdup(buf, M_DEVBUF);
399 error = rman_init(&w->rman);
401 panic("Failed to initialize %s %s rman",
402 device_get_nameunit(sc->dev), w->name);
404 if (!pcib_is_window_open(w))
407 if (w->base > max_address || w->limit > max_address) {
408 device_printf(sc->dev,
409 "initial %s window has too many bits, ignoring\n", w->name);
412 if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE)
413 (void)pcib_alloc_nonisa_ranges(sc, w->base, w->limit);
416 res = bus_alloc_resource(sc->dev, type, &rid, w->base, w->limit,
417 w->limit - w->base + 1, flags);
419 pcib_add_window_resources(w, &res, 1);
421 if (w->res == NULL) {
422 device_printf(sc->dev,
423 "failed to allocate initial %s window: %#jx-%#jx\n",
424 w->name, (uintmax_t)w->base, (uintmax_t)w->limit);
425 w->base = max_address;
427 pcib_write_windows(sc, w->mask);
430 pcib_activate_window(sc, type);
434 * Initialize I/O windows.
437 pcib_probe_windows(struct pcib_softc *sc)
445 if (pci_clear_pcib) {
446 pcib_bridge_init(dev);
449 /* Determine if the I/O port window is implemented. */
450 val = pci_read_config(dev, PCIR_IOBASEL_1, 1);
453 * If 'val' is zero, then only 16-bits of I/O space
456 pci_write_config(dev, PCIR_IOBASEL_1, 0xff, 1);
457 if (pci_read_config(dev, PCIR_IOBASEL_1, 1) != 0) {
459 pci_write_config(dev, PCIR_IOBASEL_1, 0, 1);
464 /* Read the existing I/O port window. */
466 sc->io.reg = PCIR_IOBASEL_1;
468 sc->io.mask = WIN_IO;
469 sc->io.name = "I/O port";
470 if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) {
471 sc->io.base = PCI_PPBIOBASE(
472 pci_read_config(dev, PCIR_IOBASEH_1, 2), val);
473 sc->io.limit = PCI_PPBIOLIMIT(
474 pci_read_config(dev, PCIR_IOLIMITH_1, 2),
475 pci_read_config(dev, PCIR_IOLIMITL_1, 1));
478 sc->io.base = PCI_PPBIOBASE(0, val);
479 sc->io.limit = PCI_PPBIOLIMIT(0,
480 pci_read_config(dev, PCIR_IOLIMITL_1, 1));
483 pcib_alloc_window(sc, &sc->io, SYS_RES_IOPORT, 0, max);
486 /* Read the existing memory window. */
488 sc->mem.reg = PCIR_MEMBASE_1;
490 sc->mem.mask = WIN_MEM;
491 sc->mem.name = "memory";
492 sc->mem.base = PCI_PPBMEMBASE(0,
493 pci_read_config(dev, PCIR_MEMBASE_1, 2));
494 sc->mem.limit = PCI_PPBMEMLIMIT(0,
495 pci_read_config(dev, PCIR_MEMLIMIT_1, 2));
496 pcib_alloc_window(sc, &sc->mem, SYS_RES_MEMORY, 0, 0xffffffff);
498 /* Determine if the prefetchable memory window is implemented. */
499 val = pci_read_config(dev, PCIR_PMBASEL_1, 2);
502 * If 'val' is zero, then only 32-bits of memory space
505 pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2);
506 if (pci_read_config(dev, PCIR_PMBASEL_1, 2) != 0) {
508 pci_write_config(dev, PCIR_PMBASEL_1, 0, 2);
513 /* Read the existing prefetchable memory window. */
514 if (sc->pmem.valid) {
515 sc->pmem.reg = PCIR_PMBASEL_1;
517 sc->pmem.mask = WIN_PMEM;
518 sc->pmem.name = "prefetch";
519 if ((val & PCIM_BRPM_MASK) == PCIM_BRPM_64) {
520 sc->pmem.base = PCI_PPBMEMBASE(
521 pci_read_config(dev, PCIR_PMBASEH_1, 4), val);
522 sc->pmem.limit = PCI_PPBMEMLIMIT(
523 pci_read_config(dev, PCIR_PMLIMITH_1, 4),
524 pci_read_config(dev, PCIR_PMLIMITL_1, 2));
525 max = 0xffffffffffffffff;
527 sc->pmem.base = PCI_PPBMEMBASE(0, val);
528 sc->pmem.limit = PCI_PPBMEMLIMIT(0,
529 pci_read_config(dev, PCIR_PMLIMITL_1, 2));
532 pcib_alloc_window(sc, &sc->pmem, SYS_RES_MEMORY,
533 RF_PREFETCHABLE, max);
539 * Allocate a suitable secondary bus for this bridge if needed and
540 * initialize the resource manager for the secondary bus range. Note
541 * that the minimum count is a desired value and this may allocate a
545 pcib_setup_secbus(device_t dev, struct pcib_secbus *bus, int min_count)
548 int error, rid, sec_reg;
550 switch (pci_read_config(dev, PCIR_HDRTYPE, 1) & PCIM_HDRTYPE) {
551 case PCIM_HDRTYPE_BRIDGE:
552 sec_reg = PCIR_SECBUS_1;
553 bus->sub_reg = PCIR_SUBBUS_1;
555 case PCIM_HDRTYPE_CARDBUS:
556 sec_reg = PCIR_SECBUS_2;
557 bus->sub_reg = PCIR_SUBBUS_2;
560 panic("not a PCI bridge");
562 bus->sec = pci_read_config(dev, sec_reg, 1);
563 bus->sub = pci_read_config(dev, bus->sub_reg, 1);
565 bus->rman.rm_start = 0;
566 bus->rman.rm_end = PCI_BUSMAX;
567 bus->rman.rm_type = RMAN_ARRAY;
568 snprintf(buf, sizeof(buf), "%s bus numbers", device_get_nameunit(dev));
569 bus->rman.rm_descr = strdup(buf, M_DEVBUF);
570 error = rman_init(&bus->rman);
572 panic("Failed to initialize %s bus number rman",
573 device_get_nameunit(dev));
576 * Allocate a bus range. This will return an existing bus range
577 * if one exists, or a new bus range if one does not.
580 bus->res = bus_alloc_resource_anywhere(dev, PCI_RES_BUS, &rid,
582 if (bus->res == NULL) {
584 * Fall back to just allocating a range of a single bus
587 bus->res = bus_alloc_resource_anywhere(dev, PCI_RES_BUS, &rid,
589 } else if (rman_get_size(bus->res) < min_count)
591 * Attempt to grow the existing range to satisfy the
592 * minimum desired count.
594 (void)bus_adjust_resource(dev, PCI_RES_BUS, bus->res,
595 rman_get_start(bus->res), rman_get_start(bus->res) +
599 * Add the initial resource to the rman.
601 if (bus->res != NULL) {
602 error = rman_manage_region(&bus->rman, rman_get_start(bus->res),
603 rman_get_end(bus->res));
605 panic("Failed to add resource to rman");
606 bus->sec = rman_get_start(bus->res);
607 bus->sub = rman_get_end(bus->res);
611 static struct resource *
612 pcib_suballoc_bus(struct pcib_secbus *bus, device_t child, int *rid,
613 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
615 struct resource *res;
617 res = rman_reserve_resource(&bus->rman, start, end, count, flags,
623 device_printf(bus->dev,
624 "allocated bus range (%lu-%lu) for rid %d of %s\n",
625 rman_get_start(res), rman_get_end(res), *rid,
626 pcib_child_name(child));
627 rman_set_rid(res, *rid);
632 * Attempt to grow the secondary bus range. This is much simpler than
633 * for I/O windows as the range can only be grown by increasing
637 pcib_grow_subbus(struct pcib_secbus *bus, rman_res_t new_end)
642 old_end = rman_get_end(bus->res);
643 KASSERT(new_end > old_end, ("attempt to shrink subbus"));
644 error = bus_adjust_resource(bus->dev, PCI_RES_BUS, bus->res,
645 rman_get_start(bus->res), new_end);
649 device_printf(bus->dev, "grew bus range to %lu-%lu\n",
650 rman_get_start(bus->res), rman_get_end(bus->res));
651 error = rman_manage_region(&bus->rman, old_end + 1,
652 rman_get_end(bus->res));
654 panic("Failed to add resource to rman");
655 bus->sub = rman_get_end(bus->res);
656 pci_write_config(bus->dev, bus->sub_reg, bus->sub, 1);
661 pcib_alloc_subbus(struct pcib_secbus *bus, device_t child, int *rid,
662 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
664 struct resource *res;
665 rman_res_t start_free, end_free, new_end;
668 * First, see if the request can be satisified by the existing
671 res = pcib_suballoc_bus(bus, child, rid, start, end, count, flags);
676 * Figure out a range to grow the bus range. First, find the
677 * first bus number after the last allocated bus in the rman and
678 * enforce that as a minimum starting point for the range.
680 if (rman_last_free_region(&bus->rman, &start_free, &end_free) != 0 ||
681 end_free != bus->sub)
682 start_free = bus->sub + 1;
683 if (start_free < start)
685 new_end = start_free + count - 1;
688 * See if this new range would satisfy the request if it
694 /* Finally, attempt to grow the existing resource. */
696 device_printf(bus->dev,
697 "attempting to grow bus range for %lu buses\n", count);
698 printf("\tback candidate range: %lu-%lu\n", start_free,
701 if (pcib_grow_subbus(bus, new_end) == 0)
702 return (pcib_suballoc_bus(bus, child, rid, start, end, count,
711 * Is the prefetch window open (eg, can we allocate memory in it?)
714 pcib_is_prefetch_open(struct pcib_softc *sc)
716 return (sc->pmembase > 0 && sc->pmembase < sc->pmemlimit);
720 * Is the nonprefetch window open (eg, can we allocate memory in it?)
723 pcib_is_nonprefetch_open(struct pcib_softc *sc)
725 return (sc->membase > 0 && sc->membase < sc->memlimit);
729 * Is the io window open (eg, can we allocate ports in it?)
732 pcib_is_io_open(struct pcib_softc *sc)
734 return (sc->iobase > 0 && sc->iobase < sc->iolimit);
738 * Get current I/O decode.
741 pcib_get_io_decode(struct pcib_softc *sc)
748 iolow = pci_read_config(dev, PCIR_IOBASEL_1, 1);
749 if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32)
750 sc->iobase = PCI_PPBIOBASE(
751 pci_read_config(dev, PCIR_IOBASEH_1, 2), iolow);
753 sc->iobase = PCI_PPBIOBASE(0, iolow);
755 iolow = pci_read_config(dev, PCIR_IOLIMITL_1, 1);
756 if ((iolow & PCIM_BRIO_MASK) == PCIM_BRIO_32)
757 sc->iolimit = PCI_PPBIOLIMIT(
758 pci_read_config(dev, PCIR_IOLIMITH_1, 2), iolow);
760 sc->iolimit = PCI_PPBIOLIMIT(0, iolow);
764 * Get current memory decode.
767 pcib_get_mem_decode(struct pcib_softc *sc)
774 sc->membase = PCI_PPBMEMBASE(0,
775 pci_read_config(dev, PCIR_MEMBASE_1, 2));
776 sc->memlimit = PCI_PPBMEMLIMIT(0,
777 pci_read_config(dev, PCIR_MEMLIMIT_1, 2));
779 pmemlow = pci_read_config(dev, PCIR_PMBASEL_1, 2);
780 if ((pmemlow & PCIM_BRPM_MASK) == PCIM_BRPM_64)
781 sc->pmembase = PCI_PPBMEMBASE(
782 pci_read_config(dev, PCIR_PMBASEH_1, 4), pmemlow);
784 sc->pmembase = PCI_PPBMEMBASE(0, pmemlow);
786 pmemlow = pci_read_config(dev, PCIR_PMLIMITL_1, 2);
787 if ((pmemlow & PCIM_BRPM_MASK) == PCIM_BRPM_64)
788 sc->pmemlimit = PCI_PPBMEMLIMIT(
789 pci_read_config(dev, PCIR_PMLIMITH_1, 4), pmemlow);
791 sc->pmemlimit = PCI_PPBMEMLIMIT(0, pmemlow);
795 * Restore previous I/O decode.
798 pcib_set_io_decode(struct pcib_softc *sc)
805 iohi = sc->iobase >> 16;
807 pci_write_config(dev, PCIR_IOBASEH_1, iohi, 2);
808 pci_write_config(dev, PCIR_IOBASEL_1, sc->iobase >> 8, 1);
810 iohi = sc->iolimit >> 16;
812 pci_write_config(dev, PCIR_IOLIMITH_1, iohi, 2);
813 pci_write_config(dev, PCIR_IOLIMITL_1, sc->iolimit >> 8, 1);
817 * Restore previous memory decode.
820 pcib_set_mem_decode(struct pcib_softc *sc)
827 pci_write_config(dev, PCIR_MEMBASE_1, sc->membase >> 16, 2);
828 pci_write_config(dev, PCIR_MEMLIMIT_1, sc->memlimit >> 16, 2);
830 pmemhi = sc->pmembase >> 32;
832 pci_write_config(dev, PCIR_PMBASEH_1, pmemhi, 4);
833 pci_write_config(dev, PCIR_PMBASEL_1, sc->pmembase >> 16, 2);
835 pmemhi = sc->pmemlimit >> 32;
837 pci_write_config(dev, PCIR_PMLIMITH_1, pmemhi, 4);
838 pci_write_config(dev, PCIR_PMLIMITL_1, sc->pmemlimit >> 16, 2);
843 * Get current bridge configuration.
846 pcib_cfg_save(struct pcib_softc *sc)
854 command = pci_read_config(dev, PCIR_COMMAND, 2);
855 if (command & PCIM_CMD_PORTEN)
856 pcib_get_io_decode(sc);
857 if (command & PCIM_CMD_MEMEN)
858 pcib_get_mem_decode(sc);
863 * Restore previous bridge configuration.
866 pcib_cfg_restore(struct pcib_softc *sc)
875 pcib_write_windows(sc, WIN_IO | WIN_MEM | WIN_PMEM);
877 command = pci_read_config(dev, PCIR_COMMAND, 2);
878 if (command & PCIM_CMD_PORTEN)
879 pcib_set_io_decode(sc);
880 if (command & PCIM_CMD_MEMEN)
881 pcib_set_mem_decode(sc);
886 * Generic device interface
889 pcib_probe(device_t dev)
891 if ((pci_get_class(dev) == PCIC_BRIDGE) &&
892 (pci_get_subclass(dev) == PCIS_BRIDGE_PCI)) {
893 device_set_desc(dev, "PCI-PCI bridge");
900 pcib_attach_common(device_t dev)
902 struct pcib_softc *sc;
903 struct sysctl_ctx_list *sctx;
904 struct sysctl_oid *soid;
907 sc = device_get_softc(dev);
911 * Get current bridge configuration.
913 sc->domain = pci_get_domain(dev);
914 #if !(defined(NEW_PCIB) && defined(PCI_RES_BUS))
915 sc->bus.sec = pci_read_config(dev, PCIR_SECBUS_1, 1);
916 sc->bus.sub = pci_read_config(dev, PCIR_SUBBUS_1, 1);
918 sc->bridgectl = pci_read_config(dev, PCIR_BRIDGECTL_1, 2);
922 * The primary bus register should always be the bus of the
925 sc->pribus = pci_get_bus(dev);
926 pci_write_config(dev, PCIR_PRIBUS_1, sc->pribus, 1);
929 * Setup sysctl reporting nodes
931 sctx = device_get_sysctl_ctx(dev);
932 soid = device_get_sysctl_tree(dev);
933 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "domain",
934 CTLFLAG_RD, &sc->domain, 0, "Domain number");
935 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "pribus",
936 CTLFLAG_RD, &sc->pribus, 0, "Primary bus number");
937 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "secbus",
938 CTLFLAG_RD, &sc->bus.sec, 0, "Secondary bus number");
939 SYSCTL_ADD_UINT(sctx, SYSCTL_CHILDREN(soid), OID_AUTO, "subbus",
940 CTLFLAG_RD, &sc->bus.sub, 0, "Subordinate bus number");
945 switch (pci_get_devid(dev)) {
946 #if !(defined(NEW_PCIB) && defined(PCI_RES_BUS))
947 case 0x12258086: /* Intel 82454KX/GX (Orion) */
951 supbus = pci_read_config(dev, 0x41, 1);
952 if (supbus != 0xff) {
953 sc->bus.sec = supbus + 1;
954 sc->bus.sub = supbus + 1;
961 * The i82380FB mobile docking controller is a PCI-PCI bridge,
962 * and it is a subtractive bridge. However, the ProgIf is wrong
963 * so the normal setting of PCIB_SUBTRACTIVE bit doesn't
964 * happen. There are also Toshiba and Cavium ThunderX bridges
965 * that behave this way.
967 case 0xa002177d: /* Cavium ThunderX */
968 case 0x124b8086: /* Intel 82380FB Mobile */
969 case 0x060513d7: /* Toshiba ???? */
970 sc->flags |= PCIB_SUBTRACTIVE;
973 #if !(defined(NEW_PCIB) && defined(PCI_RES_BUS))
974 /* Compaq R3000 BIOS sets wrong subordinate bus number. */
979 if ((cp = kern_getenv("smbios.planar.maker")) == NULL)
981 if (strncmp(cp, "Compal", 6) != 0) {
986 if ((cp = kern_getenv("smbios.planar.product")) == NULL)
988 if (strncmp(cp, "08A0", 4) != 0) {
993 if (sc->bus.sub < 0xa) {
994 pci_write_config(dev, PCIR_SUBBUS_1, 0xa, 1);
995 sc->bus.sub = pci_read_config(dev, PCIR_SUBBUS_1, 1);
1002 if (pci_msi_device_blacklisted(dev))
1003 sc->flags |= PCIB_DISABLE_MSI;
1005 if (pci_msix_device_blacklisted(dev))
1006 sc->flags |= PCIB_DISABLE_MSIX;
1009 * Intel 815, 845 and other chipsets say they are PCI-PCI bridges,
1010 * but have a ProgIF of 0x80. The 82801 family (AA, AB, BAM/CAM,
1011 * BA/CA/DB and E) PCI bridges are HUB-PCI bridges, in Intelese.
1012 * This means they act as if they were subtractively decoding
1013 * bridges and pass all transactions. Mark them and real ProgIf 1
1014 * parts as subtractive.
1016 if ((pci_get_devid(dev) & 0xff00ffff) == 0x24008086 ||
1017 pci_read_config(dev, PCIR_PROGIF, 1) == PCIP_BRIDGE_PCI_SUBTRACTIVE)
1018 sc->flags |= PCIB_SUBTRACTIVE;
1022 pcib_setup_secbus(dev, &sc->bus, 1);
1024 pcib_probe_windows(sc);
1027 device_printf(dev, " domain %d\n", sc->domain);
1028 device_printf(dev, " secondary bus %d\n", sc->bus.sec);
1029 device_printf(dev, " subordinate bus %d\n", sc->bus.sub);
1031 if (pcib_is_window_open(&sc->io))
1032 device_printf(dev, " I/O decode 0x%jx-0x%jx\n",
1033 (uintmax_t)sc->io.base, (uintmax_t)sc->io.limit);
1034 if (pcib_is_window_open(&sc->mem))
1035 device_printf(dev, " memory decode 0x%jx-0x%jx\n",
1036 (uintmax_t)sc->mem.base, (uintmax_t)sc->mem.limit);
1037 if (pcib_is_window_open(&sc->pmem))
1038 device_printf(dev, " prefetched decode 0x%jx-0x%jx\n",
1039 (uintmax_t)sc->pmem.base, (uintmax_t)sc->pmem.limit);
1041 if (pcib_is_io_open(sc))
1042 device_printf(dev, " I/O decode 0x%x-0x%x\n",
1043 sc->iobase, sc->iolimit);
1044 if (pcib_is_nonprefetch_open(sc))
1045 device_printf(dev, " memory decode 0x%jx-0x%jx\n",
1046 (uintmax_t)sc->membase, (uintmax_t)sc->memlimit);
1047 if (pcib_is_prefetch_open(sc))
1048 device_printf(dev, " prefetched decode 0x%jx-0x%jx\n",
1049 (uintmax_t)sc->pmembase, (uintmax_t)sc->pmemlimit);
1051 if (sc->bridgectl & (PCIB_BCR_ISA_ENABLE | PCIB_BCR_VGA_ENABLE) ||
1052 sc->flags & PCIB_SUBTRACTIVE) {
1053 device_printf(dev, " special decode ");
1055 if (sc->bridgectl & PCIB_BCR_ISA_ENABLE) {
1059 if (sc->bridgectl & PCIB_BCR_VGA_ENABLE) {
1060 printf("%sVGA", comma ? ", " : "");
1063 if (sc->flags & PCIB_SUBTRACTIVE)
1064 printf("%ssubtractive", comma ? ", " : "");
1070 * Always enable busmastering on bridges so that transactions
1071 * initiated on the secondary bus are passed through to the
1074 pci_enable_busmaster(dev);
1078 pcib_attach(device_t dev)
1080 struct pcib_softc *sc;
1083 pcib_attach_common(dev);
1084 sc = device_get_softc(dev);
1085 if (sc->bus.sec != 0) {
1086 child = device_add_child(dev, "pci", -1);
1088 return(bus_generic_attach(dev));
1091 /* no secondary bus; we should have fixed this */
1096 pcib_suspend(device_t dev)
1099 pcib_cfg_save(device_get_softc(dev));
1100 return (bus_generic_suspend(dev));
1104 pcib_resume(device_t dev)
1107 pcib_cfg_restore(device_get_softc(dev));
1108 return (bus_generic_resume(dev));
1112 pcib_bridge_init(device_t dev)
1114 pci_write_config(dev, PCIR_IOBASEL_1, 0xff, 1);
1115 pci_write_config(dev, PCIR_IOBASEH_1, 0xffff, 2);
1116 pci_write_config(dev, PCIR_IOLIMITL_1, 0, 1);
1117 pci_write_config(dev, PCIR_IOLIMITH_1, 0, 2);
1118 pci_write_config(dev, PCIR_MEMBASE_1, 0xffff, 2);
1119 pci_write_config(dev, PCIR_MEMLIMIT_1, 0, 2);
1120 pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2);
1121 pci_write_config(dev, PCIR_PMBASEH_1, 0xffffffff, 4);
1122 pci_write_config(dev, PCIR_PMLIMITL_1, 0, 2);
1123 pci_write_config(dev, PCIR_PMLIMITH_1, 0, 4);
1127 pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
1129 struct pcib_softc *sc = device_get_softc(dev);
1132 case PCIB_IVAR_DOMAIN:
1133 *result = sc->domain;
1136 *result = sc->bus.sec;
1143 pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
1147 case PCIB_IVAR_DOMAIN:
1157 * Attempt to allocate a resource from the existing resources assigned
1160 static struct resource *
1161 pcib_suballoc_resource(struct pcib_softc *sc, struct pcib_window *w,
1162 device_t child, int type, int *rid, rman_res_t start, rman_res_t end,
1163 rman_res_t count, u_int flags)
1165 struct resource *res;
1167 if (!pcib_is_window_open(w))
1170 res = rman_reserve_resource(&w->rman, start, end, count,
1171 flags & ~RF_ACTIVE, child);
1176 device_printf(sc->dev,
1177 "allocated %s range (%#lx-%#lx) for rid %x of %s\n",
1178 w->name, rman_get_start(res), rman_get_end(res), *rid,
1179 pcib_child_name(child));
1180 rman_set_rid(res, *rid);
1183 * If the resource should be active, pass that request up the
1184 * tree. This assumes the parent drivers can handle
1185 * activating sub-allocated resources.
1187 if (flags & RF_ACTIVE) {
1188 if (bus_activate_resource(child, type, *rid, res) != 0) {
1189 rman_release_resource(res);
1197 /* Allocate a fresh resource range for an unconfigured window. */
1199 pcib_alloc_new_window(struct pcib_softc *sc, struct pcib_window *w, int type,
1200 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
1202 struct resource *res;
1203 rman_res_t base, limit, wmask;
1207 * If this is an I/O window on a bridge with ISA enable set
1208 * and the start address is below 64k, then try to allocate an
1209 * initial window of 0x1000 bytes long starting at address
1210 * 0xf000 and walking down. Note that if the original request
1211 * was larger than the non-aliased range size of 0x100 our
1212 * caller would have raised the start address up to 64k
1215 if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE &&
1217 for (base = 0xf000; (long)base >= 0; base -= 0x1000) {
1218 limit = base + 0xfff;
1221 * Skip ranges that wouldn't work for the
1222 * original request. Note that the actual
1223 * window that overlaps are the non-alias
1224 * ranges within [base, limit], so this isn't
1225 * quite a simple comparison.
1227 if (start + count > limit - 0x400)
1231 * The first open region for the window at
1234 if (end - count + 1 < 0x400)
1237 if (end - count + 1 < base)
1241 if (pcib_alloc_nonisa_ranges(sc, base, limit) == 0) {
1250 wmask = ((rman_res_t)1 << w->step) - 1;
1251 if (RF_ALIGNMENT(flags) < w->step) {
1252 flags &= ~RF_ALIGNMENT_MASK;
1253 flags |= RF_ALIGNMENT_LOG2(w->step);
1257 count = roundup2(count, (rman_res_t)1 << w->step);
1259 res = bus_alloc_resource(sc->dev, type, &rid, start, end, count,
1260 flags & ~RF_ACTIVE);
1263 pcib_add_window_resources(w, &res, 1);
1264 pcib_activate_window(sc, type);
1265 w->base = rman_get_start(res);
1266 w->limit = rman_get_end(res);
1270 /* Try to expand an existing window to the requested base and limit. */
1272 pcib_expand_window(struct pcib_softc *sc, struct pcib_window *w, int type,
1273 rman_res_t base, rman_res_t limit)
1275 struct resource *res;
1276 int error, i, force_64k_base;
1278 KASSERT(base <= w->base && limit >= w->limit,
1279 ("attempting to shrink window"));
1282 * XXX: pcib_grow_window() doesn't try to do this anyway and
1283 * the error handling for all the edge cases would be tedious.
1285 KASSERT(limit == w->limit || base == w->base,
1286 ("attempting to grow both ends of a window"));
1289 * Yet more special handling for requests to expand an I/O
1290 * window behind an ISA-enabled bridge. Since I/O windows
1291 * have to grow in 0x1000 increments and the end of the 0xffff
1292 * range is an alias, growing a window below 64k will always
1293 * result in allocating new resources and never adjusting an
1294 * existing resource.
1296 if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE &&
1297 (limit <= 65535 || (base <= 65535 && base != w->base))) {
1298 KASSERT(limit == w->limit || limit <= 65535,
1299 ("attempting to grow both ends across 64k ISA alias"));
1301 if (base != w->base)
1302 error = pcib_alloc_nonisa_ranges(sc, base, w->base - 1);
1304 error = pcib_alloc_nonisa_ranges(sc, w->limit + 1,
1314 * Find the existing resource to adjust. Usually there is only one,
1315 * but for an ISA-enabled bridge we might be growing the I/O window
1316 * above 64k and need to find the existing resource that maps all
1317 * of the area above 64k.
1319 for (i = 0; i < w->count; i++) {
1320 if (rman_get_end(w->res[i]) == w->limit)
1323 KASSERT(i != w->count, ("did not find existing resource"));
1327 * Usually the resource we found should match the window's
1328 * existing range. The one exception is the ISA-enabled case
1329 * mentioned above in which case the resource should start at
1332 if (type == SYS_RES_IOPORT && sc->bridgectl & PCIB_BCR_ISA_ENABLE &&
1334 KASSERT(rman_get_start(res) == 65536,
1335 ("existing resource mismatch"));
1338 KASSERT(w->base == rman_get_start(res),
1339 ("existing resource mismatch"));
1343 error = bus_adjust_resource(sc->dev, type, res, force_64k_base ?
1344 rman_get_start(res) : base, limit);
1348 /* Add the newly allocated region to the resource manager. */
1349 if (w->base != base) {
1350 error = rman_manage_region(&w->rman, base, w->base - 1);
1353 error = rman_manage_region(&w->rman, w->limit + 1, limit);
1358 device_printf(sc->dev,
1359 "failed to expand %s resource manager\n", w->name);
1360 (void)bus_adjust_resource(sc->dev, type, res, force_64k_base ?
1361 rman_get_start(res) : w->base, w->limit);
1367 * Attempt to grow a window to make room for a given resource request.
1370 pcib_grow_window(struct pcib_softc *sc, struct pcib_window *w, int type,
1371 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
1373 rman_res_t align, start_free, end_free, front, back, wmask;
1377 * Clamp the desired resource range to the maximum address
1378 * this window supports. Reject impossible requests.
1380 * For I/O port requests behind a bridge with the ISA enable
1381 * bit set, force large allocations to start above 64k.
1385 if (sc->bridgectl & PCIB_BCR_ISA_ENABLE && count > 0x100 &&
1388 if (end > w->rman.rm_end)
1389 end = w->rman.rm_end;
1390 if (start + count - 1 > end || start + count < start)
1392 wmask = ((rman_res_t)1 << w->step) - 1;
1395 * If there is no resource at all, just try to allocate enough
1396 * aligned space for this resource.
1398 if (w->res == NULL) {
1399 error = pcib_alloc_new_window(sc, w, type, start, end, count,
1403 device_printf(sc->dev,
1404 "failed to allocate initial %s window (%#lx-%#lx,%#lx)\n",
1405 w->name, start, end, count);
1409 device_printf(sc->dev,
1410 "allocated initial %s window of %#jx-%#jx\n",
1411 w->name, (uintmax_t)w->base, (uintmax_t)w->limit);
1416 * See if growing the window would help. Compute the minimum
1417 * amount of address space needed on both the front and back
1418 * ends of the existing window to satisfy the allocation.
1420 * For each end, build a candidate region adjusting for the
1421 * required alignment, etc. If there is a free region at the
1422 * edge of the window, grow from the inner edge of the free
1423 * region. Otherwise grow from the window boundary.
1425 * Growing an I/O window below 64k for a bridge with the ISA
1426 * enable bit doesn't require any special magic as the step
1427 * size of an I/O window (1k) always includes multiple
1428 * non-alias ranges when it is grown in either direction.
1430 * XXX: Special case: if w->res is completely empty and the
1431 * request size is larger than w->res, we should find the
1432 * optimal aligned buffer containing w->res and allocate that.
1435 device_printf(sc->dev,
1436 "attempting to grow %s window for (%#lx-%#lx,%#lx)\n",
1437 w->name, start, end, count);
1438 align = (rman_res_t)1 << RF_ALIGNMENT(flags);
1439 if (start < w->base) {
1440 if (rman_first_free_region(&w->rman, &start_free, &end_free) !=
1441 0 || start_free != w->base)
1446 /* Move end_free down until it is properly aligned. */
1447 end_free &= ~(align - 1);
1449 front = end_free - (count - 1);
1452 * The resource would now be allocated at (front,
1453 * end_free). Ensure that fits in the (start, end)
1454 * bounds. end_free is checked above. If 'front' is
1455 * ok, ensure it is properly aligned for this window.
1456 * Also check for underflow.
1458 if (front >= start && front <= end_free) {
1460 printf("\tfront candidate range: %#lx-%#lx\n",
1463 front = w->base - front;
1468 if (end > w->limit) {
1469 if (rman_last_free_region(&w->rman, &start_free, &end_free) !=
1470 0 || end_free != w->limit)
1471 start_free = w->limit + 1;
1472 if (start_free < start)
1475 /* Move start_free up until it is properly aligned. */
1476 start_free = roundup2(start_free, align);
1477 back = start_free + count - 1;
1480 * The resource would now be allocated at (start_free,
1481 * back). Ensure that fits in the (start, end)
1482 * bounds. start_free is checked above. If 'back' is
1483 * ok, ensure it is properly aligned for this window.
1484 * Also check for overflow.
1486 if (back <= end && start_free <= back) {
1488 printf("\tback candidate range: %#lx-%#lx\n",
1498 * Try to allocate the smallest needed region first.
1499 * If that fails, fall back to the other region.
1502 while (front != 0 || back != 0) {
1503 if (front != 0 && (front <= back || back == 0)) {
1504 error = pcib_expand_window(sc, w, type, w->base - front,
1510 error = pcib_expand_window(sc, w, type, w->base,
1521 device_printf(sc->dev, "grew %s window to %#jx-%#jx\n",
1522 w->name, (uintmax_t)w->base, (uintmax_t)w->limit);
1525 /* Write the new window. */
1526 KASSERT((w->base & wmask) == 0, ("start address is not aligned"));
1527 KASSERT((w->limit & wmask) == wmask, ("end address is not aligned"));
1528 pcib_write_windows(sc, w->mask);
1533 * We have to trap resource allocation requests and ensure that the bridge
1534 * is set up to, or capable of handling them.
1537 pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
1538 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
1540 struct pcib_softc *sc;
1543 sc = device_get_softc(dev);
1546 * VGA resources are decoded iff the VGA enable bit is set in
1547 * the bridge control register. VGA resources do not fall into
1548 * the resource windows and are passed up to the parent.
1550 if ((type == SYS_RES_IOPORT && pci_is_vga_ioport_range(start, end)) ||
1551 (type == SYS_RES_MEMORY && pci_is_vga_memory_range(start, end))) {
1552 if (sc->bridgectl & PCIB_BCR_VGA_ENABLE)
1553 return (bus_generic_alloc_resource(dev, child, type,
1554 rid, start, end, count, flags));
1562 return (pcib_alloc_subbus(&sc->bus, child, rid, start, end,
1565 case SYS_RES_IOPORT:
1566 if (pcib_is_isa_range(sc, start, end, count))
1568 r = pcib_suballoc_resource(sc, &sc->io, child, type, rid, start,
1570 if (r != NULL || (sc->flags & PCIB_SUBTRACTIVE) != 0)
1572 if (pcib_grow_window(sc, &sc->io, type, start, end, count,
1574 r = pcib_suballoc_resource(sc, &sc->io, child, type,
1575 rid, start, end, count, flags);
1577 case SYS_RES_MEMORY:
1579 * For prefetchable resources, prefer the prefetchable
1580 * memory window, but fall back to the regular memory
1581 * window if that fails. Try both windows before
1582 * attempting to grow a window in case the firmware
1583 * has used a range in the regular memory window to
1584 * map a prefetchable BAR.
1586 if (flags & RF_PREFETCHABLE) {
1587 r = pcib_suballoc_resource(sc, &sc->pmem, child, type,
1588 rid, start, end, count, flags);
1592 r = pcib_suballoc_resource(sc, &sc->mem, child, type, rid,
1593 start, end, count, flags);
1594 if (r != NULL || (sc->flags & PCIB_SUBTRACTIVE) != 0)
1596 if (flags & RF_PREFETCHABLE) {
1597 if (pcib_grow_window(sc, &sc->pmem, type, start, end,
1598 count, flags) == 0) {
1599 r = pcib_suballoc_resource(sc, &sc->pmem, child,
1600 type, rid, start, end, count, flags);
1605 if (pcib_grow_window(sc, &sc->mem, type, start, end, count,
1606 flags & ~RF_PREFETCHABLE) == 0)
1607 r = pcib_suballoc_resource(sc, &sc->mem, child, type,
1608 rid, start, end, count, flags);
1611 return (bus_generic_alloc_resource(dev, child, type, rid,
1612 start, end, count, flags));
1616 * If attempts to suballocate from the window fail but this is a
1617 * subtractive bridge, pass the request up the tree.
1619 if (sc->flags & PCIB_SUBTRACTIVE && r == NULL)
1620 return (bus_generic_alloc_resource(dev, child, type, rid,
1621 start, end, count, flags));
1626 pcib_adjust_resource(device_t bus, device_t child, int type, struct resource *r,
1627 rman_res_t start, rman_res_t end)
1629 struct pcib_softc *sc;
1631 sc = device_get_softc(bus);
1632 if (pcib_is_resource_managed(sc, type, r))
1633 return (rman_adjust_resource(r, start, end));
1634 return (bus_generic_adjust_resource(bus, child, type, r, start, end));
1638 pcib_release_resource(device_t dev, device_t child, int type, int rid,
1641 struct pcib_softc *sc;
1644 sc = device_get_softc(dev);
1645 if (pcib_is_resource_managed(sc, type, r)) {
1646 if (rman_get_flags(r) & RF_ACTIVE) {
1647 error = bus_deactivate_resource(child, type, rid, r);
1651 return (rman_release_resource(r));
1653 return (bus_generic_release_resource(dev, child, type, rid, r));
1657 * We have to trap resource allocation requests and ensure that the bridge
1658 * is set up to, or capable of handling them.
1661 pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
1662 rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
1664 struct pcib_softc *sc = device_get_softc(dev);
1665 const char *name, *suffix;
1669 * Fail the allocation for this range if it's not supported.
1671 name = device_get_nameunit(child);
1678 case SYS_RES_IOPORT:
1680 if (!pcib_is_io_open(sc))
1682 ok = (start >= sc->iobase && end <= sc->iolimit);
1685 * Make sure we allow access to VGA I/O addresses when the
1686 * bridge has the "VGA Enable" bit set.
1688 if (!ok && pci_is_vga_ioport_range(start, end))
1689 ok = (sc->bridgectl & PCIB_BCR_VGA_ENABLE) ? 1 : 0;
1691 if ((sc->flags & PCIB_SUBTRACTIVE) == 0) {
1693 if (start < sc->iobase)
1695 if (end > sc->iolimit)
1704 * If we overlap with the subtractive range, then
1705 * pick the upper range to use.
1707 if (start < sc->iolimit && end > sc->iobase)
1708 start = sc->iolimit + 1;
1712 device_printf(dev, "ioport: end (%lx) < start (%lx)\n",
1719 device_printf(dev, "%s%srequested unsupported I/O "
1720 "range 0x%lx-0x%lx (decoding 0x%x-0x%x)\n",
1721 name, suffix, start, end, sc->iobase, sc->iolimit);
1726 "%s%srequested I/O range 0x%lx-0x%lx: in range\n",
1727 name, suffix, start, end);
1730 case SYS_RES_MEMORY:
1732 if (pcib_is_nonprefetch_open(sc))
1733 ok = ok || (start >= sc->membase && end <= sc->memlimit);
1734 if (pcib_is_prefetch_open(sc))
1735 ok = ok || (start >= sc->pmembase && end <= sc->pmemlimit);
1738 * Make sure we allow access to VGA memory addresses when the
1739 * bridge has the "VGA Enable" bit set.
1741 if (!ok && pci_is_vga_memory_range(start, end))
1742 ok = (sc->bridgectl & PCIB_BCR_VGA_ENABLE) ? 1 : 0;
1744 if ((sc->flags & PCIB_SUBTRACTIVE) == 0) {
1747 if (flags & RF_PREFETCHABLE) {
1748 if (pcib_is_prefetch_open(sc)) {
1749 if (start < sc->pmembase)
1750 start = sc->pmembase;
1751 if (end > sc->pmemlimit)
1752 end = sc->pmemlimit;
1756 } else { /* non-prefetchable */
1757 if (pcib_is_nonprefetch_open(sc)) {
1758 if (start < sc->membase)
1759 start = sc->membase;
1760 if (end > sc->memlimit)
1768 ok = 1; /* subtractive bridge: always ok */
1770 if (pcib_is_nonprefetch_open(sc)) {
1771 if (start < sc->memlimit && end > sc->membase)
1772 start = sc->memlimit + 1;
1774 if (pcib_is_prefetch_open(sc)) {
1775 if (start < sc->pmemlimit && end > sc->pmembase)
1776 start = sc->pmemlimit + 1;
1781 device_printf(dev, "memory: end (%lx) < start (%lx)\n",
1787 if (!ok && bootverbose)
1789 "%s%srequested unsupported memory range %#lx-%#lx "
1790 "(decoding %#jx-%#jx, %#jx-%#jx)\n",
1791 name, suffix, start, end,
1792 (uintmax_t)sc->membase, (uintmax_t)sc->memlimit,
1793 (uintmax_t)sc->pmembase, (uintmax_t)sc->pmemlimit);
1797 device_printf(dev,"%s%srequested memory range "
1798 "0x%lx-0x%lx: good\n",
1799 name, suffix, start, end);
1806 * Bridge is OK decoding this resource, so pass it up.
1808 return (bus_generic_alloc_resource(dev, child, type, rid, start, end,
1814 * If ARI is enabled on this downstream port, translate the function number
1815 * to the non-ARI slot/function. The downstream port will convert it back in
1816 * hardware. If ARI is not enabled slot and func are not modified.
1818 static __inline void
1819 pcib_xlate_ari(device_t pcib, int bus, int *slot, int *func)
1821 struct pcib_softc *sc;
1824 sc = device_get_softc(pcib);
1827 if (sc->flags & PCIB_ENABLE_ARI) {
1829 ("Non-zero slot number with ARI enabled!"));
1830 *slot = PCIE_ARI_SLOT(ari_func);
1831 *func = PCIE_ARI_FUNC(ari_func);
1837 pcib_enable_ari(struct pcib_softc *sc, uint32_t pcie_pos)
1841 ctl2 = pci_read_config(sc->dev, pcie_pos + PCIER_DEVICE_CTL2, 4);
1842 ctl2 |= PCIEM_CTL2_ARI;
1843 pci_write_config(sc->dev, pcie_pos + PCIER_DEVICE_CTL2, ctl2, 4);
1845 sc->flags |= PCIB_ENABLE_ARI;
1852 pcib_maxslots(device_t dev)
1854 return (PCI_SLOTMAX);
1858 pcib_ari_maxslots(device_t dev)
1860 struct pcib_softc *sc;
1862 sc = device_get_softc(dev);
1864 if (sc->flags & PCIB_ENABLE_ARI)
1865 return (PCIE_ARI_SLOTMAX);
1867 return (PCI_SLOTMAX);
1871 pcib_ari_maxfuncs(device_t dev)
1873 struct pcib_softc *sc;
1875 sc = device_get_softc(dev);
1877 if (sc->flags & PCIB_ENABLE_ARI)
1878 return (PCIE_ARI_FUNCMAX);
1880 return (PCI_FUNCMAX);
1884 pcib_ari_decode_rid(device_t pcib, uint16_t rid, int *bus, int *slot,
1887 struct pcib_softc *sc;
1889 sc = device_get_softc(pcib);
1891 *bus = PCI_RID2BUS(rid);
1892 if (sc->flags & PCIB_ENABLE_ARI) {
1893 *slot = PCIE_ARI_RID2SLOT(rid);
1894 *func = PCIE_ARI_RID2FUNC(rid);
1896 *slot = PCI_RID2SLOT(rid);
1897 *func = PCI_RID2FUNC(rid);
1902 * Since we are a child of a PCI bus, its parent must support the pcib interface.
1905 pcib_read_config(device_t dev, u_int b, u_int s, u_int f, u_int reg, int width)
1908 pcib_xlate_ari(dev, b, &s, &f);
1909 return(PCIB_READ_CONFIG(device_get_parent(device_get_parent(dev)), b, s,
1914 pcib_write_config(device_t dev, u_int b, u_int s, u_int f, u_int reg, uint32_t val, int width)
1917 pcib_xlate_ari(dev, b, &s, &f);
1918 PCIB_WRITE_CONFIG(device_get_parent(device_get_parent(dev)), b, s, f,
1923 * Route an interrupt across a PCI bridge.
1926 pcib_route_interrupt(device_t pcib, device_t dev, int pin)
1934 * The PCI standard defines a swizzle of the child-side device/intpin to
1935 * the parent-side intpin as follows.
1937 * device = device on child bus
1938 * child_intpin = intpin on child bus slot (0-3)
1939 * parent_intpin = intpin on parent bus slot (0-3)
1941 * parent_intpin = (device + child_intpin) % 4
1943 parent_intpin = (pci_get_slot(dev) + (pin - 1)) % 4;
1946 * Our parent is a PCI bus. Its parent must export the pcib interface
1947 * which includes the ability to route interrupts.
1949 bus = device_get_parent(pcib);
1950 intnum = PCIB_ROUTE_INTERRUPT(device_get_parent(bus), pcib, parent_intpin + 1);
1951 if (PCI_INTERRUPT_VALID(intnum) && bootverbose) {
1952 device_printf(pcib, "slot %d INT%c is routed to irq %d\n",
1953 pci_get_slot(dev), 'A' + pin - 1, intnum);
1958 /* Pass request to alloc MSI/MSI-X messages up to the parent bridge. */
1960 pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount, int *irqs)
1962 struct pcib_softc *sc = device_get_softc(pcib);
1965 if (sc->flags & PCIB_DISABLE_MSI)
1967 bus = device_get_parent(pcib);
1968 return (PCIB_ALLOC_MSI(device_get_parent(bus), dev, count, maxcount,
1972 /* Pass request to release MSI/MSI-X messages up to the parent bridge. */
1974 pcib_release_msi(device_t pcib, device_t dev, int count, int *irqs)
1978 bus = device_get_parent(pcib);
1979 return (PCIB_RELEASE_MSI(device_get_parent(bus), dev, count, irqs));
1982 /* Pass request to alloc an MSI-X message up to the parent bridge. */
1984 pcib_alloc_msix(device_t pcib, device_t dev, int *irq)
1986 struct pcib_softc *sc = device_get_softc(pcib);
1989 if (sc->flags & PCIB_DISABLE_MSIX)
1991 bus = device_get_parent(pcib);
1992 return (PCIB_ALLOC_MSIX(device_get_parent(bus), dev, irq));
1995 /* Pass request to release an MSI-X message up to the parent bridge. */
1997 pcib_release_msix(device_t pcib, device_t dev, int irq)
2001 bus = device_get_parent(pcib);
2002 return (PCIB_RELEASE_MSIX(device_get_parent(bus), dev, irq));
2005 /* Pass request to map MSI/MSI-X message up to parent bridge. */
2007 pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr,
2013 bus = device_get_parent(pcib);
2014 error = PCIB_MAP_MSI(device_get_parent(bus), dev, irq, addr, data);
2018 pci_ht_map_msi(pcib, *addr);
2022 /* Pass request for device power state up to parent bridge. */
2024 pcib_power_for_sleep(device_t pcib, device_t dev, int *pstate)
2028 bus = device_get_parent(pcib);
2029 return (PCIB_POWER_FOR_SLEEP(bus, dev, pstate));
2033 pcib_ari_enabled(device_t pcib)
2035 struct pcib_softc *sc;
2037 sc = device_get_softc(pcib);
2039 return ((sc->flags & PCIB_ENABLE_ARI) != 0);
2043 pcib_ari_get_rid(device_t pcib, device_t dev)
2045 struct pcib_softc *sc;
2046 uint8_t bus, slot, func;
2048 sc = device_get_softc(pcib);
2050 if (sc->flags & PCIB_ENABLE_ARI) {
2051 bus = pci_get_bus(dev);
2052 func = pci_get_function(dev);
2054 return (PCI_ARI_RID(bus, func));
2056 bus = pci_get_bus(dev);
2057 slot = pci_get_slot(dev);
2058 func = pci_get_function(dev);
2060 return (PCI_RID(bus, slot, func));
2065 * Check that the downstream port (pcib) and the endpoint device (dev) both
2066 * support ARI. If so, enable it and return 0, otherwise return an error.
2069 pcib_try_enable_ari(device_t pcib, device_t dev)
2071 struct pcib_softc *sc;
2078 sc = device_get_softc(pcib);
2081 * ARI is controlled in a register in the PCIe capability structure.
2082 * If the downstream port does not have the PCIe capability structure
2083 * then it does not support ARI.
2085 error = pci_find_cap(pcib, PCIY_EXPRESS, &pcie_pos);
2089 /* Check that the PCIe port advertises ARI support. */
2090 cap2 = pci_read_config(pcib, pcie_pos + PCIER_DEVICE_CAP2, 4);
2091 if (!(cap2 & PCIEM_CAP2_ARI))
2095 * Check that the endpoint device advertises ARI support via the ARI
2096 * extended capability structure.
2098 error = pci_find_extcap(dev, PCIZ_ARI, &ari_cap_off);
2103 * Finally, check that the endpoint device supports the same version
2104 * of ARI that we do.
2106 ari_ver = pci_read_config(dev, ari_cap_off, 4);
2107 if (PCI_EXTCAP_VER(ari_ver) != PCIB_SUPPORTED_ARI_VER) {
2110 "Unsupported version of ARI (%d) detected\n",
2111 PCI_EXTCAP_VER(ari_ver));
2116 pcib_enable_ari(sc, pcie_pos);