2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2011 Hudson River Trading LLC
5 * Written by: John H. Baldwin <jhb@FreeBSD.org>
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #include <sys/cdefs.h>
31 __FBSDID("$FreeBSD$");
34 * Support APIs for Host to PCI bridge drivers and drivers that
35 * provide PCI domains.
38 #include <sys/param.h>
40 #include <sys/malloc.h>
42 #include <sys/systm.h>
44 #include <dev/pci/pcireg.h>
45 #include <dev/pci/pcivar.h>
46 #include <dev/pci/pcib_private.h>
49 * Try to read the bus number of a host-PCI bridge using appropriate config
53 host_pcib_get_busno(pci_read_config_fn read_config, int bus, int slot, int func,
58 id = read_config(bus, slot, func, PCIR_DEVVENDOR, 4);
65 /* XXX This is a guess */
66 /* *busnum = read_config(bus, slot, func, 0x41, 1); */
70 /* Intel 82454KX/GX (Orion) */
71 *busnum = read_config(bus, slot, func, 0x4a, 1);
75 * For the 450nx chipset, there is a whole bundle of
76 * things pretending to be host bridges. The MIOC will
77 * be seen first and isn't really a pci bridge (the
78 * actual buses are attached to the PXB's). We need to
79 * read the registers of the MIOC to figure out the
80 * bus numbers for the PXB channels.
82 * Since the MIOC doesn't have a pci bus attached, we
83 * pretend it wasn't there.
89 /* Intel 82454NX PXB#0, Bus#A */
90 *busnum = read_config(bus, 0x10, func, 0xd0, 1);
93 /* Intel 82454NX PXB#0, Bus#B */
94 *busnum = read_config(bus, 0x10, func, 0xd1, 1) + 1;
97 /* Intel 82454NX PXB#1, Bus#A */
98 *busnum = read_config(bus, 0x10, func, 0xd3, 1);
101 /* Intel 82454NX PXB#1, Bus#B */
102 *busnum = read_config(bus, 0x10, func, 0xd4, 1) + 1;
107 /* ServerWorks -- vendor 0x1166 */
121 *busnum = read_config(bus, slot, func, 0x44, 1);
124 /* Compaq/HP -- vendor 0x0e11 */
126 *busnum = read_config(bus, slot, func, 0xc8, 1);
129 /* Don't know how to read bus number. */
138 * Return a pointer to a pretty name for a PCI device. If the device
139 * has a driver attached, the device's name is used, otherwise a name
140 * is generated from the device's PCI address.
143 pcib_child_name(device_t child)
147 if (device_get_nameunit(child) != NULL)
148 return (device_get_nameunit(child));
149 snprintf(buf, sizeof(buf), "pci%d:%d:%d:%d", pci_get_domain(child),
150 pci_get_bus(child), pci_get_slot(child), pci_get_function(child));
155 * Some Host-PCI bridge drivers know which resource ranges they can
156 * decode and should only allocate subranges to child PCI devices.
157 * This API provides a way to manage this. The bridge driver should
158 * initialize this structure during attach and call
159 * pcib_host_res_decodes() on each resource range it decodes. It can
160 * then use pcib_host_res_alloc() and pcib_host_res_adjust() as helper
161 * routines for BUS_ALLOC_RESOURCE() and BUS_ADJUST_RESOURCE(). This
162 * API assumes that resources for any decoded ranges can be safely
163 * allocated from the parent via bus_generic_alloc_resource().
166 pcib_host_res_init(device_t pcib, struct pcib_host_resources *hr)
170 resource_list_init(&hr->hr_rl);
175 pcib_host_res_free(device_t pcib, struct pcib_host_resources *hr)
178 resource_list_free(&hr->hr_rl);
183 pcib_host_res_decodes(struct pcib_host_resources *hr, int type, rman_res_t start,
184 rman_res_t end, u_int flags)
186 struct resource_list_entry *rle;
190 device_printf(hr->hr_pcib, "decoding %d %srange %#jx-%#jx\n",
191 type, flags & RF_PREFETCHABLE ? "prefetchable ": "", start,
193 rid = resource_list_add_next(&hr->hr_rl, type, start, end,
195 if (flags & RF_PREFETCHABLE) {
196 KASSERT(type == SYS_RES_MEMORY,
197 ("only memory is prefetchable"));
198 rle = resource_list_find(&hr->hr_rl, type, rid);
199 rle->flags = RLE_PREFETCH;
205 pcib_host_res_alloc(struct pcib_host_resources *hr, device_t dev, int type,
206 int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
208 struct resource_list_entry *rle;
210 rman_res_t new_start, new_end;
212 if (flags & RF_PREFETCHABLE)
213 KASSERT(type == SYS_RES_MEMORY,
214 ("only memory is prefetchable"));
216 rle = resource_list_find(&hr->hr_rl, type, 0);
219 * No decoding ranges for this resource type, just pass
220 * the request up to the parent.
222 return (bus_generic_alloc_resource(hr->hr_pcib, dev, type, rid,
223 start, end, count, flags));
227 /* Try to allocate from each decoded range. */
228 for (; rle != NULL; rle = STAILQ_NEXT(rle, link)) {
229 if (rle->type != type)
231 if (((flags & RF_PREFETCHABLE) != 0) !=
232 ((rle->flags & RLE_PREFETCH) != 0))
234 new_start = ummax(start, rle->start);
235 new_end = ummin(end, rle->end);
236 if (new_start > new_end ||
237 new_start + count - 1 > new_end ||
238 new_start + count < new_start)
240 r = bus_generic_alloc_resource(hr->hr_pcib, dev, type, rid,
241 new_start, new_end, count, flags);
244 device_printf(hr->hr_pcib,
245 "allocated type %d (%#jx-%#jx) for rid %x of %s\n",
246 type, rman_get_start(r), rman_get_end(r),
247 *rid, pcib_child_name(dev));
253 * If we failed to find a prefetch range for a memory
254 * resource, try again without prefetch.
256 if (flags & RF_PREFETCHABLE) {
257 flags &= ~RF_PREFETCHABLE;
258 rle = resource_list_find(&hr->hr_rl, type, 0);
265 pcib_host_res_adjust(struct pcib_host_resources *hr, device_t dev, int type,
266 struct resource *r, rman_res_t start, rman_res_t end)
268 struct resource_list_entry *rle;
270 rle = resource_list_find(&hr->hr_rl, type, 0);
273 * No decoding ranges for this resource type, just pass
274 * the request up to the parent.
276 return (bus_generic_adjust_resource(hr->hr_pcib, dev, type, r,
280 /* Only allow adjustments that stay within a decoded range. */
281 for (; rle != NULL; rle = STAILQ_NEXT(rle, link)) {
282 if (rle->start <= start && rle->end >= end)
283 return (bus_generic_adjust_resource(hr->hr_pcib, dev,
284 type, r, start, end));
292 struct rman pd_bus_rman;
293 TAILQ_ENTRY(pci_domain) pd_link;
296 static TAILQ_HEAD(, pci_domain) domains = TAILQ_HEAD_INITIALIZER(domains);
299 * Each PCI domain maintains its own resource manager for PCI bus
300 * numbers in that domain. Domain objects are created on first use.
301 * Host to PCI bridge drivers and PCI-PCI bridge drivers should
302 * allocate their bus ranges from their domain.
304 static struct pci_domain *
305 pci_find_domain(int domain)
307 struct pci_domain *d;
311 TAILQ_FOREACH(d, &domains, pd_link) {
312 if (d->pd_domain == domain)
316 snprintf(buf, sizeof(buf), "PCI domain %d bus numbers", domain);
317 d = malloc(sizeof(*d) + strlen(buf) + 1, M_DEVBUF, M_WAITOK | M_ZERO);
318 d->pd_domain = domain;
319 d->pd_bus_rman.rm_start = 0;
320 d->pd_bus_rman.rm_end = PCI_BUSMAX;
321 d->pd_bus_rman.rm_type = RMAN_ARRAY;
322 strcpy((char *)(d + 1), buf);
323 d->pd_bus_rman.rm_descr = (char *)(d + 1);
324 error = rman_init(&d->pd_bus_rman);
326 error = rman_manage_region(&d->pd_bus_rman, 0, PCI_BUSMAX);
328 panic("Failed to initialize PCI domain %d rman", domain);
329 TAILQ_INSERT_TAIL(&domains, d, pd_link);
334 pci_domain_alloc_bus(int domain, device_t dev, int *rid, rman_res_t start,
335 rman_res_t end, rman_res_t count, u_int flags)
337 struct pci_domain *d;
338 struct resource *res;
340 if (domain < 0 || domain > PCI_DOMAINMAX)
342 d = pci_find_domain(domain);
343 res = rman_reserve_resource(&d->pd_bus_rman, start, end, count, flags,
348 rman_set_rid(res, *rid);
353 pci_domain_adjust_bus(int domain, device_t dev, struct resource *r,
354 rman_res_t start, rman_res_t end)
357 struct pci_domain *d;
360 if (domain < 0 || domain > PCI_DOMAINMAX)
363 d = pci_find_domain(domain);
364 KASSERT(rman_is_region_manager(r, &d->pd_bus_rman), ("bad resource"));
366 return (rman_adjust_resource(r, start, end));
370 pci_domain_release_bus(int domain, device_t dev, int rid, struct resource *r)
373 struct pci_domain *d;
376 if (domain < 0 || domain > PCI_DOMAINMAX)
379 d = pci_find_domain(domain);
380 KASSERT(rman_is_region_manager(r, &d->pd_bus_rman), ("bad resource"));
382 return (rman_release_resource(r));
384 #endif /* PCI_RES_BUS */
386 #endif /* NEW_PCIB */