2 * Copyright (c) 2011 Hudson River Trading LLC
3 * Written by: John H. Baldwin <jhb@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
32 * Support APIs for Host to PCI bridge drivers and drivers that
33 * provide PCI domains.
36 #include <sys/param.h>
38 #include <sys/malloc.h>
40 #include <sys/systm.h>
42 #include <dev/pci/pcireg.h>
43 #include <dev/pci/pcivar.h>
44 #include <dev/pci/pcib_private.h>
47 * Try to read the bus number of a host-PCI bridge using appropriate config
51 host_pcib_get_busno(pci_read_config_fn read_config, int bus, int slot, int func,
56 id = read_config(bus, slot, func, PCIR_DEVVENDOR, 4);
63 /* XXX This is a guess */
64 /* *busnum = read_config(bus, slot, func, 0x41, 1); */
68 /* Intel 82454KX/GX (Orion) */
69 *busnum = read_config(bus, slot, func, 0x4a, 1);
73 * For the 450nx chipset, there is a whole bundle of
74 * things pretending to be host bridges. The MIOC will
75 * be seen first and isn't really a pci bridge (the
76 * actual buses are attached to the PXB's). We need to
77 * read the registers of the MIOC to figure out the
78 * bus numbers for the PXB channels.
80 * Since the MIOC doesn't have a pci bus attached, we
81 * pretend it wasn't there.
87 /* Intel 82454NX PXB#0, Bus#A */
88 *busnum = read_config(bus, 0x10, func, 0xd0, 1);
91 /* Intel 82454NX PXB#0, Bus#B */
92 *busnum = read_config(bus, 0x10, func, 0xd1, 1) + 1;
95 /* Intel 82454NX PXB#1, Bus#A */
96 *busnum = read_config(bus, 0x10, func, 0xd3, 1);
99 /* Intel 82454NX PXB#1, Bus#B */
100 *busnum = read_config(bus, 0x10, func, 0xd4, 1) + 1;
105 /* ServerWorks -- vendor 0x1166 */
119 *busnum = read_config(bus, slot, func, 0x44, 1);
122 /* Compaq/HP -- vendor 0x0e11 */
124 *busnum = read_config(bus, slot, func, 0xc8, 1);
127 /* Don't know how to read bus number. */
136 * Return a pointer to a pretty name for a PCI device. If the device
137 * has a driver attached, the device's name is used, otherwise a name
138 * is generated from the device's PCI address.
141 pcib_child_name(device_t child)
145 if (device_get_nameunit(child) != NULL)
146 return (device_get_nameunit(child));
147 snprintf(buf, sizeof(buf), "pci%d:%d:%d:%d", pci_get_domain(child),
148 pci_get_bus(child), pci_get_slot(child), pci_get_function(child));
153 * Some Host-PCI bridge drivers know which resource ranges they can
154 * decode and should only allocate subranges to child PCI devices.
155 * This API provides a way to manage this. The bridge driver should
156 * initialize this structure during attach and call
157 * pcib_host_res_decodes() on each resource range it decodes. It can
158 * then use pcib_host_res_alloc() and pcib_host_res_adjust() as helper
159 * routines for BUS_ALLOC_RESOURCE() and BUS_ADJUST_RESOURCE(). This
160 * API assumes that resources for any decoded ranges can be safely
161 * allocated from the parent via bus_generic_alloc_resource().
164 pcib_host_res_init(device_t pcib, struct pcib_host_resources *hr)
168 resource_list_init(&hr->hr_rl);
173 pcib_host_res_free(device_t pcib, struct pcib_host_resources *hr)
176 resource_list_free(&hr->hr_rl);
181 pcib_host_res_decodes(struct pcib_host_resources *hr, int type, rman_res_t start,
182 rman_res_t end, u_int flags)
184 struct resource_list_entry *rle;
188 device_printf(hr->hr_pcib, "decoding %d %srange %#jx-%#jx\n",
189 type, flags & RF_PREFETCHABLE ? "prefetchable ": "", start,
191 rid = resource_list_add_next(&hr->hr_rl, type, start, end,
193 if (flags & RF_PREFETCHABLE) {
194 KASSERT(type == SYS_RES_MEMORY,
195 ("only memory is prefetchable"));
196 rle = resource_list_find(&hr->hr_rl, type, rid);
197 rle->flags = RLE_PREFETCH;
203 pcib_host_res_alloc(struct pcib_host_resources *hr, device_t dev, int type,
204 int *rid, rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
206 struct resource_list_entry *rle;
208 rman_res_t new_start, new_end;
210 if (flags & RF_PREFETCHABLE)
211 KASSERT(type == SYS_RES_MEMORY,
212 ("only memory is prefetchable"));
214 rle = resource_list_find(&hr->hr_rl, type, 0);
217 * No decoding ranges for this resource type, just pass
218 * the request up to the parent.
220 return (bus_generic_alloc_resource(hr->hr_pcib, dev, type, rid,
221 start, end, count, flags));
225 /* Try to allocate from each decoded range. */
226 for (; rle != NULL; rle = STAILQ_NEXT(rle, link)) {
227 if (rle->type != type)
229 if (((flags & RF_PREFETCHABLE) != 0) !=
230 ((rle->flags & RLE_PREFETCH) != 0))
232 new_start = ummax(start, rle->start);
233 new_end = ummin(end, rle->end);
234 if (new_start > new_end ||
235 new_start + count - 1 > new_end ||
236 new_start + count < new_start)
238 r = bus_generic_alloc_resource(hr->hr_pcib, dev, type, rid,
239 new_start, new_end, count, flags);
242 device_printf(hr->hr_pcib,
243 "allocated type %d (%#jx-%#jx) for rid %x of %s\n",
244 type, rman_get_start(r), rman_get_end(r),
245 *rid, pcib_child_name(dev));
251 * If we failed to find a prefetch range for a memory
252 * resource, try again without prefetch.
254 if (flags & RF_PREFETCHABLE) {
255 flags &= ~RF_PREFETCHABLE;
256 rle = resource_list_find(&hr->hr_rl, type, 0);
263 pcib_host_res_adjust(struct pcib_host_resources *hr, device_t dev, int type,
264 struct resource *r, rman_res_t start, rman_res_t end)
266 struct resource_list_entry *rle;
268 rle = resource_list_find(&hr->hr_rl, type, 0);
271 * No decoding ranges for this resource type, just pass
272 * the request up to the parent.
274 return (bus_generic_adjust_resource(hr->hr_pcib, dev, type, r,
278 /* Only allow adjustments that stay within a decoded range. */
279 for (; rle != NULL; rle = STAILQ_NEXT(rle, link)) {
280 if (rle->start <= start && rle->end >= end)
281 return (bus_generic_adjust_resource(hr->hr_pcib, dev,
282 type, r, start, end));
290 struct rman pd_bus_rman;
291 TAILQ_ENTRY(pci_domain) pd_link;
294 static TAILQ_HEAD(, pci_domain) domains = TAILQ_HEAD_INITIALIZER(domains);
297 * Each PCI domain maintains its own resource manager for PCI bus
298 * numbers in that domain. Domain objects are created on first use.
299 * Host to PCI bridge drivers and PCI-PCI bridge drivers should
300 * allocate their bus ranges from their domain.
302 static struct pci_domain *
303 pci_find_domain(int domain)
305 struct pci_domain *d;
309 TAILQ_FOREACH(d, &domains, pd_link) {
310 if (d->pd_domain == domain)
314 snprintf(buf, sizeof(buf), "PCI domain %d bus numbers", domain);
315 d = malloc(sizeof(*d) + strlen(buf) + 1, M_DEVBUF, M_WAITOK | M_ZERO);
316 d->pd_domain = domain;
317 d->pd_bus_rman.rm_start = 0;
318 d->pd_bus_rman.rm_end = PCI_BUSMAX;
319 d->pd_bus_rman.rm_type = RMAN_ARRAY;
320 strcpy((char *)(d + 1), buf);
321 d->pd_bus_rman.rm_descr = (char *)(d + 1);
322 error = rman_init(&d->pd_bus_rman);
324 error = rman_manage_region(&d->pd_bus_rman, 0, PCI_BUSMAX);
326 panic("Failed to initialize PCI domain %d rman", domain);
327 TAILQ_INSERT_TAIL(&domains, d, pd_link);
332 pci_domain_alloc_bus(int domain, device_t dev, int *rid, rman_res_t start,
333 rman_res_t end, rman_res_t count, u_int flags)
335 struct pci_domain *d;
336 struct resource *res;
338 if (domain < 0 || domain > PCI_DOMAINMAX)
340 d = pci_find_domain(domain);
341 res = rman_reserve_resource(&d->pd_bus_rman, start, end, count, flags,
346 rman_set_rid(res, *rid);
351 pci_domain_adjust_bus(int domain, device_t dev, struct resource *r,
352 rman_res_t start, rman_res_t end)
355 struct pci_domain *d;
358 if (domain < 0 || domain > PCI_DOMAINMAX)
361 d = pci_find_domain(domain);
362 KASSERT(rman_is_region_manager(r, &d->pd_bus_rman), ("bad resource"));
364 return (rman_adjust_resource(r, start, end));
368 pci_domain_release_bus(int domain, device_t dev, int rid, struct resource *r)
371 struct pci_domain *d;
374 if (domain < 0 || domain > PCI_DOMAINMAX)
377 d = pci_find_domain(domain);
378 KASSERT(rman_is_region_manager(r, &d->pd_bus_rman), ("bad resource"));
380 return (rman_release_resource(r));
382 #endif /* PCI_RES_BUS */
384 #endif /* NEW_PCIB */