2 * Copyright (c) 2000 Berkeley Software Design, Inc.
3 * Copyright (c) 1997, 1998, 1999, 2000
4 * Bill Paul <wpaul@osd.bsdi.com>. All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Bill Paul.
17 * 4. Neither the name of the author nor the names of any co-contributors
18 * may be used to endorse or promote products derived from this software
19 * without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
31 * THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
38 * AMD Am79c972 fast ethernet PCI NIC driver. Datasheets are available
39 * from http://www.amd.com.
41 * The AMD PCnet/PCI controllers are more advanced and functional
42 * versions of the venerable 7990 LANCE. The PCnet/PCI chips retain
43 * backwards compatibility with the LANCE and thus can be made
44 * to work with older LANCE drivers. This is in fact how the
45 * PCnet/PCI chips were supported in FreeBSD originally. The trouble
46 * is that the PCnet/PCI devices offer several performance enhancements
47 * which can't be exploited in LANCE compatibility mode. Chief among
48 * these enhancements is the ability to perform PCI DMA operations
49 * using 32-bit addressing (which eliminates the need for ISA
50 * bounce-buffering), and special receive buffer alignment (which
51 * allows the receive handler to pass packets to the upper protocol
52 * layers without copying on both the x86 and alpha platforms).
55 #include <sys/param.h>
56 #include <sys/systm.h>
57 #include <sys/sockio.h>
59 #include <sys/malloc.h>
60 #include <sys/kernel.h>
61 #include <sys/module.h>
62 #include <sys/socket.h>
65 #include <net/if_arp.h>
66 #include <net/ethernet.h>
67 #include <net/if_dl.h>
68 #include <net/if_media.h>
69 #include <net/if_types.h>
73 #include <vm/vm.h> /* for vtophys */
74 #include <vm/pmap.h> /* for vtophys */
75 #include <machine/bus.h>
76 #include <machine/resource.h>
80 #include <dev/mii/mii.h>
81 #include <dev/mii/miivar.h>
83 #include <dev/pci/pcireg.h>
84 #include <dev/pci/pcivar.h>
86 #define PCN_USEIOSPACE
88 #include <dev/pcn/if_pcnreg.h>
90 MODULE_DEPEND(pcn, pci, 1, 1, 1);
91 MODULE_DEPEND(pcn, ether, 1, 1, 1);
92 MODULE_DEPEND(pcn, miibus, 1, 1, 1);
94 /* "device miibus" required. See GENERIC if you get errors here. */
95 #include "miibus_if.h"
98 * Various supported device vendors/types and their names.
100 static const struct pcn_type pcn_devs[] = {
101 { PCN_VENDORID, PCN_DEVICEID_PCNET, "AMD PCnet/PCI 10/100BaseTX" },
102 { PCN_VENDORID, PCN_DEVICEID_HOME, "AMD PCnet/Home HomePNA" },
106 static const struct pcn_chipid {
110 { Am79C971, "Am79C971" },
111 { Am79C972, "Am79C972" },
112 { Am79C973, "Am79C973" },
113 { Am79C978, "Am79C978" },
114 { Am79C975, "Am79C975" },
115 { Am79C976, "Am79C976" },
119 static const char *pcn_chipid_name(u_int32_t);
120 static u_int32_t pcn_chip_id(device_t);
121 static const struct pcn_type *pcn_match(u_int16_t, u_int16_t);
123 static u_int32_t pcn_csr_read(struct pcn_softc *, int);
124 static u_int16_t pcn_csr_read16(struct pcn_softc *, int);
125 static u_int16_t pcn_bcr_read16(struct pcn_softc *, int);
126 static void pcn_csr_write(struct pcn_softc *, int, int);
127 static u_int32_t pcn_bcr_read(struct pcn_softc *, int);
128 static void pcn_bcr_write(struct pcn_softc *, int, int);
130 static int pcn_probe(device_t);
131 static int pcn_attach(device_t);
132 static int pcn_detach(device_t);
134 static int pcn_newbuf(struct pcn_softc *, int, struct mbuf *);
135 static int pcn_encap(struct pcn_softc *, struct mbuf *, u_int32_t *);
136 static void pcn_rxeof(struct pcn_softc *);
137 static void pcn_txeof(struct pcn_softc *);
138 static void pcn_intr(void *);
139 static void pcn_tick(void *);
140 static void pcn_start(struct ifnet *);
141 static void pcn_start_locked(struct ifnet *);
142 static int pcn_ioctl(struct ifnet *, u_long, caddr_t);
143 static void pcn_init(void *);
144 static void pcn_init_locked(struct pcn_softc *);
145 static void pcn_stop(struct pcn_softc *);
146 static void pcn_watchdog(struct pcn_softc *);
147 static int pcn_shutdown(device_t);
148 static int pcn_ifmedia_upd(struct ifnet *);
149 static void pcn_ifmedia_sts(struct ifnet *, struct ifmediareq *);
151 static int pcn_miibus_readreg(device_t, int, int);
152 static int pcn_miibus_writereg(device_t, int, int, int);
153 static void pcn_miibus_statchg(device_t);
155 static void pcn_setfilt(struct ifnet *);
156 static void pcn_setmulti(struct pcn_softc *);
157 static void pcn_reset(struct pcn_softc *);
158 static int pcn_list_rx_init(struct pcn_softc *);
159 static int pcn_list_tx_init(struct pcn_softc *);
161 #ifdef PCN_USEIOSPACE
162 #define PCN_RES SYS_RES_IOPORT
163 #define PCN_RID PCN_PCI_LOIO
165 #define PCN_RES SYS_RES_MEMORY
166 #define PCN_RID PCN_PCI_LOMEM
169 static device_method_t pcn_methods[] = {
170 /* Device interface */
171 DEVMETHOD(device_probe, pcn_probe),
172 DEVMETHOD(device_attach, pcn_attach),
173 DEVMETHOD(device_detach, pcn_detach),
174 DEVMETHOD(device_shutdown, pcn_shutdown),
177 DEVMETHOD(miibus_readreg, pcn_miibus_readreg),
178 DEVMETHOD(miibus_writereg, pcn_miibus_writereg),
179 DEVMETHOD(miibus_statchg, pcn_miibus_statchg),
184 static driver_t pcn_driver = {
187 sizeof(struct pcn_softc)
190 static devclass_t pcn_devclass;
192 DRIVER_MODULE(pcn, pci, pcn_driver, pcn_devclass, 0, 0);
193 DRIVER_MODULE(miibus, pcn, miibus_driver, miibus_devclass, 0, 0);
195 #define PCN_CSR_SETBIT(sc, reg, x) \
196 pcn_csr_write(sc, reg, pcn_csr_read(sc, reg) | (x))
198 #define PCN_CSR_CLRBIT(sc, reg, x) \
199 pcn_csr_write(sc, reg, pcn_csr_read(sc, reg) & ~(x))
201 #define PCN_BCR_SETBIT(sc, reg, x) \
202 pcn_bcr_write(sc, reg, pcn_bcr_read(sc, reg) | (x))
204 #define PCN_BCR_CLRBIT(sc, reg, x) \
205 pcn_bcr_write(sc, reg, pcn_bcr_read(sc, reg) & ~(x))
208 pcn_csr_read(sc, reg)
209 struct pcn_softc *sc;
212 CSR_WRITE_4(sc, PCN_IO32_RAP, reg);
213 return(CSR_READ_4(sc, PCN_IO32_RDP));
217 pcn_csr_read16(sc, reg)
218 struct pcn_softc *sc;
221 CSR_WRITE_2(sc, PCN_IO16_RAP, reg);
222 return(CSR_READ_2(sc, PCN_IO16_RDP));
226 pcn_csr_write(sc, reg, val)
227 struct pcn_softc *sc;
231 CSR_WRITE_4(sc, PCN_IO32_RAP, reg);
232 CSR_WRITE_4(sc, PCN_IO32_RDP, val);
237 pcn_bcr_read(sc, reg)
238 struct pcn_softc *sc;
241 CSR_WRITE_4(sc, PCN_IO32_RAP, reg);
242 return(CSR_READ_4(sc, PCN_IO32_BDP));
246 pcn_bcr_read16(sc, reg)
247 struct pcn_softc *sc;
250 CSR_WRITE_2(sc, PCN_IO16_RAP, reg);
251 return(CSR_READ_2(sc, PCN_IO16_BDP));
255 pcn_bcr_write(sc, reg, val)
256 struct pcn_softc *sc;
260 CSR_WRITE_4(sc, PCN_IO32_RAP, reg);
261 CSR_WRITE_4(sc, PCN_IO32_BDP, val);
266 pcn_miibus_readreg(dev, phy, reg)
270 struct pcn_softc *sc;
273 sc = device_get_softc(dev);
276 * At least Am79C971 with DP83840A wedge when isolating the
277 * external PHY so we can't allow multiple external PHYs.
278 * There are cards that use Am79C971 with both the internal
279 * and an external PHY though.
280 * For internal PHYs it doesn't really matter whether we can
281 * isolate the remaining internal and the external ones in
282 * the PHY drivers as the internal PHYs have to be enabled
283 * individually in PCN_BCR_PHYSEL, PCN_CSR_MODE, etc.
284 * With Am79C97{3,5,8} we don't support switching beetween
285 * the internal and external PHYs, yet, so we can't allow
286 * multiple PHYs with these either.
287 * Am79C97{2,6} actually only support external PHYs (not
288 * connectable internal ones respond at the usual addresses,
289 * which don't hurt if we let them show up on the bus) and
290 * isolating them works.
292 if (((sc->pcn_type == Am79C971 && phy != PCN_PHYAD_10BT) ||
293 sc->pcn_type == Am79C973 || sc->pcn_type == Am79C975 ||
294 sc->pcn_type == Am79C978) && sc->pcn_extphyaddr != -1 &&
295 phy != sc->pcn_extphyaddr)
298 pcn_bcr_write(sc, PCN_BCR_MIIADDR, reg | (phy << 5));
299 val = pcn_bcr_read(sc, PCN_BCR_MIIDATA) & 0xFFFF;
303 if (((sc->pcn_type == Am79C971 && phy != PCN_PHYAD_10BT) ||
304 sc->pcn_type == Am79C973 || sc->pcn_type == Am79C975 ||
305 sc->pcn_type == Am79C978) && sc->pcn_extphyaddr == -1)
306 sc->pcn_extphyaddr = phy;
312 pcn_miibus_writereg(dev, phy, reg, data)
316 struct pcn_softc *sc;
318 sc = device_get_softc(dev);
320 pcn_bcr_write(sc, PCN_BCR_MIIADDR, reg | (phy << 5));
321 pcn_bcr_write(sc, PCN_BCR_MIIDATA, data);
327 pcn_miibus_statchg(dev)
330 struct pcn_softc *sc;
331 struct mii_data *mii;
333 sc = device_get_softc(dev);
334 mii = device_get_softc(sc->pcn_miibus);
336 if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) {
337 PCN_BCR_SETBIT(sc, PCN_BCR_DUPLEX, PCN_DUPLEX_FDEN);
339 PCN_BCR_CLRBIT(sc, PCN_BCR_DUPLEX, PCN_DUPLEX_FDEN);
347 struct pcn_softc *sc;
350 struct ifmultiaddr *ifma;
352 u_int16_t hashes[4] = { 0, 0, 0, 0 };
356 PCN_CSR_SETBIT(sc, PCN_CSR_EXTCTL1, PCN_EXTCTL1_SPND);
358 if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) {
359 for (i = 0; i < 4; i++)
360 pcn_csr_write(sc, PCN_CSR_MAR0 + i, 0xFFFF);
361 PCN_CSR_CLRBIT(sc, PCN_CSR_EXTCTL1, PCN_EXTCTL1_SPND);
365 /* first, zot all the existing hash bits */
366 for (i = 0; i < 4; i++)
367 pcn_csr_write(sc, PCN_CSR_MAR0 + i, 0);
369 /* now program new ones */
371 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
372 if (ifma->ifma_addr->sa_family != AF_LINK)
374 h = ether_crc32_le(LLADDR((struct sockaddr_dl *)
375 ifma->ifma_addr), ETHER_ADDR_LEN) >> 26;
376 hashes[h >> 4] |= 1 << (h & 0xF);
378 if_maddr_runlock(ifp);
380 for (i = 0; i < 4; i++)
381 pcn_csr_write(sc, PCN_CSR_MAR0 + i, hashes[i]);
383 PCN_CSR_CLRBIT(sc, PCN_CSR_EXTCTL1, PCN_EXTCTL1_SPND);
390 struct pcn_softc *sc;
393 * Issue a reset by reading from the RESET register.
394 * Note that we don't know if the chip is operating in
395 * 16-bit or 32-bit mode at this point, so we attempt
396 * to reset the chip both ways. If one fails, the other
399 CSR_READ_2(sc, PCN_IO16_RESET);
400 CSR_READ_4(sc, PCN_IO32_RESET);
402 /* Wait a little while for the chip to get its brains in order. */
405 /* Select 32-bit (DWIO) mode */
406 CSR_WRITE_4(sc, PCN_IO32_RDP, 0);
408 /* Select software style 3. */
409 pcn_bcr_write(sc, PCN_BCR_SSTYLE, PCN_SWSTYLE_PCNETPCI_BURST);
415 pcn_chipid_name(u_int32_t id)
417 const struct pcn_chipid *p;
429 pcn_chip_id(device_t dev)
431 struct pcn_softc *sc;
434 sc = device_get_softc(dev);
436 * Note: we can *NOT* put the chip into
437 * 32-bit mode yet. The le(4) driver will only
438 * work in 16-bit mode, and once the chip
439 * goes into 32-bit mode, the only way to
440 * get it out again is with a hardware reset.
441 * So if pcn_probe() is called before the
442 * le(4) driver's probe routine, the chip will
443 * be locked into 32-bit operation and the
444 * le(4) driver will be unable to attach to it.
445 * Note II: if the chip happens to already
446 * be in 32-bit mode, we still need to check
447 * the chip ID, but first we have to detect
448 * 32-bit mode using only 16-bit operations.
449 * The safest way to do this is to read the
450 * PCI subsystem ID from BCR23/24 and compare
451 * that with the value read from PCI config
454 chip_id = pcn_bcr_read16(sc, PCN_BCR_PCISUBSYSID);
456 chip_id |= pcn_bcr_read16(sc, PCN_BCR_PCISUBVENID);
458 * Note III: the test for 0x10001000 is a hack to
459 * pacify VMware, who's pseudo-PCnet interface is
460 * broken. Reading the subsystem register from PCI
461 * config space yields 0x00000000 while reading the
462 * same value from I/O space yields 0x10001000. It's
463 * not supposed to be that way.
465 if (chip_id == pci_read_config(dev,
466 PCIR_SUBVEND_0, 4) || chip_id == 0x10001000) {
467 /* We're in 16-bit mode. */
468 chip_id = pcn_csr_read16(sc, PCN_CSR_CHIPID1);
470 chip_id |= pcn_csr_read16(sc, PCN_CSR_CHIPID0);
472 /* We're in 32-bit mode. */
473 chip_id = pcn_csr_read(sc, PCN_CSR_CHIPID1);
475 chip_id |= pcn_csr_read(sc, PCN_CSR_CHIPID0);
481 static const struct pcn_type *
482 pcn_match(u_int16_t vid, u_int16_t did)
484 const struct pcn_type *t;
487 while (t->pcn_name != NULL) {
488 if ((vid == t->pcn_vid) && (did == t->pcn_did))
496 * Probe for an AMD chip. Check the PCI vendor and device
497 * IDs against our list and return a device name if we find a match.
503 const struct pcn_type *t;
504 struct pcn_softc *sc;
508 t = pcn_match(pci_get_vendor(dev), pci_get_device(dev));
511 sc = device_get_softc(dev);
514 * Temporarily map the I/O space so we can read the chip ID register.
517 sc->pcn_res = bus_alloc_resource_any(dev, PCN_RES, &rid, RF_ACTIVE);
518 if (sc->pcn_res == NULL) {
519 device_printf(dev, "couldn't map ports/memory\n");
522 sc->pcn_btag = rman_get_bustag(sc->pcn_res);
523 sc->pcn_bhandle = rman_get_bushandle(sc->pcn_res);
525 chip_id = pcn_chip_id(dev);
527 bus_release_resource(dev, PCN_RES, PCN_RID, sc->pcn_res);
529 switch((chip_id >> 12) & PART_MASK) {
540 device_set_desc(dev, t->pcn_name);
541 return(BUS_PROBE_DEFAULT);
545 * Attach the interface. Allocate softc structures, do ifmedia
546 * setup and ethernet/BPF attach.
553 struct pcn_softc *sc;
554 struct mii_data *mii;
555 struct mii_softc *miisc;
559 sc = device_get_softc(dev);
561 /* Initialize our mutex. */
562 mtx_init(&sc->pcn_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
565 * Map control/status registers.
567 pci_enable_busmaster(dev);
569 /* Retrieve the chip ID */
570 sc->pcn_type = (pcn_chip_id(dev) >> 12) & PART_MASK;
571 device_printf(dev, "Chip ID %04x (%s)\n",
572 sc->pcn_type, pcn_chipid_name(sc->pcn_type));
575 sc->pcn_res = bus_alloc_resource_any(dev, PCN_RES, &rid, RF_ACTIVE);
577 if (sc->pcn_res == NULL) {
578 device_printf(dev, "couldn't map ports/memory\n");
583 sc->pcn_btag = rman_get_bustag(sc->pcn_res);
584 sc->pcn_bhandle = rman_get_bushandle(sc->pcn_res);
586 /* Allocate interrupt */
588 sc->pcn_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
589 RF_SHAREABLE | RF_ACTIVE);
591 if (sc->pcn_irq == NULL) {
592 device_printf(dev, "couldn't map interrupt\n");
597 /* Reset the adapter. */
601 * Get station address from the EEPROM.
603 eaddr[0] = CSR_READ_4(sc, PCN_IO32_APROM00);
604 eaddr[1] = CSR_READ_4(sc, PCN_IO32_APROM01);
606 callout_init_mtx(&sc->pcn_stat_callout, &sc->pcn_mtx, 0);
608 sc->pcn_ldata = contigmalloc(sizeof(struct pcn_list_data), M_DEVBUF,
609 M_NOWAIT, 0, 0xffffffff, PAGE_SIZE, 0);
611 if (sc->pcn_ldata == NULL) {
612 device_printf(dev, "no memory for list buffers!\n");
616 bzero(sc->pcn_ldata, sizeof(struct pcn_list_data));
618 ifp = sc->pcn_ifp = if_alloc(IFT_ETHER);
620 device_printf(dev, "can not if_alloc()\n");
625 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
626 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
627 ifp->if_ioctl = pcn_ioctl;
628 ifp->if_start = pcn_start;
629 ifp->if_init = pcn_init;
630 ifp->if_snd.ifq_maxlen = PCN_TX_LIST_CNT - 1;
634 * See the comment in pcn_miibus_readreg() for why we can't
635 * universally pass MIIF_NOISOLATE here.
637 sc->pcn_extphyaddr = -1;
638 error = mii_attach(dev, &sc->pcn_miibus, ifp, pcn_ifmedia_upd,
639 pcn_ifmedia_sts, BMSR_DEFCAPMASK, MII_PHY_ANY, MII_OFFSET_ANY, 0);
641 device_printf(dev, "attaching PHYs failed\n");
645 * Record the media instances of internal PHYs, which map the
646 * built-in interfaces to the MII, so we can set the active
647 * PHY/port based on the currently selected media.
649 sc->pcn_inst_10bt = -1;
650 mii = device_get_softc(sc->pcn_miibus);
651 LIST_FOREACH(miisc, &mii->mii_phys, mii_list) {
652 switch (miisc->mii_phy) {
654 sc->pcn_inst_10bt = miisc->mii_inst;
657 * XXX deal with the Am79C97{3,5} internal 100baseT
658 * and the Am79C978 internal HomePNA PHYs.
664 * Call MI attach routine.
666 ether_ifattach(ifp, (u_int8_t *) eaddr);
668 /* Hook interrupt last to avoid having to lock softc */
669 error = bus_setup_intr(dev, sc->pcn_irq, INTR_TYPE_NET | INTR_MPSAFE,
670 NULL, pcn_intr, sc, &sc->pcn_intrhand);
673 device_printf(dev, "couldn't set up irq\n");
686 * Shutdown hardware and free up resources. This can be called any
687 * time after the mutex has been initialized. It is called in both
688 * the error case in attach and the normal detach case so it needs
689 * to be careful about only freeing resources that have actually been
696 struct pcn_softc *sc;
699 sc = device_get_softc(dev);
702 KASSERT(mtx_initialized(&sc->pcn_mtx), ("pcn mutex not initialized"));
704 /* These should only be active if attach succeeded */
705 if (device_is_attached(dev)) {
710 callout_drain(&sc->pcn_stat_callout);
714 device_delete_child(dev, sc->pcn_miibus);
715 bus_generic_detach(dev);
717 if (sc->pcn_intrhand)
718 bus_teardown_intr(dev, sc->pcn_irq, sc->pcn_intrhand);
720 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->pcn_irq);
722 bus_release_resource(dev, PCN_RES, PCN_RID, sc->pcn_res);
728 contigfree(sc->pcn_ldata, sizeof(struct pcn_list_data),
732 mtx_destroy(&sc->pcn_mtx);
738 * Initialize the transmit descriptors.
742 struct pcn_softc *sc;
744 struct pcn_list_data *ld;
745 struct pcn_ring_data *cd;
751 for (i = 0; i < PCN_TX_LIST_CNT; i++) {
752 cd->pcn_tx_chain[i] = NULL;
753 ld->pcn_tx_list[i].pcn_tbaddr = 0;
754 ld->pcn_tx_list[i].pcn_txctl = 0;
755 ld->pcn_tx_list[i].pcn_txstat = 0;
758 cd->pcn_tx_prod = cd->pcn_tx_cons = cd->pcn_tx_cnt = 0;
765 * Initialize the RX descriptors and allocate mbufs for them.
769 struct pcn_softc *sc;
771 struct pcn_ring_data *cd;
776 for (i = 0; i < PCN_RX_LIST_CNT; i++) {
777 if (pcn_newbuf(sc, i, NULL) == ENOBUFS)
787 * Initialize an RX descriptor and attach an MBUF cluster.
790 pcn_newbuf(sc, idx, m)
791 struct pcn_softc *sc;
795 struct mbuf *m_new = NULL;
796 struct pcn_rx_desc *c;
798 c = &sc->pcn_ldata->pcn_rx_list[idx];
801 MGETHDR(m_new, M_NOWAIT, MT_DATA);
805 MCLGET(m_new, M_NOWAIT);
806 if (!(m_new->m_flags & M_EXT)) {
810 m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
813 m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
814 m_new->m_data = m_new->m_ext.ext_buf;
817 m_adj(m_new, ETHER_ALIGN);
819 sc->pcn_cdata.pcn_rx_chain[idx] = m_new;
820 c->pcn_rbaddr = vtophys(mtod(m_new, caddr_t));
821 c->pcn_bufsz = (~(PCN_RXLEN) + 1) & PCN_RXLEN_BUFSZ;
822 c->pcn_bufsz |= PCN_RXLEN_MBO;
823 c->pcn_rxstat = PCN_RXSTAT_STP|PCN_RXSTAT_ENP|PCN_RXSTAT_OWN;
829 * A frame has been uploaded: pass the resulting mbuf chain up to
830 * the higher level protocols.
834 struct pcn_softc *sc;
838 struct pcn_rx_desc *cur_rx;
844 i = sc->pcn_cdata.pcn_rx_prod;
846 while(PCN_OWN_RXDESC(&sc->pcn_ldata->pcn_rx_list[i])) {
847 cur_rx = &sc->pcn_ldata->pcn_rx_list[i];
848 m = sc->pcn_cdata.pcn_rx_chain[i];
849 sc->pcn_cdata.pcn_rx_chain[i] = NULL;
852 * If an error occurs, update stats, clear the
853 * status word and leave the mbuf cluster in place:
854 * it should simply get re-used next time this descriptor
855 * comes up in the ring.
857 if (cur_rx->pcn_rxstat & PCN_RXSTAT_ERR) {
859 pcn_newbuf(sc, i, m);
860 PCN_INC(i, PCN_RX_LIST_CNT);
864 if (pcn_newbuf(sc, i, NULL)) {
865 /* Ran out of mbufs; recycle this one. */
866 pcn_newbuf(sc, i, m);
868 PCN_INC(i, PCN_RX_LIST_CNT);
872 PCN_INC(i, PCN_RX_LIST_CNT);
874 /* No errors; receive the packet. */
876 m->m_len = m->m_pkthdr.len =
877 cur_rx->pcn_rxlen - ETHER_CRC_LEN;
878 m->m_pkthdr.rcvif = ifp;
881 (*ifp->if_input)(ifp, m);
885 sc->pcn_cdata.pcn_rx_prod = i;
891 * A frame was downloaded to the chip. It's safe for us to clean up
897 struct pcn_softc *sc;
899 struct pcn_tx_desc *cur_tx = NULL;
906 * Go through our tx list and free mbufs for those
907 * frames that have been transmitted.
909 idx = sc->pcn_cdata.pcn_tx_cons;
910 while (idx != sc->pcn_cdata.pcn_tx_prod) {
911 cur_tx = &sc->pcn_ldata->pcn_tx_list[idx];
913 if (!PCN_OWN_TXDESC(cur_tx))
916 if (!(cur_tx->pcn_txctl & PCN_TXCTL_ENP)) {
917 sc->pcn_cdata.pcn_tx_cnt--;
918 PCN_INC(idx, PCN_TX_LIST_CNT);
922 if (cur_tx->pcn_txctl & PCN_TXCTL_ERR) {
924 if (cur_tx->pcn_txstat & PCN_TXSTAT_EXDEF)
925 ifp->if_collisions++;
926 if (cur_tx->pcn_txstat & PCN_TXSTAT_RTRY)
927 ifp->if_collisions++;
930 ifp->if_collisions +=
931 cur_tx->pcn_txstat & PCN_TXSTAT_TRC;
934 if (sc->pcn_cdata.pcn_tx_chain[idx] != NULL) {
935 m_freem(sc->pcn_cdata.pcn_tx_chain[idx]);
936 sc->pcn_cdata.pcn_tx_chain[idx] = NULL;
939 sc->pcn_cdata.pcn_tx_cnt--;
940 PCN_INC(idx, PCN_TX_LIST_CNT);
943 if (idx != sc->pcn_cdata.pcn_tx_cons) {
944 /* Some buffers have been freed. */
945 sc->pcn_cdata.pcn_tx_cons = idx;
946 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
948 sc->pcn_timer = (sc->pcn_cdata.pcn_tx_cnt == 0) ? 0 : 5;
957 struct pcn_softc *sc;
958 struct mii_data *mii;
965 mii = device_get_softc(sc->pcn_miibus);
969 if (sc->pcn_link && !(mii->mii_media_status & IFM_ACTIVE))
972 /* link just came up, restart */
973 if (!sc->pcn_link && mii->mii_media_status & IFM_ACTIVE &&
974 IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
976 if (ifp->if_snd.ifq_head != NULL)
977 pcn_start_locked(ifp);
980 if (sc->pcn_timer > 0 && --sc->pcn_timer == 0)
982 callout_reset(&sc->pcn_stat_callout, hz, pcn_tick, sc);
991 struct pcn_softc *sc;
1000 /* Suppress unwanted interrupts */
1001 if (!(ifp->if_flags & IFF_UP)) {
1007 CSR_WRITE_4(sc, PCN_IO32_RAP, PCN_CSR_CSR);
1009 while ((status = CSR_READ_4(sc, PCN_IO32_RDP)) & PCN_CSR_INTR) {
1010 CSR_WRITE_4(sc, PCN_IO32_RDP, status);
1012 if (status & PCN_CSR_RINT)
1015 if (status & PCN_CSR_TINT)
1018 if (status & PCN_CSR_ERR) {
1019 pcn_init_locked(sc);
1024 if (ifp->if_snd.ifq_head != NULL)
1025 pcn_start_locked(ifp);
1032 * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data
1033 * pointers to the fragment pointers.
1036 pcn_encap(sc, m_head, txidx)
1037 struct pcn_softc *sc;
1038 struct mbuf *m_head;
1041 struct pcn_tx_desc *f = NULL;
1043 int frag, cur, cnt = 0;
1046 * Start packing the mbufs in this chain into
1047 * the fragment pointers. Stop when we run out
1048 * of fragments or hit the end of the mbuf chain.
1051 cur = frag = *txidx;
1053 for (m = m_head; m != NULL; m = m->m_next) {
1057 if ((PCN_TX_LIST_CNT - (sc->pcn_cdata.pcn_tx_cnt + cnt)) < 2)
1059 f = &sc->pcn_ldata->pcn_tx_list[frag];
1060 f->pcn_txctl = (~(m->m_len) + 1) & PCN_TXCTL_BUFSZ;
1061 f->pcn_txctl |= PCN_TXCTL_MBO;
1062 f->pcn_tbaddr = vtophys(mtod(m, vm_offset_t));
1064 f->pcn_txctl |= PCN_TXCTL_STP;
1066 f->pcn_txctl |= PCN_TXCTL_OWN;
1068 PCN_INC(frag, PCN_TX_LIST_CNT);
1075 sc->pcn_cdata.pcn_tx_chain[cur] = m_head;
1076 sc->pcn_ldata->pcn_tx_list[cur].pcn_txctl |=
1077 PCN_TXCTL_ENP|PCN_TXCTL_ADD_FCS|PCN_TXCTL_MORE_LTINT;
1078 sc->pcn_ldata->pcn_tx_list[*txidx].pcn_txctl |= PCN_TXCTL_OWN;
1079 sc->pcn_cdata.pcn_tx_cnt += cnt;
1086 * Main transmit routine. To avoid having to do mbuf copies, we put pointers
1087 * to the mbuf data regions directly in the transmit lists. We also save a
1088 * copy of the pointers since the transmit list fragment pointers are
1089 * physical addresses.
1095 struct pcn_softc *sc;
1099 pcn_start_locked(ifp);
1104 pcn_start_locked(ifp)
1107 struct pcn_softc *sc;
1108 struct mbuf *m_head = NULL;
1113 PCN_LOCK_ASSERT(sc);
1118 idx = sc->pcn_cdata.pcn_tx_prod;
1120 if (ifp->if_drv_flags & IFF_DRV_OACTIVE)
1123 while(sc->pcn_cdata.pcn_tx_chain[idx] == NULL) {
1124 IF_DEQUEUE(&ifp->if_snd, m_head);
1128 if (pcn_encap(sc, m_head, &idx)) {
1129 IF_PREPEND(&ifp->if_snd, m_head);
1130 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1135 * If there's a BPF listener, bounce a copy of this frame
1138 BPF_MTAP(ifp, m_head);
1143 sc->pcn_cdata.pcn_tx_prod = idx;
1144 pcn_csr_write(sc, PCN_CSR_CSR, PCN_CSR_TX|PCN_CSR_INTEN);
1147 * Set a timeout in case the chip goes out to lunch.
1158 struct pcn_softc *sc;
1162 /* If we want promiscuous mode, set the allframes bit. */
1163 if (ifp->if_flags & IFF_PROMISC) {
1164 PCN_CSR_SETBIT(sc, PCN_CSR_MODE, PCN_MODE_PROMISC);
1166 PCN_CSR_CLRBIT(sc, PCN_CSR_MODE, PCN_MODE_PROMISC);
1169 /* Set the capture broadcast bit to capture broadcast frames. */
1170 if (ifp->if_flags & IFF_BROADCAST) {
1171 PCN_CSR_CLRBIT(sc, PCN_CSR_MODE, PCN_MODE_RXNOBROAD);
1173 PCN_CSR_SETBIT(sc, PCN_CSR_MODE, PCN_MODE_RXNOBROAD);
1183 struct pcn_softc *sc = xsc;
1186 pcn_init_locked(sc);
1192 struct pcn_softc *sc;
1194 struct ifnet *ifp = sc->pcn_ifp;
1195 struct mii_data *mii = NULL;
1196 struct ifmedia_entry *ife;
1198 PCN_LOCK_ASSERT(sc);
1201 * Cancel pending I/O and free all RX/TX buffers.
1206 mii = device_get_softc(sc->pcn_miibus);
1207 ife = mii->mii_media.ifm_cur;
1209 /* Set MAC address */
1210 pcn_csr_write(sc, PCN_CSR_PAR0,
1211 ((u_int16_t *)IF_LLADDR(sc->pcn_ifp))[0]);
1212 pcn_csr_write(sc, PCN_CSR_PAR1,
1213 ((u_int16_t *)IF_LLADDR(sc->pcn_ifp))[1]);
1214 pcn_csr_write(sc, PCN_CSR_PAR2,
1215 ((u_int16_t *)IF_LLADDR(sc->pcn_ifp))[2]);
1217 /* Init circular RX list. */
1218 if (pcn_list_rx_init(sc) == ENOBUFS) {
1219 if_printf(ifp, "initialization failed: no "
1220 "memory for rx buffers\n");
1226 * Init tx descriptors.
1228 pcn_list_tx_init(sc);
1230 /* Clear PCN_MISC_ASEL so we can set the port via PCN_CSR_MODE. */
1231 PCN_BCR_CLRBIT(sc, PCN_BCR_MISCCFG, PCN_MISC_ASEL);
1234 * Set up the port based on the currently selected media.
1235 * For Am79C978 we've to unconditionally set PCN_PORT_MII and
1236 * set the PHY in PCN_BCR_PHYSEL instead.
1238 if (sc->pcn_type != Am79C978 &&
1239 IFM_INST(ife->ifm_media) == sc->pcn_inst_10bt)
1240 pcn_csr_write(sc, PCN_CSR_MODE, PCN_PORT_10BASET);
1242 pcn_csr_write(sc, PCN_CSR_MODE, PCN_PORT_MII);
1244 /* Set up RX filter. */
1248 * Load the multicast filter.
1253 * Load the addresses of the RX and TX lists.
1255 pcn_csr_write(sc, PCN_CSR_RXADDR0,
1256 vtophys(&sc->pcn_ldata->pcn_rx_list[0]) & 0xFFFF);
1257 pcn_csr_write(sc, PCN_CSR_RXADDR1,
1258 (vtophys(&sc->pcn_ldata->pcn_rx_list[0]) >> 16) & 0xFFFF);
1259 pcn_csr_write(sc, PCN_CSR_TXADDR0,
1260 vtophys(&sc->pcn_ldata->pcn_tx_list[0]) & 0xFFFF);
1261 pcn_csr_write(sc, PCN_CSR_TXADDR1,
1262 (vtophys(&sc->pcn_ldata->pcn_tx_list[0]) >> 16) & 0xFFFF);
1264 /* Set the RX and TX ring sizes. */
1265 pcn_csr_write(sc, PCN_CSR_RXRINGLEN, (~PCN_RX_LIST_CNT) + 1);
1266 pcn_csr_write(sc, PCN_CSR_TXRINGLEN, (~PCN_TX_LIST_CNT) + 1);
1268 /* We're not using the initialization block. */
1269 pcn_csr_write(sc, PCN_CSR_IAB1, 0);
1271 /* Enable fast suspend mode. */
1272 PCN_CSR_SETBIT(sc, PCN_CSR_EXTCTL2, PCN_EXTCTL2_FASTSPNDE);
1275 * Enable burst read and write. Also set the no underflow
1276 * bit. This will avoid transmit underruns in certain
1277 * conditions while still providing decent performance.
1279 PCN_BCR_SETBIT(sc, PCN_BCR_BUSCTL, PCN_BUSCTL_NOUFLOW|
1280 PCN_BUSCTL_BREAD|PCN_BUSCTL_BWRITE);
1282 /* Enable graceful recovery from underflow. */
1283 PCN_CSR_SETBIT(sc, PCN_CSR_IMR, PCN_IMR_DXSUFLO);
1285 /* Enable auto-padding of short TX frames. */
1286 PCN_CSR_SETBIT(sc, PCN_CSR_TFEAT, PCN_TFEAT_PAD_TX);
1288 /* Disable MII autoneg (we handle this ourselves). */
1289 PCN_BCR_SETBIT(sc, PCN_BCR_MIICTL, PCN_MIICTL_DANAS);
1291 if (sc->pcn_type == Am79C978)
1292 /* XXX support other PHYs? */
1293 pcn_bcr_write(sc, PCN_BCR_PHYSEL,
1294 PCN_PHYSEL_PCNET|PCN_PHY_HOMEPNA);
1296 /* Enable interrupts and start the controller running. */
1297 pcn_csr_write(sc, PCN_CSR_CSR, PCN_CSR_INTEN|PCN_CSR_START);
1301 ifp->if_drv_flags |= IFF_DRV_RUNNING;
1302 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1304 callout_reset(&sc->pcn_stat_callout, hz, pcn_tick, sc);
1310 * Set media options.
1313 pcn_ifmedia_upd(ifp)
1316 struct pcn_softc *sc;
1323 * At least Am79C971 with DP83840A can wedge when switching
1324 * from the internal 10baseT PHY to the external PHY without
1325 * issuing pcn_reset(). For setting the port in PCN_CSR_MODE
1326 * the PCnet chip has to be powered down or stopped anyway
1327 * and although documented otherwise it doesn't take effect
1328 * until the next initialization.
1333 pcn_init_locked(sc);
1334 if (ifp->if_snd.ifq_head != NULL)
1335 pcn_start_locked(ifp);
1343 * Report current media status.
1346 pcn_ifmedia_sts(ifp, ifmr)
1348 struct ifmediareq *ifmr;
1350 struct pcn_softc *sc;
1351 struct mii_data *mii;
1355 mii = device_get_softc(sc->pcn_miibus);
1358 ifmr->ifm_active = mii->mii_media_active;
1359 ifmr->ifm_status = mii->mii_media_status;
1366 pcn_ioctl(ifp, command, data)
1371 struct pcn_softc *sc = ifp->if_softc;
1372 struct ifreq *ifr = (struct ifreq *) data;
1373 struct mii_data *mii = NULL;
1379 if (ifp->if_flags & IFF_UP) {
1380 if (ifp->if_drv_flags & IFF_DRV_RUNNING &&
1381 ifp->if_flags & IFF_PROMISC &&
1382 !(sc->pcn_if_flags & IFF_PROMISC)) {
1383 PCN_CSR_SETBIT(sc, PCN_CSR_EXTCTL1,
1386 PCN_CSR_CLRBIT(sc, PCN_CSR_EXTCTL1,
1388 pcn_csr_write(sc, PCN_CSR_CSR,
1389 PCN_CSR_INTEN|PCN_CSR_START);
1390 } else if (ifp->if_drv_flags & IFF_DRV_RUNNING &&
1391 !(ifp->if_flags & IFF_PROMISC) &&
1392 sc->pcn_if_flags & IFF_PROMISC) {
1393 PCN_CSR_SETBIT(sc, PCN_CSR_EXTCTL1,
1396 PCN_CSR_CLRBIT(sc, PCN_CSR_EXTCTL1,
1398 pcn_csr_write(sc, PCN_CSR_CSR,
1399 PCN_CSR_INTEN|PCN_CSR_START);
1400 } else if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
1401 pcn_init_locked(sc);
1403 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1406 sc->pcn_if_flags = ifp->if_flags;
1419 mii = device_get_softc(sc->pcn_miibus);
1420 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command);
1423 error = ether_ioctl(ifp, command, data);
1431 pcn_watchdog(struct pcn_softc *sc)
1435 PCN_LOCK_ASSERT(sc);
1439 if_printf(ifp, "watchdog timeout\n");
1443 pcn_init_locked(sc);
1445 if (ifp->if_snd.ifq_head != NULL)
1446 pcn_start_locked(ifp);
1450 * Stop the adapter and free any mbufs allocated to the
1454 pcn_stop(struct pcn_softc *sc)
1459 PCN_LOCK_ASSERT(sc);
1463 callout_stop(&sc->pcn_stat_callout);
1465 /* Turn off interrupts */
1466 PCN_CSR_CLRBIT(sc, PCN_CSR_CSR, PCN_CSR_INTEN);
1468 PCN_CSR_SETBIT(sc, PCN_CSR_CSR, PCN_CSR_STOP);
1472 * Free data in the RX lists.
1474 for (i = 0; i < PCN_RX_LIST_CNT; i++) {
1475 if (sc->pcn_cdata.pcn_rx_chain[i] != NULL) {
1476 m_freem(sc->pcn_cdata.pcn_rx_chain[i]);
1477 sc->pcn_cdata.pcn_rx_chain[i] = NULL;
1480 bzero((char *)&sc->pcn_ldata->pcn_rx_list,
1481 sizeof(sc->pcn_ldata->pcn_rx_list));
1484 * Free the TX list buffers.
1486 for (i = 0; i < PCN_TX_LIST_CNT; i++) {
1487 if (sc->pcn_cdata.pcn_tx_chain[i] != NULL) {
1488 m_freem(sc->pcn_cdata.pcn_tx_chain[i]);
1489 sc->pcn_cdata.pcn_tx_chain[i] = NULL;
1493 bzero((char *)&sc->pcn_ldata->pcn_tx_list,
1494 sizeof(sc->pcn_ldata->pcn_tx_list));
1496 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
1502 * Stop all chip I/O so that the kernel's probe routines don't
1503 * get confused by errant DMAs when rebooting.
1506 pcn_shutdown(device_t dev)
1508 struct pcn_softc *sc;
1510 sc = device_get_softc(dev);