2 * Copyright (c) 1995, 1996 Matt Thomas <matt@3am-software.com>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. The name of the author may not be used to endorse or promote products
11 * derived from this software without specific prior written permission
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * DEC PDQ FDDI Controller
30 * This module support the DEFEA EISA FDDI Controller.
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/socket.h>
38 #include <sys/module.h>
41 #include <machine/bus.h>
42 #include <machine/resource.h>
46 #include <net/if_media.h>
49 #include <dev/eisa/eisaconf.h>
51 #include <dev/pdq/pdq_freebsd.h>
52 #include <dev/pdq/pdqreg.h>
54 static void pdq_eisa_subprobe (pdq_bus_t, u_int32_t, u_int32_t *, u_int32_t *, u_int32_t *);
55 static void pdq_eisa_devinit (pdq_softc_t *);
56 static const char * pdq_eisa_match (eisa_id_t);
58 static int pdq_eisa_probe (device_t);
59 static int pdq_eisa_attach (device_t);
60 static int pdq_eisa_detach (device_t);
61 static int pdq_eisa_shutdown (device_t);
62 static void pdq_eisa_ifintr (void *);
64 #define DEFEA_IRQS 0x0000FBA9U
66 #define DEFEA_INTRENABLE 0x8 /* level interrupt */
67 #define DEFEA_DECODE_IRQ(n) ((DEFEA_IRQS >> ((n) << 2)) & 0x0f)
69 #define EISA_DEVICE_ID_DEC_DEC3001 0x10a33001
70 #define EISA_DEVICE_ID_DEC_DEC3002 0x10a33002
71 #define EISA_DEVICE_ID_DEC_DEC3003 0x10a33003
72 #define EISA_DEVICE_ID_DEC_DEC3004 0x10a33004
75 pdq_eisa_subprobe(bc, iobase, maddr, msize, irq)
83 *irq = DEFEA_DECODE_IRQ(PDQ_OS_IORD_8(bc, iobase, PDQ_EISA_IO_CONFIG_STAT_0) & 3);
84 *maddr = (PDQ_OS_IORD_8(bc, iobase, PDQ_EISA_MEM_ADD_CMP_0) << 8)
85 | (PDQ_OS_IORD_8(bc, iobase, PDQ_EISA_MEM_ADD_CMP_1) << 16);
86 *msize = (PDQ_OS_IORD_8(bc, iobase, PDQ_EISA_MEM_ADD_MASK_0) + 4) << 8;
98 * Do the standard initialization for the DEFEA registers.
100 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_FUNCTION_CTRL, 0x23);
101 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_IO_CMP_1_1, (sc->io_bsh >> 8) & 0xF0);
102 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_IO_CMP_0_1, (sc->io_bsh >> 8) & 0xF0);
103 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_SLOT_CTRL, 0x01);
104 data = PDQ_OS_IORD_8(sc->io_bst, sc->io_bsh, PDQ_EISA_BURST_HOLDOFF);
105 #if defined(PDQ_IOMAPPED)
106 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_BURST_HOLDOFF, data & ~1);
108 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_BURST_HOLDOFF, data | 1);
110 data = PDQ_OS_IORD_8(sc->io_bst, sc->io_bsh, PDQ_EISA_IO_CONFIG_STAT_0);
111 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_IO_CONFIG_STAT_0, data | DEFEA_INTRENABLE);
117 pdq_eisa_match (type)
121 case EISA_DEVICE_ID_DEC_DEC3001:
122 case EISA_DEVICE_ID_DEC_DEC3002:
123 case EISA_DEVICE_ID_DEC_DEC3003:
124 case EISA_DEVICE_ID_DEC_DEC3004:
125 return ("DEC FDDIcontroller/EISA Adapter");
143 u_int32_t eisa_id = eisa_get_id(dev);;
145 desc = pdq_eisa_match(eisa_id);
150 device_set_desc(dev, desc);
152 iobase = eisa_get_slot(dev) * EISA_SLOT_SIZE;
153 pdq_eisa_subprobe((pdq_bus_t)SYS_RES_IOPORT, iobase, &maddr, &msize, &irq);
155 eisa_add_iospace(dev, iobase, 0x200, RESVADDR_NONE);
156 eisa_add_mspace(dev, maddr, msize, RESVADDR_NONE);
157 eisa_add_intr(dev, irq, EISA_TRIGGER_LEVEL);
170 sc = device_get_softc(dev);
173 (void) pdq_interrupt(sc->sc_pdq);
180 pdq_eisa_attach (dev)
187 sc = device_get_softc(dev);
193 sc->io_type = SYS_RES_IOPORT;
194 sc->io = bus_alloc_resource_any(dev, sc->io_type, &sc->io_rid,
197 device_printf(dev, "Unable to allocate I/O space resource.\n");
201 sc->io_bsh = rman_get_bushandle(sc->io);
202 sc->io_bst = rman_get_bustag(sc->io);
205 sc->mem_type = SYS_RES_MEMORY;
206 sc->mem = bus_alloc_resource_any(dev, sc->mem_type, &sc->mem_rid,
209 device_printf(dev, "Unable to allocate memory resource.\n");
213 sc->mem_bsh = rman_get_bushandle(sc->mem);
214 sc->mem_bst = rman_get_bustag(sc->mem);
217 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid,
218 RF_SHAREABLE | RF_ACTIVE);
220 device_printf(dev, "Unable to allocate interrupt resource.\n");
225 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
227 pdq_eisa_devinit(sc);
228 sc->sc_pdq = pdq_initialize(sc->mem_bst, sc->mem_bsh,
230 (void *)sc, PDQ_DEFEA);
231 if (sc->sc_pdq == NULL) {
232 device_printf(dev, "Initialization failed.\n");
237 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET,
238 NULL, pdq_eisa_ifintr, dev, &sc->irq_ih);
240 device_printf(dev, "Failed to setup interrupt handler.\n");
245 pdq_ifattach(sc, sc->sc_pdq->pdq_hwaddr.lanaddr_bytes);
254 pdq_eisa_detach (dev)
259 sc = device_get_softc(dev);
266 pdq_eisa_shutdown(dev)
271 sc = device_get_softc(dev);
272 pdq_hwreset(sc->sc_pdq);
277 static device_method_t pdq_eisa_methods[] = {
278 DEVMETHOD(device_probe, pdq_eisa_probe),
279 DEVMETHOD(device_attach, pdq_eisa_attach),
280 DEVMETHOD(device_attach, pdq_eisa_detach),
281 DEVMETHOD(device_shutdown, pdq_eisa_shutdown),
286 static driver_t pdq_eisa_driver = {
292 DRIVER_MODULE(fea, eisa, pdq_eisa_driver, pdq_devclass, 0, 0);
293 /* MODULE_DEPEND(fea, eisa, 1, 1, 1); */
294 MODULE_DEPEND(fea, fddi, 1, 1, 1);