2 * Copyright (c) 1995, 1996 Matt Thomas <matt@3am-software.com>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. The name of the author may not be used to endorse or promote products
11 * derived from this software without specific prior written permission
13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
18 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
19 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
20 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
21 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
22 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * DEC PDQ FDDI Controller
30 * This module support the DEFEA EISA FDDI Controller.
33 #include <sys/param.h>
34 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 #include <sys/socket.h>
38 #include <sys/module.h>
39 #include <sys/mutex.h>
42 #include <machine/bus.h>
43 #include <machine/resource.h>
47 #include <net/if_var.h>
48 #include <net/if_media.h>
51 #include <dev/eisa/eisaconf.h>
53 #include <dev/pdq/pdq_freebsd.h>
54 #include <dev/pdq/pdqreg.h>
56 static void pdq_eisa_subprobe (pdq_bus_t, u_int32_t, u_int32_t *, u_int32_t *, u_int32_t *);
57 static void pdq_eisa_devinit (pdq_softc_t *);
58 static const char * pdq_eisa_match (eisa_id_t);
60 static int pdq_eisa_probe (device_t);
61 static int pdq_eisa_attach (device_t);
62 static int pdq_eisa_detach (device_t);
63 static int pdq_eisa_shutdown (device_t);
64 static void pdq_eisa_ifintr (void *);
66 #define DEFEA_IRQS 0x0000FBA9U
68 #define DEFEA_INTRENABLE 0x8 /* level interrupt */
69 #define DEFEA_DECODE_IRQ(n) ((DEFEA_IRQS >> ((n) << 2)) & 0x0f)
71 #define EISA_DEVICE_ID_DEC_DEC3001 0x10a33001
72 #define EISA_DEVICE_ID_DEC_DEC3002 0x10a33002
73 #define EISA_DEVICE_ID_DEC_DEC3003 0x10a33003
74 #define EISA_DEVICE_ID_DEC_DEC3004 0x10a33004
77 pdq_eisa_subprobe(bc, iobase, maddr, msize, irq)
85 *irq = DEFEA_DECODE_IRQ(PDQ_OS_IORD_8(bc, iobase, PDQ_EISA_IO_CONFIG_STAT_0) & 3);
86 *maddr = (PDQ_OS_IORD_8(bc, iobase, PDQ_EISA_MEM_ADD_CMP_0) << 8)
87 | (PDQ_OS_IORD_8(bc, iobase, PDQ_EISA_MEM_ADD_CMP_1) << 16);
88 *msize = (PDQ_OS_IORD_8(bc, iobase, PDQ_EISA_MEM_ADD_MASK_0) + 4) << 8;
100 * Do the standard initialization for the DEFEA registers.
102 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_FUNCTION_CTRL, 0x23);
103 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_IO_CMP_1_1, (sc->io_bsh >> 8) & 0xF0);
104 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_IO_CMP_0_1, (sc->io_bsh >> 8) & 0xF0);
105 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_SLOT_CTRL, 0x01);
106 data = PDQ_OS_IORD_8(sc->io_bst, sc->io_bsh, PDQ_EISA_BURST_HOLDOFF);
107 #if defined(PDQ_IOMAPPED)
108 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_BURST_HOLDOFF, data & ~1);
110 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_BURST_HOLDOFF, data | 1);
112 data = PDQ_OS_IORD_8(sc->io_bst, sc->io_bsh, PDQ_EISA_IO_CONFIG_STAT_0);
113 PDQ_OS_IOWR_8(sc->io_bst, sc->io_bsh, PDQ_EISA_IO_CONFIG_STAT_0, data | DEFEA_INTRENABLE);
119 pdq_eisa_match (type)
123 case EISA_DEVICE_ID_DEC_DEC3001:
124 case EISA_DEVICE_ID_DEC_DEC3002:
125 case EISA_DEVICE_ID_DEC_DEC3003:
126 case EISA_DEVICE_ID_DEC_DEC3004:
127 return ("DEC FDDIcontroller/EISA Adapter");
145 u_int32_t eisa_id = eisa_get_id(dev);
147 desc = pdq_eisa_match(eisa_id);
152 device_set_desc(dev, desc);
154 iobase = eisa_get_slot(dev) * EISA_SLOT_SIZE;
155 pdq_eisa_subprobe((pdq_bus_t)SYS_RES_IOPORT, iobase, &maddr, &msize, &irq);
157 eisa_add_iospace(dev, iobase, 0x200, RESVADDR_NONE);
158 eisa_add_mspace(dev, maddr, msize, RESVADDR_NONE);
159 eisa_add_intr(dev, irq, EISA_TRIGGER_LEVEL);
173 (void) pdq_interrupt(sc->sc_pdq);
180 pdq_eisa_attach (dev)
186 sc = device_get_softc(dev);
191 sc->io_type = SYS_RES_IOPORT;
192 sc->io = bus_alloc_resource_any(dev, sc->io_type, &sc->io_rid,
195 device_printf(dev, "Unable to allocate I/O space resource.\n");
199 sc->io_bsh = rman_get_bushandle(sc->io);
200 sc->io_bst = rman_get_bustag(sc->io);
203 sc->mem_type = SYS_RES_MEMORY;
204 sc->mem = bus_alloc_resource_any(dev, sc->mem_type, &sc->mem_rid,
207 device_printf(dev, "Unable to allocate memory resource.\n");
211 sc->mem_bsh = rman_get_bushandle(sc->mem);
212 sc->mem_bst = rman_get_bustag(sc->mem);
215 sc->irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irq_rid,
216 RF_SHAREABLE | RF_ACTIVE);
218 device_printf(dev, "Unable to allocate interrupt resource.\n");
223 pdq_eisa_devinit(sc);
224 error = pdq_ifattach(sc, sc->sc_pdq->pdq_hwaddr.lanaddr_bytes,
229 error = bus_setup_intr(dev, sc->irq, INTR_TYPE_NET | INTR_MPSAFE,
230 NULL, pdq_eisa_ifintr, sc, &sc->irq_ih);
232 device_printf(dev, "Failed to setup interrupt handler.\n");
244 pdq_eisa_detach (dev)
249 sc = device_get_softc(dev);
256 pdq_eisa_shutdown(dev)
261 sc = device_get_softc(dev);
263 pdq_hwreset(sc->sc_pdq);
269 static device_method_t pdq_eisa_methods[] = {
270 DEVMETHOD(device_probe, pdq_eisa_probe),
271 DEVMETHOD(device_attach, pdq_eisa_attach),
272 DEVMETHOD(device_attach, pdq_eisa_detach),
273 DEVMETHOD(device_shutdown, pdq_eisa_shutdown),
278 static driver_t pdq_eisa_driver = {
284 DRIVER_MODULE(fea, eisa, pdq_eisa_driver, pdq_devclass, 0, 0);
285 /* MODULE_DEPEND(fea, eisa, 1, 1, 1); */
286 MODULE_DEPEND(fea, fddi, 1, 1, 1);