sys/dev/powermac_nvram/powermac_nvram.c

   1 /*-
   2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
   3  *
   4  * Copyright (c) 2006 Maxim Sobolev <sobomax@FreeBSD.org>
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright
  13  *    notice, this list of conditions and the following disclaimer in the
  14  *    documentation and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  18  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  25  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  26  * POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * $FreeBSD$
  29  */
  30
  31 #include <sys/param.h>
  32 #include <sys/systm.h>
  33 #include <sys/module.h>
  34 #include <sys/bus.h>
  35 #include <sys/conf.h>
  36 #include <sys/kernel.h>
  37 #include <sys/uio.h>
  38
  39 #include <dev/ofw/openfirm.h>
  40 #include <dev/ofw/ofw_bus.h>
  41 #include <dev/ofw/ofw_bus_subr.h>
  42
  43 #include <machine/bus.h>
  44 #include <machine/md_var.h>
  45 #include <machine/pio.h>
  46 #include <machine/resource.h>
  47
  48 #include <sys/rman.h>
  49
  50 #include <dev/powermac_nvram/powermac_nvramvar.h>
  51
  52 #include <vm/vm.h>
  53 #include <vm/pmap.h>
  54
  55 /*
  56  * Device interface.
  57  */
  58 static int              powermac_nvram_probe(device_t);
  59 static int              powermac_nvram_attach(device_t);
  60 static int              powermac_nvram_detach(device_t);
  61
  62 /* Helper functions */
  63 static int              powermac_nvram_check(void *data);
  64 static int              chrp_checksum(int sum, uint8_t *, uint8_t *);
  65 static uint32_t         adler_checksum(uint8_t *, int);
  66 static int              erase_bank(device_t, uint8_t *);
  67 static int              write_bank(device_t, uint8_t *, uint8_t *);
  68
  69 /*
  70  * Driver methods.
  71  */
  72 static device_method_t  powermac_nvram_methods[] = {
  73         /* Device interface */
  74         DEVMETHOD(device_probe,         powermac_nvram_probe),
  75         DEVMETHOD(device_attach,        powermac_nvram_attach),
  76         DEVMETHOD(device_detach,        powermac_nvram_detach),
  77
  78         { 0, 0 }
  79 };
  80
  81 static driver_t powermac_nvram_driver = {
  82         "powermac_nvram",
  83         powermac_nvram_methods,
  84         sizeof(struct powermac_nvram_softc)
  85 };
  86
  87 static devclass_t powermac_nvram_devclass;
  88
  89 DRIVER_MODULE(powermac_nvram, ofwbus, powermac_nvram_driver, powermac_nvram_devclass, 0, 0);
  90
  91 /*
  92  * Cdev methods.
  93  */
  94
  95 static  d_open_t        powermac_nvram_open;
  96 static  d_close_t       powermac_nvram_close;
  97 static  d_read_t        powermac_nvram_read;
  98 static  d_write_t       powermac_nvram_write;
  99
 100 static struct cdevsw powermac_nvram_cdevsw = {
 101         .d_version =    D_VERSION,
 102         .d_flags =      D_NEEDGIANT,
 103         .d_open =       powermac_nvram_open,
 104         .d_close =      powermac_nvram_close,
 105         .d_read =       powermac_nvram_read,
 106         .d_write =      powermac_nvram_write,
 107         .d_name =       "powermac_nvram",
 108 };
 109
 110 static int
 111 powermac_nvram_probe(device_t dev)
 112 {
 113         const char      *type, *compatible;
 114
 115         type = ofw_bus_get_type(dev);
 116         compatible = ofw_bus_get_compat(dev);
 117
 118         if (type == NULL || compatible == NULL)
 119                 return ENXIO;
 120
 121         if (strcmp(type, "nvram") != 0)
 122                 return ENXIO;
 123         if (strcmp(compatible, "amd-0137") != 0 &&
 124             !ofw_bus_is_compatible(dev, "nvram,flash"))
 125                 return ENXIO;
 126
 127         device_set_desc(dev, "Apple NVRAM");
 128         return 0;
 129 }
 130
 131 static int
 132 powermac_nvram_attach(device_t dev)
 133 {
 134         struct powermac_nvram_softc *sc;
 135         const char      *compatible;
 136         phandle_t node;
 137         u_int32_t reg[3];
 138         int gen0, gen1, i;
 139
 140         node = ofw_bus_get_node(dev);
 141         sc = device_get_softc(dev);
 142
 143         if ((i = OF_getprop(node, "reg", reg, sizeof(reg))) < 8)
 144                 return ENXIO;
 145
 146         sc->sc_dev = dev;
 147         sc->sc_node = node;
 148
 149         compatible = ofw_bus_get_compat(dev);
 150         if (strcmp(compatible, "amd-0137") == 0)
 151                 sc->sc_type = FLASH_TYPE_AMD;
 152         else
 153                 sc->sc_type = FLASH_TYPE_SM;
 154
 155         /*
 156          * Find which byte of reg corresponds to the 32-bit physical address.
 157          * We should probably read #address-cells from /chosen instead.
 158          */
 159         i = (i/4) - 2;
 160
 161         sc->sc_bank0 = (vm_offset_t)pmap_mapdev(reg[i], NVRAM_SIZE * 2);
 162         sc->sc_bank1 = sc->sc_bank0 + NVRAM_SIZE;
 163
 164         gen0 = powermac_nvram_check((void *)sc->sc_bank0);
 165         gen1 = powermac_nvram_check((void *)sc->sc_bank1);
 166
 167         if (gen0 == -1 && gen1 == -1) {
 168                 if ((void *)sc->sc_bank0 != NULL)
 169                         pmap_unmapdev(sc->sc_bank0, NVRAM_SIZE * 2);
 170                 device_printf(dev, "both banks appear to be corrupt\n");
 171                 return ENXIO;
 172         }
 173         device_printf(dev, "bank0 generation %d, bank1 generation %d\n",
 174             gen0, gen1);
 175
 176         sc->sc_bank = (gen0 > gen1) ? sc->sc_bank0 : sc->sc_bank1;
 177         bcopy((void *)sc->sc_bank, (void *)sc->sc_data, NVRAM_SIZE);
 178
 179         sc->sc_cdev = make_dev(&powermac_nvram_cdevsw, 0, 0, 0, 0600,
 180             "powermac_nvram");
 181         sc->sc_cdev->si_drv1 = sc;
 182
 183         return 0;
 184 }
 185
 186 static int
 187 powermac_nvram_detach(device_t dev)
 188 {
 189         struct powermac_nvram_softc *sc;
 190
 191         sc = device_get_softc(dev);
 192
 193         if ((void *)sc->sc_bank0 != NULL)
 194                 pmap_unmapdev(sc->sc_bank0, NVRAM_SIZE * 2);
 195
 196         if (sc->sc_cdev != NULL)
 197                 destroy_dev(sc->sc_cdev);
 198
 199         return 0;
 200 }
 201
 202 static int
 203 powermac_nvram_open(struct cdev *dev, int flags, int fmt, struct thread *td)
 204 {
 205         struct powermac_nvram_softc *sc = dev->si_drv1;
 206
 207         if (sc->sc_isopen)
 208                 return EBUSY;
 209         sc->sc_isopen = 1;
 210         sc->sc_rpos = sc->sc_wpos = 0;
 211         return 0;
 212 }
 213
 214 static int
 215 powermac_nvram_close(struct cdev *dev, int fflag, int devtype, struct thread *td)
 216 {
 217         struct powermac_nvram_softc *sc = dev->si_drv1;
 218         struct core99_header *header;
 219         vm_offset_t bank;
 220
 221         if (sc->sc_wpos != sizeof(sc->sc_data)) {
 222                 /* Short write, restore in-memory copy */
 223                 bcopy((void *)sc->sc_bank, (void *)sc->sc_data, NVRAM_SIZE);
 224                 sc->sc_isopen = 0;
 225                 return 0;
 226         }
 227
 228         header = (struct core99_header *)sc->sc_data;
 229
 230         header->generation = ((struct core99_header *)sc->sc_bank)->generation;
 231         header->generation++;
 232         header->chrp_header.signature = CORE99_SIGNATURE;
 233
 234         header->adler_checksum =
 235             adler_checksum((uint8_t *)&(header->generation),
 236             NVRAM_SIZE - offsetof(struct core99_header, generation));
 237         header->chrp_header.chrp_checksum = chrp_checksum(header->chrp_header.signature,
 238             (uint8_t *)&(header->chrp_header.length),
 239             (uint8_t *)&(header->adler_checksum));
 240
 241         bank = (sc->sc_bank == sc->sc_bank0) ? sc->sc_bank1 : sc->sc_bank0;
 242         if (erase_bank(sc->sc_dev, (uint8_t *)bank) != 0 ||
 243             write_bank(sc->sc_dev, (uint8_t *)bank, sc->sc_data) != 0) {
 244                 sc->sc_isopen = 0;
 245                 return ENOSPC;
 246         }
 247         sc->sc_bank = bank;
 248         sc->sc_isopen = 0;
 249         return 0;
 250 }
 251
 252 static int
 253 powermac_nvram_read(struct cdev *dev, struct uio *uio, int ioflag)
 254 {
 255         int rv, amnt, data_available;
 256         struct powermac_nvram_softc *sc = dev->si_drv1;
 257
 258         rv = 0;
 259         while (uio->uio_resid > 0) {
 260                 data_available = sizeof(sc->sc_data) - sc->sc_rpos;
 261                 if (data_available > 0) {
 262                         amnt = MIN(uio->uio_resid, data_available);
 263                         rv = uiomove((void *)(sc->sc_data + sc->sc_rpos),
 264                             amnt, uio);
 265                         if (rv != 0)
 266                                 break;
 267                         sc->sc_rpos += amnt;
 268                 } else {
 269                         break;
 270                 }
 271         }
 272         return rv;
 273 }
 274
 275 static int
 276 powermac_nvram_write(struct cdev *dev, struct uio *uio, int ioflag)
 277 {
 278         int rv, amnt, data_available;
 279         struct powermac_nvram_softc *sc = dev->si_drv1;
 280
 281         if (sc->sc_wpos >= sizeof(sc->sc_data))
 282                 return EINVAL;
 283
 284         rv = 0;
 285         while (uio->uio_resid > 0) {
 286                 data_available = sizeof(sc->sc_data) - sc->sc_wpos;
 287                 if (data_available > 0) {
 288                         amnt = MIN(uio->uio_resid, data_available);
 289                         rv = uiomove((void *)(sc->sc_data + sc->sc_wpos),
 290                             amnt, uio);
 291                         if (rv != 0)
 292                                 break;
 293                         sc->sc_wpos += amnt;
 294                 } else {
 295                         break;
 296                 }
 297         }
 298         return rv;
 299 }
 300
 301 static int
 302 powermac_nvram_check(void *data)
 303 {
 304         struct core99_header *header;
 305
 306         header = (struct core99_header *)data;
 307
 308         if (header->chrp_header.signature != CORE99_SIGNATURE)
 309                 return -1;
 310         if (header->chrp_header.chrp_checksum !=
 311             chrp_checksum(header->chrp_header.signature,
 312             (uint8_t *)&(header->chrp_header.length),
 313             (uint8_t *)&(header->adler_checksum)))
 314                 return -1;
 315         if (header->adler_checksum !=
 316             adler_checksum((uint8_t *)&(header->generation),
 317             NVRAM_SIZE - offsetof(struct core99_header, generation)))
 318                 return -1;
 319         return header->generation;
 320 }
 321
 322 static int
 323 chrp_checksum(int sum, uint8_t *data, uint8_t *end)
 324 {
 325
 326         for (; data < end; data++)
 327                 sum += data[0];
 328         while (sum > 0xff)
 329                 sum = (sum & 0xff) + (sum >> 8);
 330         return sum;
 331 }
 332
 333 static uint32_t
 334 adler_checksum(uint8_t *data, int len)
 335 {
 336         uint32_t low, high;
 337         int i;
 338
 339         low = 1;
 340         high = 0;
 341         for (i = 0; i < len; i++) {
 342                 if ((i % 5000) == 0) {
 343                         high %= 65521UL;
 344                         high %= 65521UL;
 345                 }
 346                 low += data[i];
 347                 high += low;
 348         }
 349         low %= 65521UL;
 350         high %= 65521UL;
 351
 352         return (high << 16) | low;
 353 }
 354
 355 #define OUTB_DELAY(a, v)        outb(a, v); DELAY(1);
 356
 357 static int
 358 wait_operation_complete_amd(uint8_t *bank)
 359 {
 360         int i;
 361
 362         for (i = 1000000; i != 0; i--)
 363                 if ((inb(bank) ^ inb(bank)) == 0)
 364                         return 0;
 365         return -1;
 366 }
 367
 368 static int
 369 erase_bank_amd(device_t dev, uint8_t *bank)
 370 {
 371         unsigned int i;
 372
 373         /* Unlock 1 */
 374         OUTB_DELAY(bank + 0x555, 0xaa);
 375         /* Unlock 2 */
 376         OUTB_DELAY(bank + 0x2aa, 0x55);
 377
 378         /* Sector-Erase */
 379         OUTB_DELAY(bank + 0x555, 0x80);
 380         OUTB_DELAY(bank + 0x555, 0xaa);
 381         OUTB_DELAY(bank + 0x2aa, 0x55);
 382         OUTB_DELAY(bank, 0x30);
 383
 384         if (wait_operation_complete_amd(bank) != 0) {
 385                 device_printf(dev, "flash erase timeout\n");
 386                 return -1;
 387         }
 388
 389         /* Reset */
 390         OUTB_DELAY(bank, 0xf0);
 391
 392         for (i = 0; i < NVRAM_SIZE; i++) {
 393                 if (bank[i] != 0xff) {
 394                         device_printf(dev, "flash erase has failed\n");
 395                         return -1;
 396                 }
 397         }
 398         return 0;
 399 }
 400
 401 static int
 402 write_bank_amd(device_t dev, uint8_t *bank, uint8_t *data)
 403 {
 404         unsigned int i;
 405
 406         for (i = 0; i < NVRAM_SIZE; i++) {
 407                 /* Unlock 1 */
 408                 OUTB_DELAY(bank + 0x555, 0xaa);
 409                 /* Unlock 2 */
 410                 OUTB_DELAY(bank + 0x2aa, 0x55);
 411
 412                 /* Write single word */
 413                 OUTB_DELAY(bank + 0x555, 0xa0);
 414                 OUTB_DELAY(bank + i, data[i]);
 415                 if (wait_operation_complete_amd(bank) != 0) {
 416                         device_printf(dev, "flash write timeout\n");
 417                         return -1;
 418                 }
 419         }
 420
 421         /* Reset */
 422         OUTB_DELAY(bank, 0xf0);
 423
 424         for (i = 0; i < NVRAM_SIZE; i++) {
 425                 if (bank[i] != data[i]) {
 426                         device_printf(dev, "flash write has failed\n");
 427                         return -1;
 428                 }
 429         }
 430         return 0;
 431 }
 432
 433 static int
 434 wait_operation_complete_sm(uint8_t *bank)
 435 {
 436         int i;
 437
 438         for (i = 1000000; i != 0; i--) {
 439                 outb(bank, SM_FLASH_CMD_READ_STATUS);
 440                 if (inb(bank) & SM_FLASH_STATUS_DONE)
 441                         return (0);
 442         }
 443         return (-1);
 444 }
 445
 446 static int
 447 erase_bank_sm(device_t dev, uint8_t *bank)
 448 {
 449         unsigned int i;
 450
 451         outb(bank, SM_FLASH_CMD_ERASE_SETUP);
 452         outb(bank, SM_FLASH_CMD_ERASE_CONFIRM);
 453
 454         if (wait_operation_complete_sm(bank) != 0) {
 455                 device_printf(dev, "flash erase timeout\n");
 456                 return (-1);
 457         }
 458
 459         outb(bank, SM_FLASH_CMD_CLEAR_STATUS);
 460         outb(bank, SM_FLASH_CMD_RESET);
 461
 462         for (i = 0; i < NVRAM_SIZE; i++) {
 463                 if (bank[i] != 0xff) {
 464                         device_printf(dev, "flash write has failed\n");
 465                         return (-1);
 466                 }
 467         }
 468         return (0);
 469 }
 470
 471 static int
 472 write_bank_sm(device_t dev, uint8_t *bank, uint8_t *data)
 473 {
 474         unsigned int i;
 475
 476         for (i = 0; i < NVRAM_SIZE; i++) {
 477                 OUTB_DELAY(bank + i, SM_FLASH_CMD_WRITE_SETUP);
 478                 outb(bank + i, data[i]);
 479                 if (wait_operation_complete_sm(bank) != 0) {
 480                         device_printf(dev, "flash write error/timeout\n");
 481                         break;
 482                 }
 483         }
 484
 485         outb(bank, SM_FLASH_CMD_CLEAR_STATUS);
 486         outb(bank, SM_FLASH_CMD_RESET);
 487
 488         for (i = 0; i < NVRAM_SIZE; i++) {
 489                 if (bank[i] != data[i]) {
 490                         device_printf(dev, "flash write has failed\n");
 491                         return (-1);
 492                 }
 493         }
 494         return (0);
 495 }
 496
 497 static int
 498 erase_bank(device_t dev, uint8_t *bank)
 499 {
 500         struct powermac_nvram_softc *sc;
 501
 502         sc = device_get_softc(dev);
 503         if (sc->sc_type == FLASH_TYPE_AMD)
 504                 return (erase_bank_amd(dev, bank));
 505         else
 506                 return (erase_bank_sm(dev, bank));
 507 }
 508
 509 static int
 510 write_bank(device_t dev, uint8_t *bank, uint8_t *data)
 511 {
 512         struct powermac_nvram_softc *sc;
 513
 514         sc = device_get_softc(dev);
 515         if (sc->sc_type == FLASH_TYPE_AMD)
 516                 return (write_bank_amd(dev, bank, data));
 517         else
 518                 return (write_bank_sm(dev, bank, data));
 519 }