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[FreeBSD/FreeBSD.git] / sys / dev / powermac_nvram / powermac_nvram.c
1 /*
2  * Copyright (c) 2006 Maxim Sobolev <sobomax@FreeBSD.org>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
16  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
17  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
18  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
19  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
20  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
22  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
23  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
24  * POSSIBILITY OF SUCH DAMAGE.
25  *
26  * $FreeBSD$
27  */
28
29 #include <sys/param.h>
30 #include <sys/systm.h>
31 #include <sys/module.h>
32 #include <sys/bus.h>
33 #include <sys/conf.h>
34 #include <sys/kernel.h>
35 #include <sys/uio.h>
36
37 #include <dev/ofw/openfirm.h>
38 #include <dev/ofw/ofw_bus.h>
39
40 #include <machine/bus.h>
41 #include <machine/md_var.h>
42 #include <machine/pio.h>
43 #include <machine/resource.h>
44
45 #include <sys/rman.h>
46
47 #include <dev/powermac_nvram/powermac_nvramvar.h>
48
49 #include <vm/vm.h>
50 #include <vm/pmap.h>
51
52 /*
53  * Device interface.
54  */
55 static int              powermac_nvram_probe(device_t);
56 static int              powermac_nvram_attach(device_t);
57 static int              powermac_nvram_detach(device_t);
58
59 /* Helper functions */
60 static int              powermac_nvram_check(void *data);
61 static int              chrp_checksum(int sum, uint8_t *, uint8_t *);
62 static uint32_t         adler_checksum(uint8_t *, int);
63 static int              erase_bank(device_t, uint8_t *);
64 static int              write_bank(device_t, uint8_t *, uint8_t *);
65
66 /*
67  * Driver methods.
68  */
69 static device_method_t  powermac_nvram_methods[] = {
70         /* Device interface */
71         DEVMETHOD(device_probe,         powermac_nvram_probe),
72         DEVMETHOD(device_attach,        powermac_nvram_attach),
73         DEVMETHOD(device_detach,        powermac_nvram_detach),
74
75         { 0, 0 }
76 };
77
78 static driver_t powermac_nvram_driver = {
79         "powermac_nvram",
80         powermac_nvram_methods,
81         sizeof(struct powermac_nvram_softc)
82 };
83
84 static devclass_t powermac_nvram_devclass;
85
86 DRIVER_MODULE(powermac_nvram, nexus, powermac_nvram_driver, powermac_nvram_devclass, 0, 0);
87
88 /*
89  * Cdev methods.
90  */
91
92 #define NVRAM_UNIT(dev)         dev2unit(dev)
93 #define NVRAM_SOFTC(unit)       ((struct powermac_nvram_softc *) \
94      devclass_get_softc(powermac_nvram_devclass, unit))
95
96 static  d_open_t        powermac_nvram_open;
97 static  d_close_t       powermac_nvram_close;
98 static  d_read_t        powermac_nvram_read;
99 static  d_write_t       powermac_nvram_write;
100
101 static struct cdevsw powermac_nvram_cdevsw = {
102         .d_version =    D_VERSION,
103         .d_flags =      D_NEEDGIANT,
104         .d_open =       powermac_nvram_open,
105         .d_close =      powermac_nvram_close,
106         .d_read =       powermac_nvram_read,
107         .d_write =      powermac_nvram_write,
108         .d_name =       "powermac_nvram",
109 };
110
111 static int
112 powermac_nvram_probe(device_t dev)
113 {
114         const char      *type, *compatible;
115
116         type = ofw_bus_get_type(dev);
117         compatible = ofw_bus_get_compat(dev);
118
119         if (type == NULL || compatible == NULL)
120                 return ENXIO;
121
122         if (strcmp(type, "nvram") != 0 || strcmp(compatible, "amd-0137") != 0)
123                 return ENXIO;
124
125         device_set_desc(dev, "Apple NVRAM");
126         return 0;
127 }
128
129 static int
130 powermac_nvram_attach(device_t dev)
131 {
132         struct powermac_nvram_softc *sc;
133         phandle_t node;
134         u_int32_t reg[2];
135         int gen0, gen1;
136
137         node = ofw_bus_get_node(dev);
138         sc = device_get_softc(dev);
139
140         if (OF_getprop(node, "reg", reg, sizeof(reg)) < 8)
141                 return ENXIO;
142
143         sc->sc_dev = dev;
144         sc->sc_node = node;
145
146         sc->sc_bank0 = (vm_offset_t)pmap_mapdev(reg[0], NVRAM_SIZE * 2);
147         sc->sc_bank1 = sc->sc_bank0 + NVRAM_SIZE;
148
149         gen0 = powermac_nvram_check((void *)sc->sc_bank0);
150         gen1 = powermac_nvram_check((void *)sc->sc_bank1);
151
152         if (gen0 == -1 && gen1 == -1) {
153                 if ((void *)sc->sc_bank0 != NULL)
154                         pmap_unmapdev(sc->sc_bank0, NVRAM_SIZE * 2);
155                 device_printf(dev, "both banks appear to be corrupt\n");
156                 return ENXIO;
157         }
158         device_printf(dev, "bank0 generation %d, bank1 generation %d\n",
159             gen0, gen1);
160
161         sc->sc_bank = (gen0 > gen1) ? sc->sc_bank0 : sc->sc_bank1;
162         bcopy((void *)sc->sc_bank, (void *)sc->sc_data, NVRAM_SIZE);
163
164         sc->sc_cdev = make_dev(&powermac_nvram_cdevsw, 0, 0, 0, 0600,
165             "powermac_nvram");
166
167         return 0;
168 }
169
170 static int
171 powermac_nvram_detach(device_t dev)
172 {
173         struct powermac_nvram_softc *sc;
174
175         sc = device_get_softc(dev);
176
177         if ((void *)sc->sc_bank0 != NULL)
178                 pmap_unmapdev(sc->sc_bank0, NVRAM_SIZE * 2);
179
180         if (sc->sc_cdev != NULL)
181                 destroy_dev(sc->sc_cdev);
182         
183         return 0;
184 }
185
186 static int
187 powermac_nvram_open(struct cdev *dev, int flags, int fmt, struct thread *td)
188 {
189         struct powermac_nvram_softc *sc;
190
191         sc = NVRAM_SOFTC(NVRAM_UNIT(dev));
192         if (sc->sc_isopen)
193                 return EBUSY;
194         sc->sc_isopen = 1;
195         sc->sc_rpos = sc->sc_wpos = 0;
196         return 0;
197 }
198
199 static int
200 powermac_nvram_close(struct cdev *dev, int fflag, int devtype, struct thread *td)
201 {
202         struct powermac_nvram_softc *sc;
203         struct core99_header *header;
204         vm_offset_t bank;
205
206         sc = NVRAM_SOFTC(NVRAM_UNIT(dev));
207
208         if (sc->sc_wpos != sizeof(sc->sc_data)) {
209                 /* Short write, restore in-memory copy */
210                 bcopy((void *)sc->sc_bank, (void *)sc->sc_data, NVRAM_SIZE);
211                 sc->sc_isopen = 0;
212                 return 0;
213         }
214
215         header = (struct core99_header *)sc->sc_data;
216
217         header->generation = ((struct core99_header *)sc->sc_bank)->generation;
218         header->generation++;
219         header->chrp_header.signature = CORE99_SIGNATURE;
220
221         header->adler_checksum =
222             adler_checksum((uint8_t *)&(header->generation),
223             NVRAM_SIZE - offsetof(struct core99_header, generation));
224         header->chrp_header.chrp_checksum = chrp_checksum(header->chrp_header.signature,
225             (uint8_t *)&(header->chrp_header.length),
226             (uint8_t *)&(header->adler_checksum));
227
228         bank = (sc->sc_bank == sc->sc_bank0) ? sc->sc_bank1 : sc->sc_bank0;
229         if (erase_bank(sc->sc_dev, (uint8_t *)bank) != 0 ||
230             write_bank(sc->sc_dev, (uint8_t *)bank, sc->sc_data) != 0) {
231                 sc->sc_isopen = 0;
232                 return ENOSPC;
233         }
234         sc->sc_bank = bank;
235         sc->sc_isopen = 0;
236         return 0;
237 }
238
239 static int
240 powermac_nvram_read(struct cdev *dev, struct uio *uio, int ioflag)
241 {
242         int rv, amnt, data_available;
243         struct powermac_nvram_softc *sc;
244
245         sc = NVRAM_SOFTC(NVRAM_UNIT(dev));
246
247         rv = 0;
248         while (uio->uio_resid > 0) {
249                 data_available = sizeof(sc->sc_data) - sc->sc_rpos;
250                 if (data_available > 0) {
251                         amnt = MIN(uio->uio_resid, data_available);
252                         rv = uiomove((void *)(sc->sc_data + sc->sc_rpos),
253                             amnt, uio);
254                         if (rv != 0)
255                                 break;
256                         sc->sc_rpos += amnt;
257                 } else {
258                         break;
259                 }
260         }
261         return rv;
262 }
263
264 static int
265 powermac_nvram_write(struct cdev *dev, struct uio *uio, int ioflag)
266 {
267         int rv, amnt, data_available;
268         struct powermac_nvram_softc *sc;
269
270         sc = NVRAM_SOFTC(NVRAM_UNIT(dev));
271
272         if (sc->sc_wpos >= sizeof(sc->sc_data))
273                 return EINVAL;
274
275         rv = 0;
276         while (uio->uio_resid > 0) {
277                 data_available = sizeof(sc->sc_data) - sc->sc_wpos;
278                 if (data_available > 0) {
279                         amnt = MIN(uio->uio_resid, data_available);
280                         rv = uiomove((void *)(sc->sc_data + sc->sc_wpos),
281                             amnt, uio);
282                         if (rv != 0)
283                                 break;
284                         sc->sc_wpos += amnt;
285                 } else {
286                         break;
287                 }
288         }
289         return rv;
290 }
291
292 static int
293 powermac_nvram_check(void *data)
294 {
295         struct core99_header *header;
296
297         header = (struct core99_header *)data;
298
299         if (header->chrp_header.signature != CORE99_SIGNATURE)
300                 return -1;
301         if (header->chrp_header.chrp_checksum !=
302             chrp_checksum(header->chrp_header.signature,
303             (uint8_t *)&(header->chrp_header.length),
304             (uint8_t *)&(header->adler_checksum)))
305                 return -1;
306         if (header->adler_checksum !=
307             adler_checksum((uint8_t *)&(header->generation),
308             NVRAM_SIZE - offsetof(struct core99_header, generation)))
309                 return -1;
310         return header->generation;
311 }
312
313 static int
314 chrp_checksum(int sum, uint8_t *data, uint8_t *end)
315 {
316
317         for (; data < end; data++)
318                 sum += data[0];
319         while (sum > 0xff)
320                 sum = (sum & 0xff) + (sum >> 8);
321         return sum;
322 }
323
324 static uint32_t
325 adler_checksum(uint8_t *data, int len)
326 {
327         uint32_t low, high;
328         int i;
329
330         low = 1;
331         high = 0;
332         for (i = 0; i < len; i++) {
333                 if ((i % 5000) == 0) {
334                         high %= 65521UL;
335                         high %= 65521UL;
336                 }
337                 low += data[i];
338                 high += low;
339         }
340         low %= 65521UL;
341         high %= 65521UL;
342
343         return (high << 16) | low;
344 }
345
346 #define OUTB_DELAY(a, v)        outb(a, v); DELAY(1);
347
348 static int
349 wait_operation_complete(uint8_t *bank)
350 {
351         int i;
352
353         for (i = 1000000; i != 0; i--)
354                 if ((inb(bank) ^ inb(bank)) == 0)
355                         return 0;
356         return -1;
357 }
358
359 static int
360 erase_bank(device_t dev, uint8_t *bank)
361 {
362         unsigned int i;
363
364         /* Unlock 1 */
365         OUTB_DELAY(bank + 0x555, 0xaa);
366         /* Unlock 2 */
367         OUTB_DELAY(bank + 0x2aa, 0x55);
368
369         /* Sector-Erase */
370         OUTB_DELAY(bank + 0x555, 0x80);
371         OUTB_DELAY(bank + 0x555, 0xaa);
372         OUTB_DELAY(bank + 0x2aa, 0x55);
373         OUTB_DELAY(bank, 0x30);
374
375         if (wait_operation_complete(bank) != 0) {
376                 device_printf(dev, "flash erase timeout\n");
377                 return -1;
378         }
379
380         /* Reset */
381         OUTB_DELAY(bank, 0xf0);
382
383         for (i = 0; i < NVRAM_SIZE; i++) {
384                 if (bank[i] != 0xff) {
385                         device_printf(dev, "flash erase has failed\n");
386                         return -1;
387                 }
388         }
389         return 0;
390 }
391
392 static int
393 write_bank(device_t dev, uint8_t *bank, uint8_t *data)
394 {
395         unsigned int i;
396
397         for (i = 0; i < NVRAM_SIZE; i++) {
398                 /* Unlock 1 */
399                 OUTB_DELAY(bank + 0x555, 0xaa);
400                 /* Unlock 2 */
401                 OUTB_DELAY(bank + 0x2aa, 0x55);
402
403                 /* Write single word */
404                 OUTB_DELAY(bank + 0x555, 0xa0);
405                 OUTB_DELAY(bank + i, data[i]);
406                 if (wait_operation_complete(bank) != 0) {
407                         device_printf(dev, "flash write timeout\n");
408                         return -1;
409                 }
410         }
411
412         /* Reset */
413         OUTB_DELAY(bank, 0xf0);
414
415         for (i = 0; i < NVRAM_SIZE; i++) {
416                 if (bank[i] != data[i]) {
417                         device_printf(dev, "flash write has failed\n");
418                         return -1;
419                 }
420         }
421         return 0;
422 }