1 /* SPDX-License-Identifier: BSD-2-Clause-NetBSD AND BSD-3-Clause */
4 * Copyright (c) 2019 Internet Initiative Japan, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
30 * Copyright(c) 2014-2020 Intel Corporation.
31 * Redistribution and use in source and binary forms, with or without
32 * modification, are permitted provided that the following conditions
35 * * Redistributions of source code must retain the above copyright
36 * notice, this list of conditions and the following disclaimer.
37 * * Redistributions in binary form must reproduce the above copyright
38 * notice, this list of conditions and the following disclaimer in
39 * the documentation and/or other materials provided with the
41 * * Neither the name of Intel Corporation nor the names of its
42 * contributors may be used to endorse or promote products derived
43 * from this software without specific prior written permission.
45 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
46 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
47 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
48 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
49 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
50 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
51 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
52 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
53 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
54 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
55 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
60 #ifndef _DEV_PCI_QAT_DH895XCCREG_H_
61 #define _DEV_PCI_QAT_DH895XCCREG_H_
63 /* Max number of accelerators and engines */
64 #define MAX_ACCEL_DH895XCC 6
65 #define MAX_AE_DH895XCC 12
68 #define BAR_SRAM_ID_DH895XCC 0
69 #define BAR_PMISC_ID_DH895XCC 1
70 #define BAR_ETR_ID_DH895XCC 2
72 /* BAR PMISC sub-regions */
73 #define AE_OFFSET_DH895XCC 0x20000
74 #define AE_LOCAL_OFFSET_DH895XCC 0x20800
75 #define CAP_GLOBAL_OFFSET_DH895XCC 0x30000
77 #define SOFTSTRAP_REG_DH895XCC 0x2EC
79 #define FUSECTL_SKU_MASK_DH895XCC 0x300000
80 #define FUSECTL_SKU_SHIFT_DH895XCC 20
81 #define FUSECTL_SKU_1_DH895XCC 0
82 #define FUSECTL_SKU_2_DH895XCC 1
83 #define FUSECTL_SKU_3_DH895XCC 2
84 #define FUSECTL_SKU_4_DH895XCC 3
86 #define ACCEL_REG_OFFSET_DH895XCC 13
87 #define ACCEL_MASK_DH895XCC 0x3F
88 #define AE_MASK_DH895XCC 0xFFF
90 #define SMIAPF0_DH895XCC 0x3A028
91 #define SMIAPF1_DH895XCC 0x3A030
92 #define SMIA0_MASK_DH895XCC 0xFFFFFFFF
93 #define SMIA1_MASK_DH895XCC 0x1
95 /* Error detection and correction */
96 #define AE_CTX_ENABLES_DH895XCC(i) ((i) * 0x1000 + 0x20818)
97 #define AE_MISC_CONTROL_DH895XCC(i) ((i) * 0x1000 + 0x20960)
98 #define ENABLE_AE_ECC_ERR_DH895XCC __BIT(28)
99 #define ENABLE_AE_ECC_PARITY_CORR_DH895XCC (__BIT(24) | __BIT(12))
100 #define ERRSSMSH_EN_DH895XCC __BIT(3)
101 /* BIT(2) enables the logging of push/pull data errors. */
102 #define PPERR_EN_DH895XCC (__BIT(2))
105 #define ETR_MAX_BANKS_DH895XCC 32
106 #define ETR_TX_RX_GAP_DH895XCC 8
107 #define ETR_TX_RINGS_MASK_DH895XCC 0xFF
108 #define ETR_BUNDLE_SIZE_DH895XCC 0x1000
111 #define AE_FW_PROD_TYPE_DH895XCC 0x00400000
112 #define AE_FW_MOF_NAME_DH895XCC "qat_895xcc"
113 #define AE_FW_MMP_NAME_DH895XCC "qat_895xcc_mmp"
114 #define AE_FW_UOF_NAME_DH895XCC "icp_qat_ae.uof"
116 /* Clock frequency */
117 #define CLOCK_PER_SEC_DH895XCC (685 * 1000000 / 16)