2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2021 Adrian Chadd <adrian@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #ifndef __QCOM_SPI_REG_H__
31 #define __QCOM_SPI_REG_H__
33 #define SPI_CONFIG 0x0300
34 #define SPI_CONFIG_HS_MODE (1U << 10)
35 #define SPI_CONFIG_INPUT_FIRST (1U << 9)
36 #define SPI_CONFIG_LOOPBACK (1U << 8)
38 #define SPI_IO_CONTROL 0x0304
39 #define SPI_IO_C_FORCE_CS (1U << 11)
40 #define SPI_IO_C_CLK_IDLE_HIGH (1U << 10)
41 #define SPI_IO_C_MX_CS_MODE (1U << 8)
42 #define SPI_IO_C_CS_N_POLARITY_0 (1U << 4)
43 #define SPI_IO_C_CS_SELECT(x) (((x) & 3) << 2)
44 #define SPI_IO_C_CS_SELECT_MASK 0x000c
45 #define SPI_IO_C_TRISTATE_CS (1U << 1)
46 #define SPI_IO_C_NO_TRI_STATE (1U << 0)
48 #define SPI_ERROR_FLAGS 0x0308
49 #define SPI_ERROR_FLAGS_EN 0x030c
50 #define SPI_ERROR_CLK_OVER_RUN (1U << 1)
51 #define SPI_ERROR_CLK_UNDER_RUN (1U << 0)
54 * Strictly this isn't true; some controllers have
55 * less CS lines exposed via GPIO/pinmux.
57 #define SPI_NUM_CHIPSELECTS 4
60 * The maximum single SPI transaction done in any mode.
61 * Ie, if you have a PIO/DMA transaction larger than
62 * this then it must be split up into SPI_MAX_XFER
63 * sub-transactions in the transfer loop.
65 #define SPI_MAX_XFER (65536 - 64)
68 * Any frequency at or above 26MHz is considered "high"
69 * and will have some different parameters configured.
71 #define SPI_HS_MIN_RATE 26000000
73 #define SPI_MAX_RATE 50000000
75 #endif /* __QCOM_SPI_REG_H__ */