2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2021 Adrian Chadd <adrian@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice unmodified, this list of conditions, and the following
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * This is the shared pinmux code that the qualcomm SoCs use for their
31 * specific way of configuring up pins.
33 * For now this does use the IPQ4018 TLMM related softc, but that
34 * may change as I extend the driver to support multiple kinds of
35 * qualcomm chipsets in the future.
38 #include <sys/param.h>
39 #include <sys/systm.h>
42 #include <sys/kernel.h>
43 #include <sys/module.h>
46 #include <sys/malloc.h>
47 #include <sys/mutex.h>
50 #include <machine/bus.h>
51 #include <machine/resource.h>
52 #include <dev/gpio/gpiobusvar.h>
54 #include <dev/fdt/fdt_common.h>
55 #include <dev/ofw/ofw_bus.h>
56 #include <dev/ofw/ofw_bus_subr.h>
58 #include <dev/fdt/fdt_pinctrl.h>
60 #include "qcom_tlmm_var.h"
61 #include "qcom_tlmm_debug.h"
64 * For now we're hard-coded to doing IPQ4018 stuff here, but
65 * it's not going to be very hard to flip it to being generic.
67 #include "qcom_tlmm_ipq4018_hw.h"
72 static const struct qcom_tlmm_prop_name prop_names[] = {
73 { "bias-disable", PIN_ID_BIAS_DISABLE, 0 },
74 { "bias-high-impedance", PIN_ID_BIAS_HIGH_IMPEDANCE, 0 },
75 { "bias-bus-hold", PIN_ID_BIAS_BUS_HOLD, 0 },
76 { "bias-pull-up", PIN_ID_BIAS_PULL_UP, 0 },
77 { "bias-pull-down", PIN_ID_BIAS_PULL_DOWN, 0 },
78 { "bias-pull-pin-default", PIN_ID_BIAS_PULL_PIN_DEFAULT, 0 },
79 { "drive-push-pull", PIN_ID_DRIVE_PUSH_PULL, 0 },
80 { "drive-open-drain", PIN_ID_DRIVE_OPEN_DRAIN, 0 },
81 { "drive-open-source", PIN_ID_DRIVE_OPEN_SOURCE, 0 },
82 { "drive-strength", PIN_ID_DRIVE_STRENGTH, 1 },
83 { "input-enable", PIN_ID_INPUT_ENABLE, 0 },
84 { "input-disable", PIN_ID_INPUT_DISABLE, 0 },
85 { "input-schmitt-enable", PIN_ID_INPUT_SCHMITT_ENABLE, 0 },
86 { "input-schmitt-disable", PIN_ID_INPUT_SCHMITT_DISABLE, 0 },
87 { "input-debounce", PIN_ID_INPUT_DEBOUNCE, 0 },
88 { "power-source", PIN_ID_POWER_SOURCE, 0 },
89 { "slew-rate", PIN_ID_SLEW_RATE, 0},
90 { "low-power-enable", PIN_ID_LOW_POWER_MODE_ENABLE, 0 },
91 { "low-power-disable", PIN_ID_LOW_POWER_MODE_DISABLE, 0 },
92 { "output-low", PIN_ID_OUTPUT_LOW, 0, },
93 { "output-high", PIN_ID_OUTPUT_HIGH, 0, },
94 { "vm-enable", PIN_ID_VM_ENABLE, 0, },
95 { "vm-disable", PIN_ID_VM_DISABLE, 0, },
98 static const struct qcom_tlmm_spec_pin *
99 qcom_tlmm_pinctrl_search_spin(struct qcom_tlmm_softc *sc, char *pin_name)
103 if (sc->spec_pins == NULL)
106 for (i = 0; sc->spec_pins[i].name != NULL; i++) {
107 if (strcmp(pin_name, sc->spec_pins[i].name) == 0)
108 return (&sc->spec_pins[i]);
115 qcom_tlmm_pinctrl_config_spin(struct qcom_tlmm_softc *sc,
116 char *pin_name, const struct qcom_tlmm_spec_pin *spin,
117 struct qcom_tlmm_pinctrl_cfg *cfg)
120 device_printf(sc->dev, "%s: TODO: called; pin_name=%s\n",
125 static const struct qcom_tlmm_gpio_mux *
126 qcom_tlmm_pinctrl_search_gmux(struct qcom_tlmm_softc *sc, char *pin_name)
130 if (sc->gpio_muxes == NULL)
133 for (i = 0; sc->gpio_muxes[i].id >= 0; i++) {
134 if (strcmp(pin_name, sc->gpio_muxes[i].name) == 0)
135 return (&sc->gpio_muxes[i]);
142 qcom_tlmm_pinctrl_gmux_function(const struct qcom_tlmm_gpio_mux *gmux,
147 for (i = 0; i < 16; i++) { /* XXX size */
148 if ((gmux->functions[i] != NULL) &&
149 (strcmp(fnc_name, gmux->functions[i]) == 0))
157 qcom_tlmm_pinctrl_read_node(struct qcom_tlmm_softc *sc,
158 phandle_t node, struct qcom_tlmm_pinctrl_cfg *cfg, char **pins,
163 *lpins = OF_getprop_alloc(node, "pins", (void **)pins);
167 /* Read function (mux) settings. */
168 rv = OF_getprop_alloc(node, "function", (void **)&cfg->function);
170 cfg->function = NULL;
173 * Read the rest of the properties.
175 * Properties that are a flag are simply present with a value of 0.
176 * Properties that have arguments have have_value set to 1, and
177 * we will parse an argument out for it to use.
179 * Properties that were not found/parsed with have a value of -1
180 * and thus we won't program them into the hardware.
182 for (i = 0; i < PROP_ID_MAX_ID; i++) {
183 rv = OF_getencprop(node, prop_names[i].name, &cfg->params[i],
184 sizeof(cfg->params[i]));
185 if (prop_names[i].have_value) {
187 device_printf(sc->dev,
188 "WARNING: Missing value for propety"
194 /* No value, default to 0 */
204 qcom_tlmm_pinctrl_config_gmux(struct qcom_tlmm_softc *sc, char *pin_name,
205 const struct qcom_tlmm_gpio_mux *gmux, struct qcom_tlmm_pinctrl_cfg *cfg)
209 QCOM_TLMM_DPRINTF(sc, QCOM_TLMM_DEBUG_PINMUX,
210 "%s: called; pin=%s, function %s\n",
211 __func__, pin_name, cfg->function);
216 * Lookup the function in the configuration table. Configure it
219 if (cfg->function != NULL) {
222 tmp = qcom_tlmm_pinctrl_gmux_function(gmux, cfg->function);
224 device_printf(sc->dev,
225 "%s: pin=%s, function=%s, unknown!\n",
234 * Program in the given function to the given pin.
236 QCOM_TLMM_DPRINTF(sc, QCOM_TLMM_DEBUG_PINMUX,
237 "%s: pin id=%u, new function=%u\n",
241 err = qcom_tlmm_ipq4018_hw_pin_set_function(sc, gmux->id,
244 device_printf(sc->dev,
245 "%s: pin=%d: failed to set function (%d)\n",
246 __func__, gmux->id, err);
252 * Iterate the set of properties; call the relevant method
253 * if we need to change it.
255 for (i = 0; i < PROP_ID_MAX_ID; i++) {
256 if (cfg->params[i] == -1)
258 QCOM_TLMM_DPRINTF(sc, QCOM_TLMM_DEBUG_PINMUX,
259 "%s: pin_id=%u, param=%d, val=%d\n",
265 case PIN_ID_BIAS_DISABLE:
266 err = qcom_tlmm_ipq4018_hw_pin_set_pupd_config(sc,
267 gmux->id, QCOM_TLMM_PIN_PUPD_CONFIG_DISABLE);
269 device_printf(sc->dev,
270 "%s: pin=%d: failed to set pupd(DISABLE):"
272 __func__, gmux->id, err);
276 case PIN_ID_BIAS_PULL_DOWN:
277 err = qcom_tlmm_ipq4018_hw_pin_set_pupd_config(sc,
278 gmux->id, QCOM_TLMM_PIN_PUPD_CONFIG_PULL_DOWN);
280 device_printf(sc->dev,
281 "%s: pin=%d: failed to set pupd(PD):"
283 __func__, gmux->id, err);
287 case PIN_ID_BIAS_BUS_HOLD:
288 err = qcom_tlmm_ipq4018_hw_pin_set_pupd_config(sc,
289 gmux->id, QCOM_TLMM_PIN_PUPD_CONFIG_BUS_HOLD);
291 device_printf(sc->dev,
292 "%s: pin=%d: failed to set pupd(HOLD):"
294 __func__, gmux->id, err);
299 case PIN_ID_BIAS_PULL_UP:
300 err = qcom_tlmm_ipq4018_hw_pin_set_pupd_config(sc,
301 gmux->id, QCOM_TLMM_PIN_PUPD_CONFIG_PULL_UP);
303 device_printf(sc->dev,
304 "%s: pin=%d: failed to set pupd(PU):"
306 __func__, gmux->id, err);
310 case PIN_ID_OUTPUT_LOW:
311 err = qcom_tlmm_ipq4018_hw_pin_set_oe_output(sc,
314 device_printf(sc->dev,
315 "%s: pin=%d: failed to set OE:"
317 __func__, gmux->id, err);
320 err = qcom_tlmm_ipq4018_hw_pin_set_output_value(
323 device_printf(sc->dev,
324 "%s: pin=%d: failed to set output value:"
326 __func__, gmux->id, err);
330 case PIN_ID_OUTPUT_HIGH:
331 err = qcom_tlmm_ipq4018_hw_pin_set_oe_output(sc,
334 device_printf(sc->dev,
335 "%s: pin=%d: failed to set OE:"
337 __func__, gmux->id, err);
340 err = qcom_tlmm_ipq4018_hw_pin_set_output_value(
343 device_printf(sc->dev,
344 "%s: pin=%d: failed to set output value:"
346 __func__, gmux->id, err);
350 case PIN_ID_DRIVE_STRENGTH:
351 err = qcom_tlmm_ipq4018_hw_pin_set_drive_strength(sc,
352 gmux->id, cfg->params[i]);
354 device_printf(sc->dev,
355 "%s: pin=%d: failed to set drive"
356 " strength %d (%d)\n",
358 cfg->params[i], err);
362 case PIN_ID_VM_ENABLE:
363 err = qcom_tlmm_ipq4018_hw_pin_set_vm(sc,
366 device_printf(sc->dev,
367 "%s: pin=%d: failed to set VM enable:"
369 __func__, gmux->id, err);
373 case PIN_ID_VM_DISABLE:
374 err = qcom_tlmm_ipq4018_hw_pin_set_vm(sc,
377 device_printf(sc->dev,
378 "%s: pin=%d: failed to set VM disable:"
380 __func__, gmux->id, err);
384 case PIN_ID_DRIVE_OPEN_DRAIN:
385 err = qcom_tlmm_ipq4018_hw_pin_set_open_drain(sc,
388 device_printf(sc->dev,
389 "%s: pin=%d: failed to set open drain"
391 __func__, gmux->id, err);
395 case PIN_ID_INPUT_ENABLE:
396 /* Configure pin as an input */
397 err = qcom_tlmm_ipq4018_hw_pin_set_oe_input(sc,
400 device_printf(sc->dev,
401 "%s: pin=%d: failed to set pin as input"
403 __func__, gmux->id, err);
407 case PIN_ID_INPUT_DISABLE:
409 * the linux-msm GPIO driver treats this as an error;
410 * a pin should be configured as an output instead.
415 case PIN_ID_BIAS_HIGH_IMPEDANCE:
416 case PIN_ID_INPUT_SCHMITT_ENABLE:
417 case PIN_ID_INPUT_SCHMITT_DISABLE:
418 case PIN_ID_INPUT_DEBOUNCE:
419 case PIN_ID_SLEW_RATE:
420 case PIN_ID_LOW_POWER_MODE_ENABLE:
421 case PIN_ID_LOW_POWER_MODE_DISABLE:
422 case PIN_ID_BIAS_PULL_PIN_DEFAULT:
423 case PIN_ID_DRIVE_PUSH_PULL:
424 case PIN_ID_DRIVE_OPEN_SOURCE:
425 case PIN_ID_POWER_SOURCE:
427 device_printf(sc->dev,
428 "%s: ERROR: unknown/unsupported param: "
429 " pin_id=%u, param=%d, val=%d\n",
446 qcom_tlmm_pinctrl_config_node(struct qcom_tlmm_softc *sc,
447 char *pin_name, struct qcom_tlmm_pinctrl_cfg *cfg)
449 const struct qcom_tlmm_gpio_mux *gmux;
450 const struct qcom_tlmm_spec_pin *spin;
453 /* Handle GPIO pins */
454 gmux = qcom_tlmm_pinctrl_search_gmux(sc, pin_name);
457 rv = qcom_tlmm_pinctrl_config_gmux(sc, pin_name, gmux, cfg);
460 /* Handle special pin groups */
461 spin = qcom_tlmm_pinctrl_search_spin(sc, pin_name);
463 rv = qcom_tlmm_pinctrl_config_spin(sc, pin_name, spin, cfg);
466 device_printf(sc->dev, "Unknown pin: %s\n", pin_name);
471 qcom_tlmm_pinctrl_process_node(struct qcom_tlmm_softc *sc,
474 struct qcom_tlmm_pinctrl_cfg cfg;
476 int i, len, lpins, rv;
479 * Read the configuration and list of pins for the given node to
482 rv = qcom_tlmm_pinctrl_read_node(sc, node, &cfg, &pins, &lpins);
489 i = strlen(pname) + 1;
491 * Configure the given node with the specific configuration.
493 rv = qcom_tlmm_pinctrl_config_node(sc, pname, &cfg);
495 device_printf(sc->dev,
496 "Cannot configure pin: %s: %d\n", pname, rv);
500 } while (len < lpins);
503 free(pins, M_OFWPROP);
504 if (cfg.function != NULL)
505 free(cfg.function, M_OFWPROP);
511 qcom_tlmm_pinctrl_configure(device_t dev, phandle_t cfgxref)
513 struct qcom_tlmm_softc *sc;
514 phandle_t node, cfgnode;
517 sc = device_get_softc(dev);
518 cfgnode = OF_node_from_xref(cfgxref);
520 for (node = OF_child(cfgnode); node != 0; node = OF_peer(node)) {
521 if (!ofw_bus_node_status_okay(node))
523 rv = qcom_tlmm_pinctrl_process_node(sc, node);
525 device_printf(dev, "Pin config failed: %d\n", rv);