sys/dev/qlnx/qlnxe/ecore_dcbx.c

   1 /*
   2  * Copyright (c) 2017-2018 Cavium, Inc.
   3  * All rights reserved.
   4  *
   5  *  Redistribution and use in source and binary forms, with or without
   6  *  modification, are permitted provided that the following conditions
   7  *  are met:
   8  *
   9  *  1. Redistributions of source code must retain the above copyright
  10  *     notice, this list of conditions and the following disclaimer.
  11  *  2. Redistributions in binary form must reproduce the above copyright
  12  *     notice, this list of conditions and the following disclaimer in the
  13  *     documentation and/or other materials provided with the distribution.
  14  *
  15  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  16  *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  17  *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  18  *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  19  *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  20  *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  21  *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  22  *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  23  *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  24  *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  25  *  POSSIBILITY OF SUCH DAMAGE.
  26  */
  27
  28 /*
  29  * File : ecore_dcbx.c
  30  */
  31 #include <sys/cdefs.h>
  32 __FBSDID("$FreeBSD$");
  33
  34 #include "bcm_osal.h"
  35 #include "ecore.h"
  36 #include "ecore_sp_commands.h"
  37 #include "ecore_dcbx.h"
  38 #include "ecore_cxt.h"
  39 #include "ecore_gtt_reg_addr.h"
  40 #include "ecore_iro.h"
  41 #ifdef CONFIG_ECORE_ROCE
  42 #include "ecore_roce.h"
  43 #endif
  44 #include "ecore_iov_api.h"
  45
  46 #define ECORE_DCBX_MAX_MIB_READ_TRY     (100)
  47 #define ECORE_ETH_TYPE_DEFAULT          (0)
  48 #define ECORE_ETH_TYPE_ROCE             (0x8915)
  49 #define ECORE_UDP_PORT_TYPE_ROCE_V2     (0x12B7)
  50 #define ECORE_ETH_TYPE_FCOE             (0x8906)
  51 #define ECORE_TCP_PORT_ISCSI            (0xCBC)
  52
  53 #define ECORE_DCBX_INVALID_PRIORITY     0xFF
  54
  55 /* Get Traffic Class from priority traffic class table, 4 bits represent
  56  * the traffic class corresponding to the priority.
  57  */
  58 #define ECORE_DCBX_PRIO2TC(prio_tc_tbl, prio) \
  59                 ((u32)(prio_tc_tbl >> ((7 - prio) * 4)) & 0x7)
  60
  61 static bool ecore_dcbx_app_ethtype(u32 app_info_bitmap)
  62 {
  63         return !!(GET_MFW_FIELD(app_info_bitmap, DCBX_APP_SF) ==
  64                   DCBX_APP_SF_ETHTYPE);
  65 }
  66
  67 static bool ecore_dcbx_ieee_app_ethtype(u32 app_info_bitmap)
  68 {
  69         u8 mfw_val = GET_MFW_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE);
  70
  71         /* Old MFW */
  72         if (mfw_val == DCBX_APP_SF_IEEE_RESERVED)
  73                 return ecore_dcbx_app_ethtype(app_info_bitmap);
  74
  75         return !!(mfw_val == DCBX_APP_SF_IEEE_ETHTYPE);
  76 }
  77
  78 static bool ecore_dcbx_app_port(u32 app_info_bitmap)
  79 {
  80         return !!(GET_MFW_FIELD(app_info_bitmap, DCBX_APP_SF) ==
  81                   DCBX_APP_SF_PORT);
  82 }
  83
  84 static bool ecore_dcbx_ieee_app_port(u32 app_info_bitmap, u8 type)
  85 {
  86         u8 mfw_val = GET_MFW_FIELD(app_info_bitmap, DCBX_APP_SF_IEEE);
  87
  88         /* Old MFW */
  89         if (mfw_val == DCBX_APP_SF_IEEE_RESERVED)
  90                 return ecore_dcbx_app_port(app_info_bitmap);
  91
  92         return !!(mfw_val == type || mfw_val == DCBX_APP_SF_IEEE_TCP_UDP_PORT);
  93 }
  94
  95 static bool ecore_dcbx_default_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
  96 {
  97         bool ethtype;
  98
  99         if (ieee)
 100                 ethtype = ecore_dcbx_ieee_app_ethtype(app_info_bitmap);
 101         else
 102                 ethtype = ecore_dcbx_app_ethtype(app_info_bitmap);
 103
 104         return !!(ethtype && (proto_id == ECORE_ETH_TYPE_DEFAULT));
 105 }
 106
 107 static bool ecore_dcbx_iscsi_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
 108 {
 109         bool port;
 110
 111         if (ieee)
 112                 port = ecore_dcbx_ieee_app_port(app_info_bitmap,
 113                                                 DCBX_APP_SF_IEEE_TCP_PORT);
 114         else
 115                 port = ecore_dcbx_app_port(app_info_bitmap);
 116
 117         return !!(port && (proto_id == ECORE_TCP_PORT_ISCSI));
 118 }
 119
 120 static bool ecore_dcbx_fcoe_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
 121 {
 122         bool ethtype;
 123
 124         if (ieee)
 125                 ethtype = ecore_dcbx_ieee_app_ethtype(app_info_bitmap);
 126         else
 127                 ethtype = ecore_dcbx_app_ethtype(app_info_bitmap);
 128
 129         return !!(ethtype && (proto_id == ECORE_ETH_TYPE_FCOE));
 130 }
 131
 132 static bool ecore_dcbx_roce_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
 133 {
 134         bool ethtype;
 135
 136         if (ieee)
 137                 ethtype = ecore_dcbx_ieee_app_ethtype(app_info_bitmap);
 138         else
 139                 ethtype = ecore_dcbx_app_ethtype(app_info_bitmap);
 140
 141         return !!(ethtype && (proto_id == ECORE_ETH_TYPE_ROCE));
 142 }
 143
 144 static bool ecore_dcbx_roce_v2_tlv(u32 app_info_bitmap, u16 proto_id, bool ieee)
 145 {
 146         bool port;
 147
 148         if (ieee)
 149                 port = ecore_dcbx_ieee_app_port(app_info_bitmap,
 150                                                 DCBX_APP_SF_IEEE_UDP_PORT);
 151         else
 152                 port = ecore_dcbx_app_port(app_info_bitmap);
 153
 154         return !!(port && (proto_id == ECORE_UDP_PORT_TYPE_ROCE_V2));
 155 }
 156
 157 static bool ecore_dcbx_iwarp_tlv(struct ecore_hwfn *p_hwfn, u32 app_info_bitmap,
 158                                  u16 proto_id, bool ieee)
 159 {
 160         bool port;
 161
 162         if (!p_hwfn->p_dcbx_info->iwarp_port)
 163                 return false;
 164
 165         if (ieee)
 166                 port = ecore_dcbx_ieee_app_port(app_info_bitmap,
 167                                                 DCBX_APP_SF_IEEE_TCP_PORT);
 168         else
 169                 port = ecore_dcbx_app_port(app_info_bitmap);
 170
 171         return !!(port && (proto_id == p_hwfn->p_dcbx_info->iwarp_port));
 172 }
 173
 174 static void
 175 ecore_dcbx_dp_protocol(struct ecore_hwfn *p_hwfn,
 176                        struct ecore_dcbx_results *p_data)
 177 {
 178         enum dcbx_protocol_type id;
 179         int i;
 180
 181         DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "DCBX negotiated: %d\n",
 182                    p_data->dcbx_enabled);
 183
 184         for (i = 0; i < OSAL_ARRAY_SIZE(ecore_dcbx_app_update); i++) {
 185                 id = ecore_dcbx_app_update[i].id;
 186
 187                 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
 188                            "%s info: update %d, enable %d, prio %d, tc %d, num_active_tc %d dscp_enable = %d dscp_val = %d\n",
 189                            ecore_dcbx_app_update[i].name, p_data->arr[id].update,
 190                            p_data->arr[id].enable, p_data->arr[id].priority,
 191                            p_data->arr[id].tc, p_hwfn->hw_info.num_active_tc,
 192                            p_data->arr[id].dscp_enable,
 193                            p_data->arr[id].dscp_val);
 194         }
 195 }
 196
 197 static void
 198 ecore_dcbx_set_params(struct ecore_dcbx_results *p_data,
 199                       struct ecore_hwfn *p_hwfn,
 200                       bool enable, u8 prio, u8 tc,
 201                       enum dcbx_protocol_type type,
 202                       enum ecore_pci_personality personality)
 203 {
 204         struct ecore_dcbx_dscp_params *dscp = &p_hwfn->p_dcbx_info->get.dscp;
 205
 206         /* PF update ramrod data */
 207         p_data->arr[type].enable = enable;
 208         p_data->arr[type].priority = prio;
 209         p_data->arr[type].tc = tc;
 210         p_data->arr[type].dscp_enable = dscp->enabled;
 211         if (p_data->arr[type].dscp_enable) {
 212                 u8 i;
 213
 214                 for (i = 0; i < ECORE_DCBX_DSCP_SIZE; i++)
 215                         if (prio == dscp->dscp_pri_map[i]) {
 216                                 p_data->arr[type].dscp_val = i;
 217                                 break;
 218                         }
 219         }
 220
 221         if (enable && p_data->arr[type].dscp_enable)
 222                 p_data->arr[type].update = UPDATE_DCB_DSCP;
 223         else if (enable)
 224                 p_data->arr[type].update = UPDATE_DCB;
 225         else
 226                 p_data->arr[type].update = DONT_UPDATE_DCB_DSCP;
 227
 228         /* QM reconf data */
 229         if (p_hwfn->hw_info.personality == personality)
 230                 p_hwfn->hw_info.offload_tc = tc;
 231 }
 232
 233 /* Update app protocol data and hw_info fields with the TLV info */
 234 static void
 235 ecore_dcbx_update_app_info(struct ecore_dcbx_results *p_data,
 236                            struct ecore_hwfn *p_hwfn,
 237                            bool enable, u8 prio, u8 tc,
 238                            enum dcbx_protocol_type type)
 239 {
 240         enum ecore_pci_personality personality;
 241         enum dcbx_protocol_type id;
 242         int i;
 243
 244         for (i = 0; i < OSAL_ARRAY_SIZE(ecore_dcbx_app_update); i++) {
 245                 id = ecore_dcbx_app_update[i].id;
 246
 247                 if (type != id)
 248                         continue;
 249
 250                 personality = ecore_dcbx_app_update[i].personality;
 251
 252                 ecore_dcbx_set_params(p_data, p_hwfn, enable,
 253                                       prio, tc, type, personality);
 254         }
 255 }
 256
 257 static enum _ecore_status_t
 258 ecore_dcbx_get_app_priority(u8 pri_bitmap, u8 *priority)
 259 {
 260         u32 pri_mask, pri = ECORE_MAX_PFC_PRIORITIES;
 261         u32 index = ECORE_MAX_PFC_PRIORITIES - 1;
 262         enum _ecore_status_t rc = ECORE_SUCCESS;
 263
 264         /* Bitmap 1 corresponds to priority 0, return priority 0 */
 265         if (pri_bitmap == 1) {
 266                 *priority = 0;
 267                 return rc;
 268         }
 269
 270         /* Choose the highest priority */
 271         while ((ECORE_MAX_PFC_PRIORITIES == pri) && index) {
 272                 pri_mask = 1 << index;
 273                 if (pri_bitmap & pri_mask)
 274                         pri = index;
 275                 index--;
 276         }
 277
 278         if (pri < ECORE_MAX_PFC_PRIORITIES)
 279                 *priority = (u8)pri;
 280         else
 281                 rc = ECORE_INVAL;
 282
 283         return rc;
 284 }
 285
 286 static bool
 287 ecore_dcbx_get_app_protocol_type(struct ecore_hwfn *p_hwfn,
 288                                  u32 app_prio_bitmap, u16 id,
 289                                  enum dcbx_protocol_type *type, bool ieee)
 290 {
 291         if (ecore_dcbx_fcoe_tlv(app_prio_bitmap, id, ieee)) {
 292                 *type = DCBX_PROTOCOL_FCOE;
 293         } else if (ecore_dcbx_roce_tlv(app_prio_bitmap, id, ieee)) {
 294                 *type = DCBX_PROTOCOL_ROCE;
 295         } else if (ecore_dcbx_iscsi_tlv(app_prio_bitmap, id, ieee)) {
 296                 *type = DCBX_PROTOCOL_ISCSI;
 297         } else if (ecore_dcbx_default_tlv(app_prio_bitmap, id, ieee)) {
 298                 *type = DCBX_PROTOCOL_ETH;
 299         } else if (ecore_dcbx_roce_v2_tlv(app_prio_bitmap, id, ieee)) {
 300                 *type = DCBX_PROTOCOL_ROCE_V2;
 301         } else if (ecore_dcbx_iwarp_tlv(p_hwfn, app_prio_bitmap, id, ieee)) {
 302                 *type = DCBX_PROTOCOL_IWARP;
 303         } else {
 304                 *type = DCBX_MAX_PROTOCOL_TYPE;
 305                 DP_ERR(p_hwfn,
 306                        "No action required, App TLV id = 0x%x app_prio_bitmap = 0x%x\n",
 307                        id, app_prio_bitmap);
 308                 return false;
 309         }
 310
 311         return true;
 312 }
 313
 314 /*  Parse app TLV's to update TC information in hw_info structure for
 315  * reconfiguring QM. Get protocol specific data for PF update ramrod command.
 316  */
 317 static enum _ecore_status_t
 318 ecore_dcbx_process_tlv(struct ecore_hwfn *p_hwfn,
 319                        struct ecore_dcbx_results *p_data,
 320                        struct dcbx_app_priority_entry *p_tbl, u32 pri_tc_tbl,
 321                        int count, u8 dcbx_version)
 322 {
 323         enum dcbx_protocol_type type;
 324         u8 tc, priority_map;
 325         bool enable, ieee;
 326         u16 protocol_id;
 327         u8 priority;
 328         enum _ecore_status_t rc = ECORE_SUCCESS;
 329         int i;
 330
 331         DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
 332                    "Num APP entries = %d pri_tc_tbl = 0x%x dcbx_version = %u\n",
 333                    count, pri_tc_tbl, dcbx_version);
 334
 335         ieee = (dcbx_version == DCBX_CONFIG_VERSION_IEEE);
 336         /* Parse APP TLV */
 337         for (i = 0; i < count; i++) {
 338                 protocol_id = GET_MFW_FIELD(p_tbl[i].entry,
 339                                             DCBX_APP_PROTOCOL_ID);
 340                 priority_map = GET_MFW_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP);
 341                 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "Id = 0x%x pri_map = %u\n",
 342                            protocol_id, priority_map);
 343                 rc = ecore_dcbx_get_app_priority(priority_map, &priority);
 344                 if (rc == ECORE_INVAL) {
 345                         DP_ERR(p_hwfn, "Invalid priority\n");
 346                         return ECORE_INVAL;
 347                 }
 348
 349                 tc = ECORE_DCBX_PRIO2TC(pri_tc_tbl, priority);
 350                 if (ecore_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
 351                                                      protocol_id, &type,
 352                                                      ieee)) {
 353                         /* ETH always have the enable bit reset, as it gets
 354                          * vlan information per packet. For other protocols,
 355                          * should be set according to the dcbx_enabled
 356                          * indication, but we only got here if there was an
 357                          * app tlv for the protocol, so dcbx must be enabled.
 358                          */
 359                         enable = !(type == DCBX_PROTOCOL_ETH);
 360
 361                         ecore_dcbx_update_app_info(p_data, p_hwfn, enable,
 362                                                    priority, tc, type);
 363                 }
 364         }
 365
 366         /* Update ramrod protocol data and hw_info fields
 367          * with default info when corresponding APP TLV's are not detected.
 368          * The enabled field has a different logic for ethernet as only for
 369          * ethernet dcb should disabled by default, as the information arrives
 370          * from the OS (unless an explicit app tlv was present).
 371          */
 372         tc = p_data->arr[DCBX_PROTOCOL_ETH].tc;
 373         priority = p_data->arr[DCBX_PROTOCOL_ETH].priority;
 374         for (type = 0; type < DCBX_MAX_PROTOCOL_TYPE; type++) {
 375                 if (p_data->arr[type].update)
 376                         continue;
 377
 378                 enable = (type == DCBX_PROTOCOL_ETH) ? false : !!dcbx_version;
 379                 ecore_dcbx_update_app_info(p_data, p_hwfn, enable,
 380                                            priority, tc, type);
 381         }
 382
 383         return ECORE_SUCCESS;
 384 }
 385
 386 /* Parse app TLV's to update TC information in hw_info structure for
 387  * reconfiguring QM. Get protocol specific data for PF update ramrod command.
 388  */
 389 static enum _ecore_status_t
 390 ecore_dcbx_process_mib_info(struct ecore_hwfn *p_hwfn)
 391 {
 392         struct dcbx_app_priority_feature *p_app;
 393         struct dcbx_app_priority_entry *p_tbl;
 394         struct ecore_dcbx_results data = { 0 };
 395         struct dcbx_ets_feature *p_ets;
 396         struct ecore_hw_info *p_info;
 397         u32 pri_tc_tbl, flags;
 398         u8 dcbx_version;
 399         int num_entries;
 400         enum _ecore_status_t rc = ECORE_SUCCESS;
 401
 402         flags = p_hwfn->p_dcbx_info->operational.flags;
 403         dcbx_version = GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION);
 404
 405         p_app = &p_hwfn->p_dcbx_info->operational.features.app;
 406         p_tbl = p_app->app_pri_tbl;
 407
 408         p_ets = &p_hwfn->p_dcbx_info->operational.features.ets;
 409         pri_tc_tbl = p_ets->pri_tc_tbl[0];
 410
 411         p_info = &p_hwfn->hw_info;
 412         num_entries = GET_MFW_FIELD(p_app->flags, DCBX_APP_NUM_ENTRIES);
 413
 414         rc = ecore_dcbx_process_tlv(p_hwfn, &data, p_tbl, pri_tc_tbl,
 415                                     num_entries, dcbx_version);
 416         if (rc != ECORE_SUCCESS)
 417                 return rc;
 418
 419         p_info->num_active_tc = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_MAX_TCS);
 420         p_hwfn->qm_info.ooo_tc = GET_MFW_FIELD(p_ets->flags, DCBX_OOO_TC);
 421         data.pf_id = p_hwfn->rel_pf_id;
 422         data.dcbx_enabled = !!dcbx_version;
 423
 424         ecore_dcbx_dp_protocol(p_hwfn, &data);
 425
 426         OSAL_MEMCPY(&p_hwfn->p_dcbx_info->results, &data,
 427                     sizeof(struct ecore_dcbx_results));
 428
 429         return ECORE_SUCCESS;
 430 }
 431
 432 static enum _ecore_status_t
 433 ecore_dcbx_copy_mib(struct ecore_hwfn *p_hwfn,
 434                     struct ecore_ptt *p_ptt,
 435                     struct ecore_dcbx_mib_meta_data *p_data,
 436                     enum ecore_mib_read_type type)
 437 {
 438         u32 prefix_seq_num, suffix_seq_num;
 439         int read_count = 0;
 440         enum _ecore_status_t rc = ECORE_SUCCESS;
 441
 442         /* The data is considered to be valid only if both sequence numbers are
 443          * the same.
 444          */
 445         do {
 446                 if (type == ECORE_DCBX_REMOTE_LLDP_MIB) {
 447                         ecore_memcpy_from(p_hwfn, p_ptt, p_data->lldp_remote,
 448                                           p_data->addr, p_data->size);
 449                         prefix_seq_num = p_data->lldp_remote->prefix_seq_num;
 450                         suffix_seq_num = p_data->lldp_remote->suffix_seq_num;
 451                 } else {
 452                         ecore_memcpy_from(p_hwfn, p_ptt, p_data->mib,
 453                                           p_data->addr, p_data->size);
 454                         prefix_seq_num = p_data->mib->prefix_seq_num;
 455                         suffix_seq_num = p_data->mib->suffix_seq_num;
 456                 }
 457                 read_count++;
 458
 459                 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
 460                            "mib type = %d, try count = %d prefix seq num  = %d suffix seq num = %d\n",
 461                            type, read_count, prefix_seq_num, suffix_seq_num);
 462         } while ((prefix_seq_num != suffix_seq_num) &&
 463                  (read_count < ECORE_DCBX_MAX_MIB_READ_TRY));
 464
 465         if (read_count >= ECORE_DCBX_MAX_MIB_READ_TRY) {
 466                 DP_ERR(p_hwfn,
 467                        "MIB read err, mib type = %d, try count = %d prefix seq num = %d suffix seq num = %d\n",
 468                        type, read_count, prefix_seq_num, suffix_seq_num);
 469                 rc = ECORE_IO;
 470         }
 471
 472         return rc;
 473 }
 474
 475 static void
 476 ecore_dcbx_get_priority_info(struct ecore_hwfn *p_hwfn,
 477                              struct ecore_dcbx_app_prio *p_prio,
 478                              struct ecore_dcbx_results *p_results)
 479 {
 480         u8 val;
 481
 482         p_prio->roce = ECORE_DCBX_INVALID_PRIORITY;
 483         p_prio->roce_v2 = ECORE_DCBX_INVALID_PRIORITY;
 484         p_prio->iscsi = ECORE_DCBX_INVALID_PRIORITY;
 485         p_prio->fcoe = ECORE_DCBX_INVALID_PRIORITY;
 486
 487         if (p_results->arr[DCBX_PROTOCOL_ROCE].update &&
 488             p_results->arr[DCBX_PROTOCOL_ROCE].enable)
 489                 p_prio->roce = p_results->arr[DCBX_PROTOCOL_ROCE].priority;
 490
 491         if (p_results->arr[DCBX_PROTOCOL_ROCE_V2].update &&
 492             p_results->arr[DCBX_PROTOCOL_ROCE_V2].enable) {
 493                 val = p_results->arr[DCBX_PROTOCOL_ROCE_V2].priority;
 494                 p_prio->roce_v2 = val;
 495         }
 496
 497         if (p_results->arr[DCBX_PROTOCOL_ISCSI].update &&
 498             p_results->arr[DCBX_PROTOCOL_ISCSI].enable)
 499                 p_prio->iscsi = p_results->arr[DCBX_PROTOCOL_ISCSI].priority;
 500
 501         if (p_results->arr[DCBX_PROTOCOL_FCOE].update &&
 502             p_results->arr[DCBX_PROTOCOL_FCOE].enable)
 503                 p_prio->fcoe = p_results->arr[DCBX_PROTOCOL_FCOE].priority;
 504
 505         if (p_results->arr[DCBX_PROTOCOL_ETH].update &&
 506             p_results->arr[DCBX_PROTOCOL_ETH].enable)
 507                 p_prio->eth = p_results->arr[DCBX_PROTOCOL_ETH].priority;
 508
 509         DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
 510                    "Priorities: iscsi %d, roce %d, roce v2 %d, fcoe %d, eth %d\n",
 511                    p_prio->iscsi, p_prio->roce, p_prio->roce_v2, p_prio->fcoe,
 512                    p_prio->eth);
 513 }
 514
 515 static void
 516 ecore_dcbx_get_app_data(struct ecore_hwfn *p_hwfn,
 517                         struct dcbx_app_priority_feature *p_app,
 518                         struct dcbx_app_priority_entry *p_tbl,
 519                         struct ecore_dcbx_params *p_params, bool ieee)
 520 {
 521         struct ecore_app_entry *entry;
 522         u8 pri_map;
 523         int i;
 524
 525         p_params->app_willing = GET_MFW_FIELD(p_app->flags, DCBX_APP_WILLING);
 526         p_params->app_valid = GET_MFW_FIELD(p_app->flags, DCBX_APP_ENABLED);
 527         p_params->app_error = GET_MFW_FIELD(p_app->flags, DCBX_APP_ERROR);
 528         p_params->num_app_entries = GET_MFW_FIELD(p_app->flags,
 529                                                   DCBX_APP_NUM_ENTRIES);
 530         for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
 531                 entry = &p_params->app_entry[i];
 532                 if (ieee) {
 533                         u8 sf_ieee;
 534                         u32 val;
 535
 536                         sf_ieee = GET_MFW_FIELD(p_tbl[i].entry,
 537                                                 DCBX_APP_SF_IEEE);
 538                         switch (sf_ieee) {
 539                         case DCBX_APP_SF_IEEE_RESERVED:
 540                                 /* Old MFW */
 541                                 val = GET_MFW_FIELD(p_tbl[i].entry,
 542                                                     DCBX_APP_SF);
 543                                 entry->sf_ieee = val ?
 544                                         ECORE_DCBX_SF_IEEE_TCP_UDP_PORT :
 545                                         ECORE_DCBX_SF_IEEE_ETHTYPE;
 546                                 break;
 547                         case DCBX_APP_SF_IEEE_ETHTYPE:
 548                                 entry->sf_ieee = ECORE_DCBX_SF_IEEE_ETHTYPE;
 549                                 break;
 550                         case DCBX_APP_SF_IEEE_TCP_PORT:
 551                                 entry->sf_ieee = ECORE_DCBX_SF_IEEE_TCP_PORT;
 552                                 break;
 553                         case DCBX_APP_SF_IEEE_UDP_PORT:
 554                                 entry->sf_ieee = ECORE_DCBX_SF_IEEE_UDP_PORT;
 555                                 break;
 556                         case DCBX_APP_SF_IEEE_TCP_UDP_PORT:
 557                                 entry->sf_ieee = ECORE_DCBX_SF_IEEE_TCP_UDP_PORT;
 558                                 break;
 559                         }
 560                 } else {
 561                         entry->ethtype = !(GET_MFW_FIELD(p_tbl[i].entry,
 562                                                          DCBX_APP_SF));
 563                 }
 564
 565                 pri_map = GET_MFW_FIELD(p_tbl[i].entry, DCBX_APP_PRI_MAP);
 566                 ecore_dcbx_get_app_priority(pri_map, &entry->prio);
 567                 entry->proto_id = GET_MFW_FIELD(p_tbl[i].entry,
 568                                                 DCBX_APP_PROTOCOL_ID);
 569                 ecore_dcbx_get_app_protocol_type(p_hwfn, p_tbl[i].entry,
 570                                                  entry->proto_id,
 571                                                  &entry->proto_type, ieee);
 572         }
 573
 574         DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
 575                    "APP params: willing %d, valid %d error = %d\n",
 576                    p_params->app_willing, p_params->app_valid,
 577                    p_params->app_error);
 578 }
 579
 580 static void
 581 ecore_dcbx_get_pfc_data(struct ecore_hwfn *p_hwfn,
 582                         u32 pfc, struct ecore_dcbx_params *p_params)
 583 {
 584         u8 pfc_map;
 585
 586         p_params->pfc.willing = GET_MFW_FIELD(pfc, DCBX_PFC_WILLING);
 587         p_params->pfc.max_tc = GET_MFW_FIELD(pfc, DCBX_PFC_CAPS);
 588         p_params->pfc.enabled = GET_MFW_FIELD(pfc, DCBX_PFC_ENABLED);
 589         pfc_map = GET_MFW_FIELD(pfc, DCBX_PFC_PRI_EN_BITMAP);
 590         p_params->pfc.prio[0] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_0);
 591         p_params->pfc.prio[1] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_1);
 592         p_params->pfc.prio[2] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_2);
 593         p_params->pfc.prio[3] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_3);
 594         p_params->pfc.prio[4] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_4);
 595         p_params->pfc.prio[5] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_5);
 596         p_params->pfc.prio[6] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_6);
 597         p_params->pfc.prio[7] = !!(pfc_map & DCBX_PFC_PRI_EN_BITMAP_PRI_7);
 598
 599         DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
 600                    "PFC params: willing %d, pfc_bitmap %u max_tc = %u enabled = %d\n",
 601                    p_params->pfc.willing, pfc_map, p_params->pfc.max_tc,
 602                    p_params->pfc.enabled);
 603 }
 604
 605 static void
 606 ecore_dcbx_get_ets_data(struct ecore_hwfn *p_hwfn,
 607                         struct dcbx_ets_feature *p_ets,
 608                         struct ecore_dcbx_params *p_params)
 609 {
 610         u32 bw_map[2], tsa_map[2], pri_map;
 611         int i;
 612
 613         p_params->ets_willing = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_WILLING);
 614         p_params->ets_enabled = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_ENABLED);
 615         p_params->ets_cbs = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_CBS);
 616         p_params->max_ets_tc = GET_MFW_FIELD(p_ets->flags, DCBX_ETS_MAX_TCS);
 617         DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
 618                    "ETS params: willing %d, enabled = %d ets_cbs %d pri_tc_tbl_0 %x max_ets_tc %d\n",
 619                    p_params->ets_willing, p_params->ets_enabled,
 620                    p_params->ets_cbs, p_ets->pri_tc_tbl[0],
 621                    p_params->max_ets_tc);
 622         if (p_params->ets_enabled && !p_params->max_ets_tc)
 623         {
 624                 p_params->max_ets_tc = ECORE_MAX_PFC_PRIORITIES;
 625                 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
 626                            "ETS params: max_ets_tc is forced to %d\n",
 627                    p_params->max_ets_tc);
 628         }
 629         /* 8 bit tsa and bw data corresponding to each of the 8 TC's are
 630          * encoded in a type u32 array of size 2.
 631          */
 632         bw_map[0] = OSAL_BE32_TO_CPU(p_ets->tc_bw_tbl[0]);
 633         bw_map[1] = OSAL_BE32_TO_CPU(p_ets->tc_bw_tbl[1]);
 634         tsa_map[0] = OSAL_BE32_TO_CPU(p_ets->tc_tsa_tbl[0]);
 635         tsa_map[1] = OSAL_BE32_TO_CPU(p_ets->tc_tsa_tbl[1]);
 636         pri_map = p_ets->pri_tc_tbl[0];
 637         for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++) {
 638                 p_params->ets_tc_bw_tbl[i] = ((u8 *)bw_map)[i];
 639                 p_params->ets_tc_tsa_tbl[i] = ((u8 *)tsa_map)[i];
 640                 p_params->ets_pri_tc_tbl[i] = ECORE_DCBX_PRIO2TC(pri_map, i);
 641                 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
 642                            "elem %d  bw_tbl %x tsa_tbl %x\n",
 643                            i, p_params->ets_tc_bw_tbl[i],
 644                            p_params->ets_tc_tsa_tbl[i]);
 645         }
 646 }
 647
 648 static void
 649 ecore_dcbx_get_common_params(struct ecore_hwfn *p_hwfn,
 650                              struct dcbx_app_priority_feature *p_app,
 651                              struct dcbx_app_priority_entry *p_tbl,
 652                              struct dcbx_ets_feature *p_ets,
 653                              u32 pfc, struct ecore_dcbx_params *p_params,
 654                              bool ieee)
 655 {
 656         ecore_dcbx_get_app_data(p_hwfn, p_app, p_tbl, p_params, ieee);
 657         ecore_dcbx_get_ets_data(p_hwfn, p_ets, p_params);
 658         ecore_dcbx_get_pfc_data(p_hwfn, pfc, p_params);
 659 }
 660
 661 static void
 662 ecore_dcbx_get_local_params(struct ecore_hwfn *p_hwfn,
 663                             struct ecore_dcbx_get *params)
 664 {
 665         struct dcbx_features *p_feat;
 666
 667         p_feat = &p_hwfn->p_dcbx_info->local_admin.features;
 668         ecore_dcbx_get_common_params(p_hwfn, &p_feat->app,
 669                                      p_feat->app.app_pri_tbl, &p_feat->ets,
 670                                      p_feat->pfc, &params->local.params, false);
 671         params->local.valid = true;
 672 }
 673
 674 static void
 675 ecore_dcbx_get_remote_params(struct ecore_hwfn *p_hwfn,
 676                              struct ecore_dcbx_get *params)
 677 {
 678         struct dcbx_features *p_feat;
 679
 680         p_feat = &p_hwfn->p_dcbx_info->remote.features;
 681         ecore_dcbx_get_common_params(p_hwfn, &p_feat->app,
 682                                      p_feat->app.app_pri_tbl, &p_feat->ets,
 683                                      p_feat->pfc, &params->remote.params,
 684                                      false);
 685         params->remote.valid = true;
 686 }
 687
 688 static enum _ecore_status_t
 689 ecore_dcbx_get_operational_params(struct ecore_hwfn *p_hwfn,
 690                                   struct ecore_dcbx_get *params)
 691 {
 692         struct ecore_dcbx_operational_params *p_operational;
 693         struct ecore_dcbx_results *p_results;
 694         struct dcbx_features *p_feat;
 695         bool enabled, err;
 696         u32 flags;
 697         bool val;
 698
 699         flags = p_hwfn->p_dcbx_info->operational.flags;
 700
 701         /* If DCBx version is non zero, then negotiation
 702          * was successfuly performed
 703          */
 704         p_operational = &params->operational;
 705         enabled = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) !=
 706                      DCBX_CONFIG_VERSION_DISABLED);
 707         if (!enabled) {
 708                 p_operational->enabled = enabled;
 709                 p_operational->valid = false;
 710                 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "Dcbx is disabled\n");
 711                 return ECORE_INVAL;
 712         }
 713
 714         p_feat = &p_hwfn->p_dcbx_info->operational.features;
 715         p_results = &p_hwfn->p_dcbx_info->results;
 716
 717         val = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) ==
 718                  DCBX_CONFIG_VERSION_IEEE);
 719         p_operational->ieee = val;
 720
 721         val = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) ==
 722                  DCBX_CONFIG_VERSION_CEE);
 723         p_operational->cee = val;
 724
 725         val = !!(GET_MFW_FIELD(flags, DCBX_CONFIG_VERSION) ==
 726                  DCBX_CONFIG_VERSION_STATIC);
 727         p_operational->local = val;
 728
 729         DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
 730                    "Version support: ieee %d, cee %d, static %d\n",
 731                    p_operational->ieee, p_operational->cee,
 732                    p_operational->local);
 733
 734         ecore_dcbx_get_common_params(p_hwfn, &p_feat->app,
 735                                      p_feat->app.app_pri_tbl, &p_feat->ets,
 736                                      p_feat->pfc, &params->operational.params,
 737                                      p_operational->ieee);
 738         ecore_dcbx_get_priority_info(p_hwfn, &p_operational->app_prio,
 739                                      p_results);
 740         err = GET_MFW_FIELD(p_feat->app.flags, DCBX_APP_ERROR);
 741         p_operational->err = err;
 742         p_operational->enabled = enabled;
 743         p_operational->valid = true;
 744
 745         return ECORE_SUCCESS;
 746 }
 747
 748 static void  ecore_dcbx_get_dscp_params(struct ecore_hwfn *p_hwfn,
 749                                         struct ecore_dcbx_get *params)
 750 {
 751         struct ecore_dcbx_dscp_params *p_dscp;
 752         struct dcb_dscp_map *p_dscp_map;
 753         int i, j, entry;
 754         u32 pri_map;
 755
 756         p_dscp = &params->dscp;
 757         p_dscp_map = &p_hwfn->p_dcbx_info->dscp_map;
 758         p_dscp->enabled = GET_MFW_FIELD(p_dscp_map->flags, DCB_DSCP_ENABLE);
 759
 760         /* MFW encodes 64 dscp entries into 8 element array of u32 entries,
 761          * where each entry holds the 4bit priority map for 8 dscp entries.
 762          */
 763         for (i = 0, entry = 0; i < ECORE_DCBX_DSCP_SIZE / 8; i++) {
 764                 pri_map = OSAL_BE32_TO_CPU(p_dscp_map->dscp_pri_map[i]);
 765                 DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "elem %d pri_map 0x%x\n",
 766                            entry, pri_map);
 767                 for (j = 0; j < ECORE_DCBX_DSCP_SIZE / 8; j++, entry++)
 768                         p_dscp->dscp_pri_map[entry] = (u32)(pri_map >>
 769                                                            (j * 4)) & 0xf;
 770         }
 771 }
 772
 773 static void ecore_dcbx_get_local_lldp_params(struct ecore_hwfn *p_hwfn,
 774                                              struct ecore_dcbx_get *params)
 775 {
 776         struct lldp_config_params_s *p_local;
 777
 778         p_local = &p_hwfn->p_dcbx_info->lldp_local[LLDP_NEAREST_BRIDGE];
 779
 780         OSAL_MEMCPY(params->lldp_local.local_chassis_id,
 781                     p_local->local_chassis_id,
 782                     OSAL_ARRAY_SIZE(p_local->local_chassis_id));
 783         OSAL_MEMCPY(params->lldp_local.local_port_id, p_local->local_port_id,
 784                     OSAL_ARRAY_SIZE(p_local->local_port_id));
 785 }
 786
 787 static void ecore_dcbx_get_remote_lldp_params(struct ecore_hwfn *p_hwfn,
 788                                               struct ecore_dcbx_get *params)
 789 {
 790         struct lldp_status_params_s *p_remote;
 791
 792         p_remote = &p_hwfn->p_dcbx_info->lldp_remote[LLDP_NEAREST_BRIDGE];
 793
 794         OSAL_MEMCPY(params->lldp_remote.peer_chassis_id,
 795                     p_remote->peer_chassis_id,
 796                     OSAL_ARRAY_SIZE(p_remote->peer_chassis_id));
 797         OSAL_MEMCPY(params->lldp_remote.peer_port_id, p_remote->peer_port_id,
 798                     OSAL_ARRAY_SIZE(p_remote->peer_port_id));
 799 }
 800
 801 static enum _ecore_status_t
 802 ecore_dcbx_get_params(struct ecore_hwfn *p_hwfn,
 803                       struct ecore_dcbx_get *p_params,
 804                       enum ecore_mib_read_type type)
 805 {
 806         switch (type) {
 807         case ECORE_DCBX_REMOTE_MIB:
 808                 ecore_dcbx_get_remote_params(p_hwfn, p_params);
 809                 break;
 810         case ECORE_DCBX_LOCAL_MIB:
 811                 ecore_dcbx_get_local_params(p_hwfn, p_params);
 812                 break;
 813         case ECORE_DCBX_OPERATIONAL_MIB:
 814                 ecore_dcbx_get_operational_params(p_hwfn, p_params);
 815                 break;
 816         case ECORE_DCBX_REMOTE_LLDP_MIB:
 817                 ecore_dcbx_get_remote_lldp_params(p_hwfn, p_params);
 818                 break;
 819         case ECORE_DCBX_LOCAL_LLDP_MIB:
 820                 ecore_dcbx_get_local_lldp_params(p_hwfn, p_params);
 821                 break;
 822         default:
 823                 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
 824                 return ECORE_INVAL;
 825         }
 826
 827         return ECORE_SUCCESS;
 828 }
 829
 830 static enum _ecore_status_t
 831 ecore_dcbx_read_local_lldp_mib(struct ecore_hwfn *p_hwfn,
 832                                struct ecore_ptt *p_ptt)
 833 {
 834         struct ecore_dcbx_mib_meta_data data;
 835         enum _ecore_status_t rc = ECORE_SUCCESS;
 836
 837         OSAL_MEM_ZERO(&data, sizeof(data));
 838         data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
 839                                                            lldp_config_params);
 840         data.lldp_local = p_hwfn->p_dcbx_info->lldp_local;
 841         data.size = sizeof(struct lldp_config_params_s);
 842         ecore_memcpy_from(p_hwfn, p_ptt, data.lldp_local, data.addr, data.size);
 843
 844         return rc;
 845 }
 846
 847 static enum _ecore_status_t
 848 ecore_dcbx_read_remote_lldp_mib(struct ecore_hwfn *p_hwfn,
 849                                 struct ecore_ptt *p_ptt,
 850                                 enum ecore_mib_read_type type)
 851 {
 852         struct ecore_dcbx_mib_meta_data data;
 853         enum _ecore_status_t rc = ECORE_SUCCESS;
 854
 855         OSAL_MEM_ZERO(&data, sizeof(data));
 856         data.addr = p_hwfn->mcp_info->port_addr + offsetof(struct public_port,
 857                                                            lldp_status_params);
 858         data.lldp_remote = p_hwfn->p_dcbx_info->lldp_remote;
 859         data.size = sizeof(struct lldp_status_params_s);
 860         rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
 861
 862         return rc;
 863 }
 864
 865 static enum _ecore_status_t
 866 ecore_dcbx_read_operational_mib(struct ecore_hwfn *p_hwfn,
 867                                 struct ecore_ptt *p_ptt,
 868                                 enum ecore_mib_read_type type)
 869 {
 870         struct ecore_dcbx_mib_meta_data data;
 871         enum _ecore_status_t rc = ECORE_SUCCESS;
 872
 873         OSAL_MEM_ZERO(&data, sizeof(data));
 874         data.addr = p_hwfn->mcp_info->port_addr +
 875                     offsetof(struct public_port, operational_dcbx_mib);
 876         data.mib = &p_hwfn->p_dcbx_info->operational;
 877         data.size = sizeof(struct dcbx_mib);
 878         rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
 879
 880         return rc;
 881 }
 882
 883 static enum _ecore_status_t
 884 ecore_dcbx_read_remote_mib(struct ecore_hwfn *p_hwfn,
 885                            struct ecore_ptt *p_ptt,
 886                            enum ecore_mib_read_type type)
 887 {
 888         struct ecore_dcbx_mib_meta_data data;
 889         enum _ecore_status_t rc = ECORE_SUCCESS;
 890
 891         OSAL_MEM_ZERO(&data, sizeof(data));
 892         data.addr = p_hwfn->mcp_info->port_addr +
 893                     offsetof(struct public_port, remote_dcbx_mib);
 894         data.mib = &p_hwfn->p_dcbx_info->remote;
 895         data.size = sizeof(struct dcbx_mib);
 896         rc = ecore_dcbx_copy_mib(p_hwfn, p_ptt, &data, type);
 897
 898         return rc;
 899 }
 900
 901 static enum _ecore_status_t
 902 ecore_dcbx_read_local_mib(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
 903 {
 904         struct ecore_dcbx_mib_meta_data data;
 905         enum _ecore_status_t rc = ECORE_SUCCESS;
 906
 907         OSAL_MEM_ZERO(&data, sizeof(data));
 908         data.addr = p_hwfn->mcp_info->port_addr +
 909                         offsetof(struct public_port, local_admin_dcbx_mib);
 910         data.local_admin = &p_hwfn->p_dcbx_info->local_admin;
 911         data.size = sizeof(struct dcbx_local_params);
 912         ecore_memcpy_from(p_hwfn, p_ptt, data.local_admin,
 913                           data.addr, data.size);
 914
 915         return rc;
 916 }
 917
 918 static void
 919 ecore_dcbx_read_dscp_mib(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
 920 {
 921         struct ecore_dcbx_mib_meta_data data;
 922
 923         data.addr = p_hwfn->mcp_info->port_addr +
 924                         offsetof(struct public_port, dcb_dscp_map);
 925         data.dscp_map = &p_hwfn->p_dcbx_info->dscp_map;
 926         data.size = sizeof(struct dcb_dscp_map);
 927         ecore_memcpy_from(p_hwfn, p_ptt, data.dscp_map, data.addr, data.size);
 928 }
 929
 930 static enum _ecore_status_t ecore_dcbx_read_mib(struct ecore_hwfn *p_hwfn,
 931                                                 struct ecore_ptt *p_ptt,
 932                                                 enum ecore_mib_read_type type)
 933 {
 934         enum _ecore_status_t rc = ECORE_INVAL;
 935
 936         switch (type) {
 937         case ECORE_DCBX_OPERATIONAL_MIB:
 938                 ecore_dcbx_read_dscp_mib(p_hwfn, p_ptt);
 939                 rc = ecore_dcbx_read_operational_mib(p_hwfn, p_ptt, type);
 940                 break;
 941         case ECORE_DCBX_REMOTE_MIB:
 942                 rc = ecore_dcbx_read_remote_mib(p_hwfn, p_ptt, type);
 943                 break;
 944         case ECORE_DCBX_LOCAL_MIB:
 945                 rc = ecore_dcbx_read_local_mib(p_hwfn, p_ptt);
 946                 break;
 947         case ECORE_DCBX_REMOTE_LLDP_MIB:
 948                 rc = ecore_dcbx_read_remote_lldp_mib(p_hwfn, p_ptt, type);
 949                 break;
 950         case ECORE_DCBX_LOCAL_LLDP_MIB:
 951                 rc = ecore_dcbx_read_local_lldp_mib(p_hwfn, p_ptt);
 952                 break;
 953         default:
 954                 DP_ERR(p_hwfn, "MIB read err, unknown mib type %d\n", type);
 955         }
 956
 957         return rc;
 958 }
 959
 960 /*
 961  * Read updated MIB.
 962  * Reconfigure QM and invoke PF update ramrod command if operational MIB
 963  * change is detected.
 964  */
 965 enum _ecore_status_t
 966 ecore_dcbx_mib_update_event(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
 967                             enum ecore_mib_read_type type)
 968 {
 969         enum _ecore_status_t rc = ECORE_SUCCESS;
 970
 971         rc = ecore_dcbx_read_mib(p_hwfn, p_ptt, type);
 972         if (rc)
 973                 return rc;
 974
 975         if (type == ECORE_DCBX_OPERATIONAL_MIB) {
 976                 ecore_dcbx_get_dscp_params(p_hwfn, &p_hwfn->p_dcbx_info->get);
 977
 978                 rc = ecore_dcbx_process_mib_info(p_hwfn);
 979                 if (!rc) {
 980                         /* reconfigure tcs of QM queues according
 981                          * to negotiation results
 982                          */
 983                         ecore_qm_reconf(p_hwfn, p_ptt);
 984
 985                         /* update storm FW with negotiation results */
 986                         ecore_sp_pf_update_dcbx(p_hwfn);
 987
 988 #ifdef CONFIG_ECORE_ROCE
 989                         /* for roce PFs, we may want to enable/disable DPM
 990                          * when DCBx change occurs
 991                          */
 992                         if (ECORE_IS_ROCE_PERSONALITY(p_hwfn))
 993                                 ecore_roce_dpm_dcbx(p_hwfn, p_ptt);
 994 #endif
 995                 }
 996         }
 997
 998         ecore_dcbx_get_params(p_hwfn, &p_hwfn->p_dcbx_info->get, type);
 999
1000         if (type == ECORE_DCBX_OPERATIONAL_MIB) {
1001                 struct ecore_dcbx_results *p_data;
1002                 u16 val;
1003
1004                 /* Update the DSCP to TC mapping bit if required */
1005                 if (p_hwfn->p_dcbx_info->dscp_nig_update) {
1006                         ecore_wr(p_hwfn, p_ptt, NIG_REG_DSCP_TO_TC_MAP_ENABLE,
1007                                  0x1);
1008                         p_hwfn->p_dcbx_info->dscp_nig_update = false;
1009                 }
1010
1011                 /* Configure in NIG which protocols support EDPM and should
1012                  * honor PFC.
1013                  */
1014                 p_data = &p_hwfn->p_dcbx_info->results;
1015                 val = (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE].tc) |
1016                         (0x1 << p_data->arr[DCBX_PROTOCOL_ROCE_V2].tc);
1017                 val <<= NIG_REG_TX_EDPM_CTRL_TX_EDPM_TC_EN_SHIFT;
1018                 val |= NIG_REG_TX_EDPM_CTRL_TX_EDPM_EN;
1019                 ecore_wr(p_hwfn, p_ptt, NIG_REG_TX_EDPM_CTRL, val);
1020         }
1021
1022         OSAL_DCBX_AEN(p_hwfn, type);
1023
1024         return rc;
1025 }
1026
1027 enum _ecore_status_t ecore_dcbx_info_alloc(struct ecore_hwfn *p_hwfn)
1028 {
1029         OSAL_BUILD_BUG_ON(ECORE_LLDP_CHASSIS_ID_STAT_LEN !=
1030                           LLDP_CHASSIS_ID_STAT_LEN);
1031         OSAL_BUILD_BUG_ON(ECORE_LLDP_PORT_ID_STAT_LEN !=
1032                           LLDP_PORT_ID_STAT_LEN);
1033         OSAL_BUILD_BUG_ON(ECORE_DCBX_MAX_APP_PROTOCOL !=
1034                           DCBX_MAX_APP_PROTOCOL);
1035
1036         p_hwfn->p_dcbx_info = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL,
1037                                           sizeof(*p_hwfn->p_dcbx_info));
1038         if (!p_hwfn->p_dcbx_info) {
1039                 DP_NOTICE(p_hwfn, true,
1040                           "Failed to allocate `struct ecore_dcbx_info'");
1041                 return ECORE_NOMEM;
1042         }
1043
1044         p_hwfn->p_dcbx_info->iwarp_port =
1045                 p_hwfn->pf_params.rdma_pf_params.iwarp_port;
1046
1047         return ECORE_SUCCESS;
1048 }
1049
1050 void ecore_dcbx_info_free(struct ecore_hwfn *p_hwfn)
1051 {
1052         OSAL_FREE(p_hwfn->p_dev, p_hwfn->p_dcbx_info);
1053         p_hwfn->p_dcbx_info = OSAL_NULL;
1054 }
1055
1056 static void ecore_dcbx_update_protocol_data(struct protocol_dcb_data *p_data,
1057                                             struct ecore_dcbx_results *p_src,
1058                                             enum dcbx_protocol_type type)
1059 {
1060         p_data->dcb_enable_flag = p_src->arr[type].enable;
1061         p_data->dcb_priority = p_src->arr[type].priority;
1062         p_data->dcb_tc = p_src->arr[type].tc;
1063         p_data->dscp_enable_flag = p_src->arr[type].dscp_enable;
1064         p_data->dscp_val = p_src->arr[type].dscp_val;
1065 }
1066
1067 /* Set pf update ramrod command params */
1068 void ecore_dcbx_set_pf_update_params(struct ecore_dcbx_results *p_src,
1069                                      struct pf_update_ramrod_data *p_dest)
1070 {
1071         struct protocol_dcb_data *p_dcb_data;
1072         u8 update_flag;
1073
1074         p_dest->pf_id = p_src->pf_id;
1075
1076         update_flag = p_src->arr[DCBX_PROTOCOL_FCOE].update;
1077         p_dest->update_fcoe_dcb_data_mode = update_flag;
1078
1079         update_flag = p_src->arr[DCBX_PROTOCOL_ROCE].update;
1080         p_dest->update_roce_dcb_data_mode = update_flag;
1081
1082         update_flag = p_src->arr[DCBX_PROTOCOL_ROCE_V2].update;
1083         p_dest->update_rroce_dcb_data_mode = update_flag;
1084
1085         update_flag = p_src->arr[DCBX_PROTOCOL_ISCSI].update;
1086         p_dest->update_iscsi_dcb_data_mode = update_flag;
1087         update_flag = p_src->arr[DCBX_PROTOCOL_ETH].update;
1088         p_dest->update_eth_dcb_data_mode = update_flag;
1089         update_flag = p_src->arr[DCBX_PROTOCOL_IWARP].update;
1090         p_dest->update_iwarp_dcb_data_mode = update_flag;
1091
1092         p_dcb_data = &p_dest->fcoe_dcb_data;
1093         ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_FCOE);
1094         p_dcb_data = &p_dest->roce_dcb_data;
1095         ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ROCE);
1096         p_dcb_data = &p_dest->rroce_dcb_data;
1097         ecore_dcbx_update_protocol_data(p_dcb_data, p_src,
1098                                         DCBX_PROTOCOL_ROCE_V2);
1099         p_dcb_data = &p_dest->iscsi_dcb_data;
1100         ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ISCSI);
1101         p_dcb_data = &p_dest->eth_dcb_data;
1102         ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_ETH);
1103         p_dcb_data = &p_dest->iwarp_dcb_data;
1104         ecore_dcbx_update_protocol_data(p_dcb_data, p_src, DCBX_PROTOCOL_IWARP);
1105 }
1106
1107 enum _ecore_status_t ecore_dcbx_query_params(struct ecore_hwfn *p_hwfn,
1108                                              struct ecore_dcbx_get *p_get,
1109                                              enum ecore_mib_read_type type)
1110 {
1111         struct ecore_ptt *p_ptt;
1112         enum _ecore_status_t rc;
1113
1114         if (IS_VF(p_hwfn->p_dev))
1115                 return ECORE_INVAL;
1116
1117         p_ptt = ecore_ptt_acquire(p_hwfn);
1118         if (!p_ptt) {
1119                 rc = ECORE_TIMEOUT;
1120                 DP_ERR(p_hwfn, "rc = %d\n", rc);
1121                 return rc;
1122         }
1123
1124         rc = ecore_dcbx_read_mib(p_hwfn, p_ptt, type);
1125         if (rc != ECORE_SUCCESS)
1126                 goto out;
1127
1128         rc = ecore_dcbx_get_params(p_hwfn, p_get, type);
1129
1130 out:
1131         ecore_ptt_release(p_hwfn, p_ptt);
1132         return rc;
1133 }
1134
1135 static void
1136 ecore_dcbx_set_pfc_data(struct ecore_hwfn *p_hwfn,
1137                         u32 *pfc, struct ecore_dcbx_params *p_params)
1138 {
1139         u8 pfc_map = 0;
1140         int i;
1141
1142         *pfc &= ~DCBX_PFC_ERROR_MASK;
1143
1144         if (p_params->pfc.willing)
1145                 *pfc |= DCBX_PFC_WILLING_MASK;
1146         else
1147                 *pfc &= ~DCBX_PFC_WILLING_MASK;
1148
1149         if (p_params->pfc.enabled)
1150                 *pfc |= DCBX_PFC_ENABLED_MASK;
1151         else
1152                 *pfc &= ~DCBX_PFC_ENABLED_MASK;
1153
1154         *pfc &= ~DCBX_PFC_CAPS_MASK;
1155         *pfc |= (u32)p_params->pfc.max_tc << DCBX_PFC_CAPS_OFFSET;
1156
1157         for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++)
1158                 if (p_params->pfc.prio[i])
1159                         pfc_map |= (1 << i);
1160         *pfc &= ~DCBX_PFC_PRI_EN_BITMAP_MASK;
1161         *pfc |= (pfc_map << DCBX_PFC_PRI_EN_BITMAP_OFFSET);
1162
1163         DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "pfc = 0x%x\n", *pfc);
1164 }
1165
1166 static void
1167 ecore_dcbx_set_ets_data(struct ecore_hwfn *p_hwfn,
1168                         struct dcbx_ets_feature *p_ets,
1169                         struct ecore_dcbx_params *p_params)
1170 {
1171         u8 *bw_map, *tsa_map;
1172         u32 val;
1173         int i;
1174
1175         if (p_params->ets_willing)
1176                 p_ets->flags |= DCBX_ETS_WILLING_MASK;
1177         else
1178                 p_ets->flags &= ~DCBX_ETS_WILLING_MASK;
1179
1180         if (p_params->ets_cbs)
1181                 p_ets->flags |= DCBX_ETS_CBS_MASK;
1182         else
1183                 p_ets->flags &= ~DCBX_ETS_CBS_MASK;
1184
1185         if (p_params->ets_enabled)
1186                 p_ets->flags |= DCBX_ETS_ENABLED_MASK;
1187         else
1188                 p_ets->flags &= ~DCBX_ETS_ENABLED_MASK;
1189
1190         p_ets->flags &= ~DCBX_ETS_MAX_TCS_MASK;
1191         p_ets->flags |= (u32)p_params->max_ets_tc << DCBX_ETS_MAX_TCS_OFFSET;
1192
1193         bw_map = (u8 *)&p_ets->tc_bw_tbl[0];
1194         tsa_map = (u8 *)&p_ets->tc_tsa_tbl[0];
1195         p_ets->pri_tc_tbl[0] = 0;
1196         for (i = 0; i < ECORE_MAX_PFC_PRIORITIES; i++) {
1197                 bw_map[i] = p_params->ets_tc_bw_tbl[i];
1198                 tsa_map[i] = p_params->ets_tc_tsa_tbl[i];
1199                 /* Copy the priority value to the corresponding 4 bits in the
1200                  * traffic class table.
1201                  */
1202                 val = (((u32)p_params->ets_pri_tc_tbl[i]) << ((7 - i) * 4));
1203                 p_ets->pri_tc_tbl[0] |= val;
1204         }
1205         for (i = 0; i < 2; i++) {
1206                 p_ets->tc_bw_tbl[i] = OSAL_CPU_TO_BE32(p_ets->tc_bw_tbl[i]);
1207                 p_ets->tc_tsa_tbl[i] = OSAL_CPU_TO_BE32(p_ets->tc_tsa_tbl[i]);
1208         }
1209
1210         DP_VERBOSE(p_hwfn, ECORE_MSG_DCB,
1211                    "flags = 0x%x pri_tc = 0x%x tc_bwl[] = {0x%x, 0x%x} tc_tsa = {0x%x, 0x%x}\n",
1212                    p_ets->flags, p_ets->pri_tc_tbl[0], p_ets->tc_bw_tbl[0],
1213                    p_ets->tc_bw_tbl[1], p_ets->tc_tsa_tbl[0],
1214                    p_ets->tc_tsa_tbl[1]);
1215 }
1216
1217 static void
1218 ecore_dcbx_set_app_data(struct ecore_hwfn *p_hwfn,
1219                         struct dcbx_app_priority_feature *p_app,
1220                         struct ecore_dcbx_params *p_params, bool ieee)
1221 {
1222         u32 *entry;
1223         int i;
1224
1225         if (p_params->app_willing)
1226                 p_app->flags |= DCBX_APP_WILLING_MASK;
1227         else
1228                 p_app->flags &= ~DCBX_APP_WILLING_MASK;
1229
1230         if (p_params->app_valid)
1231                 p_app->flags |= DCBX_APP_ENABLED_MASK;
1232         else
1233                 p_app->flags &= ~DCBX_APP_ENABLED_MASK;
1234
1235         p_app->flags &= ~DCBX_APP_NUM_ENTRIES_MASK;
1236         p_app->flags |= (u32)p_params->num_app_entries <<
1237                         DCBX_APP_NUM_ENTRIES_OFFSET;
1238
1239         for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
1240                 entry = &p_app->app_pri_tbl[i].entry;
1241                 *entry = 0;
1242                 if (ieee) {
1243                         *entry &= ~(DCBX_APP_SF_IEEE_MASK | DCBX_APP_SF_MASK);
1244                         switch (p_params->app_entry[i].sf_ieee) {
1245                         case ECORE_DCBX_SF_IEEE_ETHTYPE:
1246                                 *entry  |= ((u32)DCBX_APP_SF_IEEE_ETHTYPE <<
1247                                             DCBX_APP_SF_IEEE_OFFSET);
1248                                 *entry  |= ((u32)DCBX_APP_SF_ETHTYPE <<
1249                                             DCBX_APP_SF_OFFSET);
1250                                 break;
1251                         case ECORE_DCBX_SF_IEEE_TCP_PORT:
1252                                 *entry  |= ((u32)DCBX_APP_SF_IEEE_TCP_PORT <<
1253                                             DCBX_APP_SF_IEEE_OFFSET);
1254                                 *entry  |= ((u32)DCBX_APP_SF_PORT <<
1255                                             DCBX_APP_SF_OFFSET);
1256                                 break;
1257                         case ECORE_DCBX_SF_IEEE_UDP_PORT:
1258                                 *entry  |= ((u32)DCBX_APP_SF_IEEE_UDP_PORT <<
1259                                             DCBX_APP_SF_IEEE_OFFSET);
1260                                 *entry  |= ((u32)DCBX_APP_SF_PORT <<
1261                                             DCBX_APP_SF_OFFSET);
1262                                 break;
1263                         case ECORE_DCBX_SF_IEEE_TCP_UDP_PORT:
1264                                 *entry  |= (u32)DCBX_APP_SF_IEEE_TCP_UDP_PORT <<
1265                                             DCBX_APP_SF_IEEE_OFFSET;
1266                                 *entry  |= ((u32)DCBX_APP_SF_PORT <<
1267                                             DCBX_APP_SF_OFFSET);
1268                                 break;
1269                         }
1270                 } else {
1271                         *entry &= ~DCBX_APP_SF_MASK;
1272                         if (p_params->app_entry[i].ethtype)
1273                                 *entry  |= ((u32)DCBX_APP_SF_ETHTYPE <<
1274                                             DCBX_APP_SF_OFFSET);
1275                         else
1276                                 *entry  |= ((u32)DCBX_APP_SF_PORT <<
1277                                             DCBX_APP_SF_OFFSET);
1278                 }
1279                 *entry &= ~DCBX_APP_PROTOCOL_ID_MASK;
1280                 *entry |= ((u32)p_params->app_entry[i].proto_id <<
1281                            DCBX_APP_PROTOCOL_ID_OFFSET);
1282                 *entry &= ~DCBX_APP_PRI_MAP_MASK;
1283                 *entry |= ((u32)(p_params->app_entry[i].prio) <<
1284                            DCBX_APP_PRI_MAP_OFFSET);
1285         }
1286
1287         DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "flags = 0x%x\n", p_app->flags);
1288 }
1289
1290 static enum _ecore_status_t
1291 ecore_dcbx_set_local_params(struct ecore_hwfn *p_hwfn,
1292                             struct dcbx_local_params *local_admin,
1293                             struct ecore_dcbx_set *params)
1294 {
1295         bool ieee = false;
1296
1297         local_admin->flags = 0;
1298         OSAL_MEMCPY(&local_admin->features,
1299                     &p_hwfn->p_dcbx_info->operational.features,
1300                     sizeof(local_admin->features));
1301
1302         if (params->enabled) {
1303                 local_admin->config = params->ver_num;
1304                 ieee = !!(params->ver_num & DCBX_CONFIG_VERSION_IEEE);
1305         } else
1306                 local_admin->config = DCBX_CONFIG_VERSION_DISABLED;
1307
1308         if (params->override_flags & ECORE_DCBX_OVERRIDE_PFC_CFG)
1309                 ecore_dcbx_set_pfc_data(p_hwfn, &local_admin->features.pfc,
1310                                         &params->config.params);
1311
1312         if (params->override_flags & ECORE_DCBX_OVERRIDE_ETS_CFG)
1313                 ecore_dcbx_set_ets_data(p_hwfn, &local_admin->features.ets,
1314                                         &params->config.params);
1315
1316         if (params->override_flags & ECORE_DCBX_OVERRIDE_APP_CFG)
1317                 ecore_dcbx_set_app_data(p_hwfn, &local_admin->features.app,
1318                                         &params->config.params, ieee);
1319
1320         return ECORE_SUCCESS;
1321 }
1322
1323 static enum _ecore_status_t
1324 ecore_dcbx_set_dscp_params(struct ecore_hwfn *p_hwfn,
1325                            struct dcb_dscp_map *p_dscp_map,
1326                            struct ecore_dcbx_set *p_params)
1327 {
1328         int entry, i, j;
1329         u32 val;
1330
1331         OSAL_MEMCPY(p_dscp_map, &p_hwfn->p_dcbx_info->dscp_map,
1332                     sizeof(*p_dscp_map));
1333
1334         p_dscp_map->flags &= ~DCB_DSCP_ENABLE_MASK;
1335         if (p_params->dscp.enabled)
1336                 p_dscp_map->flags |= DCB_DSCP_ENABLE_MASK;
1337
1338         for (i = 0, entry = 0; i < 8; i++) {
1339                 val = 0;
1340                 for (j = 0; j < 8; j++, entry++)
1341                         val |= (((u32)p_params->dscp.dscp_pri_map[entry]) <<
1342                                 (j * 4));
1343
1344                 p_dscp_map->dscp_pri_map[i] = OSAL_CPU_TO_BE32(val);
1345         }
1346
1347         p_hwfn->p_dcbx_info->dscp_nig_update = true;
1348
1349         DP_VERBOSE(p_hwfn, ECORE_MSG_DCB, "flags = 0x%x\n", p_dscp_map->flags);
1350
1351         return ECORE_SUCCESS;
1352 }
1353
1354 enum _ecore_status_t ecore_dcbx_config_params(struct ecore_hwfn *p_hwfn,
1355                                               struct ecore_ptt *p_ptt,
1356                                               struct ecore_dcbx_set *params,
1357                                               bool hw_commit)
1358 {
1359         struct dcbx_local_params local_admin;
1360         struct ecore_dcbx_mib_meta_data data;
1361         struct dcb_dscp_map dscp_map;
1362         u32 resp = 0, param = 0;
1363         enum _ecore_status_t rc = ECORE_SUCCESS;
1364
1365         if (!hw_commit) {
1366                 OSAL_MEMCPY(&p_hwfn->p_dcbx_info->set, params,
1367                             sizeof(p_hwfn->p_dcbx_info->set));
1368                 return ECORE_SUCCESS;
1369         }
1370
1371         /* clear set-parmas cache */
1372         OSAL_MEMSET(&p_hwfn->p_dcbx_info->set, 0,
1373                     sizeof(struct ecore_dcbx_set));
1374
1375         OSAL_MEMSET(&local_admin, 0, sizeof(local_admin));
1376         ecore_dcbx_set_local_params(p_hwfn, &local_admin, params);
1377
1378         data.addr = p_hwfn->mcp_info->port_addr +
1379                         offsetof(struct public_port, local_admin_dcbx_mib);
1380         data.local_admin = &local_admin;
1381         data.size = sizeof(struct dcbx_local_params);
1382         ecore_memcpy_to(p_hwfn, p_ptt, data.addr, data.local_admin, data.size);
1383
1384         if (params->override_flags & ECORE_DCBX_OVERRIDE_DSCP_CFG) {
1385                 OSAL_MEMSET(&dscp_map, 0, sizeof(dscp_map));
1386                 ecore_dcbx_set_dscp_params(p_hwfn, &dscp_map, params);
1387
1388                 data.addr = p_hwfn->mcp_info->port_addr +
1389                                 offsetof(struct public_port, dcb_dscp_map);
1390                 data.dscp_map = &dscp_map;
1391                 data.size = sizeof(struct dcb_dscp_map);
1392                 ecore_memcpy_to(p_hwfn, p_ptt, data.addr, data.dscp_map,
1393                                 data.size);
1394         }
1395
1396         rc = ecore_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_SET_DCBX,
1397                            1 << DRV_MB_PARAM_LLDP_SEND_OFFSET, &resp, &param);
1398         if (rc != ECORE_SUCCESS)
1399                 DP_NOTICE(p_hwfn, false,
1400                           "Failed to send DCBX update request\n");
1401
1402         return rc;
1403 }
1404
1405 enum _ecore_status_t ecore_dcbx_get_config_params(struct ecore_hwfn *p_hwfn,
1406                                                   struct ecore_dcbx_set *params)
1407 {
1408         struct ecore_dcbx_get *dcbx_info;
1409         int rc;
1410
1411         if (p_hwfn->p_dcbx_info->set.config.valid) {
1412                 OSAL_MEMCPY(params, &p_hwfn->p_dcbx_info->set,
1413                             sizeof(struct ecore_dcbx_set));
1414                 return ECORE_SUCCESS;
1415         }
1416
1417         dcbx_info = OSAL_ALLOC(p_hwfn->p_dev, GFP_KERNEL,
1418                                sizeof(*dcbx_info));
1419         if (!dcbx_info) {
1420                 DP_ERR(p_hwfn, "Failed to allocate struct ecore_dcbx_info\n");
1421                 return ECORE_NOMEM;
1422         }
1423
1424         OSAL_MEMSET(dcbx_info, 0, sizeof(*dcbx_info));
1425         rc = ecore_dcbx_query_params(p_hwfn, dcbx_info,
1426                                      ECORE_DCBX_OPERATIONAL_MIB);
1427         if (rc) {
1428                 OSAL_FREE(p_hwfn->p_dev, dcbx_info);
1429                 return rc;
1430         }
1431         p_hwfn->p_dcbx_info->set.override_flags = 0;
1432
1433         p_hwfn->p_dcbx_info->set.ver_num = DCBX_CONFIG_VERSION_DISABLED;
1434         if (dcbx_info->operational.cee)
1435                 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_CEE;
1436         if (dcbx_info->operational.ieee)
1437                 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_IEEE;
1438         if (dcbx_info->operational.local)
1439                 p_hwfn->p_dcbx_info->set.ver_num |= DCBX_CONFIG_VERSION_STATIC;
1440
1441         p_hwfn->p_dcbx_info->set.enabled = dcbx_info->operational.enabled;
1442         OSAL_MEMCPY(&p_hwfn->p_dcbx_info->set.config.params,
1443                     &dcbx_info->operational.params,
1444                     sizeof(struct ecore_dcbx_admin_params));
1445         p_hwfn->p_dcbx_info->set.config.valid = true;
1446
1447         OSAL_MEMCPY(params, &p_hwfn->p_dcbx_info->set,
1448                     sizeof(struct ecore_dcbx_set));
1449
1450         OSAL_FREE(p_hwfn->p_dev, dcbx_info);
1451
1452         return ECORE_SUCCESS;
1453 }