2 * Copyright (c) 2017-2018 Cavium, Inc.
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32 #ifndef __ECORE_INT_API_H__
33 #define __ECORE_INT_API_H__
35 #define ECORE_SB_IDX 0x0002
38 #define TX_PI(tc) (RX_PI + 1 + tc)
40 #ifndef ECORE_INT_MODE
41 #define ECORE_INT_MODE
50 struct ecore_sb_info {
51 struct status_block *sb_virt;
53 u32 sb_ack; /* Last given ack */
55 void OSAL_IOMEM *igu_addr;
57 #define ECORE_SB_INFO_INIT 0x1
58 #define ECORE_SB_INFO_SETUP 0x2
60 #ifdef ECORE_CONFIG_DIRECT_HWFN
61 struct ecore_hwfn *p_hwfn;
63 struct ecore_dev *p_dev;
66 struct ecore_sb_info_dbg {
72 struct ecore_sb_cnt_info {
73 /* Original, current, and free SBs for PF */
78 /* Original, current and free SBS for child VFs */
84 static OSAL_INLINE u16 ecore_sb_update_sb_idx(struct ecore_sb_info *sb_info)
89 // barrier(); /* status block is written to by the chip */
90 // FIXME: need some sort of barrier.
91 prod = OSAL_LE32_TO_CPU(sb_info->sb_virt->prod_index) &
92 STATUS_BLOCK_PROD_INDEX_MASK;
93 if (sb_info->sb_ack != prod) {
94 sb_info->sb_ack = prod;
98 OSAL_MMIOWB(sb_info->p_dev);
103 * @brief This function creates an update command for interrupts that is
104 * written to the IGU.
106 * @param sb_info - This is the structure allocated and
107 * initialized per status block. Assumption is
108 * that it was initialized using ecore_sb_init
109 * @param int_cmd - Enable/Disable/Nop
110 * @param upd_flg - whether igu consumer should be
113 * @return OSAL_INLINE void
115 static OSAL_INLINE void ecore_sb_ack(struct ecore_sb_info *sb_info,
116 enum igu_int_cmd int_cmd, u8 upd_flg)
118 struct igu_prod_cons_update igu_ack = { 0 };
120 igu_ack.sb_id_and_flags =
121 ((sb_info->sb_ack << IGU_PROD_CONS_UPDATE_SB_INDEX_SHIFT) |
122 (upd_flg << IGU_PROD_CONS_UPDATE_UPDATE_FLAG_SHIFT) |
123 (int_cmd << IGU_PROD_CONS_UPDATE_ENABLE_INT_SHIFT) |
124 (IGU_SEG_ACCESS_REG <<
125 IGU_PROD_CONS_UPDATE_SEGMENT_ACCESS_SHIFT));
127 #ifdef ECORE_CONFIG_DIRECT_HWFN
128 DIRECT_REG_WR(sb_info->p_hwfn, sb_info->igu_addr,
129 igu_ack.sb_id_and_flags);
131 DIRECT_REG_WR(OSAL_NULL, sb_info->igu_addr, igu_ack.sb_id_and_flags);
133 /* Both segments (interrupts & acks) are written to same place address;
134 * Need to guarantee all commands will be received (in-order) by HW.
136 OSAL_MMIOWB(sb_info->p_dev);
137 OSAL_BARRIER(sb_info->p_dev);
140 #ifdef ECORE_CONFIG_DIRECT_HWFN
141 static OSAL_INLINE void __internal_ram_wr(struct ecore_hwfn *p_hwfn,
142 void OSAL_IOMEM *addr,
145 static OSAL_INLINE void __internal_ram_wr(void *p_hwfn,
146 void OSAL_IOMEM *addr,
153 for (i = 0; i < size / sizeof(*data); i++)
154 DIRECT_REG_WR(p_hwfn, &((u32 OSAL_IOMEM *)addr)[i], data[i]);
157 #ifdef ECORE_CONFIG_DIRECT_HWFN
158 static OSAL_INLINE void internal_ram_wr(struct ecore_hwfn *p_hwfn,
159 void OSAL_IOMEM *addr,
162 __internal_ram_wr(p_hwfn, addr, size, data);
165 static OSAL_INLINE void internal_ram_wr(void OSAL_IOMEM *addr,
168 __internal_ram_wr(OSAL_NULL, addr, size, data);
175 enum ecore_coalescing_fsm {
176 ECORE_COAL_RX_STATE_MACHINE,
177 ECORE_COAL_TX_STATE_MACHINE
181 * @brief ecore_int_cau_conf_pi - configure cau for a given
191 void ecore_int_cau_conf_pi(struct ecore_hwfn *p_hwfn,
192 struct ecore_ptt *p_ptt,
193 struct ecore_sb_info *p_sb,
195 enum ecore_coalescing_fsm coalescing_fsm,
199 * @brief ecore_int_igu_enable_int - enable device interrupts
203 * @param int_mode - interrupt mode to use
205 void ecore_int_igu_enable_int(struct ecore_hwfn *p_hwfn,
206 struct ecore_ptt *p_ptt,
207 enum ecore_int_mode int_mode);
210 * @brief ecore_int_igu_disable_int - disable device interrupts
215 void ecore_int_igu_disable_int(struct ecore_hwfn *p_hwfn,
216 struct ecore_ptt *p_ptt);
219 * @brief ecore_int_igu_read_sisr_reg - Reads the single isr multiple dpc
226 u64 ecore_int_igu_read_sisr_reg(struct ecore_hwfn *p_hwfn);
228 #define ECORE_SP_SB_ID 0xffff
231 * @brief ecore_int_sb_init - Initializes the sb_info structure.
233 * once the structure is initialized it can be passed to sb related functions.
237 * @param sb_info points to an uninitialized (but
238 * allocated) sb_info structure
239 * @param sb_virt_addr
241 * @param sb_id the sb_id to be used (zero based in driver)
242 * should use ECORE_SP_SB_ID for SP Status block
244 * @return enum _ecore_status_t
246 enum _ecore_status_t ecore_int_sb_init(struct ecore_hwfn *p_hwfn,
247 struct ecore_ptt *p_ptt,
248 struct ecore_sb_info *sb_info,
250 dma_addr_t sb_phy_addr,
253 * @brief ecore_int_sb_setup - Setup the sb.
257 * @param sb_info initialized sb_info structure
259 void ecore_int_sb_setup(
260 struct ecore_hwfn *p_hwfn,
261 struct ecore_ptt *p_ptt,
262 struct ecore_sb_info *sb_info);
265 * @brief ecore_int_sb_release - releases the sb_info structure.
267 * once the structure is released, it's memory can be freed
270 * @param sb_info points to an allocated sb_info structure
271 * @param sb_id the sb_id to be used (zero based in driver)
272 * should never be equal to ECORE_SP_SB_ID
275 * @return enum _ecore_status_t
277 enum _ecore_status_t ecore_int_sb_release(struct ecore_hwfn *p_hwfn,
278 struct ecore_sb_info *sb_info,
282 * @brief ecore_int_sp_dpc - To be called when an interrupt is received on the
283 * default status block.
285 * @param p_hwfn - pointer to hwfn
288 void ecore_int_sp_dpc(osal_int_ptr_t hwfn_cookie);
291 * @brief ecore_int_get_num_sbs - get the number of status
292 * blocks configured for this funciton in the igu.
295 * @param p_sb_cnt_info
299 void ecore_int_get_num_sbs(struct ecore_hwfn *p_hwfn,
300 struct ecore_sb_cnt_info *p_sb_cnt_info);
303 * @brief ecore_int_disable_post_isr_release - performs the cleanup post ISR
304 * release. The API need to be called after releasing all slowpath IRQs
310 void ecore_int_disable_post_isr_release(struct ecore_dev *p_dev);
313 * @brief ecore_int_attn_clr_enable - sets whether the general behavior is
314 * preventing attentions from being reasserted, or following the
315 * attributes of the specific attention.
321 void ecore_int_attn_clr_enable(struct ecore_dev *p_dev, bool clr_enable);
324 * @brief Read debug information regarding a given SB.
328 * @param p_sb - point to Status block for which we want to get info.
329 * @param p_info - pointer to struct to fill with information regarding SB.
331 * @return ECORE_SUCCESS if pointer is filled; failure otherwise.
333 enum _ecore_status_t ecore_int_get_sb_dbg(struct ecore_hwfn *p_hwfn,
334 struct ecore_ptt *p_ptt,
335 struct ecore_sb_info *p_sb,
336 struct ecore_sb_info_dbg *p_info);
339 * @brief - Move a free Status block between PF and child VF
343 * @param sb_id - The PF fastpath vector to be moved [re-assigned if claiming
344 * from VF, given-up if moving to VF]
345 * @param b_to_vf - PF->VF == true, VF->PF == false
347 * @return ECORE_SUCCESS if SB successfully moved.
350 ecore_int_igu_relocate_sb(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
351 u16 sb_id, bool b_to_vf);