sys/dev/qlnx/qlnxr/qlnxr_os.c

   1 /*
   2  * Copyright (c) 2018-2019 Cavium, Inc.
   3  * All rights reserved.
   4  *
   5  *  Redistribution and use in source and binary forms, with or without
   6  *  modification, are permitted provided that the following conditions
   7  *  are met:
   8  *
   9  *  1. Redistributions of source code must retain the above copyright
  10  *     notice, this list of conditions and the following disclaimer.
  11  *  2. Redistributions in binary form must reproduce the above copyright
  12  *     notice, this list of conditions and the following disclaimer in the
  13  *     documentation and/or other materials provided with the distribution.
  14  *
  15  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  16  *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  17  *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  18  *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  19  *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  20  *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  21  *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  22  *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  23  *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  24  *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  25  *  POSSIBILITY OF SUCH DAMAGE.
  26  */
  27
  28
  29 /*
  30  * File: qlnxr_os.c
  31  */
  32 #include <sys/cdefs.h>
  33 __FBSDID("$FreeBSD$");
  34
  35 #include "qlnxr_def.h"
  36
  37 SYSCTL_NODE(_dev, OID_AUTO, qnxr, CTLFLAG_RW, 0, "Qlogic RDMA module");
  38
  39 uint32_t delayed_ack = 0;
  40 SYSCTL_UINT(_dev_qnxr, OID_AUTO, delayed_ack, CTLFLAG_RW, &delayed_ack, 1,
  41         "iWARP: Delayed Ack: 0 - Disabled 1 - Enabled. Default: Disabled");
  42
  43 uint32_t timestamp = 1;
  44 SYSCTL_UINT(_dev_qnxr, OID_AUTO, timestamp, CTLFLAG_RW, &timestamp, 1,
  45         "iWARP: Timestamp: 0 - Disabled 1 - Enabled. Default:Enabled");
  46
  47 uint32_t rcv_wnd_size = 0;
  48 SYSCTL_UINT(_dev_qnxr, OID_AUTO, rcv_wnd_size, CTLFLAG_RW, &rcv_wnd_size, 1,
  49         "iWARP: Receive Window Size in K. Default 1M");
  50
  51 uint32_t crc_needed = 1;
  52 SYSCTL_UINT(_dev_qnxr, OID_AUTO, crc_needed, CTLFLAG_RW, &crc_needed, 1,
  53         "iWARP: CRC needed 0 - Disabled 1 - Enabled. Default:Enabled");
  54
  55 uint32_t peer2peer = 1;
  56 SYSCTL_UINT(_dev_qnxr, OID_AUTO, peer2peer, CTLFLAG_RW, &peer2peer, 1,
  57         "iWARP: Support peer2peer ULPs 0 - Disabled 1 - Enabled. Default:Enabled");
  58
  59 uint32_t mpa_enhanced = 1;
  60 SYSCTL_UINT(_dev_qnxr, OID_AUTO, mpa_enhanced, CTLFLAG_RW, &mpa_enhanced, 1,
  61         "iWARP: MPA Enhanced mode. Default:1");
  62
  63 uint32_t rtr_type = 7;
  64 SYSCTL_UINT(_dev_qnxr, OID_AUTO, rtr_type, CTLFLAG_RW, &rtr_type, 1,
  65         "iWARP: RDMAP opcode to use for the RTR message: BITMAP 1: RDMA_SEND 2: RDMA_WRITE 4: RDMA_READ. Default: 7");
  66
  67
  68 #define QNXR_WQ_MULTIPLIER_MIN  (1)
  69 #define QNXR_WQ_MULTIPLIER_MAX  (7)
  70 #define QNXR_WQ_MULTIPLIER_DFT  (3)
  71
  72 uint32_t wq_multiplier= QNXR_WQ_MULTIPLIER_DFT;
  73 SYSCTL_UINT(_dev_qnxr, OID_AUTO, wq_multiplier, CTLFLAG_RW, &wq_multiplier, 1,
  74         " When creating a WQ the actual number of WQE created will"
  75         " be multiplied by this number (default is 3).");
  76 static ssize_t
  77 show_rev(struct device *device, struct device_attribute *attr,
  78         char *buf)
  79 {
  80         struct qlnxr_dev *dev = dev_get_drvdata(device);
  81
  82         return sprintf(buf, "0x%x\n", dev->cdev->vendor_id);
  83 }
  84
  85 static ssize_t
  86 show_hca_type(struct device *device,
  87         struct device_attribute *attr, char *buf)
  88 {
  89         struct qlnxr_dev *dev = dev_get_drvdata(device);
  90         return sprintf(buf, "QLogic0x%x\n", dev->cdev->device_id);
  91 }
  92
  93 static ssize_t
  94 show_fw_ver(struct device *device,
  95         struct device_attribute *attr, char *buf)
  96 {
  97         struct qlnxr_dev *dev = dev_get_drvdata(device);
  98         uint32_t fw_ver = (uint32_t) dev->attr.fw_ver;
  99
 100         return sprintf(buf, "%d.%d.%d\n",
 101                        (fw_ver >> 24) & 0xff, (fw_ver >> 16) & 0xff,
 102                        (fw_ver >> 8) & 0xff);
 103 }
 104 static ssize_t
 105 show_board(struct device *device,
 106         struct device_attribute *attr, char *buf)
 107 {
 108         struct qlnxr_dev *dev = dev_get_drvdata(device);
 109         return sprintf(buf, "%x\n", dev->cdev->device_id);
 110 }
 111
 112 static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
 113 static DEVICE_ATTR(hca_type, S_IRUGO, show_hca_type, NULL);
 114 static DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
 115 static DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
 116
 117 static struct device_attribute *qlnxr_class_attributes[] = {
 118         &dev_attr_hw_rev,
 119         &dev_attr_hca_type,
 120         &dev_attr_fw_ver,
 121         &dev_attr_board_id
 122 };
 123
 124 static void
 125 qlnxr_ib_dispatch_event(qlnxr_dev_t *dev, uint8_t port_num,
 126         enum ib_event_type type)
 127 {
 128         struct ib_event ibev;
 129
 130         QL_DPRINT12(dev->ha, "enter\n");
 131
 132         ibev.device = &dev->ibdev;
 133         ibev.element.port_num = port_num;
 134         ibev.event = type;
 135
 136         ib_dispatch_event(&ibev);
 137
 138         QL_DPRINT12(dev->ha, "exit\n");
 139 }
 140
 141 static int
 142 __qlnxr_iw_destroy_listen(struct iw_cm_id *cm_id)
 143 {
 144         qlnxr_iw_destroy_listen(cm_id);
 145
 146         return (0);
 147 }
 148
 149 static int
 150 qlnxr_register_device(qlnxr_dev_t *dev)
 151 {
 152         struct ib_device *ibdev;
 153         struct iw_cm_verbs *iwcm;
 154         int ret;
 155
 156         QL_DPRINT12(dev->ha, "enter\n");
 157
 158         ibdev = &dev->ibdev;
 159
 160         strlcpy(ibdev->name, "qlnxr%d", IB_DEVICE_NAME_MAX);
 161
 162         memset(&ibdev->node_guid, 0, sizeof(ibdev->node_guid));
 163         memcpy(&ibdev->node_guid, dev->ha->primary_mac, ETHER_ADDR_LEN);
 164
 165         memcpy(ibdev->node_desc, QLNXR_NODE_DESC, sizeof(QLNXR_NODE_DESC));
 166
 167         ibdev->owner = THIS_MODULE;
 168         ibdev->uverbs_abi_ver = 7;
 169         ibdev->local_dma_lkey = 0;
 170
 171         ibdev->uverbs_cmd_mask =
 172                 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
 173                 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
 174                 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
 175                 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
 176                 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
 177                 (1ull << IB_USER_VERBS_CMD_REG_MR) |
 178                 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
 179                 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
 180                 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
 181                 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
 182                 (1ull << IB_USER_VERBS_CMD_REQ_NOTIFY_CQ) |
 183                 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
 184                 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
 185                 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
 186                 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
 187                 (1ull << IB_USER_VERBS_CMD_POLL_CQ) |
 188                 (1ull << IB_USER_VERBS_CMD_POST_SEND) |
 189                 (1ull << IB_USER_VERBS_CMD_POST_RECV);
 190
 191         if (QLNX_IS_IWARP(dev)) {
 192                 ibdev->node_type = RDMA_NODE_RNIC;
 193                 ibdev->query_gid = qlnxr_iw_query_gid;
 194         } else {
 195                 ibdev->node_type = RDMA_NODE_IB_CA;
 196                 ibdev->query_gid = qlnxr_query_gid;
 197                 ibdev->uverbs_cmd_mask |=
 198                         (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
 199                         (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
 200                         (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
 201                         (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
 202                         (1ull << IB_USER_VERBS_CMD_POST_SRQ_RECV);
 203                 ibdev->create_srq = qlnxr_create_srq;
 204                 ibdev->destroy_srq = qlnxr_destroy_srq;
 205                 ibdev->modify_srq = qlnxr_modify_srq;
 206                 ibdev->query_srq = qlnxr_query_srq;
 207                 ibdev->post_srq_recv = qlnxr_post_srq_recv;
 208         }
 209
 210         ibdev->phys_port_cnt = 1;
 211         ibdev->num_comp_vectors = dev->num_cnq;
 212
 213         /* mandatory verbs. */
 214         ibdev->query_device = qlnxr_query_device;
 215         ibdev->query_port = qlnxr_query_port;
 216         ibdev->modify_port = qlnxr_modify_port;
 217
 218         ibdev->alloc_ucontext = qlnxr_alloc_ucontext;
 219         ibdev->dealloc_ucontext = qlnxr_dealloc_ucontext;
 220         /* mandatory to support user space verbs consumer. */
 221         ibdev->mmap = qlnxr_mmap;
 222
 223         ibdev->alloc_pd = qlnxr_alloc_pd;
 224         ibdev->dealloc_pd = qlnxr_dealloc_pd;
 225
 226         ibdev->create_cq = qlnxr_create_cq;
 227         ibdev->destroy_cq = qlnxr_destroy_cq;
 228         ibdev->resize_cq = qlnxr_resize_cq;
 229         ibdev->req_notify_cq = qlnxr_arm_cq;
 230
 231         ibdev->create_qp = qlnxr_create_qp;
 232         ibdev->modify_qp = qlnxr_modify_qp;
 233         ibdev->query_qp = qlnxr_query_qp;
 234         ibdev->destroy_qp = qlnxr_destroy_qp;
 235
 236         ibdev->query_pkey = qlnxr_query_pkey;
 237         ibdev->create_ah = qlnxr_create_ah;
 238         ibdev->destroy_ah = qlnxr_destroy_ah;
 239         ibdev->query_ah = qlnxr_query_ah;
 240         ibdev->modify_ah = qlnxr_modify_ah;
 241         ibdev->get_dma_mr = qlnxr_get_dma_mr;
 242         ibdev->dereg_mr = qlnxr_dereg_mr;
 243         ibdev->reg_user_mr = qlnxr_reg_user_mr;
 244
 245 #if __FreeBSD_version >= 1102000
 246         ibdev->alloc_mr = qlnxr_alloc_mr;
 247         ibdev->map_mr_sg = qlnxr_map_mr_sg;
 248         ibdev->get_port_immutable = qlnxr_get_port_immutable;
 249 #else
 250         ibdev->reg_phys_mr = qlnxr_reg_kernel_mr;
 251         ibdev->alloc_fast_reg_mr = qlnxr_alloc_frmr;
 252         ibdev->alloc_fast_reg_page_list = qlnxr_alloc_frmr_page_list;
 253         ibdev->free_fast_reg_page_list = qlnxr_free_frmr_page_list;
 254 #endif /* #if __FreeBSD_version >= 1102000 */
 255
 256         ibdev->poll_cq = qlnxr_poll_cq;
 257         ibdev->post_send = qlnxr_post_send;
 258         ibdev->post_recv = qlnxr_post_recv;
 259         ibdev->process_mad = qlnxr_process_mad;
 260
 261
 262
 263         ibdev->dma_device = &dev->pdev->dev;
 264
 265         ibdev->get_link_layer = qlnxr_link_layer;
 266
 267         if (QLNX_IS_IWARP(dev)) {
 268                 iwcm = kmalloc(sizeof(*iwcm), GFP_KERNEL);
 269
 270                 device_printf(dev->ha->pci_dev, "device is IWARP\n");
 271                 if (iwcm == NULL)
 272                         return (-ENOMEM);
 273
 274                 ibdev->iwcm = iwcm;
 275
 276                 iwcm->connect = qlnxr_iw_connect;
 277                 iwcm->accept = qlnxr_iw_accept;
 278                 iwcm->reject = qlnxr_iw_reject;
 279
 280 #if (__FreeBSD_version >= 1004000) && (__FreeBSD_version < 1102000)
 281
 282                 iwcm->create_listen_ep = qlnxr_iw_create_listen;
 283                 iwcm->destroy_listen_ep = qlnxr_iw_destroy_listen;
 284 #else
 285                 iwcm->create_listen = qlnxr_iw_create_listen;
 286                 iwcm->destroy_listen = __qlnxr_iw_destroy_listen;
 287 #endif
 288                 iwcm->add_ref = qlnxr_iw_qp_add_ref;
 289                 iwcm->rem_ref = qlnxr_iw_qp_rem_ref;
 290                 iwcm->get_qp = qlnxr_iw_get_qp;
 291         }
 292
 293         ret = ib_register_device(ibdev, NULL);
 294         if (ret) {
 295                 kfree(iwcm);
 296         }
 297
 298         QL_DPRINT12(dev->ha, "exit\n");
 299         return ret;
 300 }
 301
 302 #define HILO_U64(hi, lo)                ((((u64)(hi)) << 32) + (lo))
 303
 304 static void
 305 qlnxr_intr(void *handle)
 306 {
 307         struct qlnxr_cnq *cnq = handle;
 308         struct qlnxr_cq *cq;
 309         struct regpair *cq_handle;
 310         u16 hw_comp_cons, sw_comp_cons;
 311         qlnx_host_t *ha;
 312
 313         ha = cnq->dev->ha;
 314
 315         QL_DPRINT12(ha, "enter cnq = %p\n", handle);
 316
 317         ecore_sb_ack(cnq->sb, IGU_INT_DISABLE, 0 /*do not update*/);
 318
 319         ecore_sb_update_sb_idx(cnq->sb);
 320
 321         hw_comp_cons = le16_to_cpu(*cnq->hw_cons_ptr);
 322         sw_comp_cons = ecore_chain_get_cons_idx(&cnq->pbl);
 323
 324         rmb();
 325
 326         QL_DPRINT12(ha, "enter cnq = %p hw_comp_cons = 0x%x sw_comp_cons = 0x%x\n",
 327                 handle, hw_comp_cons, sw_comp_cons);
 328
 329         while (sw_comp_cons != hw_comp_cons) {
 330                 cq_handle = (struct regpair *)ecore_chain_consume(&cnq->pbl);
 331                 cq = (struct qlnxr_cq *)(uintptr_t)HILO_U64(cq_handle->hi,
 332                                 cq_handle->lo);
 333
 334                 if (cq == NULL) {
 335                         QL_DPRINT11(ha, "cq == NULL\n");
 336                         break;
 337                 }
 338
 339                 if (cq->sig != QLNXR_CQ_MAGIC_NUMBER) {
 340                         QL_DPRINT11(ha,
 341                                 "cq->sig = 0x%x QLNXR_CQ_MAGIC_NUMBER = 0x%x\n",
 342                                 cq->sig, QLNXR_CQ_MAGIC_NUMBER);
 343                         break;
 344                 }
 345                 cq->arm_flags = 0;
 346
 347                 if (!cq->destroyed && cq->ibcq.comp_handler) {
 348                         QL_DPRINT11(ha, "calling comp_handler = %p "
 349                                 "ibcq = %p cq_context = 0x%x\n",
 350                                 &cq->ibcq, cq->ibcq.cq_context);
 351
 352                         (*cq->ibcq.comp_handler) (&cq->ibcq, cq->ibcq.cq_context);
 353                 }
 354                 cq->cnq_notif++;
 355
 356                 sw_comp_cons = ecore_chain_get_cons_idx(&cnq->pbl);
 357
 358                 cnq->n_comp++;
 359         }
 360
 361         ecore_rdma_cnq_prod_update(cnq->dev->rdma_ctx, cnq->index, sw_comp_cons);
 362
 363         ecore_sb_ack(cnq->sb, IGU_INT_ENABLE, 1 /*update*/);
 364
 365         QL_DPRINT12(ha, "exit cnq = %p\n", handle);
 366         return;
 367 }
 368
 369 static void
 370 qlnxr_release_irqs(struct qlnxr_dev *dev)
 371 {
 372         int i;
 373         qlnx_host_t *ha;
 374
 375         ha = dev->ha;
 376
 377         QL_DPRINT12(ha, "enter\n");
 378
 379         for (i = 0; i < dev->num_cnq; i++) {
 380                 if (dev->cnq_array[i].irq_handle)
 381                         (void)bus_teardown_intr(dev->ha->pci_dev,
 382                                 dev->cnq_array[i].irq,
 383                                 dev->cnq_array[i].irq_handle);
 384
 385                 if (dev->cnq_array[i].irq)
 386                         (void) bus_release_resource(dev->ha->pci_dev,
 387                                 SYS_RES_IRQ,
 388                                 dev->cnq_array[i].irq_rid,
 389                                 dev->cnq_array[i].irq);
 390         }
 391         QL_DPRINT12(ha, "exit\n");
 392         return;
 393 }
 394
 395 static int
 396 qlnxr_setup_irqs(struct qlnxr_dev *dev)
 397 {
 398         int start_irq_rid;
 399         int i;
 400         qlnx_host_t *ha;
 401
 402         ha = dev->ha;
 403
 404         start_irq_rid = dev->sb_start + 2;
 405
 406         QL_DPRINT12(ha, "enter start_irq_rid = %d num_rss = %d\n",
 407                 start_irq_rid, dev->ha->num_rss);
 408
 409
 410         for (i = 0; i < dev->num_cnq; i++) {
 411
 412                 dev->cnq_array[i].irq_rid = start_irq_rid + i;
 413
 414                 dev->cnq_array[i].irq = bus_alloc_resource_any(dev->ha->pci_dev,
 415                                                 SYS_RES_IRQ,
 416                                                 &dev->cnq_array[i].irq_rid,
 417                                                 (RF_ACTIVE | RF_SHAREABLE));
 418
 419                 if (dev->cnq_array[i].irq == NULL) {
 420
 421                         QL_DPRINT11(ha,
 422                                 "bus_alloc_resource_any failed irq_rid = %d\n",
 423                                 dev->cnq_array[i].irq_rid);
 424
 425                         goto qlnxr_setup_irqs_err;
 426                 }
 427
 428                 if (bus_setup_intr(dev->ha->pci_dev,
 429                                 dev->cnq_array[i].irq,
 430                                 (INTR_TYPE_NET | INTR_MPSAFE),
 431                                 NULL, qlnxr_intr, &dev->cnq_array[i],
 432                                 &dev->cnq_array[i].irq_handle)) {
 433
 434                         QL_DPRINT11(ha, "bus_setup_intr failed\n");
 435                         goto qlnxr_setup_irqs_err;
 436                 }
 437                 QL_DPRINT12(ha, "irq_rid = %d irq = %p irq_handle = %p\n",
 438                         dev->cnq_array[i].irq_rid, dev->cnq_array[i].irq,
 439                         dev->cnq_array[i].irq_handle);
 440         }
 441
 442         QL_DPRINT12(ha, "exit\n");
 443         return (0);
 444
 445 qlnxr_setup_irqs_err:
 446         qlnxr_release_irqs(dev);
 447
 448         QL_DPRINT12(ha, "exit -1\n");
 449         return (-1);
 450 }
 451
 452 static void
 453 qlnxr_free_resources(struct qlnxr_dev *dev)
 454 {
 455         int i;
 456         qlnx_host_t *ha;
 457
 458         ha = dev->ha;
 459
 460         QL_DPRINT12(ha, "enter dev->num_cnq = %d\n", dev->num_cnq);
 461
 462         if (QLNX_IS_IWARP(dev)) {
 463                 if (dev->iwarp_wq != NULL)
 464                         destroy_workqueue(dev->iwarp_wq);
 465         }
 466
 467         for (i = 0; i < dev->num_cnq; i++) {
 468                 qlnx_free_mem_sb(dev->ha, &dev->sb_array[i]);
 469                 ecore_chain_free(&dev->ha->cdev, &dev->cnq_array[i].pbl);
 470         }
 471
 472         bzero(dev->cnq_array, (sizeof(struct qlnxr_cnq) * QLNXR_MAX_MSIX));
 473         bzero(dev->sb_array, (sizeof(struct ecore_sb_info) * QLNXR_MAX_MSIX));
 474         bzero(dev->sgid_tbl, (sizeof(union ib_gid) * QLNXR_MAX_SGID));
 475
 476         if (mtx_initialized(&dev->idr_lock))
 477                 mtx_destroy(&dev->idr_lock);
 478
 479         if (mtx_initialized(&dev->sgid_lock))
 480                 mtx_destroy(&dev->sgid_lock);
 481
 482         QL_DPRINT12(ha, "exit\n");
 483         return;
 484 }
 485
 486
 487 static int
 488 qlnxr_alloc_resources(struct qlnxr_dev *dev)
 489 {
 490         uint16_t n_entries;
 491         int i, rc;
 492         qlnx_host_t *ha;
 493
 494         ha = dev->ha;
 495
 496         QL_DPRINT12(ha, "enter\n");
 497
 498         bzero(dev->sgid_tbl, (sizeof (union ib_gid) * QLNXR_MAX_SGID));
 499
 500         mtx_init(&dev->idr_lock, "idr_lock", NULL, MTX_DEF);
 501         mtx_init(&dev->sgid_lock, "sgid_lock", NULL, MTX_DEF);
 502
 503         idr_init(&dev->qpidr);
 504
 505         bzero(dev->sb_array, (sizeof (struct ecore_sb_info) * QLNXR_MAX_MSIX));
 506         bzero(dev->cnq_array, (sizeof (struct qlnxr_cnq) * QLNXR_MAX_MSIX));
 507
 508         dev->sb_start = ecore_rdma_get_sb_id(dev->rdma_ctx, 0);
 509
 510         QL_DPRINT12(ha, "dev->sb_start = 0x%x\n", dev->sb_start);
 511
 512         /* Allocate CNQ PBLs */
 513
 514         n_entries = min_t(u32, ECORE_RDMA_MAX_CNQ_SIZE, QLNXR_ROCE_MAX_CNQ_SIZE);
 515
 516         for (i = 0; i < dev->num_cnq; i++) {
 517                 rc = qlnx_alloc_mem_sb(dev->ha, &dev->sb_array[i],
 518                                        dev->sb_start + i);
 519                 if (rc)
 520                         goto qlnxr_alloc_resources_exit;
 521
 522                 rc = ecore_chain_alloc(&dev->ha->cdev,
 523                                 ECORE_CHAIN_USE_TO_CONSUME_PRODUCE,
 524                                 ECORE_CHAIN_MODE_PBL,
 525                                 ECORE_CHAIN_CNT_TYPE_U16,
 526                                 n_entries,
 527                                 sizeof(struct regpair *),
 528                                 &dev->cnq_array[i].pbl,
 529                                 NULL);
 530
 531                 /* configure cnq, except name since ibdev.name is still NULL */
 532                 dev->cnq_array[i].dev = dev;
 533                 dev->cnq_array[i].sb = &dev->sb_array[i];
 534                 dev->cnq_array[i].hw_cons_ptr =
 535                         &(dev->sb_array[i].sb_virt->pi_array[ECORE_ROCE_PROTOCOL_INDEX]);
 536                 dev->cnq_array[i].index = i;
 537                 sprintf(dev->cnq_array[i].name, "qlnxr%d@pci:%d",
 538                         i, (dev->ha->pci_func));
 539
 540         }
 541
 542         QL_DPRINT12(ha, "exit\n");
 543         return 0;
 544
 545 qlnxr_alloc_resources_exit:
 546
 547         qlnxr_free_resources(dev);
 548
 549         QL_DPRINT12(ha, "exit -ENOMEM\n");
 550         return -ENOMEM;
 551 }
 552
 553 void
 554 qlnxr_affiliated_event(void *context, u8 e_code, void *fw_handle)
 555 {
 556 #define EVENT_TYPE_NOT_DEFINED  0
 557 #define EVENT_TYPE_CQ           1
 558 #define EVENT_TYPE_QP           2
 559 #define EVENT_TYPE_GENERAL      3
 560
 561         struct qlnxr_dev *dev = (struct qlnxr_dev *)context;
 562         struct regpair *async_handle = (struct regpair *)fw_handle;
 563         u64 roceHandle64 = ((u64)async_handle->hi << 32) + async_handle->lo;
 564         struct qlnxr_cq *cq =  (struct qlnxr_cq *)(uintptr_t)roceHandle64;
 565         struct qlnxr_qp *qp =  (struct qlnxr_qp *)(uintptr_t)roceHandle64;
 566         u8 event_type = EVENT_TYPE_NOT_DEFINED;
 567         struct ib_event event;
 568         qlnx_host_t *ha;
 569
 570         ha = dev->ha;
 571
 572         QL_DPRINT12(ha, "enter context = %p e_code = 0x%x fw_handle = %p\n",
 573                 context, e_code, fw_handle);
 574
 575         if (QLNX_IS_IWARP(dev)) {
 576                 switch (e_code) {
 577
 578                 case ECORE_IWARP_EVENT_CQ_OVERFLOW:
 579                         event.event = IB_EVENT_CQ_ERR;
 580                         event_type = EVENT_TYPE_CQ;
 581                         break;
 582
 583                 default:
 584                         QL_DPRINT12(ha,
 585                                 "unsupported event %d on handle=%llx\n",
 586                                 e_code, roceHandle64);
 587                         break;
 588                 }
 589         } else {
 590                 switch (e_code) {
 591
 592                 case ROCE_ASYNC_EVENT_CQ_OVERFLOW_ERR:
 593                         event.event = IB_EVENT_CQ_ERR;
 594                         event_type = EVENT_TYPE_CQ;
 595                         break;
 596
 597                 case ROCE_ASYNC_EVENT_SQ_DRAINED:
 598                         event.event = IB_EVENT_SQ_DRAINED;
 599                         event_type = EVENT_TYPE_QP;
 600                         break;
 601
 602                 case ROCE_ASYNC_EVENT_QP_CATASTROPHIC_ERR:
 603                         event.event = IB_EVENT_QP_FATAL;
 604                         event_type = EVENT_TYPE_QP;
 605                         break;
 606
 607                 case ROCE_ASYNC_EVENT_LOCAL_INVALID_REQUEST_ERR:
 608                         event.event = IB_EVENT_QP_REQ_ERR;
 609                         event_type = EVENT_TYPE_QP;
 610                         break;
 611
 612                 case ROCE_ASYNC_EVENT_LOCAL_ACCESS_ERR:
 613                         event.event = IB_EVENT_QP_ACCESS_ERR;
 614                         event_type = EVENT_TYPE_QP;
 615                         break;
 616
 617                 /* NOTE the following are not implemented in FW
 618                  *      ROCE_ASYNC_EVENT_CQ_ERR
 619                  *      ROCE_ASYNC_EVENT_COMM_EST
 620                  */
 621                 /* TODO associate the following events -
 622                  *      ROCE_ASYNC_EVENT_SRQ_LIMIT
 623                  *      ROCE_ASYNC_EVENT_LAST_WQE_REACHED
 624                  *      ROCE_ASYNC_EVENT_LOCAL_CATASTROPHIC_ERR (un-affiliated)
 625                  */
 626                 default:
 627                         QL_DPRINT12(ha,
 628                                 "unsupported event 0x%x on fw_handle = %p\n",
 629                                 e_code, fw_handle);
 630                         break;
 631                 }
 632         }
 633
 634         switch (event_type) {
 635
 636         case EVENT_TYPE_CQ:
 637                 if (cq && cq->sig == QLNXR_CQ_MAGIC_NUMBER) {
 638                         struct ib_cq *ibcq = &cq->ibcq;
 639
 640                         if (ibcq->event_handler) {
 641                                 event.device     = ibcq->device;
 642                                 event.element.cq = ibcq;
 643                                 ibcq->event_handler(&event, ibcq->cq_context);
 644                         }
 645                 } else {
 646                         QL_DPRINT11(ha,
 647                                 "CQ event with invalid CQ pointer"
 648                                 " Handle = %llx\n", roceHandle64);
 649                 }
 650                 QL_DPRINT12(ha,
 651                         "CQ event 0x%x on handle = %p\n", e_code, cq);
 652                 break;
 653
 654         case EVENT_TYPE_QP:
 655                 if (qp && qp->sig == QLNXR_QP_MAGIC_NUMBER) {
 656                         struct ib_qp *ibqp = &qp->ibqp;
 657
 658                         if (ibqp->event_handler) {
 659                                 event.device     = ibqp->device;
 660                                 event.element.qp = ibqp;
 661                                 ibqp->event_handler(&event, ibqp->qp_context);
 662                         }
 663                 } else {
 664                         QL_DPRINT11(ha,
 665                                 "QP event 0x%x with invalid QP pointer"
 666                                 " qp handle = %p\n",
 667                                 e_code, roceHandle64);
 668                 }
 669                 QL_DPRINT12(ha, "QP event 0x%x on qp handle = %p\n",
 670                         e_code, qp);
 671                 break;
 672
 673         case EVENT_TYPE_GENERAL:
 674                 break;
 675
 676         default:
 677                 break;
 678
 679         }
 680
 681         QL_DPRINT12(ha, "exit\n");
 682
 683         return;
 684 }
 685
 686 void
 687 qlnxr_unaffiliated_event(void *context, u8 e_code)
 688 {
 689         struct qlnxr_dev *dev = (struct qlnxr_dev *)context;
 690         qlnx_host_t *ha;
 691
 692         ha = dev->ha;
 693
 694         QL_DPRINT12(ha, "enter/exit \n");
 695         return;
 696 }
 697
 698
 699 static int
 700 qlnxr_set_device_attr(struct qlnxr_dev *dev)
 701 {
 702         struct ecore_rdma_device *ecore_attr;
 703         struct qlnxr_device_attr *attr;
 704         u32 page_size;
 705
 706         ecore_attr = ecore_rdma_query_device(dev->rdma_ctx);
 707
 708         page_size = ~dev->attr.page_size_caps + 1;
 709         if(page_size > PAGE_SIZE) {
 710                 QL_DPRINT12(dev->ha, "Kernel page size : %ld is smaller than"
 711                     " minimum page size : %ld required by qlnxr\n",
 712                     PAGE_SIZE, page_size);
 713                 return -ENODEV;
 714         }
 715         attr = &dev->attr;
 716         attr->vendor_id = ecore_attr->vendor_id;
 717         attr->vendor_part_id = ecore_attr->vendor_part_id;
 718
 719         QL_DPRINT12(dev->ha, "in qlnxr_set_device_attr, vendor : %x device : %x\n",
 720                 attr->vendor_id, attr->vendor_part_id);
 721
 722         attr->hw_ver = ecore_attr->hw_ver;
 723         attr->fw_ver = ecore_attr->fw_ver;
 724         attr->node_guid = ecore_attr->node_guid;
 725         attr->sys_image_guid = ecore_attr->sys_image_guid;
 726         attr->max_cnq = ecore_attr->max_cnq;
 727         attr->max_sge = ecore_attr->max_sge;
 728         attr->max_inline = ecore_attr->max_inline;
 729         attr->max_sqe = min_t(u32, ecore_attr->max_wqe, QLNXR_MAX_SQE);
 730         attr->max_rqe = min_t(u32, ecore_attr->max_wqe, QLNXR_MAX_RQE);
 731         attr->max_qp_resp_rd_atomic_resc = ecore_attr->max_qp_resp_rd_atomic_resc;
 732         attr->max_qp_req_rd_atomic_resc = ecore_attr->max_qp_req_rd_atomic_resc;
 733         attr->max_dev_resp_rd_atomic_resc =
 734             ecore_attr->max_dev_resp_rd_atomic_resc;
 735         attr->max_cq = ecore_attr->max_cq;
 736         attr->max_qp = ecore_attr->max_qp;
 737         attr->max_mr = ecore_attr->max_mr;
 738         attr->max_mr_size = ecore_attr->max_mr_size;
 739         attr->max_cqe = min_t(u64, ecore_attr->max_cqe, QLNXR_MAX_CQES);
 740         attr->max_mw = ecore_attr->max_mw;
 741         attr->max_fmr = ecore_attr->max_fmr;
 742         attr->max_mr_mw_fmr_pbl = ecore_attr->max_mr_mw_fmr_pbl;
 743         attr->max_mr_mw_fmr_size = ecore_attr->max_mr_mw_fmr_size;
 744         attr->max_pd = ecore_attr->max_pd;
 745         attr->max_ah = ecore_attr->max_ah;
 746         attr->max_pkey = ecore_attr->max_pkey;
 747         attr->max_srq = ecore_attr->max_srq;
 748         attr->max_srq_wr = ecore_attr->max_srq_wr;
 749         //attr->dev_caps = ecore_attr->dev_caps;
 750         attr->page_size_caps = ecore_attr->page_size_caps;
 751         attr->dev_ack_delay = ecore_attr->dev_ack_delay;
 752         attr->reserved_lkey = ecore_attr->reserved_lkey;
 753         attr->bad_pkey_counter = ecore_attr->bad_pkey_counter;
 754         attr->max_stats_queues = ecore_attr->max_stats_queues;
 755
 756         return 0;
 757 }
 758
 759
 760 static int
 761 qlnxr_init_hw(struct qlnxr_dev *dev)
 762 {
 763         struct ecore_rdma_events events;
 764         struct ecore_rdma_add_user_out_params out_params;
 765         struct ecore_rdma_cnq_params *cur_pbl;
 766         struct ecore_rdma_start_in_params *in_params;
 767         dma_addr_t p_phys_table;
 768         u32 page_cnt;
 769         int rc = 0;
 770         int i;
 771         qlnx_host_t *ha;
 772
 773         ha = dev->ha;
 774
 775         QL_DPRINT12(ha, "enter\n");
 776
 777         in_params = kzalloc(sizeof(*in_params), GFP_KERNEL);
 778         if (!in_params) {
 779                 rc = -ENOMEM;
 780                 goto out;
 781         }
 782
 783         bzero(&out_params, sizeof(struct ecore_rdma_add_user_out_params));
 784         bzero(&events, sizeof(struct ecore_rdma_events));
 785
 786         in_params->desired_cnq = dev->num_cnq;
 787
 788         for (i = 0; i < dev->num_cnq; i++) {
 789                 cur_pbl = &in_params->cnq_pbl_list[i];
 790
 791                 page_cnt = ecore_chain_get_page_cnt(&dev->cnq_array[i].pbl);
 792                 cur_pbl->num_pbl_pages = page_cnt;
 793
 794                 p_phys_table = ecore_chain_get_pbl_phys(&dev->cnq_array[i].pbl);
 795                 cur_pbl->pbl_ptr = (u64)p_phys_table;
 796         }
 797
 798         events.affiliated_event = qlnxr_affiliated_event;
 799         events.unaffiliated_event = qlnxr_unaffiliated_event;
 800         events.context = dev;
 801
 802         in_params->events = &events;
 803         in_params->roce.cq_mode = ECORE_RDMA_CQ_MODE_32_BITS;
 804         in_params->max_mtu = dev->ha->max_frame_size;
 805
 806
 807         if (QLNX_IS_IWARP(dev)) {
 808                 if (delayed_ack)
 809                         in_params->iwarp.flags |= ECORE_IWARP_DA_EN;
 810
 811                 if (timestamp)
 812                         in_params->iwarp.flags |= ECORE_IWARP_TS_EN;
 813
 814                 in_params->iwarp.rcv_wnd_size = rcv_wnd_size*1024;
 815                 in_params->iwarp.crc_needed = crc_needed;
 816                 in_params->iwarp.ooo_num_rx_bufs =
 817                         (MAX_RXMIT_CONNS * in_params->iwarp.rcv_wnd_size) /
 818                         in_params->max_mtu;
 819
 820                 in_params->iwarp.mpa_peer2peer = peer2peer;
 821                 in_params->iwarp.mpa_rev =
 822                         mpa_enhanced ? ECORE_MPA_REV2 : ECORE_MPA_REV1;
 823                 in_params->iwarp.mpa_rtr = rtr_type;
 824         }
 825
 826         memcpy(&in_params->mac_addr[0], dev->ha->primary_mac, ETH_ALEN);
 827
 828         rc = ecore_rdma_start(dev->rdma_ctx, in_params);
 829         if (rc)
 830                 goto out;
 831
 832         rc = ecore_rdma_add_user(dev->rdma_ctx, &out_params);
 833         if (rc)
 834                 goto out;
 835
 836         dev->db_addr = (void *)(uintptr_t)out_params.dpi_addr;
 837         dev->db_phys_addr = out_params.dpi_phys_addr;
 838         dev->db_size = out_params.dpi_size;
 839         dev->dpi = out_params.dpi;
 840
 841         qlnxr_set_device_attr(dev);
 842
 843         QL_DPRINT12(ha,
 844                 "cdev->doorbells = %p, db_phys_addr = %p db_size = 0x%x\n",
 845                 (void *)ha->cdev.doorbells,
 846                 (void *)ha->cdev.db_phys_addr, ha->cdev.db_size);
 847
 848         QL_DPRINT12(ha,
 849                 "db_addr = %p db_phys_addr = %p db_size = 0x%x dpi = 0x%x\n",
 850                 (void *)dev->db_addr, (void *)dev->db_phys_addr,
 851                 dev->db_size, dev->dpi);
 852 out:
 853         kfree(in_params);
 854
 855         QL_DPRINT12(ha, "exit\n");
 856         return rc;
 857 }
 858
 859 static void
 860 qlnxr_build_sgid_mac(union ib_gid *sgid, unsigned char *mac_addr,
 861         bool is_vlan, u16 vlan_id)
 862 {
 863         sgid->global.subnet_prefix = OSAL_CPU_TO_BE64(0xfe80000000000000LL);
 864         sgid->raw[8] = mac_addr[0] ^ 2;
 865         sgid->raw[9] = mac_addr[1];
 866         sgid->raw[10] = mac_addr[2];
 867         if (is_vlan) {
 868                 sgid->raw[11] = vlan_id >> 8;
 869                 sgid->raw[12] = vlan_id & 0xff;
 870         } else {
 871                 sgid->raw[11] = 0xff;
 872                 sgid->raw[12] = 0xfe;
 873         }
 874         sgid->raw[13] = mac_addr[3];
 875         sgid->raw[14] = mac_addr[4];
 876         sgid->raw[15] = mac_addr[5];
 877 }
 878 static bool
 879 qlnxr_add_sgid(struct qlnxr_dev *dev, union ib_gid *new_sgid);
 880
 881 static void
 882 qlnxr_add_ip_based_gid(struct qlnxr_dev *dev, struct ifnet *ifp)
 883 {
 884         struct ifaddr *ifa;
 885         union ib_gid gid;
 886
 887         CK_STAILQ_FOREACH(ifa, &ifp->if_addrhead, ifa_link) {
 888                 if (ifa->ifa_addr && ifa->ifa_addr->sa_family == AF_INET) {
 889
 890                         QL_DPRINT12(dev->ha, "IP address : %x\n", ((struct sockaddr_in *) ifa->ifa_addr)->sin_addr.s_addr);
 891                         ipv6_addr_set_v4mapped(
 892                                 ((struct sockaddr_in *) ifa->ifa_addr)->sin_addr.s_addr,
 893                                 (struct in6_addr *)&gid);
 894                         QL_DPRINT12(dev->ha, "gid generated : %llx\n", gid);
 895
 896                         qlnxr_add_sgid(dev, &gid);
 897                 }
 898         }
 899         for (int i = 0; i < 16; i++) {
 900                 QL_DPRINT12(dev->ha, "gid generated : %x\n", gid.raw[i]);
 901         }
 902 }
 903
 904 static bool
 905 qlnxr_add_sgid(struct qlnxr_dev *dev, union ib_gid *new_sgid)
 906 {
 907         union ib_gid zero_sgid = { { 0 } };
 908         int i;
 909         //unsigned long flags;
 910         mtx_lock(&dev->sgid_lock);
 911         for (i = 0; i < QLNXR_MAX_SGID; i++) {
 912                 if (!memcmp(&dev->sgid_tbl[i], &zero_sgid,
 913                                 sizeof(union ib_gid))) {
 914                         /* found free entry */
 915                         memcpy(&dev->sgid_tbl[i], new_sgid,
 916                                 sizeof(union ib_gid));
 917                         QL_DPRINT12(dev->ha, "copying sgid : %llx\n",
 918                                         *new_sgid);
 919                         mtx_unlock(&dev->sgid_lock);
 920                         //TODO ib_dispatch event here?
 921                         return true;
 922                 } else if (!memcmp(&dev->sgid_tbl[i], new_sgid,
 923                                 sizeof(union ib_gid))) {
 924                         /* entry already present, no addition required */
 925                         mtx_unlock(&dev->sgid_lock);
 926                         QL_DPRINT12(dev->ha, "sgid present : %llx\n",
 927                                         *new_sgid);
 928                         return false;
 929                 }
 930         }
 931         if (i == QLNXR_MAX_SGID) {
 932                 QL_DPRINT12(dev->ha, "didn't find an empty entry in sgid_tbl\n");
 933         }
 934         mtx_unlock(&dev->sgid_lock);
 935         return false;
 936 }
 937
 938 static bool qlnxr_del_sgid(struct qlnxr_dev *dev, union ib_gid *gid)
 939 {
 940         int found = false;
 941         int i;
 942         //unsigned long flags;
 943
 944         QL_DPRINT12(dev->ha, "removing gid %llx %llx\n",
 945                         gid->global.interface_id,
 946                         gid->global.subnet_prefix);
 947         mtx_lock(&dev->sgid_lock);
 948         /* first is the default sgid which cannot be deleted */
 949         for (i = 1; i < QLNXR_MAX_SGID; i++) {
 950                 if (!memcmp(&dev->sgid_tbl[i], gid, sizeof(union ib_gid))) {
 951                         /* found matching entry */
 952                         memset(&dev->sgid_tbl[i], 0, sizeof(union ib_gid));
 953                         found = true;
 954                         break;
 955                 }
 956         }
 957         mtx_unlock(&dev->sgid_lock);
 958
 959         return found;
 960 }
 961
 962 #if __FreeBSD_version < 1100000
 963
 964 static inline int
 965 is_vlan_dev(struct ifnet *ifp)
 966 {
 967         return (ifp->if_type == IFT_L2VLAN);
 968 }
 969
 970 static inline uint16_t
 971 vlan_dev_vlan_id(struct ifnet *ifp)
 972 {
 973         uint16_t vtag;
 974
 975         if (VLAN_TAG(ifp, &vtag) == 0)
 976                 return (vtag);
 977
 978         return (0);
 979 }
 980
 981 #endif /* #if __FreeBSD_version < 1100000 */
 982
 983 static void
 984 qlnxr_add_sgids(struct qlnxr_dev *dev)
 985 {
 986         qlnx_host_t *ha = dev->ha;
 987         u16 vlan_id;
 988         bool is_vlan;
 989         union ib_gid vgid;
 990
 991         qlnxr_add_ip_based_gid(dev, ha->ifp);
 992         /* MAC/VLAN base GIDs */
 993         is_vlan = is_vlan_dev(ha->ifp);
 994         vlan_id = (is_vlan) ? vlan_dev_vlan_id(ha->ifp) : 0;
 995         qlnxr_build_sgid_mac(&vgid, ha->primary_mac, is_vlan, vlan_id);
 996         qlnxr_add_sgid(dev, &vgid);
 997 }
 998
 999 static int
1000 qlnxr_add_default_sgid(struct qlnxr_dev *dev)
1001 {
1002         /* GID Index 0 - Invariant manufacturer-assigned EUI-64 */
1003         union ib_gid *sgid = &dev->sgid_tbl[0];
1004         struct ecore_rdma_device        *qattr;
1005         qlnx_host_t *ha;
1006         ha = dev->ha;
1007
1008         qattr = ecore_rdma_query_device(dev->rdma_ctx);
1009         if(sgid == NULL)
1010                 QL_DPRINT12(ha, "sgid = NULL?\n");
1011
1012         sgid->global.subnet_prefix = OSAL_CPU_TO_BE64(0xfe80000000000000LL);
1013         QL_DPRINT12(ha, "node_guid = %llx", dev->attr.node_guid);
1014         memcpy(&sgid->raw[8], &qattr->node_guid,
1015                 sizeof(qattr->node_guid));
1016         //memcpy(&sgid->raw[8], &dev->attr.node_guid,
1017         //      sizeof(dev->attr.node_guid));
1018         QL_DPRINT12(ha, "DEFAULT sgid=[%x][%x][%x][%x][%x][%x][%x][%x][%x][%x][%x][%x][%x][%x][%x][%x]\n",
1019                    sgid->raw[0], sgid->raw[1], sgid->raw[2], sgid->raw[3], sgid->raw[4], sgid->raw[5],
1020                    sgid->raw[6], sgid->raw[7], sgid->raw[8], sgid->raw[9], sgid->raw[10], sgid->raw[11],
1021                    sgid->raw[12], sgid->raw[13], sgid->raw[14], sgid->raw[15]);
1022         return 0;
1023 }
1024
1025 static int qlnxr_addr_event (struct qlnxr_dev *dev,
1026                                 unsigned long event,
1027                                 struct ifnet *ifp,
1028                                 union ib_gid *gid)
1029 {
1030         bool is_vlan = false;
1031         union ib_gid vgid;
1032         u16 vlan_id = 0xffff;
1033
1034         QL_DPRINT12(dev->ha, "Link event occured\n");
1035         is_vlan = is_vlan_dev(dev->ha->ifp);
1036         vlan_id = (is_vlan) ? vlan_dev_vlan_id(dev->ha->ifp) : 0;
1037
1038         switch (event) {
1039         case NETDEV_UP :
1040                 qlnxr_add_sgid(dev, gid);
1041                 if (is_vlan) {
1042                         qlnxr_build_sgid_mac(&vgid, dev->ha->primary_mac, is_vlan, vlan_id);
1043                         qlnxr_add_sgid(dev, &vgid);
1044                 }
1045                 break;
1046         case NETDEV_DOWN :
1047                 qlnxr_del_sgid(dev, gid);
1048                 if (is_vlan) {
1049                         qlnxr_build_sgid_mac(&vgid, dev->ha->primary_mac, is_vlan, vlan_id);
1050                         qlnxr_del_sgid(dev, &vgid);
1051                 }
1052                 break;
1053         default :
1054                 break;
1055         }
1056         return 1;
1057 }
1058
1059 static int qlnxr_inetaddr_event(struct notifier_block *notifier,
1060                                 unsigned long event, void *ptr)
1061 {
1062         struct ifaddr *ifa = ptr;
1063         union ib_gid gid;
1064         struct qlnxr_dev *dev = container_of(notifier, struct qlnxr_dev, nb_inet);
1065         qlnx_host_t *ha = dev->ha;
1066
1067         ipv6_addr_set_v4mapped(
1068                         ((struct sockaddr_in *) ifa->ifa_addr)->sin_addr.s_addr,
1069                         (struct in6_addr *)&gid);
1070         return qlnxr_addr_event(dev, event, ha->ifp, &gid);
1071 }
1072
1073 static int
1074 qlnxr_register_inet(struct qlnxr_dev *dev)
1075 {
1076         int ret;
1077         dev->nb_inet.notifier_call = qlnxr_inetaddr_event;
1078         ret = register_inetaddr_notifier(&dev->nb_inet);
1079         if (ret) {
1080                 QL_DPRINT12(dev->ha, "Failed to register inetaddr\n");
1081                 return ret;
1082         }
1083         /* TODO : add for CONFIG_IPV6) */
1084         return 0;
1085 }
1086
1087 static int
1088 qlnxr_build_sgid_tbl(struct qlnxr_dev *dev)
1089 {
1090         qlnxr_add_default_sgid(dev);
1091         qlnxr_add_sgids(dev);
1092         return 0;
1093 }
1094
1095 static struct qlnx_rdma_if qlnxr_drv;
1096
1097 static void *
1098 qlnxr_add(void *eth_dev)
1099 {
1100         struct qlnxr_dev *dev;
1101         int ret;
1102         //device_t pci_dev;
1103         qlnx_host_t *ha;
1104
1105         ha = eth_dev;
1106
1107         QL_DPRINT12(ha, "enter [ha = %p]\n", ha);
1108
1109         dev = (struct qlnxr_dev *)ib_alloc_device(sizeof(struct qlnxr_dev));
1110
1111         if (dev == NULL)
1112                 return (NULL);
1113
1114         dev->ha = eth_dev;
1115         dev->cdev = &ha->cdev;
1116         /* Added to extend Application support */
1117         dev->pdev = kzalloc(sizeof(struct pci_dev), GFP_KERNEL);
1118
1119         dev->pdev->dev = *(dev->ha->pci_dev);
1120         dev->pdev->device = pci_get_device(dev->ha->pci_dev);
1121         dev->pdev->vendor = pci_get_vendor(dev->ha->pci_dev);
1122
1123         dev->rdma_ctx = &ha->cdev.hwfns[0];
1124         dev->wq_multiplier = wq_multiplier;
1125         dev->num_cnq = QLNX_NUM_CNQ;
1126
1127         QL_DPRINT12(ha,
1128                 "ha = %p dev = %p ha->cdev = %p\n",
1129                 ha, dev, &ha->cdev);
1130         QL_DPRINT12(ha,
1131                 "dev->cdev = %p dev->rdma_ctx = %p\n",
1132                 dev->cdev, dev->rdma_ctx);
1133
1134         ret = qlnxr_alloc_resources(dev);
1135
1136         if (ret)
1137                 goto qlnxr_add_err;
1138
1139         ret = qlnxr_setup_irqs(dev);
1140
1141         if (ret) {
1142                 qlnxr_free_resources(dev);
1143                 goto qlnxr_add_err;
1144         }
1145
1146         ret = qlnxr_init_hw(dev);
1147
1148         if (ret) {
1149                 qlnxr_release_irqs(dev);
1150                 qlnxr_free_resources(dev);
1151                 goto qlnxr_add_err;
1152         }
1153
1154         qlnxr_register_device(dev);
1155         for (int i = 0; i < ARRAY_SIZE(qlnxr_class_attributes); ++i) {
1156                 if (device_create_file(&dev->ibdev.dev, qlnxr_class_attributes[i]))
1157                         goto sysfs_err;
1158         }
1159         qlnxr_build_sgid_tbl(dev);
1160         //ret = qlnxr_register_inet(dev);
1161         QL_DPRINT12(ha, "exit\n");
1162         if (!test_and_set_bit(QLNXR_ENET_STATE_BIT, &dev->enet_state)) {
1163                 QL_DPRINT12(ha, "dispatching IB_PORT_ACITVE event\n");
1164                 qlnxr_ib_dispatch_event(dev, QLNXR_PORT,
1165                         IB_EVENT_PORT_ACTIVE);
1166         }
1167
1168         return (dev);
1169 sysfs_err:
1170         for (int i = 0; i < ARRAY_SIZE(qlnxr_class_attributes); ++i) {
1171                 device_remove_file(&dev->ibdev.dev, qlnxr_class_attributes[i]);
1172         }
1173         ib_unregister_device(&dev->ibdev);
1174
1175 qlnxr_add_err:
1176         ib_dealloc_device(&dev->ibdev);
1177
1178         QL_DPRINT12(ha, "exit failed\n");
1179         return (NULL);
1180 }
1181
1182 static void
1183 qlnxr_remove_sysfiles(struct qlnxr_dev *dev)
1184 {
1185         int i;
1186         for (i = 0; i < ARRAY_SIZE(qlnxr_class_attributes); ++i)
1187                 device_remove_file(&dev->ibdev.dev, qlnxr_class_attributes[i]);
1188 }
1189
1190 static int
1191 qlnxr_remove(void *eth_dev, void *qlnx_rdma_dev)
1192 {
1193         struct qlnxr_dev *dev;
1194         qlnx_host_t *ha;
1195
1196         dev = qlnx_rdma_dev;
1197         ha = eth_dev;
1198
1199         if ((ha == NULL) || (dev == NULL))
1200                 return (0);
1201
1202         QL_DPRINT12(ha, "enter ha = %p qlnx_rdma_dev = %p pd_count = %d\n",
1203                 ha, qlnx_rdma_dev, dev->pd_count);
1204
1205         qlnxr_ib_dispatch_event(dev, QLNXR_PORT,
1206                 IB_EVENT_PORT_ERR);
1207
1208         if (QLNX_IS_IWARP(dev)) {
1209                 if (dev->pd_count)
1210                         return (EBUSY);
1211         }
1212
1213         ib_unregister_device(&dev->ibdev);
1214
1215         if (QLNX_IS_ROCE(dev)) {
1216                 if (dev->pd_count)
1217                         return (EBUSY);
1218         }
1219
1220         ecore_rdma_remove_user(dev->rdma_ctx, dev->dpi);
1221         ecore_rdma_stop(dev->rdma_ctx);
1222
1223         qlnxr_release_irqs(dev);
1224
1225         qlnxr_free_resources(dev);
1226
1227         qlnxr_remove_sysfiles(dev);
1228         ib_dealloc_device(&dev->ibdev);
1229
1230         QL_DPRINT12(ha, "exit ha = %p qlnx_rdma_dev = %p\n", ha, qlnx_rdma_dev);
1231         return (0);
1232 }
1233
1234 int
1235 qlnx_rdma_ll2_set_mac_filter(void *rdma_ctx, uint8_t *old_mac_address,
1236         uint8_t *new_mac_address)
1237 {
1238         struct ecore_hwfn *p_hwfn = rdma_ctx;
1239         struct qlnx_host *ha;
1240         int ret = 0;
1241
1242         ha = (struct qlnx_host *)(p_hwfn->p_dev);
1243         QL_DPRINT2(ha, "enter rdma_ctx (%p)\n", rdma_ctx);
1244
1245         if (old_mac_address)
1246                 ecore_llh_remove_mac_filter(p_hwfn->p_dev, 0, old_mac_address);
1247
1248         if (new_mac_address)
1249                 ret = ecore_llh_add_mac_filter(p_hwfn->p_dev, 0, new_mac_address);
1250
1251         QL_DPRINT2(ha, "exit rdma_ctx (%p)\n", rdma_ctx);
1252         return (ret);
1253 }
1254
1255 static void
1256 qlnxr_mac_address_change(struct qlnxr_dev *dev)
1257 {
1258         qlnx_host_t *ha;
1259
1260         ha = dev->ha;
1261
1262         QL_DPRINT12(ha, "enter/exit\n");
1263
1264         return;
1265 }
1266
1267 static void
1268 qlnxr_notify(void *eth_dev, void *qlnx_rdma_dev, enum qlnx_rdma_event event)
1269 {
1270         struct qlnxr_dev *dev;
1271         qlnx_host_t *ha;
1272
1273         dev = qlnx_rdma_dev;
1274
1275         if (dev == NULL)
1276                 return;
1277
1278         ha = dev->ha;
1279
1280         QL_DPRINT12(ha, "enter (%p, %d)\n", qlnx_rdma_dev, event);
1281
1282         switch (event) {
1283
1284         case QLNX_ETHDEV_UP:
1285                 if (!test_and_set_bit(QLNXR_ENET_STATE_BIT, &dev->enet_state))
1286                         qlnxr_ib_dispatch_event(dev, QLNXR_PORT,
1287                                 IB_EVENT_PORT_ACTIVE);
1288                 break;
1289
1290         case QLNX_ETHDEV_CHANGE_ADDR:
1291                 qlnxr_mac_address_change(dev);
1292                 break;
1293
1294         case QLNX_ETHDEV_DOWN:
1295                 if (test_and_set_bit(QLNXR_ENET_STATE_BIT, &dev->enet_state))
1296                         qlnxr_ib_dispatch_event(dev, QLNXR_PORT,
1297                                 IB_EVENT_PORT_ERR);
1298                 break;
1299         }
1300
1301         QL_DPRINT12(ha, "exit (%p, %d)\n", qlnx_rdma_dev, event);
1302         return;
1303 }
1304
1305 static int
1306 qlnxr_mod_load(void)
1307 {
1308         int ret;
1309
1310
1311         qlnxr_drv.add = qlnxr_add;
1312         qlnxr_drv.remove = qlnxr_remove;
1313         qlnxr_drv.notify = qlnxr_notify;
1314
1315         ret = qlnx_rdma_register_if(&qlnxr_drv);
1316
1317         return (0);
1318 }
1319
1320 static int
1321 qlnxr_mod_unload(void)
1322 {
1323         int ret;
1324
1325         ret = qlnx_rdma_deregister_if(&qlnxr_drv);
1326         return (ret);
1327 }
1328
1329 static int
1330 qlnxr_event_handler(module_t mod, int event, void *arg)
1331 {
1332
1333         int ret = 0;
1334
1335         switch (event) {
1336
1337         case MOD_LOAD:
1338                 ret = qlnxr_mod_load();
1339                 break;
1340
1341         case MOD_UNLOAD:
1342                 ret = qlnxr_mod_unload();
1343                 break;
1344
1345         default:
1346                 break;
1347         }
1348
1349         return (ret);
1350 }
1351
1352 static moduledata_t qlnxr_mod_info = {
1353         .name = "qlnxr",
1354         .evhand = qlnxr_event_handler,
1355 };
1356
1357 MODULE_VERSION(qlnxr, 1);
1358 MODULE_DEPEND(qlnxr, if_qlnxe, 1, 1, 1);
1359 MODULE_DEPEND(qlnxr, ibcore, 1, 1, 1);
1360
1361 #if __FreeBSD_version >= 1100000
1362 MODULE_DEPEND(qlnxr, linuxkpi, 1, 1, 1);
1363 #endif /* #if __FreeBSD_version >= 1100000 */
1364
1365 DECLARE_MODULE(qlnxr, qlnxr_mod_info, SI_SUB_LAST, SI_ORDER_ANY);
1366