2 * Copyright (c) 2011-2013 Qlogic Corporation
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
19 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 * POSSIBILITY OF SUCH DAMAGE.
30 * Author : David C Somayajulu, Qlogic Corporation, Aliso Viejo, CA 92656.
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
40 #include "qla_inline.h"
45 static void qla_replenish_normal_rx(qla_host_t *ha, qla_sds_t *sdsp);
46 static void qla_replenish_jumbo_rx(qla_host_t *ha, qla_sds_t *sdsp);
50 * Function: Handles normal ethernet frames received
53 qla_rx_intr(qla_host_t *ha, uint64_t data, uint32_t sds_idx,
56 uint32_t idx, length, status, ring;
59 struct ifnet *ifp = ha->ifp;
61 struct ether_vlan_header *eh;
63 sdsp = &ha->hw.sds[sds_idx];
65 ring = (uint32_t)Q8_STAT_DESC_TYPE(data);
66 idx = (uint32_t)Q8_STAT_DESC_HANDLE(data);
67 length = (uint32_t)Q8_STAT_DESC_TOTAL_LENGTH(data);
68 status = (uint32_t)Q8_STAT_DESC_STATUS(data);
71 if ((idx >= NUM_RX_DESCRIPTORS) || (length > MCLBYTES)) {
72 device_printf(ha->pci_dev, "%s: ring[%d] index[0x%08x]"
73 " len[0x%08x] invalid\n",
74 __func__, ring, idx, length);
78 if ((idx >= NUM_RX_JUMBO_DESCRIPTORS)||(length > MJUM9BYTES)) {
79 device_printf(ha->pci_dev, "%s: ring[%d] index[0x%08x]"
80 " len[0x%08x] invalid\n",
81 __func__, ring, idx, length);
87 rxb = &ha->rx_buf[idx];
89 rxb = &ha->rx_jbuf[idx];
91 QL_ASSERT((rxb != NULL),\
92 ("%s: [r, i, sds_idx]=[%d, 0x%x, %d] rxb != NULL\n",\
93 __func__, ring, idx, sds_idx));
97 QL_ASSERT((mp != NULL),\
98 ("%s: [r,i,rxb, sds_idx]=[%d, 0x%x, %p, %d] mp != NULL\n",\
99 __func__, ring, idx, rxb, sds_idx));
101 bus_dmamap_sync(ha->rx_tag, rxb->map, BUS_DMASYNC_POSTREAD);
105 rxb->next = sdsp->rxb_free;
106 sdsp->rxb_free = rxb;
110 rxb->next = sdsp->rxjb_free;
111 sdsp->rxjb_free = rxb;
116 mp->m_pkthdr.len = length;
117 mp->m_pkthdr.rcvif = ifp;
119 eh = mtod(mp, struct ether_vlan_header *);
121 if (eh->evl_encap_proto == htons(ETHERTYPE_VLAN)) {
122 uint32_t *data = (uint32_t *)eh;
124 mp->m_pkthdr.ether_vtag = ntohs(eh->evl_tag);
125 mp->m_flags |= M_VLANTAG;
127 *(data + 3) = *(data + 2);
128 *(data + 2) = *(data + 1);
131 m_adj(mp, ETHER_VLAN_ENCAP_LEN);
134 if (status == Q8_STAT_DESC_STATUS_CHKSUM_OK) {
135 mp->m_pkthdr.csum_flags = (CSUM_IP_CHECKED | CSUM_IP_VALID);
137 mp->m_pkthdr.csum_flags = 0;
140 if (lro->lro_cnt && (tcp_lro_rx(lro, mp, 0) == 0)) {
141 /* LRO packet has been successfully queued */
143 (*ifp->if_input)(ifp, mp);
146 if (sdsp->rx_free > std_replenish)
147 qla_replenish_normal_rx(ha, sdsp);
149 if (sdsp->rxj_free > jumbo_replenish)
150 qla_replenish_jumbo_rx(ha, sdsp);
156 qla_replenish_jumbo_rx(qla_host_t *ha, qla_sds_t *sdsp)
159 int count = jumbo_replenish;
162 if (!mtx_trylock(&ha->rxj_lock))
165 rxj_next = ha->hw.rxj_next;
168 rxb = sdsp->rxjb_free;
173 sdsp->rxjb_free = rxb->next;
177 if (qla_get_mbuf(ha, rxb, NULL, RDS_RING_INDEX_JUMBO) == 0) {
178 qla_set_hw_rcv_desc(ha, RDS_RING_INDEX_JUMBO,
179 ha->hw.rxj_in, rxb->handle, rxb->paddr,
180 (rxb->m_head)->m_pkthdr.len);
182 if (ha->hw.rxj_in == NUM_RX_JUMBO_DESCRIPTORS)
185 if (ha->hw.rxj_next == NUM_RX_JUMBO_DESCRIPTORS)
188 device_printf(ha->pci_dev,
189 "%s: qla_get_mbuf [1,(%d),(%d)] failed\n",
190 __func__, ha->hw.rxj_in, rxb->handle);
193 rxb->next = sdsp->rxjb_free;
194 sdsp->rxjb_free = rxb;
201 if (rxj_next != ha->hw.rxj_next) {
202 QL_UPDATE_RDS_PRODUCER_INDEX(ha, 1, ha->hw.rxj_next);
204 mtx_unlock(&ha->rxj_lock);
208 qla_replenish_normal_rx(qla_host_t *ha, qla_sds_t *sdsp)
211 int count = std_replenish;
214 if (!mtx_trylock(&ha->rx_lock))
217 rx_next = ha->hw.rx_next;
220 rxb = sdsp->rxb_free;
225 sdsp->rxb_free = rxb->next;
228 if (qla_get_mbuf(ha, rxb, NULL, RDS_RING_INDEX_NORMAL) == 0) {
229 qla_set_hw_rcv_desc(ha, RDS_RING_INDEX_NORMAL,
230 ha->hw.rx_in, rxb->handle, rxb->paddr,
231 (rxb->m_head)->m_pkthdr.len);
233 if (ha->hw.rx_in == NUM_RX_DESCRIPTORS)
236 if (ha->hw.rx_next == NUM_RX_DESCRIPTORS)
239 device_printf(ha->pci_dev,
240 "%s: qla_get_mbuf [0,(%d),(%d)] failed\n",
241 __func__, ha->hw.rx_in, rxb->handle);
244 rxb->next = sdsp->rxb_free;
245 sdsp->rxb_free = rxb;
252 if (rx_next != ha->hw.rx_next) {
253 QL_UPDATE_RDS_PRODUCER_INDEX(ha, 0, ha->hw.rx_next);
255 mtx_unlock(&ha->rx_lock);
260 * Function: Main Interrupt Service Routine
263 qla_rcv_isr(qla_host_t *ha, uint32_t sds_idx, uint32_t count)
267 uint32_t comp_idx, desc_count;
268 q80_stat_desc_t *sdesc;
269 struct lro_ctrl *lro;
275 hw->sds[sds_idx].rcv_active = 1;
276 if (ha->flags.stop_rcv) {
277 hw->sds[sds_idx].rcv_active = 0;
281 QL_DPRINT2((dev, "%s: [%d]enter\n", __func__, sds_idx));
286 comp_idx = hw->sds[sds_idx].sdsr_next;
287 lro = &hw->sds[sds_idx].lro;
291 sdesc = (q80_stat_desc_t *)
292 &hw->sds[sds_idx].sds_ring_base[comp_idx];
294 if (Q8_STAT_DESC_OWNER((sdesc->data[0])) !=
295 Q8_STAT_DESC_OWNER_HOST) {
296 QL_DPRINT2((dev, "%s: data %p sdsr_next 0x%08x\n",
297 __func__, (void *)sdesc->data[0], comp_idx));
301 desc_count = Q8_STAT_DESC_COUNT((sdesc->data[0]));
303 switch (Q8_STAT_DESC_OPCODE((sdesc->data[0]))) {
305 case Q8_STAT_DESC_OPCODE_RCV_PKT:
306 case Q8_STAT_DESC_OPCODE_SYN_OFFLOAD:
307 qla_rx_intr(ha, (sdesc->data[0]), sds_idx, lro);
312 device_printf(dev, "%s: default 0x%llx!\n", __func__,
313 (long long unsigned int)sdesc->data[0]);
317 while (desc_count--) {
319 Q8_STAT_DESC_SET_OWNER(Q8_STAT_DESC_OWNER_FW);
320 comp_idx = (comp_idx + 1) & (NUM_STATUS_DESCRIPTORS-1);
321 sdesc = (q80_stat_desc_t *)
322 &hw->sds[sds_idx].sds_ring_base[comp_idx];
326 tcp_lro_flush_all(lro);
328 if (hw->sds[sds_idx].sdsr_next != comp_idx) {
329 QL_UPDATE_SDS_CONSUMER_INDEX(ha, sds_idx, comp_idx);
331 hw->sds[sds_idx].sdsr_next = comp_idx;
333 sdesc = (q80_stat_desc_t *)&hw->sds[sds_idx].sds_ring_base[comp_idx];
334 if ((sds_idx == 0) && (Q8_STAT_DESC_OWNER((sdesc->data[0])) ==
335 Q8_STAT_DESC_OWNER_HOST)) {
339 hw->sds[sds_idx].rcv_active = 0;
346 qla_ivec_t *ivec = arg;
352 sds_idx = ivec->irq_rid - 1;
354 if (sds_idx >= ha->hw.num_sds_rings) {
355 device_printf(ha->pci_dev, "%s: bogus sds_idx 0x%x\n", __func__,
362 taskqueue_enqueue(ha->tx_tq, &ha->tx_task);
364 ret = qla_rcv_isr(ha, sds_idx, rcv_pkt_thres);
367 taskqueue_enqueue(ha->tx_tq, &ha->tx_task);
370 taskqueue_enqueue(ha->irq_vec[sds_idx].rcv_tq,
371 &ha->irq_vec[sds_idx].rcv_task);
373 QL_ENABLE_INTERRUPTS(ha, sds_idx);
378 qla_rcv(void *context, int pending)
380 qla_ivec_t *ivec = context;
391 sds_idx = ivec->irq_rid - 1;
396 if (qla_le32_to_host(*(hw->tx_cons)) != hw->txr_comp) {
397 taskqueue_enqueue(ha->tx_tq, &ha->tx_task);
398 } else if ((ifp->if_snd.ifq_head != NULL) &&
400 taskqueue_enqueue(ha->tx_tq, &ha->tx_task);
403 ret = qla_rcv_isr(ha, sds_idx, rcv_pkt_thres_d);
407 taskqueue_enqueue(ha->tx_tq, &ha->tx_task);
409 QL_ENABLE_INTERRUPTS(ha, sds_idx);