5 * Damien Bergamini <damien.bergamini@free.fr>
7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <sys/cdefs.h>
21 __FBSDID("$FreeBSD$");
24 * Ralink Technology RT2561, RT2561S and RT2661 chipset driver
25 * http://www.ralinktech.com/
28 #include <sys/param.h>
29 #include <sys/sysctl.h>
30 #include <sys/sockio.h>
32 #include <sys/kernel.h>
33 #include <sys/socket.h>
34 #include <sys/systm.h>
35 #include <sys/malloc.h>
37 #include <sys/mutex.h>
38 #include <sys/module.h>
40 #include <sys/endian.h>
41 #include <sys/firmware.h>
43 #include <machine/bus.h>
44 #include <machine/resource.h>
49 #include <net/if_var.h>
50 #include <net/if_arp.h>
51 #include <net/ethernet.h>
52 #include <net/if_dl.h>
53 #include <net/if_media.h>
54 #include <net/if_types.h>
56 #include <net80211/ieee80211_var.h>
57 #include <net80211/ieee80211_radiotap.h>
58 #include <net80211/ieee80211_regdomain.h>
59 #include <net80211/ieee80211_ratectl.h>
61 #include <netinet/in.h>
62 #include <netinet/in_systm.h>
63 #include <netinet/in_var.h>
64 #include <netinet/ip.h>
65 #include <netinet/if_ether.h>
67 #include <dev/ral/rt2661reg.h>
68 #include <dev/ral/rt2661var.h>
72 #define DPRINTF(sc, fmt, ...) do { \
73 if (sc->sc_debug > 0) \
74 printf(fmt, __VA_ARGS__); \
76 #define DPRINTFN(sc, n, fmt, ...) do { \
77 if (sc->sc_debug >= (n)) \
78 printf(fmt, __VA_ARGS__); \
81 #define DPRINTF(sc, fmt, ...)
82 #define DPRINTFN(sc, n, fmt, ...)
85 static struct ieee80211vap *rt2661_vap_create(struct ieee80211com *,
86 const char [IFNAMSIZ], int, enum ieee80211_opmode,
87 int, const uint8_t [IEEE80211_ADDR_LEN],
88 const uint8_t [IEEE80211_ADDR_LEN]);
89 static void rt2661_vap_delete(struct ieee80211vap *);
90 static void rt2661_dma_map_addr(void *, bus_dma_segment_t *, int,
92 static int rt2661_alloc_tx_ring(struct rt2661_softc *,
93 struct rt2661_tx_ring *, int);
94 static void rt2661_reset_tx_ring(struct rt2661_softc *,
95 struct rt2661_tx_ring *);
96 static void rt2661_free_tx_ring(struct rt2661_softc *,
97 struct rt2661_tx_ring *);
98 static int rt2661_alloc_rx_ring(struct rt2661_softc *,
99 struct rt2661_rx_ring *, int);
100 static void rt2661_reset_rx_ring(struct rt2661_softc *,
101 struct rt2661_rx_ring *);
102 static void rt2661_free_rx_ring(struct rt2661_softc *,
103 struct rt2661_rx_ring *);
104 static int rt2661_newstate(struct ieee80211vap *,
105 enum ieee80211_state, int);
106 static uint16_t rt2661_eeprom_read(struct rt2661_softc *, uint8_t);
107 static void rt2661_rx_intr(struct rt2661_softc *);
108 static void rt2661_tx_intr(struct rt2661_softc *);
109 static void rt2661_tx_dma_intr(struct rt2661_softc *,
110 struct rt2661_tx_ring *);
111 static void rt2661_mcu_beacon_expire(struct rt2661_softc *);
112 static void rt2661_mcu_wakeup(struct rt2661_softc *);
113 static void rt2661_mcu_cmd_intr(struct rt2661_softc *);
114 static void rt2661_scan_start(struct ieee80211com *);
115 static void rt2661_scan_end(struct ieee80211com *);
116 static void rt2661_getradiocaps(struct ieee80211com *, int, int *,
117 struct ieee80211_channel[]);
118 static void rt2661_set_channel(struct ieee80211com *);
119 static void rt2661_setup_tx_desc(struct rt2661_softc *,
120 struct rt2661_tx_desc *, uint32_t, uint16_t, int,
121 int, const bus_dma_segment_t *, int, int);
122 static int rt2661_tx_data(struct rt2661_softc *, struct mbuf *,
123 struct ieee80211_node *, int);
124 static int rt2661_tx_mgt(struct rt2661_softc *, struct mbuf *,
125 struct ieee80211_node *);
126 static int rt2661_transmit(struct ieee80211com *, struct mbuf *);
127 static void rt2661_start(struct rt2661_softc *);
128 static int rt2661_raw_xmit(struct ieee80211_node *, struct mbuf *,
129 const struct ieee80211_bpf_params *);
130 static void rt2661_watchdog(void *);
131 static void rt2661_parent(struct ieee80211com *);
132 static void rt2661_bbp_write(struct rt2661_softc *, uint8_t,
134 static uint8_t rt2661_bbp_read(struct rt2661_softc *, uint8_t);
135 static void rt2661_rf_write(struct rt2661_softc *, uint8_t,
137 static int rt2661_tx_cmd(struct rt2661_softc *, uint8_t,
139 static void rt2661_select_antenna(struct rt2661_softc *);
140 static void rt2661_enable_mrr(struct rt2661_softc *);
141 static void rt2661_set_txpreamble(struct rt2661_softc *);
142 static void rt2661_set_basicrates(struct rt2661_softc *,
143 const struct ieee80211_rateset *);
144 static void rt2661_select_band(struct rt2661_softc *,
145 struct ieee80211_channel *);
146 static void rt2661_set_chan(struct rt2661_softc *,
147 struct ieee80211_channel *);
148 static void rt2661_set_bssid(struct rt2661_softc *,
150 static void rt2661_set_macaddr(struct rt2661_softc *,
152 static void rt2661_update_promisc(struct ieee80211com *);
153 static int rt2661_wme_update(struct ieee80211com *) __unused;
154 static void rt2661_update_slot(struct ieee80211com *);
155 static const char *rt2661_get_rf(int);
156 static void rt2661_read_eeprom(struct rt2661_softc *,
157 uint8_t macaddr[IEEE80211_ADDR_LEN]);
158 static int rt2661_bbp_init(struct rt2661_softc *);
159 static void rt2661_init_locked(struct rt2661_softc *);
160 static void rt2661_init(void *);
161 static void rt2661_stop_locked(struct rt2661_softc *);
162 static void rt2661_stop(void *);
163 static int rt2661_load_microcode(struct rt2661_softc *);
165 static void rt2661_rx_tune(struct rt2661_softc *);
166 static void rt2661_radar_start(struct rt2661_softc *);
167 static int rt2661_radar_stop(struct rt2661_softc *);
169 static int rt2661_prepare_beacon(struct rt2661_softc *,
170 struct ieee80211vap *);
171 static void rt2661_enable_tsf_sync(struct rt2661_softc *);
172 static void rt2661_enable_tsf(struct rt2661_softc *);
173 static int rt2661_get_rssi(struct rt2661_softc *, uint8_t);
175 static const struct {
178 } rt2661_def_mac[] = {
182 static const struct {
185 } rt2661_def_bbp[] = {
189 static const struct rfprog {
191 uint32_t r1, r2, r3, r4;
192 } rt2661_rf5225_1[] = {
194 }, rt2661_rf5225_2[] = {
198 static const uint8_t rt2661_chan_2ghz[] =
199 { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 };
200 static const uint8_t rt2661_chan_5ghz[] =
201 { 36, 40, 44, 48, 52, 56, 60, 64,
202 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140,
203 149, 153, 157, 161, 165 };
206 rt2661_attach(device_t dev, int id)
208 struct rt2661_softc *sc = device_get_softc(dev);
209 struct ieee80211com *ic = &sc->sc_ic;
211 int error, ac, ntries;
216 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
217 MTX_DEF | MTX_RECURSE);
219 callout_init_mtx(&sc->watchdog_ch, &sc->sc_mtx, 0);
220 mbufq_init(&sc->sc_snd, ifqmaxlen);
222 /* wait for NIC to initialize */
223 for (ntries = 0; ntries < 1000; ntries++) {
224 if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0)
228 if (ntries == 1000) {
229 device_printf(sc->sc_dev,
230 "timeout waiting for NIC to initialize\n");
235 /* retrieve RF rev. no and various other things from EEPROM */
236 rt2661_read_eeprom(sc, ic->ic_macaddr);
238 device_printf(dev, "MAC/BBP RT%X, RF %s\n", val,
239 rt2661_get_rf(sc->rf_rev));
242 * Allocate Tx and Rx rings.
244 for (ac = 0; ac < 4; ac++) {
245 error = rt2661_alloc_tx_ring(sc, &sc->txq[ac],
246 RT2661_TX_RING_COUNT);
248 device_printf(sc->sc_dev,
249 "could not allocate Tx ring %d\n", ac);
254 error = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT);
256 device_printf(sc->sc_dev, "could not allocate Mgt ring\n");
260 error = rt2661_alloc_rx_ring(sc, &sc->rxq, RT2661_RX_RING_COUNT);
262 device_printf(sc->sc_dev, "could not allocate Rx ring\n");
267 ic->ic_name = device_get_nameunit(dev);
268 ic->ic_opmode = IEEE80211_M_STA;
269 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
271 /* set device capabilities */
273 IEEE80211_C_STA /* station mode */
274 | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */
275 | IEEE80211_C_HOSTAP /* hostap mode */
276 | IEEE80211_C_MONITOR /* monitor mode */
277 | IEEE80211_C_AHDEMO /* adhoc demo mode */
278 | IEEE80211_C_WDS /* 4-address traffic works */
279 | IEEE80211_C_MBSS /* mesh point link mode */
280 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
281 | IEEE80211_C_SHSLOT /* short slot time supported */
282 | IEEE80211_C_WPA /* capable of WPA1+WPA2 */
283 | IEEE80211_C_BGSCAN /* capable of bg scanning */
285 | IEEE80211_C_TXFRAG /* handle tx frags */
286 | IEEE80211_C_WME /* 802.11e */
290 rt2661_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans,
293 ieee80211_ifattach(ic);
295 ic->ic_wme.wme_update = rt2661_wme_update;
297 ic->ic_scan_start = rt2661_scan_start;
298 ic->ic_scan_end = rt2661_scan_end;
299 ic->ic_getradiocaps = rt2661_getradiocaps;
300 ic->ic_set_channel = rt2661_set_channel;
301 ic->ic_updateslot = rt2661_update_slot;
302 ic->ic_update_promisc = rt2661_update_promisc;
303 ic->ic_raw_xmit = rt2661_raw_xmit;
304 ic->ic_transmit = rt2661_transmit;
305 ic->ic_parent = rt2661_parent;
306 ic->ic_vap_create = rt2661_vap_create;
307 ic->ic_vap_delete = rt2661_vap_delete;
309 ieee80211_radiotap_attach(ic,
310 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
311 RT2661_TX_RADIOTAP_PRESENT,
312 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
313 RT2661_RX_RADIOTAP_PRESENT);
316 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
317 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
318 "debug", CTLFLAG_RW, &sc->sc_debug, 0, "debug msgs");
321 ieee80211_announce(ic);
325 fail3: rt2661_free_tx_ring(sc, &sc->mgtq);
326 fail2: while (--ac >= 0)
327 rt2661_free_tx_ring(sc, &sc->txq[ac]);
328 fail1: mtx_destroy(&sc->sc_mtx);
333 rt2661_detach(void *xsc)
335 struct rt2661_softc *sc = xsc;
336 struct ieee80211com *ic = &sc->sc_ic;
339 rt2661_stop_locked(sc);
342 ieee80211_ifdetach(ic);
343 mbufq_drain(&sc->sc_snd);
345 rt2661_free_tx_ring(sc, &sc->txq[0]);
346 rt2661_free_tx_ring(sc, &sc->txq[1]);
347 rt2661_free_tx_ring(sc, &sc->txq[2]);
348 rt2661_free_tx_ring(sc, &sc->txq[3]);
349 rt2661_free_tx_ring(sc, &sc->mgtq);
350 rt2661_free_rx_ring(sc, &sc->rxq);
352 mtx_destroy(&sc->sc_mtx);
357 static struct ieee80211vap *
358 rt2661_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
359 enum ieee80211_opmode opmode, int flags,
360 const uint8_t bssid[IEEE80211_ADDR_LEN],
361 const uint8_t mac[IEEE80211_ADDR_LEN])
363 struct rt2661_softc *sc = ic->ic_softc;
364 struct rt2661_vap *rvp;
365 struct ieee80211vap *vap;
368 case IEEE80211_M_STA:
369 case IEEE80211_M_IBSS:
370 case IEEE80211_M_AHDEMO:
371 case IEEE80211_M_MONITOR:
372 case IEEE80211_M_HOSTAP:
373 case IEEE80211_M_MBSS:
375 if (!TAILQ_EMPTY(&ic->ic_vaps)) {
376 device_printf(sc->sc_dev, "only 1 vap supported\n");
379 if (opmode == IEEE80211_M_STA)
380 flags |= IEEE80211_CLONE_NOBEACONS;
382 case IEEE80211_M_WDS:
383 if (TAILQ_EMPTY(&ic->ic_vaps) ||
384 ic->ic_opmode != IEEE80211_M_HOSTAP) {
385 device_printf(sc->sc_dev,
386 "wds only supported in ap mode\n");
390 * Silently remove any request for a unique
391 * bssid; WDS vap's always share the local
394 flags &= ~IEEE80211_CLONE_BSSID;
397 device_printf(sc->sc_dev, "unknown opmode %d\n", opmode);
400 rvp = malloc(sizeof(struct rt2661_vap), M_80211_VAP, M_WAITOK | M_ZERO);
402 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid);
404 /* override state transition machine */
405 rvp->ral_newstate = vap->iv_newstate;
406 vap->iv_newstate = rt2661_newstate;
408 vap->iv_update_beacon = rt2661_beacon_update;
411 ieee80211_ratectl_init(vap);
413 ieee80211_vap_attach(vap, ieee80211_media_change,
414 ieee80211_media_status, mac);
415 if (TAILQ_FIRST(&ic->ic_vaps) == vap)
416 ic->ic_opmode = opmode;
421 rt2661_vap_delete(struct ieee80211vap *vap)
423 struct rt2661_vap *rvp = RT2661_VAP(vap);
425 ieee80211_ratectl_deinit(vap);
426 ieee80211_vap_detach(vap);
427 free(rvp, M_80211_VAP);
431 rt2661_shutdown(void *xsc)
433 struct rt2661_softc *sc = xsc;
439 rt2661_suspend(void *xsc)
441 struct rt2661_softc *sc = xsc;
447 rt2661_resume(void *xsc)
449 struct rt2661_softc *sc = xsc;
451 if (sc->sc_ic.ic_nrunning > 0)
456 rt2661_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
461 KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
463 *(bus_addr_t *)arg = segs[0].ds_addr;
467 rt2661_alloc_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring,
474 ring->cur = ring->next = ring->stat = 0;
476 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
477 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
478 count * RT2661_TX_DESC_SIZE, 1, count * RT2661_TX_DESC_SIZE,
479 0, NULL, NULL, &ring->desc_dmat);
481 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
485 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
486 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map);
488 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
492 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
493 count * RT2661_TX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
496 device_printf(sc->sc_dev, "could not load desc DMA map\n");
500 ring->data = malloc(count * sizeof (struct rt2661_tx_data), M_DEVBUF,
502 if (ring->data == NULL) {
503 device_printf(sc->sc_dev, "could not allocate soft data\n");
508 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
509 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
510 RT2661_MAX_SCATTER, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
512 device_printf(sc->sc_dev, "could not create data DMA tag\n");
516 for (i = 0; i < count; i++) {
517 error = bus_dmamap_create(ring->data_dmat, 0,
520 device_printf(sc->sc_dev, "could not create DMA map\n");
527 fail: rt2661_free_tx_ring(sc, ring);
532 rt2661_reset_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
534 struct rt2661_tx_desc *desc;
535 struct rt2661_tx_data *data;
538 for (i = 0; i < ring->count; i++) {
539 desc = &ring->desc[i];
540 data = &ring->data[i];
542 if (data->m != NULL) {
543 bus_dmamap_sync(ring->data_dmat, data->map,
544 BUS_DMASYNC_POSTWRITE);
545 bus_dmamap_unload(ring->data_dmat, data->map);
550 if (data->ni != NULL) {
551 ieee80211_free_node(data->ni);
558 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
561 ring->cur = ring->next = ring->stat = 0;
565 rt2661_free_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
567 struct rt2661_tx_data *data;
570 if (ring->desc != NULL) {
571 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
572 BUS_DMASYNC_POSTWRITE);
573 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
574 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
577 if (ring->desc_dmat != NULL)
578 bus_dma_tag_destroy(ring->desc_dmat);
580 if (ring->data != NULL) {
581 for (i = 0; i < ring->count; i++) {
582 data = &ring->data[i];
584 if (data->m != NULL) {
585 bus_dmamap_sync(ring->data_dmat, data->map,
586 BUS_DMASYNC_POSTWRITE);
587 bus_dmamap_unload(ring->data_dmat, data->map);
591 if (data->ni != NULL)
592 ieee80211_free_node(data->ni);
594 if (data->map != NULL)
595 bus_dmamap_destroy(ring->data_dmat, data->map);
598 free(ring->data, M_DEVBUF);
601 if (ring->data_dmat != NULL)
602 bus_dma_tag_destroy(ring->data_dmat);
606 rt2661_alloc_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring,
609 struct rt2661_rx_desc *desc;
610 struct rt2661_rx_data *data;
615 ring->cur = ring->next = 0;
617 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
618 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
619 count * RT2661_RX_DESC_SIZE, 1, count * RT2661_RX_DESC_SIZE,
620 0, NULL, NULL, &ring->desc_dmat);
622 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
626 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
627 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map);
629 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
633 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
634 count * RT2661_RX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
637 device_printf(sc->sc_dev, "could not load desc DMA map\n");
641 ring->data = malloc(count * sizeof (struct rt2661_rx_data), M_DEVBUF,
643 if (ring->data == NULL) {
644 device_printf(sc->sc_dev, "could not allocate soft data\n");
650 * Pre-allocate Rx buffers and populate Rx ring.
652 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
653 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
654 1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
656 device_printf(sc->sc_dev, "could not create data DMA tag\n");
660 for (i = 0; i < count; i++) {
661 desc = &sc->rxq.desc[i];
662 data = &sc->rxq.data[i];
664 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
666 device_printf(sc->sc_dev, "could not create DMA map\n");
670 data->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
671 if (data->m == NULL) {
672 device_printf(sc->sc_dev,
673 "could not allocate rx mbuf\n");
678 error = bus_dmamap_load(ring->data_dmat, data->map,
679 mtod(data->m, void *), MCLBYTES, rt2661_dma_map_addr,
682 device_printf(sc->sc_dev,
683 "could not load rx buf DMA map");
687 desc->flags = htole32(RT2661_RX_BUSY);
688 desc->physaddr = htole32(physaddr);
691 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
695 fail: rt2661_free_rx_ring(sc, ring);
700 rt2661_reset_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
704 for (i = 0; i < ring->count; i++)
705 ring->desc[i].flags = htole32(RT2661_RX_BUSY);
707 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
709 ring->cur = ring->next = 0;
713 rt2661_free_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
715 struct rt2661_rx_data *data;
718 if (ring->desc != NULL) {
719 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
720 BUS_DMASYNC_POSTWRITE);
721 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
722 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
725 if (ring->desc_dmat != NULL)
726 bus_dma_tag_destroy(ring->desc_dmat);
728 if (ring->data != NULL) {
729 for (i = 0; i < ring->count; i++) {
730 data = &ring->data[i];
732 if (data->m != NULL) {
733 bus_dmamap_sync(ring->data_dmat, data->map,
734 BUS_DMASYNC_POSTREAD);
735 bus_dmamap_unload(ring->data_dmat, data->map);
739 if (data->map != NULL)
740 bus_dmamap_destroy(ring->data_dmat, data->map);
743 free(ring->data, M_DEVBUF);
746 if (ring->data_dmat != NULL)
747 bus_dma_tag_destroy(ring->data_dmat);
751 rt2661_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
753 struct rt2661_vap *rvp = RT2661_VAP(vap);
754 struct ieee80211com *ic = vap->iv_ic;
755 struct rt2661_softc *sc = ic->ic_softc;
758 if (nstate == IEEE80211_S_INIT && vap->iv_state == IEEE80211_S_RUN) {
761 /* abort TSF synchronization */
762 tmp = RAL_READ(sc, RT2661_TXRX_CSR9);
763 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff);
766 error = rvp->ral_newstate(vap, nstate, arg);
768 if (error == 0 && nstate == IEEE80211_S_RUN) {
769 struct ieee80211_node *ni = vap->iv_bss;
771 if (vap->iv_opmode != IEEE80211_M_MONITOR) {
772 rt2661_enable_mrr(sc);
773 rt2661_set_txpreamble(sc);
774 rt2661_set_basicrates(sc, &ni->ni_rates);
775 rt2661_set_bssid(sc, ni->ni_bssid);
778 if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
779 vap->iv_opmode == IEEE80211_M_IBSS ||
780 vap->iv_opmode == IEEE80211_M_MBSS) {
781 error = rt2661_prepare_beacon(sc, vap);
785 if (vap->iv_opmode != IEEE80211_M_MONITOR)
786 rt2661_enable_tsf_sync(sc);
788 rt2661_enable_tsf(sc);
794 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or
798 rt2661_eeprom_read(struct rt2661_softc *sc, uint8_t addr)
804 /* clock C once before the first command */
805 RT2661_EEPROM_CTL(sc, 0);
807 RT2661_EEPROM_CTL(sc, RT2661_S);
808 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
809 RT2661_EEPROM_CTL(sc, RT2661_S);
811 /* write start bit (1) */
812 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
813 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
815 /* write READ opcode (10) */
816 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
817 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
818 RT2661_EEPROM_CTL(sc, RT2661_S);
819 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
821 /* write address (A5-A0 or A7-A0) */
822 n = (RAL_READ(sc, RT2661_E2PROM_CSR) & RT2661_93C46) ? 5 : 7;
823 for (; n >= 0; n--) {
824 RT2661_EEPROM_CTL(sc, RT2661_S |
825 (((addr >> n) & 1) << RT2661_SHIFT_D));
826 RT2661_EEPROM_CTL(sc, RT2661_S |
827 (((addr >> n) & 1) << RT2661_SHIFT_D) | RT2661_C);
830 RT2661_EEPROM_CTL(sc, RT2661_S);
832 /* read data Q15-Q0 */
834 for (n = 15; n >= 0; n--) {
835 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
836 tmp = RAL_READ(sc, RT2661_E2PROM_CSR);
837 val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n;
838 RT2661_EEPROM_CTL(sc, RT2661_S);
841 RT2661_EEPROM_CTL(sc, 0);
843 /* clear Chip Select and clock C */
844 RT2661_EEPROM_CTL(sc, RT2661_S);
845 RT2661_EEPROM_CTL(sc, 0);
846 RT2661_EEPROM_CTL(sc, RT2661_C);
852 rt2661_tx_intr(struct rt2661_softc *sc)
854 struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs;
855 struct rt2661_tx_ring *txq;
856 struct rt2661_tx_data *data;
860 txs->flags = IEEE80211_RATECTL_TX_FAIL_LONG;
862 struct ieee80211_node *ni;
865 val = RAL_READ(sc, RT2661_STA_CSR4);
866 if (!(val & RT2661_TX_STAT_VALID))
869 /* retrieve the queue in which this frame was sent */
870 qid = RT2661_TX_QID(val);
871 txq = (qid <= 3) ? &sc->txq[qid] : &sc->mgtq;
873 /* retrieve rate control algorithm context */
874 data = &txq->data[txq->stat];
880 /* if no frame has been sent, ignore */
884 switch (RT2661_TX_RESULT(val)) {
885 case RT2661_TX_SUCCESS:
886 txs->status = IEEE80211_RATECTL_TX_SUCCESS;
887 txs->long_retries = RT2661_TX_RETRYCNT(val);
889 DPRINTFN(sc, 10, "data frame sent successfully after "
890 "%d retries\n", txs->long_retries);
891 if (data->rix != IEEE80211_FIXED_RATE_NONE)
892 ieee80211_ratectl_tx_complete(ni, txs);
896 case RT2661_TX_RETRY_FAIL:
897 txs->status = IEEE80211_RATECTL_TX_FAIL_LONG;
898 txs->long_retries = RT2661_TX_RETRYCNT(val);
900 DPRINTFN(sc, 9, "%s\n",
901 "sending data frame failed (too much retries)");
902 if (data->rix != IEEE80211_FIXED_RATE_NONE)
903 ieee80211_ratectl_tx_complete(ni, txs);
909 device_printf(sc->sc_dev,
910 "sending data frame failed 0x%08x\n", val);
914 DPRINTFN(sc, 15, "tx done q=%d idx=%u\n", qid, txq->stat);
917 if (++txq->stat >= txq->count) /* faster than % count */
920 ieee80211_tx_complete(ni, m, error);
929 rt2661_tx_dma_intr(struct rt2661_softc *sc, struct rt2661_tx_ring *txq)
931 struct rt2661_tx_desc *desc;
932 struct rt2661_tx_data *data;
934 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_POSTREAD);
937 desc = &txq->desc[txq->next];
938 data = &txq->data[txq->next];
940 if ((le32toh(desc->flags) & RT2661_TX_BUSY) ||
941 !(le32toh(desc->flags) & RT2661_TX_VALID))
944 bus_dmamap_sync(txq->data_dmat, data->map,
945 BUS_DMASYNC_POSTWRITE);
946 bus_dmamap_unload(txq->data_dmat, data->map);
948 /* descriptor is no longer valid */
949 desc->flags &= ~htole32(RT2661_TX_VALID);
951 DPRINTFN(sc, 15, "tx dma done q=%p idx=%u\n", txq, txq->next);
953 if (++txq->next >= txq->count) /* faster than % count */
957 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
961 rt2661_rx_intr(struct rt2661_softc *sc)
963 struct ieee80211com *ic = &sc->sc_ic;
964 struct rt2661_rx_desc *desc;
965 struct rt2661_rx_data *data;
967 struct ieee80211_frame *wh;
968 struct ieee80211_node *ni;
969 struct mbuf *mnew, *m;
972 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
973 BUS_DMASYNC_POSTREAD);
978 desc = &sc->rxq.desc[sc->rxq.cur];
979 data = &sc->rxq.data[sc->rxq.cur];
981 if (le32toh(desc->flags) & RT2661_RX_BUSY)
984 if ((le32toh(desc->flags) & RT2661_RX_PHY_ERROR) ||
985 (le32toh(desc->flags) & RT2661_RX_CRC_ERROR)) {
987 * This should not happen since we did not request
988 * to receive those frames when we filled TXRX_CSR0.
990 DPRINTFN(sc, 5, "PHY or CRC error flags 0x%08x\n",
991 le32toh(desc->flags));
992 counter_u64_add(ic->ic_ierrors, 1);
996 if ((le32toh(desc->flags) & RT2661_RX_CIPHER_MASK) != 0) {
997 counter_u64_add(ic->ic_ierrors, 1);
1002 * Try to allocate a new mbuf for this ring element and load it
1003 * before processing the current mbuf. If the ring element
1004 * cannot be loaded, drop the received packet and reuse the old
1005 * mbuf. In the unlikely case that the old mbuf can't be
1006 * reloaded either, explicitly panic.
1008 mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
1010 counter_u64_add(ic->ic_ierrors, 1);
1014 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
1015 BUS_DMASYNC_POSTREAD);
1016 bus_dmamap_unload(sc->rxq.data_dmat, data->map);
1018 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1019 mtod(mnew, void *), MCLBYTES, rt2661_dma_map_addr,
1024 /* try to reload the old mbuf */
1025 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1026 mtod(data->m, void *), MCLBYTES,
1027 rt2661_dma_map_addr, &physaddr, 0);
1029 /* very unlikely that it will fail... */
1030 panic("%s: could not load old rx mbuf",
1031 device_get_name(sc->sc_dev));
1033 counter_u64_add(ic->ic_ierrors, 1);
1038 * New mbuf successfully loaded, update Rx ring and continue
1043 desc->physaddr = htole32(physaddr);
1046 m->m_pkthdr.len = m->m_len =
1047 (le32toh(desc->flags) >> 16) & 0xfff;
1049 rssi = rt2661_get_rssi(sc, desc->rssi);
1050 /* Error happened during RSSI conversion. */
1052 rssi = -30; /* XXX ignored by net80211 */
1053 nf = RT2661_NOISE_FLOOR;
1055 if (ieee80211_radiotap_active(ic)) {
1056 struct rt2661_rx_radiotap_header *tap = &sc->sc_rxtap;
1057 uint32_t tsf_lo, tsf_hi;
1059 /* get timestamp (low and high 32 bits) */
1060 tsf_hi = RAL_READ(sc, RT2661_TXRX_CSR13);
1061 tsf_lo = RAL_READ(sc, RT2661_TXRX_CSR12);
1064 htole64(((uint64_t)tsf_hi << 32) | tsf_lo);
1066 tap->wr_rate = ieee80211_plcp2rate(desc->rate,
1067 (desc->flags & htole32(RT2661_RX_OFDM)) ?
1068 IEEE80211_T_OFDM : IEEE80211_T_CCK);
1069 tap->wr_antsignal = nf + rssi;
1070 tap->wr_antnoise = nf;
1072 sc->sc_flags |= RAL_INPUT_RUNNING;
1074 wh = mtod(m, struct ieee80211_frame *);
1076 /* send the frame to the 802.11 layer */
1077 ni = ieee80211_find_rxnode(ic,
1078 (struct ieee80211_frame_min *)wh);
1080 (void) ieee80211_input(ni, m, rssi, nf);
1081 ieee80211_free_node(ni);
1083 (void) ieee80211_input_all(ic, m, rssi, nf);
1086 sc->sc_flags &= ~RAL_INPUT_RUNNING;
1088 skip: desc->flags |= htole32(RT2661_RX_BUSY);
1090 DPRINTFN(sc, 15, "rx intr idx=%u\n", sc->rxq.cur);
1092 sc->rxq.cur = (sc->rxq.cur + 1) % RT2661_RX_RING_COUNT;
1095 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1096 BUS_DMASYNC_PREWRITE);
1101 rt2661_mcu_beacon_expire(struct rt2661_softc *sc)
1107 rt2661_mcu_wakeup(struct rt2661_softc *sc)
1109 RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16);
1111 RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7);
1112 RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18);
1113 RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20);
1115 /* send wakeup command to MCU */
1116 rt2661_tx_cmd(sc, RT2661_MCU_CMD_WAKEUP, 0);
1120 rt2661_mcu_cmd_intr(struct rt2661_softc *sc)
1122 RAL_READ(sc, RT2661_M2H_CMD_DONE_CSR);
1123 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
1127 rt2661_intr(void *arg)
1129 struct rt2661_softc *sc = arg;
1134 /* disable MAC and MCU interrupts */
1135 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f);
1136 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
1138 /* don't re-enable interrupts if we're shutting down */
1139 if (!(sc->sc_flags & RAL_RUNNING)) {
1144 r1 = RAL_READ(sc, RT2661_INT_SOURCE_CSR);
1145 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1);
1147 r2 = RAL_READ(sc, RT2661_MCU_INT_SOURCE_CSR);
1148 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2);
1150 if (r1 & RT2661_MGT_DONE)
1151 rt2661_tx_dma_intr(sc, &sc->mgtq);
1153 if (r1 & RT2661_RX_DONE)
1156 if (r1 & RT2661_TX0_DMA_DONE)
1157 rt2661_tx_dma_intr(sc, &sc->txq[0]);
1159 if (r1 & RT2661_TX1_DMA_DONE)
1160 rt2661_tx_dma_intr(sc, &sc->txq[1]);
1162 if (r1 & RT2661_TX2_DMA_DONE)
1163 rt2661_tx_dma_intr(sc, &sc->txq[2]);
1165 if (r1 & RT2661_TX3_DMA_DONE)
1166 rt2661_tx_dma_intr(sc, &sc->txq[3]);
1168 if (r1 & RT2661_TX_DONE)
1171 if (r2 & RT2661_MCU_CMD_DONE)
1172 rt2661_mcu_cmd_intr(sc);
1174 if (r2 & RT2661_MCU_BEACON_EXPIRE)
1175 rt2661_mcu_beacon_expire(sc);
1177 if (r2 & RT2661_MCU_WAKEUP)
1178 rt2661_mcu_wakeup(sc);
1180 /* re-enable MAC and MCU interrupts */
1181 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
1182 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
1188 rt2661_plcp_signal(int rate)
1191 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1192 case 12: return 0xb;
1193 case 18: return 0xf;
1194 case 24: return 0xa;
1195 case 36: return 0xe;
1196 case 48: return 0x9;
1197 case 72: return 0xd;
1198 case 96: return 0x8;
1199 case 108: return 0xc;
1201 /* CCK rates (NB: not IEEE std, device-specific) */
1204 case 11: return 0x2;
1205 case 22: return 0x3;
1207 return 0xff; /* XXX unsupported/unknown rate */
1211 rt2661_setup_tx_desc(struct rt2661_softc *sc, struct rt2661_tx_desc *desc,
1212 uint32_t flags, uint16_t xflags, int len, int rate,
1213 const bus_dma_segment_t *segs, int nsegs, int ac)
1215 struct ieee80211com *ic = &sc->sc_ic;
1216 uint16_t plcp_length;
1219 desc->flags = htole32(flags);
1220 desc->flags |= htole32(len << 16);
1221 desc->flags |= htole32(RT2661_TX_BUSY | RT2661_TX_VALID);
1223 desc->xflags = htole16(xflags);
1224 desc->xflags |= htole16(nsegs << 13);
1226 desc->wme = htole16(
1229 RT2661_LOGCWMIN(4) |
1230 RT2661_LOGCWMAX(10));
1233 * Remember in which queue this frame was sent. This field is driver
1234 * private data only. It will be made available by the NIC in STA_CSR4
1239 /* setup PLCP fields */
1240 desc->plcp_signal = rt2661_plcp_signal(rate);
1241 desc->plcp_service = 4;
1243 len += IEEE80211_CRC_LEN;
1244 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) {
1245 desc->flags |= htole32(RT2661_TX_OFDM);
1247 plcp_length = len & 0xfff;
1248 desc->plcp_length_hi = plcp_length >> 6;
1249 desc->plcp_length_lo = plcp_length & 0x3f;
1251 plcp_length = howmany(16 * len, rate);
1253 remainder = (16 * len) % 22;
1254 if (remainder != 0 && remainder < 7)
1255 desc->plcp_service |= RT2661_PLCP_LENGEXT;
1257 desc->plcp_length_hi = plcp_length >> 8;
1258 desc->plcp_length_lo = plcp_length & 0xff;
1260 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1261 desc->plcp_signal |= 0x08;
1264 /* RT2x61 supports scatter with up to 5 segments */
1265 for (i = 0; i < nsegs; i++) {
1266 desc->addr[i] = htole32(segs[i].ds_addr);
1267 desc->len [i] = htole16(segs[i].ds_len);
1272 rt2661_tx_mgt(struct rt2661_softc *sc, struct mbuf *m0,
1273 struct ieee80211_node *ni)
1275 struct ieee80211vap *vap = ni->ni_vap;
1276 struct ieee80211com *ic = ni->ni_ic;
1277 struct rt2661_tx_desc *desc;
1278 struct rt2661_tx_data *data;
1279 struct ieee80211_frame *wh;
1280 struct ieee80211_key *k;
1281 bus_dma_segment_t segs[RT2661_MAX_SCATTER];
1283 uint32_t flags = 0; /* XXX HWSEQ */
1284 int nsegs, rate, error;
1286 desc = &sc->mgtq.desc[sc->mgtq.cur];
1287 data = &sc->mgtq.data[sc->mgtq.cur];
1289 rate = ni->ni_txparms->mgmtrate;
1291 wh = mtod(m0, struct ieee80211_frame *);
1293 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
1294 k = ieee80211_crypto_encap(ni, m0);
1301 error = bus_dmamap_load_mbuf_sg(sc->mgtq.data_dmat, data->map, m0,
1304 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1310 if (ieee80211_radiotap_active_vap(vap)) {
1311 struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
1314 tap->wt_rate = rate;
1316 ieee80211_radiotap_tx(vap, m0);
1321 /* management frames are not taken into account for amrr */
1322 data->rix = IEEE80211_FIXED_RATE_NONE;
1324 wh = mtod(m0, struct ieee80211_frame *);
1326 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1327 flags |= RT2661_TX_NEED_ACK;
1329 dur = ieee80211_ack_duration(ic->ic_rt,
1330 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1331 *(uint16_t *)wh->i_dur = htole16(dur);
1333 /* tell hardware to add timestamp in probe responses */
1335 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
1336 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
1337 flags |= RT2661_TX_TIMESTAMP;
1340 rt2661_setup_tx_desc(sc, desc, flags, 0 /* XXX HWSEQ */,
1341 m0->m_pkthdr.len, rate, segs, nsegs, RT2661_QID_MGT);
1343 bus_dmamap_sync(sc->mgtq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1344 bus_dmamap_sync(sc->mgtq.desc_dmat, sc->mgtq.desc_map,
1345 BUS_DMASYNC_PREWRITE);
1347 DPRINTFN(sc, 10, "sending mgt frame len=%u idx=%u rate=%u\n",
1348 m0->m_pkthdr.len, sc->mgtq.cur, rate);
1352 sc->mgtq.cur = (sc->mgtq.cur + 1) % RT2661_MGT_RING_COUNT;
1353 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT);
1359 rt2661_sendprot(struct rt2661_softc *sc, int ac,
1360 const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate)
1362 struct ieee80211com *ic = ni->ni_ic;
1363 struct rt2661_tx_ring *txq = &sc->txq[ac];
1364 const struct ieee80211_frame *wh;
1365 struct rt2661_tx_desc *desc;
1366 struct rt2661_tx_data *data;
1368 int protrate, ackrate, pktlen, flags, isshort, error;
1370 bus_dma_segment_t segs[RT2661_MAX_SCATTER];
1373 KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY,
1374 ("protection %d", prot));
1376 wh = mtod(m, const struct ieee80211_frame *);
1377 pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN;
1379 protrate = ieee80211_ctl_rate(ic->ic_rt, rate);
1380 ackrate = ieee80211_ack_rate(ic->ic_rt, rate);
1382 isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0;
1383 dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort)
1384 + ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1385 flags = RT2661_TX_MORE_FRAG;
1386 if (prot == IEEE80211_PROT_RTSCTS) {
1387 /* NB: CTS is the same size as an ACK */
1388 dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1389 flags |= RT2661_TX_NEED_ACK;
1390 mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur);
1392 mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur);
1394 if (mprot == NULL) {
1395 /* XXX stat + msg */
1399 data = &txq->data[txq->cur];
1400 desc = &txq->desc[txq->cur];
1402 error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, mprot, segs,
1405 device_printf(sc->sc_dev,
1406 "could not map mbuf (error %d)\n", error);
1412 data->ni = ieee80211_ref_node(ni);
1413 /* ctl frames are not taken into account for amrr */
1414 data->rix = IEEE80211_FIXED_RATE_NONE;
1416 rt2661_setup_tx_desc(sc, desc, flags, 0, mprot->m_pkthdr.len,
1417 protrate, segs, 1, ac);
1419 bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1420 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1423 txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
1429 rt2661_tx_data(struct rt2661_softc *sc, struct mbuf *m0,
1430 struct ieee80211_node *ni, int ac)
1432 struct ieee80211vap *vap = ni->ni_vap;
1433 struct ieee80211com *ic = &sc->sc_ic;
1434 struct rt2661_tx_ring *txq = &sc->txq[ac];
1435 struct rt2661_tx_desc *desc;
1436 struct rt2661_tx_data *data;
1437 struct ieee80211_frame *wh;
1438 const struct ieee80211_txparam *tp = ni->ni_txparms;
1439 struct ieee80211_key *k;
1441 bus_dma_segment_t segs[RT2661_MAX_SCATTER];
1444 int error, nsegs, rate, noack = 0;
1446 wh = mtod(m0, struct ieee80211_frame *);
1448 if (m0->m_flags & M_EAPOL) {
1449 rate = tp->mgmtrate;
1450 } else if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1451 rate = tp->mcastrate;
1452 } else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) {
1453 rate = tp->ucastrate;
1455 (void) ieee80211_ratectl_rate(ni, NULL, 0);
1456 rate = ni->ni_txrate;
1458 rate &= IEEE80211_RATE_VAL;
1460 if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS)
1461 noack = !! ieee80211_wme_vap_ac_is_noack(vap, ac);
1463 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
1464 k = ieee80211_crypto_encap(ni, m0);
1470 /* packet header may have moved, reset our local pointer */
1471 wh = mtod(m0, struct ieee80211_frame *);
1475 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1476 int prot = IEEE80211_PROT_NONE;
1477 if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold)
1478 prot = IEEE80211_PROT_RTSCTS;
1479 else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1480 ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM)
1481 prot = ic->ic_protmode;
1482 if (prot != IEEE80211_PROT_NONE) {
1483 error = rt2661_sendprot(sc, ac, m0, ni, prot, rate);
1488 flags |= RT2661_TX_LONG_RETRY | RT2661_TX_IFS;
1492 data = &txq->data[txq->cur];
1493 desc = &txq->desc[txq->cur];
1495 error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0, segs,
1497 if (error != 0 && error != EFBIG) {
1498 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1504 mnew = m_defrag(m0, M_NOWAIT);
1506 device_printf(sc->sc_dev,
1507 "could not defragment mbuf\n");
1513 error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0,
1516 device_printf(sc->sc_dev,
1517 "could not map mbuf (error %d)\n", error);
1522 /* packet header have moved, reset our local pointer */
1523 wh = mtod(m0, struct ieee80211_frame *);
1526 if (ieee80211_radiotap_active_vap(vap)) {
1527 struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
1530 tap->wt_rate = rate;
1532 ieee80211_radiotap_tx(vap, m0);
1538 /* remember link conditions for rate adaptation algorithm */
1539 if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) {
1540 data->rix = ni->ni_txrate;
1541 /* XXX probably need last rssi value and not avg */
1542 data->rssi = ic->ic_node_getrssi(ni);
1544 data->rix = IEEE80211_FIXED_RATE_NONE;
1546 if (!noack && !IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1547 flags |= RT2661_TX_NEED_ACK;
1549 dur = ieee80211_ack_duration(ic->ic_rt,
1550 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1551 *(uint16_t *)wh->i_dur = htole16(dur);
1554 rt2661_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate, segs,
1557 bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1558 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1560 DPRINTFN(sc, 10, "sending data frame len=%u idx=%u rate=%u\n",
1561 m0->m_pkthdr.len, txq->cur, rate);
1565 txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
1566 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1 << ac);
1572 rt2661_transmit(struct ieee80211com *ic, struct mbuf *m)
1574 struct rt2661_softc *sc = ic->ic_softc;
1578 if ((sc->sc_flags & RAL_RUNNING) == 0) {
1582 error = mbufq_enqueue(&sc->sc_snd, m);
1594 rt2661_start(struct rt2661_softc *sc)
1597 struct ieee80211_node *ni;
1600 RAL_LOCK_ASSERT(sc);
1602 /* prevent management frames from being sent if we're not ready */
1603 if (!(sc->sc_flags & RAL_RUNNING) || sc->sc_invalid)
1606 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) {
1607 ac = M_WME_GETAC(m);
1608 if (sc->txq[ac].queued >= RT2661_TX_RING_COUNT - 1) {
1609 /* there is no place left in this ring */
1610 mbufq_prepend(&sc->sc_snd, m);
1613 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1614 if (rt2661_tx_data(sc, m, ni, ac) != 0) {
1615 if_inc_counter(ni->ni_vap->iv_ifp,
1616 IFCOUNTER_OERRORS, 1);
1617 ieee80211_free_node(ni);
1620 sc->sc_tx_timer = 5;
1625 rt2661_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1626 const struct ieee80211_bpf_params *params)
1628 struct ieee80211com *ic = ni->ni_ic;
1629 struct rt2661_softc *sc = ic->ic_softc;
1633 /* prevent management frames from being sent if we're not ready */
1634 if (!(sc->sc_flags & RAL_RUNNING)) {
1639 if (sc->mgtq.queued >= RT2661_MGT_RING_COUNT) {
1642 return ENOBUFS; /* XXX */
1646 * Legacy path; interpret frame contents to decide
1647 * precisely how to send the frame.
1650 if (rt2661_tx_mgt(sc, m, ni) != 0)
1652 sc->sc_tx_timer = 5;
1659 return EIO; /* XXX */
1663 rt2661_watchdog(void *arg)
1665 struct rt2661_softc *sc = (struct rt2661_softc *)arg;
1667 RAL_LOCK_ASSERT(sc);
1669 KASSERT(sc->sc_flags & RAL_RUNNING, ("not running"));
1671 if (sc->sc_invalid) /* card ejected */
1674 if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) {
1675 device_printf(sc->sc_dev, "device timeout\n");
1676 rt2661_init_locked(sc);
1677 counter_u64_add(sc->sc_ic.ic_oerrors, 1);
1678 /* NB: callout is reset in rt2661_init() */
1681 callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc);
1685 rt2661_parent(struct ieee80211com *ic)
1687 struct rt2661_softc *sc = ic->ic_softc;
1691 if (ic->ic_nrunning > 0) {
1692 if ((sc->sc_flags & RAL_RUNNING) == 0) {
1693 rt2661_init_locked(sc);
1696 rt2661_update_promisc(ic);
1697 } else if (sc->sc_flags & RAL_RUNNING)
1698 rt2661_stop_locked(sc);
1701 ieee80211_start_all(ic);
1705 rt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val)
1710 for (ntries = 0; ntries < 100; ntries++) {
1711 if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
1715 if (ntries == 100) {
1716 device_printf(sc->sc_dev, "could not write to BBP\n");
1720 tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val;
1721 RAL_WRITE(sc, RT2661_PHY_CSR3, tmp);
1723 DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val);
1727 rt2661_bbp_read(struct rt2661_softc *sc, uint8_t reg)
1732 for (ntries = 0; ntries < 100; ntries++) {
1733 if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
1737 if (ntries == 100) {
1738 device_printf(sc->sc_dev, "could not read from BBP\n");
1742 val = RT2661_BBP_BUSY | RT2661_BBP_READ | reg << 8;
1743 RAL_WRITE(sc, RT2661_PHY_CSR3, val);
1745 for (ntries = 0; ntries < 100; ntries++) {
1746 val = RAL_READ(sc, RT2661_PHY_CSR3);
1747 if (!(val & RT2661_BBP_BUSY))
1752 device_printf(sc->sc_dev, "could not read from BBP\n");
1757 rt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val)
1762 for (ntries = 0; ntries < 100; ntries++) {
1763 if (!(RAL_READ(sc, RT2661_PHY_CSR4) & RT2661_RF_BUSY))
1767 if (ntries == 100) {
1768 device_printf(sc->sc_dev, "could not write to RF\n");
1772 tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 |
1774 RAL_WRITE(sc, RT2661_PHY_CSR4, tmp);
1776 /* remember last written value in sc */
1777 sc->rf_regs[reg] = val;
1779 DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff);
1783 rt2661_tx_cmd(struct rt2661_softc *sc, uint8_t cmd, uint16_t arg)
1785 if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY)
1786 return EIO; /* there is already a command pending */
1788 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR,
1789 RT2661_H2M_BUSY | RT2661_TOKEN_NO_INTR << 16 | arg);
1791 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd);
1797 rt2661_select_antenna(struct rt2661_softc *sc)
1799 uint8_t bbp4, bbp77;
1802 bbp4 = rt2661_bbp_read(sc, 4);
1803 bbp77 = rt2661_bbp_read(sc, 77);
1807 /* make sure Rx is disabled before switching antenna */
1808 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
1809 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
1811 rt2661_bbp_write(sc, 4, bbp4);
1812 rt2661_bbp_write(sc, 77, bbp77);
1814 /* restore Rx filter */
1815 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
1819 * Enable multi-rate retries for frames sent at OFDM rates.
1820 * In 802.11b/g mode, allow fallback to CCK rates.
1823 rt2661_enable_mrr(struct rt2661_softc *sc)
1825 struct ieee80211com *ic = &sc->sc_ic;
1828 tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
1830 tmp &= ~RT2661_MRR_CCK_FALLBACK;
1831 if (!IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan))
1832 tmp |= RT2661_MRR_CCK_FALLBACK;
1833 tmp |= RT2661_MRR_ENABLED;
1835 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
1839 rt2661_set_txpreamble(struct rt2661_softc *sc)
1841 struct ieee80211com *ic = &sc->sc_ic;
1844 tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
1846 tmp &= ~RT2661_SHORT_PREAMBLE;
1847 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
1848 tmp |= RT2661_SHORT_PREAMBLE;
1850 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
1854 rt2661_set_basicrates(struct rt2661_softc *sc,
1855 const struct ieee80211_rateset *rs)
1857 struct ieee80211com *ic = &sc->sc_ic;
1862 for (i = 0; i < rs->rs_nrates; i++) {
1863 rate = rs->rs_rates[i];
1865 if (!(rate & IEEE80211_RATE_BASIC))
1868 mask |= 1 << ieee80211_legacy_rate_lookup(ic->ic_rt,
1869 IEEE80211_RV(rate));
1872 RAL_WRITE(sc, RT2661_TXRX_CSR5, mask);
1874 DPRINTF(sc, "Setting basic rate mask to 0x%x\n", mask);
1878 * Reprogram MAC/BBP to switch to a new band. Values taken from the reference
1882 rt2661_select_band(struct rt2661_softc *sc, struct ieee80211_channel *c)
1884 uint8_t bbp17, bbp35, bbp96, bbp97, bbp98, bbp104;
1887 /* update all BBP registers that depend on the band */
1888 bbp17 = 0x20; bbp96 = 0x48; bbp104 = 0x2c;
1889 bbp35 = 0x50; bbp97 = 0x48; bbp98 = 0x48;
1890 if (IEEE80211_IS_CHAN_5GHZ(c)) {
1891 bbp17 += 0x08; bbp96 += 0x10; bbp104 += 0x0c;
1892 bbp35 += 0x10; bbp97 += 0x10; bbp98 += 0x10;
1894 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
1895 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
1896 bbp17 += 0x10; bbp96 += 0x10; bbp104 += 0x10;
1899 rt2661_bbp_write(sc, 17, bbp17);
1900 rt2661_bbp_write(sc, 96, bbp96);
1901 rt2661_bbp_write(sc, 104, bbp104);
1903 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
1904 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
1905 rt2661_bbp_write(sc, 75, 0x80);
1906 rt2661_bbp_write(sc, 86, 0x80);
1907 rt2661_bbp_write(sc, 88, 0x80);
1910 rt2661_bbp_write(sc, 35, bbp35);
1911 rt2661_bbp_write(sc, 97, bbp97);
1912 rt2661_bbp_write(sc, 98, bbp98);
1914 tmp = RAL_READ(sc, RT2661_PHY_CSR0);
1915 tmp &= ~(RT2661_PA_PE_2GHZ | RT2661_PA_PE_5GHZ);
1916 if (IEEE80211_IS_CHAN_2GHZ(c))
1917 tmp |= RT2661_PA_PE_2GHZ;
1919 tmp |= RT2661_PA_PE_5GHZ;
1920 RAL_WRITE(sc, RT2661_PHY_CSR0, tmp);
1924 rt2661_set_chan(struct rt2661_softc *sc, struct ieee80211_channel *c)
1926 struct ieee80211com *ic = &sc->sc_ic;
1927 const struct rfprog *rfprog;
1928 uint8_t bbp3, bbp94 = RT2661_BBPR94_DEFAULT;
1932 chan = ieee80211_chan2ieee(ic, c);
1933 KASSERT(chan != 0 && chan != IEEE80211_CHAN_ANY, ("chan 0x%x", chan));
1935 /* select the appropriate RF settings based on what EEPROM says */
1936 rfprog = (sc->rfprog == 0) ? rt2661_rf5225_1 : rt2661_rf5225_2;
1938 /* find the settings for this channel (we know it exists) */
1939 for (i = 0; rfprog[i].chan != chan; i++);
1941 power = sc->txpow[i];
1945 } else if (power > 31) {
1946 bbp94 += power - 31;
1951 * If we are switching from the 2GHz band to the 5GHz band or
1952 * vice-versa, BBP registers need to be reprogrammed.
1954 if (c->ic_flags != sc->sc_curchan->ic_flags) {
1955 rt2661_select_band(sc, c);
1956 rt2661_select_antenna(sc);
1960 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
1961 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
1962 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
1963 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
1967 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
1968 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
1969 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7 | 1);
1970 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
1974 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
1975 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
1976 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
1977 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
1979 /* enable smart mode for MIMO-capable RFs */
1980 bbp3 = rt2661_bbp_read(sc, 3);
1982 bbp3 &= ~RT2661_SMART_MODE;
1983 if (sc->rf_rev == RT2661_RF_5325 || sc->rf_rev == RT2661_RF_2529)
1984 bbp3 |= RT2661_SMART_MODE;
1986 rt2661_bbp_write(sc, 3, bbp3);
1988 if (bbp94 != RT2661_BBPR94_DEFAULT)
1989 rt2661_bbp_write(sc, 94, bbp94);
1991 /* 5GHz radio needs a 1ms delay here */
1992 if (IEEE80211_IS_CHAN_5GHZ(c))
1997 rt2661_set_bssid(struct rt2661_softc *sc, const uint8_t *bssid)
2001 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
2002 RAL_WRITE(sc, RT2661_MAC_CSR4, tmp);
2004 tmp = bssid[4] | bssid[5] << 8 | RT2661_ONE_BSSID << 16;
2005 RAL_WRITE(sc, RT2661_MAC_CSR5, tmp);
2009 rt2661_set_macaddr(struct rt2661_softc *sc, const uint8_t *addr)
2013 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
2014 RAL_WRITE(sc, RT2661_MAC_CSR2, tmp);
2016 tmp = addr[4] | addr[5] << 8;
2017 RAL_WRITE(sc, RT2661_MAC_CSR3, tmp);
2021 rt2661_update_promisc(struct ieee80211com *ic)
2023 struct rt2661_softc *sc = ic->ic_softc;
2026 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2028 tmp &= ~RT2661_DROP_NOT_TO_ME;
2029 if (ic->ic_promisc == 0)
2030 tmp |= RT2661_DROP_NOT_TO_ME;
2032 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2034 DPRINTF(sc, "%s promiscuous mode\n",
2035 (ic->ic_promisc > 0) ? "entering" : "leaving");
2039 * Update QoS (802.11e) settings for each h/w Tx ring.
2042 rt2661_wme_update(struct ieee80211com *ic)
2044 struct rt2661_softc *sc = ic->ic_softc;
2045 struct chanAccParams chp;
2046 const struct wmeParams *wmep;
2048 ieee80211_wme_ic_getparams(ic, &chp);
2050 wmep = chp.cap_wmeParams;
2052 /* XXX: not sure about shifts. */
2053 /* XXX: the reference driver plays with AC_VI settings too. */
2056 RAL_WRITE(sc, RT2661_AC_TXOP_CSR0,
2057 wmep[WME_AC_BE].wmep_txopLimit << 16 |
2058 wmep[WME_AC_BK].wmep_txopLimit);
2059 RAL_WRITE(sc, RT2661_AC_TXOP_CSR1,
2060 wmep[WME_AC_VI].wmep_txopLimit << 16 |
2061 wmep[WME_AC_VO].wmep_txopLimit);
2064 RAL_WRITE(sc, RT2661_CWMIN_CSR,
2065 wmep[WME_AC_BE].wmep_logcwmin << 12 |
2066 wmep[WME_AC_BK].wmep_logcwmin << 8 |
2067 wmep[WME_AC_VI].wmep_logcwmin << 4 |
2068 wmep[WME_AC_VO].wmep_logcwmin);
2071 RAL_WRITE(sc, RT2661_CWMAX_CSR,
2072 wmep[WME_AC_BE].wmep_logcwmax << 12 |
2073 wmep[WME_AC_BK].wmep_logcwmax << 8 |
2074 wmep[WME_AC_VI].wmep_logcwmax << 4 |
2075 wmep[WME_AC_VO].wmep_logcwmax);
2078 RAL_WRITE(sc, RT2661_AIFSN_CSR,
2079 wmep[WME_AC_BE].wmep_aifsn << 12 |
2080 wmep[WME_AC_BK].wmep_aifsn << 8 |
2081 wmep[WME_AC_VI].wmep_aifsn << 4 |
2082 wmep[WME_AC_VO].wmep_aifsn);
2088 rt2661_update_slot(struct ieee80211com *ic)
2090 struct rt2661_softc *sc = ic->ic_softc;
2094 slottime = IEEE80211_GET_SLOTTIME(ic);
2096 tmp = RAL_READ(sc, RT2661_MAC_CSR9);
2097 tmp = (tmp & ~0xff) | slottime;
2098 RAL_WRITE(sc, RT2661_MAC_CSR9, tmp);
2102 rt2661_get_rf(int rev)
2105 case RT2661_RF_5225: return "RT5225";
2106 case RT2661_RF_5325: return "RT5325 (MIMO XR)";
2107 case RT2661_RF_2527: return "RT2527";
2108 case RT2661_RF_2529: return "RT2529 (MIMO XR)";
2109 default: return "unknown";
2114 rt2661_read_eeprom(struct rt2661_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
2119 /* read MAC address */
2120 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01);
2121 macaddr[0] = val & 0xff;
2122 macaddr[1] = val >> 8;
2124 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23);
2125 macaddr[2] = val & 0xff;
2126 macaddr[3] = val >> 8;
2128 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45);
2129 macaddr[4] = val & 0xff;
2130 macaddr[5] = val >> 8;
2132 val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA);
2133 /* XXX: test if different from 0xffff? */
2134 sc->rf_rev = (val >> 11) & 0x1f;
2135 sc->hw_radio = (val >> 10) & 0x1;
2136 sc->rx_ant = (val >> 4) & 0x3;
2137 sc->tx_ant = (val >> 2) & 0x3;
2138 sc->nb_ant = val & 0x3;
2140 DPRINTF(sc, "RF revision=%d\n", sc->rf_rev);
2142 val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2);
2143 sc->ext_5ghz_lna = (val >> 6) & 0x1;
2144 sc->ext_2ghz_lna = (val >> 4) & 0x1;
2146 DPRINTF(sc, "External 2GHz LNA=%d\nExternal 5GHz LNA=%d\n",
2147 sc->ext_2ghz_lna, sc->ext_5ghz_lna);
2149 val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET);
2150 if ((val & 0xff) != 0xff)
2151 sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */
2153 /* Only [-10, 10] is valid */
2154 if (sc->rssi_2ghz_corr < -10 || sc->rssi_2ghz_corr > 10)
2155 sc->rssi_2ghz_corr = 0;
2157 val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET);
2158 if ((val & 0xff) != 0xff)
2159 sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */
2161 /* Only [-10, 10] is valid */
2162 if (sc->rssi_5ghz_corr < -10 || sc->rssi_5ghz_corr > 10)
2163 sc->rssi_5ghz_corr = 0;
2165 /* adjust RSSI correction for external low-noise amplifier */
2166 if (sc->ext_2ghz_lna)
2167 sc->rssi_2ghz_corr -= 14;
2168 if (sc->ext_5ghz_lna)
2169 sc->rssi_5ghz_corr -= 14;
2171 DPRINTF(sc, "RSSI 2GHz corr=%d\nRSSI 5GHz corr=%d\n",
2172 sc->rssi_2ghz_corr, sc->rssi_5ghz_corr);
2174 val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET);
2175 if ((val >> 8) != 0xff)
2176 sc->rfprog = (val >> 8) & 0x3;
2177 if ((val & 0xff) != 0xff)
2178 sc->rffreq = val & 0xff;
2180 DPRINTF(sc, "RF prog=%d\nRF freq=%d\n", sc->rfprog, sc->rffreq);
2182 /* read Tx power for all a/b/g channels */
2183 for (i = 0; i < 19; i++) {
2184 val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i);
2185 sc->txpow[i * 2] = (int8_t)(val >> 8); /* signed */
2186 DPRINTF(sc, "Channel=%d Tx power=%d\n",
2187 rt2661_rf5225_1[i * 2].chan, sc->txpow[i * 2]);
2188 sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff); /* signed */
2189 DPRINTF(sc, "Channel=%d Tx power=%d\n",
2190 rt2661_rf5225_1[i * 2 + 1].chan, sc->txpow[i * 2 + 1]);
2193 /* read vendor-specific BBP values */
2194 for (i = 0; i < 16; i++) {
2195 val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i);
2196 if (val == 0 || val == 0xffff)
2197 continue; /* skip invalid entries */
2198 sc->bbp_prom[i].reg = val >> 8;
2199 sc->bbp_prom[i].val = val & 0xff;
2200 DPRINTF(sc, "BBP R%d=%02x\n", sc->bbp_prom[i].reg,
2201 sc->bbp_prom[i].val);
2206 rt2661_bbp_init(struct rt2661_softc *sc)
2211 /* wait for BBP to be ready */
2212 for (ntries = 0; ntries < 100; ntries++) {
2213 val = rt2661_bbp_read(sc, 0);
2214 if (val != 0 && val != 0xff)
2218 if (ntries == 100) {
2219 device_printf(sc->sc_dev, "timeout waiting for BBP\n");
2223 /* initialize BBP registers to default values */
2224 for (i = 0; i < nitems(rt2661_def_bbp); i++) {
2225 rt2661_bbp_write(sc, rt2661_def_bbp[i].reg,
2226 rt2661_def_bbp[i].val);
2229 /* write vendor-specific BBP values (from EEPROM) */
2230 for (i = 0; i < 16; i++) {
2231 if (sc->bbp_prom[i].reg == 0)
2233 rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2240 rt2661_init_locked(struct rt2661_softc *sc)
2242 struct ieee80211com *ic = &sc->sc_ic;
2243 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2244 uint32_t tmp, sta[3];
2245 int i, error, ntries;
2247 RAL_LOCK_ASSERT(sc);
2249 if ((sc->sc_flags & RAL_FW_LOADED) == 0) {
2250 error = rt2661_load_microcode(sc);
2252 device_printf(sc->sc_dev,
2253 "%s: could not load 8051 microcode, error %d\n",
2257 sc->sc_flags |= RAL_FW_LOADED;
2260 rt2661_stop_locked(sc);
2262 /* initialize Tx rings */
2263 RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr);
2264 RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr);
2265 RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr);
2266 RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr);
2268 /* initialize Mgt ring */
2269 RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr);
2271 /* initialize Rx ring */
2272 RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr);
2274 /* initialize Tx rings sizes */
2275 RAL_WRITE(sc, RT2661_TX_RING_CSR0,
2276 RT2661_TX_RING_COUNT << 24 |
2277 RT2661_TX_RING_COUNT << 16 |
2278 RT2661_TX_RING_COUNT << 8 |
2279 RT2661_TX_RING_COUNT);
2281 RAL_WRITE(sc, RT2661_TX_RING_CSR1,
2282 RT2661_TX_DESC_WSIZE << 16 |
2283 RT2661_TX_RING_COUNT << 8 | /* XXX: HCCA ring unused */
2284 RT2661_MGT_RING_COUNT);
2286 /* initialize Rx rings */
2287 RAL_WRITE(sc, RT2661_RX_RING_CSR,
2288 RT2661_RX_DESC_BACK << 16 |
2289 RT2661_RX_DESC_WSIZE << 8 |
2290 RT2661_RX_RING_COUNT);
2292 /* XXX: some magic here */
2293 RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa);
2295 /* load base addresses of all 5 Tx rings (4 data + 1 mgt) */
2296 RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f);
2298 /* load base address of Rx ring */
2299 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2);
2301 /* initialize MAC registers to default values */
2302 for (i = 0; i < nitems(rt2661_def_mac); i++)
2303 RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val);
2305 rt2661_set_macaddr(sc, vap ? vap->iv_myaddr : ic->ic_macaddr);
2307 /* set host ready */
2308 RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
2309 RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
2311 /* wait for BBP/RF to wakeup */
2312 for (ntries = 0; ntries < 1000; ntries++) {
2313 if (RAL_READ(sc, RT2661_MAC_CSR12) & 8)
2317 if (ntries == 1000) {
2318 printf("timeout waiting for BBP/RF to wakeup\n");
2319 rt2661_stop_locked(sc);
2323 if (rt2661_bbp_init(sc) != 0) {
2324 rt2661_stop_locked(sc);
2328 /* select default channel */
2329 sc->sc_curchan = ic->ic_curchan;
2330 rt2661_select_band(sc, sc->sc_curchan);
2331 rt2661_select_antenna(sc);
2332 rt2661_set_chan(sc, sc->sc_curchan);
2334 /* update Rx filter */
2335 tmp = RAL_READ(sc, RT2661_TXRX_CSR0) & 0xffff;
2337 tmp |= RT2661_DROP_PHY_ERROR | RT2661_DROP_CRC_ERROR;
2338 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2339 tmp |= RT2661_DROP_CTL | RT2661_DROP_VER_ERROR |
2341 if (ic->ic_opmode != IEEE80211_M_HOSTAP &&
2342 ic->ic_opmode != IEEE80211_M_MBSS)
2343 tmp |= RT2661_DROP_TODS;
2344 if (ic->ic_promisc == 0)
2345 tmp |= RT2661_DROP_NOT_TO_ME;
2348 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2350 /* clear STA registers */
2351 RAL_READ_REGION_4(sc, RT2661_STA_CSR0, sta, nitems(sta));
2353 /* initialize ASIC */
2354 RAL_WRITE(sc, RT2661_MAC_CSR1, 4);
2356 /* clear any pending interrupt */
2357 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
2359 /* enable interrupts */
2360 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
2361 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
2364 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1);
2366 sc->sc_flags |= RAL_RUNNING;
2368 callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc);
2372 rt2661_init(void *priv)
2374 struct rt2661_softc *sc = priv;
2375 struct ieee80211com *ic = &sc->sc_ic;
2378 rt2661_init_locked(sc);
2381 if (sc->sc_flags & RAL_RUNNING)
2382 ieee80211_start_all(ic); /* start all vap's */
2386 rt2661_stop_locked(struct rt2661_softc *sc)
2388 volatile int *flags = &sc->sc_flags;
2391 while (*flags & RAL_INPUT_RUNNING)
2392 msleep(sc, &sc->sc_mtx, 0, "ralrunning", hz/10);
2394 callout_stop(&sc->watchdog_ch);
2395 sc->sc_tx_timer = 0;
2397 if (sc->sc_flags & RAL_RUNNING) {
2398 sc->sc_flags &= ~RAL_RUNNING;
2400 /* abort Tx (for all 5 Tx rings) */
2401 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16);
2403 /* disable Rx (value remains after reset!) */
2404 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2405 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2408 RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
2409 RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
2411 /* disable interrupts */
2412 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffffff);
2413 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
2415 /* clear any pending interrupt */
2416 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
2417 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff);
2419 /* reset Tx and Rx rings */
2420 rt2661_reset_tx_ring(sc, &sc->txq[0]);
2421 rt2661_reset_tx_ring(sc, &sc->txq[1]);
2422 rt2661_reset_tx_ring(sc, &sc->txq[2]);
2423 rt2661_reset_tx_ring(sc, &sc->txq[3]);
2424 rt2661_reset_tx_ring(sc, &sc->mgtq);
2425 rt2661_reset_rx_ring(sc, &sc->rxq);
2430 rt2661_stop(void *priv)
2432 struct rt2661_softc *sc = priv;
2435 rt2661_stop_locked(sc);
2440 rt2661_load_microcode(struct rt2661_softc *sc)
2442 const struct firmware *fp;
2443 const char *imagename;
2446 RAL_LOCK_ASSERT(sc);
2448 switch (sc->sc_id) {
2449 case 0x0301: imagename = "rt2561sfw"; break;
2450 case 0x0302: imagename = "rt2561fw"; break;
2451 case 0x0401: imagename = "rt2661fw"; break;
2453 device_printf(sc->sc_dev, "%s: unexpected pci device id 0x%x, "
2454 "don't know how to retrieve firmware\n",
2455 __func__, sc->sc_id);
2459 fp = firmware_get(imagename);
2462 device_printf(sc->sc_dev,
2463 "%s: unable to retrieve firmware image %s\n",
2464 __func__, imagename);
2469 * Load 8051 microcode into NIC.
2472 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
2474 /* cancel any pending Host to MCU command */
2475 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0);
2476 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
2477 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0);
2479 /* write 8051's microcode */
2480 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL);
2481 RAL_WRITE_REGION_1(sc, RT2661_MCU_CODE_BASE, fp->data, fp->datasize);
2482 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
2484 /* kick 8051's ass */
2485 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0);
2487 /* wait for 8051 to initialize */
2488 for (ntries = 0; ntries < 500; ntries++) {
2489 if (RAL_READ(sc, RT2661_MCU_CNTL_CSR) & RT2661_MCU_READY)
2493 if (ntries == 500) {
2494 device_printf(sc->sc_dev,
2495 "%s: timeout waiting for MCU to initialize\n", __func__);
2500 firmware_put(fp, FIRMWARE_UNLOAD);
2506 * Dynamically tune Rx sensitivity (BBP register 17) based on average RSSI and
2507 * false CCA count. This function is called periodically (every seconds) when
2508 * in the RUN state. Values taken from the reference driver.
2511 rt2661_rx_tune(struct rt2661_softc *sc)
2518 * Tuning range depends on operating band and on the presence of an
2519 * external low-noise amplifier.
2522 if (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan))
2524 if ((IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan) && sc->ext_2ghz_lna) ||
2525 (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan) && sc->ext_5ghz_lna))
2529 /* retrieve false CCA count since last call (clear on read) */
2530 cca = RAL_READ(sc, RT2661_STA_CSR1) & 0xffff;
2534 } else if (dbm >= -58) {
2536 } else if (dbm >= -66) {
2538 } else if (dbm >= -74) {
2541 /* RSSI < -74dBm, tune using false CCA count */
2543 bbp17 = sc->bbp17; /* current value */
2545 hi -= 2 * (-74 - dbm);
2552 } else if (cca > 512) {
2555 } else if (cca < 100) {
2561 if (bbp17 != sc->bbp17) {
2562 rt2661_bbp_write(sc, 17, bbp17);
2568 * Enter/Leave radar detection mode.
2569 * This is for 802.11h additional regulatory domains.
2572 rt2661_radar_start(struct rt2661_softc *sc)
2577 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2578 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2580 rt2661_bbp_write(sc, 82, 0x20);
2581 rt2661_bbp_write(sc, 83, 0x00);
2582 rt2661_bbp_write(sc, 84, 0x40);
2584 /* save current BBP registers values */
2585 sc->bbp18 = rt2661_bbp_read(sc, 18);
2586 sc->bbp21 = rt2661_bbp_read(sc, 21);
2587 sc->bbp22 = rt2661_bbp_read(sc, 22);
2588 sc->bbp16 = rt2661_bbp_read(sc, 16);
2589 sc->bbp17 = rt2661_bbp_read(sc, 17);
2590 sc->bbp64 = rt2661_bbp_read(sc, 64);
2592 rt2661_bbp_write(sc, 18, 0xff);
2593 rt2661_bbp_write(sc, 21, 0x3f);
2594 rt2661_bbp_write(sc, 22, 0x3f);
2595 rt2661_bbp_write(sc, 16, 0xbd);
2596 rt2661_bbp_write(sc, 17, sc->ext_5ghz_lna ? 0x44 : 0x34);
2597 rt2661_bbp_write(sc, 64, 0x21);
2599 /* restore Rx filter */
2600 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2604 rt2661_radar_stop(struct rt2661_softc *sc)
2608 /* read radar detection result */
2609 bbp66 = rt2661_bbp_read(sc, 66);
2611 /* restore BBP registers values */
2612 rt2661_bbp_write(sc, 16, sc->bbp16);
2613 rt2661_bbp_write(sc, 17, sc->bbp17);
2614 rt2661_bbp_write(sc, 18, sc->bbp18);
2615 rt2661_bbp_write(sc, 21, sc->bbp21);
2616 rt2661_bbp_write(sc, 22, sc->bbp22);
2617 rt2661_bbp_write(sc, 64, sc->bbp64);
2624 rt2661_prepare_beacon(struct rt2661_softc *sc, struct ieee80211vap *vap)
2626 struct ieee80211com *ic = vap->iv_ic;
2627 struct rt2661_tx_desc desc;
2631 if ((m0 = ieee80211_beacon_alloc(vap->iv_bss))== NULL) {
2632 device_printf(sc->sc_dev, "could not allocate beacon frame\n");
2636 /* send beacons at the lowest available rate */
2637 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan) ? 12 : 2;
2639 rt2661_setup_tx_desc(sc, &desc, RT2661_TX_TIMESTAMP, RT2661_TX_HWSEQ,
2640 m0->m_pkthdr.len, rate, NULL, 0, RT2661_QID_MGT);
2642 /* copy the first 24 bytes of Tx descriptor into NIC memory */
2643 RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0, (uint8_t *)&desc, 24);
2645 /* copy beacon header and payload into NIC memory */
2646 RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0 + 24,
2647 mtod(m0, uint8_t *), m0->m_pkthdr.len);
2655 * Enable TSF synchronization and tell h/w to start sending beacons for IBSS
2656 * and HostAP operating modes.
2659 rt2661_enable_tsf_sync(struct rt2661_softc *sc)
2661 struct ieee80211com *ic = &sc->sc_ic;
2662 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2665 if (vap->iv_opmode != IEEE80211_M_STA) {
2667 * Change default 16ms TBTT adjustment to 8ms.
2668 * Must be done before enabling beacon generation.
2670 RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8);
2673 tmp = RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000;
2675 /* set beacon interval (in 1/16ms unit) */
2676 tmp |= vap->iv_bss->ni_intval * 16;
2678 tmp |= RT2661_TSF_TICKING | RT2661_ENABLE_TBTT;
2679 if (vap->iv_opmode == IEEE80211_M_STA)
2680 tmp |= RT2661_TSF_MODE(1);
2682 tmp |= RT2661_TSF_MODE(2) | RT2661_GENERATE_BEACON;
2684 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp);
2688 rt2661_enable_tsf(struct rt2661_softc *sc)
2690 RAL_WRITE(sc, RT2661_TXRX_CSR9,
2691 (RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000)
2692 | RT2661_TSF_TICKING | RT2661_TSF_MODE(2));
2696 * Retrieve the "Received Signal Strength Indicator" from the raw values
2697 * contained in Rx descriptors. The computation depends on which band the
2698 * frame was received. Correction values taken from the reference driver.
2701 rt2661_get_rssi(struct rt2661_softc *sc, uint8_t raw)
2705 lna = (raw >> 5) & 0x3;
2710 * No mapping available.
2712 * NB: Since RSSI is relative to noise floor, -1 is
2713 * adequate for caller to know error happened.
2718 rssi = (2 * agc) - RT2661_NOISE_FLOOR;
2720 if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan)) {
2721 rssi += sc->rssi_2ghz_corr;
2730 rssi += sc->rssi_5ghz_corr;
2743 rt2661_scan_start(struct ieee80211com *ic)
2745 struct rt2661_softc *sc = ic->ic_softc;
2748 /* abort TSF synchronization */
2749 tmp = RAL_READ(sc, RT2661_TXRX_CSR9);
2750 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0xffffff);
2751 rt2661_set_bssid(sc, ieee80211broadcastaddr);
2755 rt2661_scan_end(struct ieee80211com *ic)
2757 struct rt2661_softc *sc = ic->ic_softc;
2758 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2760 rt2661_enable_tsf_sync(sc);
2761 /* XXX keep local copy */
2762 rt2661_set_bssid(sc, vap->iv_bss->ni_bssid);
2766 rt2661_getradiocaps(struct ieee80211com *ic,
2767 int maxchans, int *nchans, struct ieee80211_channel chans[])
2769 struct rt2661_softc *sc = ic->ic_softc;
2770 uint8_t bands[IEEE80211_MODE_BYTES];
2772 memset(bands, 0, sizeof(bands));
2773 setbit(bands, IEEE80211_MODE_11B);
2774 setbit(bands, IEEE80211_MODE_11G);
2775 ieee80211_add_channel_list_2ghz(chans, maxchans, nchans,
2776 rt2661_chan_2ghz, nitems(rt2661_chan_2ghz), bands, 0);
2778 if (sc->rf_rev == RT2661_RF_5225 || sc->rf_rev == RT2661_RF_5325) {
2779 setbit(bands, IEEE80211_MODE_11A);
2780 ieee80211_add_channel_list_5ghz(chans, maxchans, nchans,
2781 rt2661_chan_5ghz, nitems(rt2661_chan_5ghz), bands, 0);
2786 rt2661_set_channel(struct ieee80211com *ic)
2788 struct rt2661_softc *sc = ic->ic_softc;
2791 rt2661_set_chan(sc, ic->ic_curchan);