5 * Damien Bergamini <damien.bergamini@free.fr>
7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20 #include <sys/cdefs.h>
21 __FBSDID("$FreeBSD$");
24 * Ralink Technology RT2561, RT2561S and RT2661 chipset driver
25 * http://www.ralinktech.com/
28 #include <sys/param.h>
29 #include <sys/sysctl.h>
30 #include <sys/sockio.h>
32 #include <sys/kernel.h>
33 #include <sys/socket.h>
34 #include <sys/systm.h>
35 #include <sys/malloc.h>
37 #include <sys/mutex.h>
38 #include <sys/module.h>
40 #include <sys/endian.h>
41 #include <sys/firmware.h>
43 #include <machine/bus.h>
44 #include <machine/resource.h>
49 #include <net/if_var.h>
50 #include <net/if_arp.h>
51 #include <net/ethernet.h>
52 #include <net/if_dl.h>
53 #include <net/if_media.h>
54 #include <net/if_types.h>
56 #include <net80211/ieee80211_var.h>
57 #include <net80211/ieee80211_radiotap.h>
58 #include <net80211/ieee80211_regdomain.h>
59 #include <net80211/ieee80211_ratectl.h>
61 #include <netinet/in.h>
62 #include <netinet/in_systm.h>
63 #include <netinet/in_var.h>
64 #include <netinet/ip.h>
65 #include <netinet/if_ether.h>
67 #include <dev/ral/rt2661reg.h>
68 #include <dev/ral/rt2661var.h>
72 #define DPRINTF(sc, fmt, ...) do { \
73 if (sc->sc_debug > 0) \
74 printf(fmt, __VA_ARGS__); \
76 #define DPRINTFN(sc, n, fmt, ...) do { \
77 if (sc->sc_debug >= (n)) \
78 printf(fmt, __VA_ARGS__); \
81 #define DPRINTF(sc, fmt, ...)
82 #define DPRINTFN(sc, n, fmt, ...)
85 static struct ieee80211vap *rt2661_vap_create(struct ieee80211com *,
86 const char [IFNAMSIZ], int, enum ieee80211_opmode,
87 int, const uint8_t [IEEE80211_ADDR_LEN],
88 const uint8_t [IEEE80211_ADDR_LEN]);
89 static void rt2661_vap_delete(struct ieee80211vap *);
90 static void rt2661_dma_map_addr(void *, bus_dma_segment_t *, int,
92 static int rt2661_alloc_tx_ring(struct rt2661_softc *,
93 struct rt2661_tx_ring *, int);
94 static void rt2661_reset_tx_ring(struct rt2661_softc *,
95 struct rt2661_tx_ring *);
96 static void rt2661_free_tx_ring(struct rt2661_softc *,
97 struct rt2661_tx_ring *);
98 static int rt2661_alloc_rx_ring(struct rt2661_softc *,
99 struct rt2661_rx_ring *, int);
100 static void rt2661_reset_rx_ring(struct rt2661_softc *,
101 struct rt2661_rx_ring *);
102 static void rt2661_free_rx_ring(struct rt2661_softc *,
103 struct rt2661_rx_ring *);
104 static int rt2661_newstate(struct ieee80211vap *,
105 enum ieee80211_state, int);
106 static uint16_t rt2661_eeprom_read(struct rt2661_softc *, uint8_t);
107 static void rt2661_rx_intr(struct rt2661_softc *);
108 static void rt2661_tx_intr(struct rt2661_softc *);
109 static void rt2661_tx_dma_intr(struct rt2661_softc *,
110 struct rt2661_tx_ring *);
111 static void rt2661_mcu_beacon_expire(struct rt2661_softc *);
112 static void rt2661_mcu_wakeup(struct rt2661_softc *);
113 static void rt2661_mcu_cmd_intr(struct rt2661_softc *);
114 static void rt2661_scan_start(struct ieee80211com *);
115 static void rt2661_scan_end(struct ieee80211com *);
116 static void rt2661_set_channel(struct ieee80211com *);
117 static void rt2661_setup_tx_desc(struct rt2661_softc *,
118 struct rt2661_tx_desc *, uint32_t, uint16_t, int,
119 int, const bus_dma_segment_t *, int, int);
120 static int rt2661_tx_data(struct rt2661_softc *, struct mbuf *,
121 struct ieee80211_node *, int);
122 static int rt2661_tx_mgt(struct rt2661_softc *, struct mbuf *,
123 struct ieee80211_node *);
124 static void rt2661_start_locked(struct ifnet *);
125 static void rt2661_start(struct ifnet *);
126 static int rt2661_raw_xmit(struct ieee80211_node *, struct mbuf *,
127 const struct ieee80211_bpf_params *);
128 static void rt2661_watchdog(void *);
129 static int rt2661_ioctl(struct ifnet *, u_long, caddr_t);
130 static void rt2661_bbp_write(struct rt2661_softc *, uint8_t,
132 static uint8_t rt2661_bbp_read(struct rt2661_softc *, uint8_t);
133 static void rt2661_rf_write(struct rt2661_softc *, uint8_t,
135 static int rt2661_tx_cmd(struct rt2661_softc *, uint8_t,
137 static void rt2661_select_antenna(struct rt2661_softc *);
138 static void rt2661_enable_mrr(struct rt2661_softc *);
139 static void rt2661_set_txpreamble(struct rt2661_softc *);
140 static void rt2661_set_basicrates(struct rt2661_softc *,
141 const struct ieee80211_rateset *);
142 static void rt2661_select_band(struct rt2661_softc *,
143 struct ieee80211_channel *);
144 static void rt2661_set_chan(struct rt2661_softc *,
145 struct ieee80211_channel *);
146 static void rt2661_set_bssid(struct rt2661_softc *,
148 static void rt2661_set_macaddr(struct rt2661_softc *,
150 static void rt2661_update_promisc(struct ieee80211com *);
151 static int rt2661_wme_update(struct ieee80211com *) __unused;
152 static void rt2661_update_slot(struct ieee80211com *);
153 static const char *rt2661_get_rf(int);
154 static void rt2661_read_eeprom(struct rt2661_softc *,
155 uint8_t macaddr[IEEE80211_ADDR_LEN]);
156 static int rt2661_bbp_init(struct rt2661_softc *);
157 static void rt2661_init_locked(struct rt2661_softc *);
158 static void rt2661_init(void *);
159 static void rt2661_stop_locked(struct rt2661_softc *);
160 static void rt2661_stop(void *);
161 static int rt2661_load_microcode(struct rt2661_softc *);
163 static void rt2661_rx_tune(struct rt2661_softc *);
164 static void rt2661_radar_start(struct rt2661_softc *);
165 static int rt2661_radar_stop(struct rt2661_softc *);
167 static int rt2661_prepare_beacon(struct rt2661_softc *,
168 struct ieee80211vap *);
169 static void rt2661_enable_tsf_sync(struct rt2661_softc *);
170 static void rt2661_enable_tsf(struct rt2661_softc *);
171 static int rt2661_get_rssi(struct rt2661_softc *, uint8_t);
173 static const struct {
176 } rt2661_def_mac[] = {
180 static const struct {
183 } rt2661_def_bbp[] = {
187 static const struct rfprog {
189 uint32_t r1, r2, r3, r4;
190 } rt2661_rf5225_1[] = {
192 }, rt2661_rf5225_2[] = {
197 rt2661_attach(device_t dev, int id)
199 struct rt2661_softc *sc = device_get_softc(dev);
200 struct ieee80211com *ic;
203 int error, ac, ntries;
205 uint8_t macaddr[IEEE80211_ADDR_LEN];
210 ifp = sc->sc_ifp = if_alloc(IFT_IEEE80211);
212 device_printf(sc->sc_dev, "can not if_alloc()\n");
217 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
218 MTX_DEF | MTX_RECURSE);
220 callout_init_mtx(&sc->watchdog_ch, &sc->sc_mtx, 0);
222 /* wait for NIC to initialize */
223 for (ntries = 0; ntries < 1000; ntries++) {
224 if ((val = RAL_READ(sc, RT2661_MAC_CSR0)) != 0)
228 if (ntries == 1000) {
229 device_printf(sc->sc_dev,
230 "timeout waiting for NIC to initialize\n");
235 /* retrieve RF rev. no and various other things from EEPROM */
236 rt2661_read_eeprom(sc, macaddr);
238 device_printf(dev, "MAC/BBP RT%X, RF %s\n", val,
239 rt2661_get_rf(sc->rf_rev));
242 * Allocate Tx and Rx rings.
244 for (ac = 0; ac < 4; ac++) {
245 error = rt2661_alloc_tx_ring(sc, &sc->txq[ac],
246 RT2661_TX_RING_COUNT);
248 device_printf(sc->sc_dev,
249 "could not allocate Tx ring %d\n", ac);
254 error = rt2661_alloc_tx_ring(sc, &sc->mgtq, RT2661_MGT_RING_COUNT);
256 device_printf(sc->sc_dev, "could not allocate Mgt ring\n");
260 error = rt2661_alloc_rx_ring(sc, &sc->rxq, RT2661_RX_RING_COUNT);
262 device_printf(sc->sc_dev, "could not allocate Rx ring\n");
267 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
268 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
269 ifp->if_init = rt2661_init;
270 ifp->if_ioctl = rt2661_ioctl;
271 ifp->if_start = rt2661_start;
272 IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
273 ifp->if_snd.ifq_drv_maxlen = ifqmaxlen;
274 IFQ_SET_READY(&ifp->if_snd);
278 ic->ic_name = device_get_nameunit(dev);
279 ic->ic_opmode = IEEE80211_M_STA;
280 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
282 /* set device capabilities */
284 IEEE80211_C_STA /* station mode */
285 | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */
286 | IEEE80211_C_HOSTAP /* hostap mode */
287 | IEEE80211_C_MONITOR /* monitor mode */
288 | IEEE80211_C_AHDEMO /* adhoc demo mode */
289 | IEEE80211_C_WDS /* 4-address traffic works */
290 | IEEE80211_C_MBSS /* mesh point link mode */
291 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
292 | IEEE80211_C_SHSLOT /* short slot time supported */
293 | IEEE80211_C_WPA /* capable of WPA1+WPA2 */
294 | IEEE80211_C_BGSCAN /* capable of bg scanning */
296 | IEEE80211_C_TXFRAG /* handle tx frags */
297 | IEEE80211_C_WME /* 802.11e */
302 setbit(&bands, IEEE80211_MODE_11B);
303 setbit(&bands, IEEE80211_MODE_11G);
304 if (sc->rf_rev == RT2661_RF_5225 || sc->rf_rev == RT2661_RF_5325)
305 setbit(&bands, IEEE80211_MODE_11A);
306 ieee80211_init_channels(ic, NULL, &bands);
308 ieee80211_ifattach(ic, macaddr);
310 ic->ic_wme.wme_update = rt2661_wme_update;
312 ic->ic_scan_start = rt2661_scan_start;
313 ic->ic_scan_end = rt2661_scan_end;
314 ic->ic_set_channel = rt2661_set_channel;
315 ic->ic_updateslot = rt2661_update_slot;
316 ic->ic_update_promisc = rt2661_update_promisc;
317 ic->ic_raw_xmit = rt2661_raw_xmit;
319 ic->ic_vap_create = rt2661_vap_create;
320 ic->ic_vap_delete = rt2661_vap_delete;
322 ieee80211_radiotap_attach(ic,
323 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
324 RT2661_TX_RADIOTAP_PRESENT,
325 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
326 RT2661_RX_RADIOTAP_PRESENT);
329 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
330 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
331 "debug", CTLFLAG_RW, &sc->sc_debug, 0, "debug msgs");
334 ieee80211_announce(ic);
338 fail3: rt2661_free_tx_ring(sc, &sc->mgtq);
339 fail2: while (--ac >= 0)
340 rt2661_free_tx_ring(sc, &sc->txq[ac]);
341 fail1: mtx_destroy(&sc->sc_mtx);
347 rt2661_detach(void *xsc)
349 struct rt2661_softc *sc = xsc;
350 struct ifnet *ifp = sc->sc_ifp;
351 struct ieee80211com *ic = ifp->if_l2com;
354 rt2661_stop_locked(sc);
357 ieee80211_ifdetach(ic);
359 rt2661_free_tx_ring(sc, &sc->txq[0]);
360 rt2661_free_tx_ring(sc, &sc->txq[1]);
361 rt2661_free_tx_ring(sc, &sc->txq[2]);
362 rt2661_free_tx_ring(sc, &sc->txq[3]);
363 rt2661_free_tx_ring(sc, &sc->mgtq);
364 rt2661_free_rx_ring(sc, &sc->rxq);
368 mtx_destroy(&sc->sc_mtx);
373 static struct ieee80211vap *
374 rt2661_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
375 enum ieee80211_opmode opmode, int flags,
376 const uint8_t bssid[IEEE80211_ADDR_LEN],
377 const uint8_t mac[IEEE80211_ADDR_LEN])
379 struct ifnet *ifp = ic->ic_ifp;
380 struct rt2661_vap *rvp;
381 struct ieee80211vap *vap;
384 case IEEE80211_M_STA:
385 case IEEE80211_M_IBSS:
386 case IEEE80211_M_AHDEMO:
387 case IEEE80211_M_MONITOR:
388 case IEEE80211_M_HOSTAP:
389 case IEEE80211_M_MBSS:
391 if (!TAILQ_EMPTY(&ic->ic_vaps)) {
392 if_printf(ifp, "only 1 vap supported\n");
395 if (opmode == IEEE80211_M_STA)
396 flags |= IEEE80211_CLONE_NOBEACONS;
398 case IEEE80211_M_WDS:
399 if (TAILQ_EMPTY(&ic->ic_vaps) ||
400 ic->ic_opmode != IEEE80211_M_HOSTAP) {
401 if_printf(ifp, "wds only supported in ap mode\n");
405 * Silently remove any request for a unique
406 * bssid; WDS vap's always share the local
409 flags &= ~IEEE80211_CLONE_BSSID;
412 if_printf(ifp, "unknown opmode %d\n", opmode);
415 rvp = (struct rt2661_vap *) malloc(sizeof(struct rt2661_vap),
416 M_80211_VAP, M_NOWAIT | M_ZERO);
420 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid, mac);
422 /* override state transition machine */
423 rvp->ral_newstate = vap->iv_newstate;
424 vap->iv_newstate = rt2661_newstate;
426 vap->iv_update_beacon = rt2661_beacon_update;
429 ieee80211_ratectl_init(vap);
431 ieee80211_vap_attach(vap, ieee80211_media_change, ieee80211_media_status);
432 if (TAILQ_FIRST(&ic->ic_vaps) == vap)
433 ic->ic_opmode = opmode;
438 rt2661_vap_delete(struct ieee80211vap *vap)
440 struct rt2661_vap *rvp = RT2661_VAP(vap);
442 ieee80211_ratectl_deinit(vap);
443 ieee80211_vap_detach(vap);
444 free(rvp, M_80211_VAP);
448 rt2661_shutdown(void *xsc)
450 struct rt2661_softc *sc = xsc;
456 rt2661_suspend(void *xsc)
458 struct rt2661_softc *sc = xsc;
464 rt2661_resume(void *xsc)
466 struct rt2661_softc *sc = xsc;
467 struct ifnet *ifp = sc->sc_ifp;
469 if (ifp->if_flags & IFF_UP)
474 rt2661_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
479 KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
481 *(bus_addr_t *)arg = segs[0].ds_addr;
485 rt2661_alloc_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring,
492 ring->cur = ring->next = ring->stat = 0;
494 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
495 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
496 count * RT2661_TX_DESC_SIZE, 1, count * RT2661_TX_DESC_SIZE,
497 0, NULL, NULL, &ring->desc_dmat);
499 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
503 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
504 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map);
506 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
510 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
511 count * RT2661_TX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
514 device_printf(sc->sc_dev, "could not load desc DMA map\n");
518 ring->data = malloc(count * sizeof (struct rt2661_tx_data), M_DEVBUF,
520 if (ring->data == NULL) {
521 device_printf(sc->sc_dev, "could not allocate soft data\n");
526 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
527 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
528 RT2661_MAX_SCATTER, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
530 device_printf(sc->sc_dev, "could not create data DMA tag\n");
534 for (i = 0; i < count; i++) {
535 error = bus_dmamap_create(ring->data_dmat, 0,
538 device_printf(sc->sc_dev, "could not create DMA map\n");
545 fail: rt2661_free_tx_ring(sc, ring);
550 rt2661_reset_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
552 struct rt2661_tx_desc *desc;
553 struct rt2661_tx_data *data;
556 for (i = 0; i < ring->count; i++) {
557 desc = &ring->desc[i];
558 data = &ring->data[i];
560 if (data->m != NULL) {
561 bus_dmamap_sync(ring->data_dmat, data->map,
562 BUS_DMASYNC_POSTWRITE);
563 bus_dmamap_unload(ring->data_dmat, data->map);
568 if (data->ni != NULL) {
569 ieee80211_free_node(data->ni);
576 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
579 ring->cur = ring->next = ring->stat = 0;
583 rt2661_free_tx_ring(struct rt2661_softc *sc, struct rt2661_tx_ring *ring)
585 struct rt2661_tx_data *data;
588 if (ring->desc != NULL) {
589 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
590 BUS_DMASYNC_POSTWRITE);
591 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
592 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
595 if (ring->desc_dmat != NULL)
596 bus_dma_tag_destroy(ring->desc_dmat);
598 if (ring->data != NULL) {
599 for (i = 0; i < ring->count; i++) {
600 data = &ring->data[i];
602 if (data->m != NULL) {
603 bus_dmamap_sync(ring->data_dmat, data->map,
604 BUS_DMASYNC_POSTWRITE);
605 bus_dmamap_unload(ring->data_dmat, data->map);
609 if (data->ni != NULL)
610 ieee80211_free_node(data->ni);
612 if (data->map != NULL)
613 bus_dmamap_destroy(ring->data_dmat, data->map);
616 free(ring->data, M_DEVBUF);
619 if (ring->data_dmat != NULL)
620 bus_dma_tag_destroy(ring->data_dmat);
624 rt2661_alloc_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring,
627 struct rt2661_rx_desc *desc;
628 struct rt2661_rx_data *data;
633 ring->cur = ring->next = 0;
635 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 4, 0,
636 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
637 count * RT2661_RX_DESC_SIZE, 1, count * RT2661_RX_DESC_SIZE,
638 0, NULL, NULL, &ring->desc_dmat);
640 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
644 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->desc,
645 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map);
647 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
651 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->desc,
652 count * RT2661_RX_DESC_SIZE, rt2661_dma_map_addr, &ring->physaddr,
655 device_printf(sc->sc_dev, "could not load desc DMA map\n");
659 ring->data = malloc(count * sizeof (struct rt2661_rx_data), M_DEVBUF,
661 if (ring->data == NULL) {
662 device_printf(sc->sc_dev, "could not allocate soft data\n");
668 * Pre-allocate Rx buffers and populate Rx ring.
670 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
671 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
672 1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
674 device_printf(sc->sc_dev, "could not create data DMA tag\n");
678 for (i = 0; i < count; i++) {
679 desc = &sc->rxq.desc[i];
680 data = &sc->rxq.data[i];
682 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
684 device_printf(sc->sc_dev, "could not create DMA map\n");
688 data->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
689 if (data->m == NULL) {
690 device_printf(sc->sc_dev,
691 "could not allocate rx mbuf\n");
696 error = bus_dmamap_load(ring->data_dmat, data->map,
697 mtod(data->m, void *), MCLBYTES, rt2661_dma_map_addr,
700 device_printf(sc->sc_dev,
701 "could not load rx buf DMA map");
705 desc->flags = htole32(RT2661_RX_BUSY);
706 desc->physaddr = htole32(physaddr);
709 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
713 fail: rt2661_free_rx_ring(sc, ring);
718 rt2661_reset_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
722 for (i = 0; i < ring->count; i++)
723 ring->desc[i].flags = htole32(RT2661_RX_BUSY);
725 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
727 ring->cur = ring->next = 0;
731 rt2661_free_rx_ring(struct rt2661_softc *sc, struct rt2661_rx_ring *ring)
733 struct rt2661_rx_data *data;
736 if (ring->desc != NULL) {
737 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
738 BUS_DMASYNC_POSTWRITE);
739 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
740 bus_dmamem_free(ring->desc_dmat, ring->desc, ring->desc_map);
743 if (ring->desc_dmat != NULL)
744 bus_dma_tag_destroy(ring->desc_dmat);
746 if (ring->data != NULL) {
747 for (i = 0; i < ring->count; i++) {
748 data = &ring->data[i];
750 if (data->m != NULL) {
751 bus_dmamap_sync(ring->data_dmat, data->map,
752 BUS_DMASYNC_POSTREAD);
753 bus_dmamap_unload(ring->data_dmat, data->map);
757 if (data->map != NULL)
758 bus_dmamap_destroy(ring->data_dmat, data->map);
761 free(ring->data, M_DEVBUF);
764 if (ring->data_dmat != NULL)
765 bus_dma_tag_destroy(ring->data_dmat);
769 rt2661_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
771 struct rt2661_vap *rvp = RT2661_VAP(vap);
772 struct ieee80211com *ic = vap->iv_ic;
773 struct rt2661_softc *sc = ic->ic_ifp->if_softc;
776 if (nstate == IEEE80211_S_INIT && vap->iv_state == IEEE80211_S_RUN) {
779 /* abort TSF synchronization */
780 tmp = RAL_READ(sc, RT2661_TXRX_CSR9);
781 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0x00ffffff);
784 error = rvp->ral_newstate(vap, nstate, arg);
786 if (error == 0 && nstate == IEEE80211_S_RUN) {
787 struct ieee80211_node *ni = vap->iv_bss;
789 if (vap->iv_opmode != IEEE80211_M_MONITOR) {
790 rt2661_enable_mrr(sc);
791 rt2661_set_txpreamble(sc);
792 rt2661_set_basicrates(sc, &ni->ni_rates);
793 rt2661_set_bssid(sc, ni->ni_bssid);
796 if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
797 vap->iv_opmode == IEEE80211_M_IBSS ||
798 vap->iv_opmode == IEEE80211_M_MBSS) {
799 error = rt2661_prepare_beacon(sc, vap);
803 if (vap->iv_opmode != IEEE80211_M_MONITOR)
804 rt2661_enable_tsf_sync(sc);
806 rt2661_enable_tsf(sc);
812 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or
816 rt2661_eeprom_read(struct rt2661_softc *sc, uint8_t addr)
822 /* clock C once before the first command */
823 RT2661_EEPROM_CTL(sc, 0);
825 RT2661_EEPROM_CTL(sc, RT2661_S);
826 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
827 RT2661_EEPROM_CTL(sc, RT2661_S);
829 /* write start bit (1) */
830 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
831 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
833 /* write READ opcode (10) */
834 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D);
835 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_D | RT2661_C);
836 RT2661_EEPROM_CTL(sc, RT2661_S);
837 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
839 /* write address (A5-A0 or A7-A0) */
840 n = (RAL_READ(sc, RT2661_E2PROM_CSR) & RT2661_93C46) ? 5 : 7;
841 for (; n >= 0; n--) {
842 RT2661_EEPROM_CTL(sc, RT2661_S |
843 (((addr >> n) & 1) << RT2661_SHIFT_D));
844 RT2661_EEPROM_CTL(sc, RT2661_S |
845 (((addr >> n) & 1) << RT2661_SHIFT_D) | RT2661_C);
848 RT2661_EEPROM_CTL(sc, RT2661_S);
850 /* read data Q15-Q0 */
852 for (n = 15; n >= 0; n--) {
853 RT2661_EEPROM_CTL(sc, RT2661_S | RT2661_C);
854 tmp = RAL_READ(sc, RT2661_E2PROM_CSR);
855 val |= ((tmp & RT2661_Q) >> RT2661_SHIFT_Q) << n;
856 RT2661_EEPROM_CTL(sc, RT2661_S);
859 RT2661_EEPROM_CTL(sc, 0);
861 /* clear Chip Select and clock C */
862 RT2661_EEPROM_CTL(sc, RT2661_S);
863 RT2661_EEPROM_CTL(sc, 0);
864 RT2661_EEPROM_CTL(sc, RT2661_C);
870 rt2661_tx_intr(struct rt2661_softc *sc)
872 struct ifnet *ifp = sc->sc_ifp;
873 struct rt2661_tx_ring *txq;
874 struct rt2661_tx_data *data;
877 struct ieee80211vap *vap;
880 struct ieee80211_node *ni;
883 val = RAL_READ(sc, RT2661_STA_CSR4);
884 if (!(val & RT2661_TX_STAT_VALID))
887 /* retrieve the queue in which this frame was sent */
888 qid = RT2661_TX_QID(val);
889 txq = (qid <= 3) ? &sc->txq[qid] : &sc->mgtq;
891 /* retrieve rate control algorithm context */
892 data = &txq->data[txq->stat];
898 /* if no frame has been sent, ignore */
904 switch (RT2661_TX_RESULT(val)) {
905 case RT2661_TX_SUCCESS:
906 retrycnt = RT2661_TX_RETRYCNT(val);
908 DPRINTFN(sc, 10, "data frame sent successfully after "
909 "%d retries\n", retrycnt);
910 if (data->rix != IEEE80211_FIXED_RATE_NONE)
911 ieee80211_ratectl_tx_complete(vap, ni,
912 IEEE80211_RATECTL_TX_SUCCESS,
914 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
917 case RT2661_TX_RETRY_FAIL:
918 retrycnt = RT2661_TX_RETRYCNT(val);
920 DPRINTFN(sc, 9, "%s\n",
921 "sending data frame failed (too much retries)");
922 if (data->rix != IEEE80211_FIXED_RATE_NONE)
923 ieee80211_ratectl_tx_complete(vap, ni,
924 IEEE80211_RATECTL_TX_FAILURE,
926 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
931 device_printf(sc->sc_dev,
932 "sending data frame failed 0x%08x\n", val);
933 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
936 DPRINTFN(sc, 15, "tx done q=%d idx=%u\n", qid, txq->stat);
939 if (++txq->stat >= txq->count) /* faster than % count */
942 if (m->m_flags & M_TXCB)
943 ieee80211_process_callback(ni, m,
944 RT2661_TX_RESULT(val) != RT2661_TX_SUCCESS);
946 ieee80211_free_node(ni);
950 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
952 rt2661_start_locked(ifp);
956 rt2661_tx_dma_intr(struct rt2661_softc *sc, struct rt2661_tx_ring *txq)
958 struct rt2661_tx_desc *desc;
959 struct rt2661_tx_data *data;
961 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_POSTREAD);
964 desc = &txq->desc[txq->next];
965 data = &txq->data[txq->next];
967 if ((le32toh(desc->flags) & RT2661_TX_BUSY) ||
968 !(le32toh(desc->flags) & RT2661_TX_VALID))
971 bus_dmamap_sync(txq->data_dmat, data->map,
972 BUS_DMASYNC_POSTWRITE);
973 bus_dmamap_unload(txq->data_dmat, data->map);
975 /* descriptor is no longer valid */
976 desc->flags &= ~htole32(RT2661_TX_VALID);
978 DPRINTFN(sc, 15, "tx dma done q=%p idx=%u\n", txq, txq->next);
980 if (++txq->next >= txq->count) /* faster than % count */
984 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
988 rt2661_rx_intr(struct rt2661_softc *sc)
990 struct ifnet *ifp = sc->sc_ifp;
991 struct ieee80211com *ic = ifp->if_l2com;
992 struct rt2661_rx_desc *desc;
993 struct rt2661_rx_data *data;
995 struct ieee80211_frame *wh;
996 struct ieee80211_node *ni;
997 struct mbuf *mnew, *m;
1000 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1001 BUS_DMASYNC_POSTREAD);
1006 desc = &sc->rxq.desc[sc->rxq.cur];
1007 data = &sc->rxq.data[sc->rxq.cur];
1009 if (le32toh(desc->flags) & RT2661_RX_BUSY)
1012 if ((le32toh(desc->flags) & RT2661_RX_PHY_ERROR) ||
1013 (le32toh(desc->flags) & RT2661_RX_CRC_ERROR)) {
1015 * This should not happen since we did not request
1016 * to receive those frames when we filled TXRX_CSR0.
1018 DPRINTFN(sc, 5, "PHY or CRC error flags 0x%08x\n",
1019 le32toh(desc->flags));
1020 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
1024 if ((le32toh(desc->flags) & RT2661_RX_CIPHER_MASK) != 0) {
1025 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
1030 * Try to allocate a new mbuf for this ring element and load it
1031 * before processing the current mbuf. If the ring element
1032 * cannot be loaded, drop the received packet and reuse the old
1033 * mbuf. In the unlikely case that the old mbuf can't be
1034 * reloaded either, explicitly panic.
1036 mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
1038 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
1042 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
1043 BUS_DMASYNC_POSTREAD);
1044 bus_dmamap_unload(sc->rxq.data_dmat, data->map);
1046 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1047 mtod(mnew, void *), MCLBYTES, rt2661_dma_map_addr,
1052 /* try to reload the old mbuf */
1053 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1054 mtod(data->m, void *), MCLBYTES,
1055 rt2661_dma_map_addr, &physaddr, 0);
1057 /* very unlikely that it will fail... */
1058 panic("%s: could not load old rx mbuf",
1059 device_get_name(sc->sc_dev));
1061 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
1066 * New mbuf successfully loaded, update Rx ring and continue
1071 desc->physaddr = htole32(physaddr);
1074 m->m_pkthdr.rcvif = ifp;
1075 m->m_pkthdr.len = m->m_len =
1076 (le32toh(desc->flags) >> 16) & 0xfff;
1078 rssi = rt2661_get_rssi(sc, desc->rssi);
1079 /* Error happened during RSSI conversion. */
1081 rssi = -30; /* XXX ignored by net80211 */
1082 nf = RT2661_NOISE_FLOOR;
1084 if (ieee80211_radiotap_active(ic)) {
1085 struct rt2661_rx_radiotap_header *tap = &sc->sc_rxtap;
1086 uint32_t tsf_lo, tsf_hi;
1088 /* get timestamp (low and high 32 bits) */
1089 tsf_hi = RAL_READ(sc, RT2661_TXRX_CSR13);
1090 tsf_lo = RAL_READ(sc, RT2661_TXRX_CSR12);
1093 htole64(((uint64_t)tsf_hi << 32) | tsf_lo);
1095 tap->wr_rate = ieee80211_plcp2rate(desc->rate,
1096 (desc->flags & htole32(RT2661_RX_OFDM)) ?
1097 IEEE80211_T_OFDM : IEEE80211_T_CCK);
1098 tap->wr_antsignal = nf + rssi;
1099 tap->wr_antnoise = nf;
1101 sc->sc_flags |= RAL_INPUT_RUNNING;
1103 wh = mtod(m, struct ieee80211_frame *);
1105 /* send the frame to the 802.11 layer */
1106 ni = ieee80211_find_rxnode(ic,
1107 (struct ieee80211_frame_min *)wh);
1109 (void) ieee80211_input(ni, m, rssi, nf);
1110 ieee80211_free_node(ni);
1112 (void) ieee80211_input_all(ic, m, rssi, nf);
1115 sc->sc_flags &= ~RAL_INPUT_RUNNING;
1117 skip: desc->flags |= htole32(RT2661_RX_BUSY);
1119 DPRINTFN(sc, 15, "rx intr idx=%u\n", sc->rxq.cur);
1121 sc->rxq.cur = (sc->rxq.cur + 1) % RT2661_RX_RING_COUNT;
1124 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1125 BUS_DMASYNC_PREWRITE);
1130 rt2661_mcu_beacon_expire(struct rt2661_softc *sc)
1136 rt2661_mcu_wakeup(struct rt2661_softc *sc)
1138 RAL_WRITE(sc, RT2661_MAC_CSR11, 5 << 16);
1140 RAL_WRITE(sc, RT2661_SOFT_RESET_CSR, 0x7);
1141 RAL_WRITE(sc, RT2661_IO_CNTL_CSR, 0x18);
1142 RAL_WRITE(sc, RT2661_PCI_USEC_CSR, 0x20);
1144 /* send wakeup command to MCU */
1145 rt2661_tx_cmd(sc, RT2661_MCU_CMD_WAKEUP, 0);
1149 rt2661_mcu_cmd_intr(struct rt2661_softc *sc)
1151 RAL_READ(sc, RT2661_M2H_CMD_DONE_CSR);
1152 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
1156 rt2661_intr(void *arg)
1158 struct rt2661_softc *sc = arg;
1159 struct ifnet *ifp = sc->sc_ifp;
1164 /* disable MAC and MCU interrupts */
1165 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffff7f);
1166 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
1168 /* don't re-enable interrupts if we're shutting down */
1169 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
1174 r1 = RAL_READ(sc, RT2661_INT_SOURCE_CSR);
1175 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, r1);
1177 r2 = RAL_READ(sc, RT2661_MCU_INT_SOURCE_CSR);
1178 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, r2);
1180 if (r1 & RT2661_MGT_DONE)
1181 rt2661_tx_dma_intr(sc, &sc->mgtq);
1183 if (r1 & RT2661_RX_DONE)
1186 if (r1 & RT2661_TX0_DMA_DONE)
1187 rt2661_tx_dma_intr(sc, &sc->txq[0]);
1189 if (r1 & RT2661_TX1_DMA_DONE)
1190 rt2661_tx_dma_intr(sc, &sc->txq[1]);
1192 if (r1 & RT2661_TX2_DMA_DONE)
1193 rt2661_tx_dma_intr(sc, &sc->txq[2]);
1195 if (r1 & RT2661_TX3_DMA_DONE)
1196 rt2661_tx_dma_intr(sc, &sc->txq[3]);
1198 if (r1 & RT2661_TX_DONE)
1201 if (r2 & RT2661_MCU_CMD_DONE)
1202 rt2661_mcu_cmd_intr(sc);
1204 if (r2 & RT2661_MCU_BEACON_EXPIRE)
1205 rt2661_mcu_beacon_expire(sc);
1207 if (r2 & RT2661_MCU_WAKEUP)
1208 rt2661_mcu_wakeup(sc);
1210 /* re-enable MAC and MCU interrupts */
1211 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
1212 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
1218 rt2661_plcp_signal(int rate)
1221 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1222 case 12: return 0xb;
1223 case 18: return 0xf;
1224 case 24: return 0xa;
1225 case 36: return 0xe;
1226 case 48: return 0x9;
1227 case 72: return 0xd;
1228 case 96: return 0x8;
1229 case 108: return 0xc;
1231 /* CCK rates (NB: not IEEE std, device-specific) */
1234 case 11: return 0x2;
1235 case 22: return 0x3;
1237 return 0xff; /* XXX unsupported/unknown rate */
1241 rt2661_setup_tx_desc(struct rt2661_softc *sc, struct rt2661_tx_desc *desc,
1242 uint32_t flags, uint16_t xflags, int len, int rate,
1243 const bus_dma_segment_t *segs, int nsegs, int ac)
1245 struct ifnet *ifp = sc->sc_ifp;
1246 struct ieee80211com *ic = ifp->if_l2com;
1247 uint16_t plcp_length;
1250 desc->flags = htole32(flags);
1251 desc->flags |= htole32(len << 16);
1252 desc->flags |= htole32(RT2661_TX_BUSY | RT2661_TX_VALID);
1254 desc->xflags = htole16(xflags);
1255 desc->xflags |= htole16(nsegs << 13);
1257 desc->wme = htole16(
1260 RT2661_LOGCWMIN(4) |
1261 RT2661_LOGCWMAX(10));
1264 * Remember in which queue this frame was sent. This field is driver
1265 * private data only. It will be made available by the NIC in STA_CSR4
1270 /* setup PLCP fields */
1271 desc->plcp_signal = rt2661_plcp_signal(rate);
1272 desc->plcp_service = 4;
1274 len += IEEE80211_CRC_LEN;
1275 if (ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM) {
1276 desc->flags |= htole32(RT2661_TX_OFDM);
1278 plcp_length = len & 0xfff;
1279 desc->plcp_length_hi = plcp_length >> 6;
1280 desc->plcp_length_lo = plcp_length & 0x3f;
1282 plcp_length = (16 * len + rate - 1) / rate;
1284 remainder = (16 * len) % 22;
1285 if (remainder != 0 && remainder < 7)
1286 desc->plcp_service |= RT2661_PLCP_LENGEXT;
1288 desc->plcp_length_hi = plcp_length >> 8;
1289 desc->plcp_length_lo = plcp_length & 0xff;
1291 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1292 desc->plcp_signal |= 0x08;
1295 /* RT2x61 supports scatter with up to 5 segments */
1296 for (i = 0; i < nsegs; i++) {
1297 desc->addr[i] = htole32(segs[i].ds_addr);
1298 desc->len [i] = htole16(segs[i].ds_len);
1303 rt2661_tx_mgt(struct rt2661_softc *sc, struct mbuf *m0,
1304 struct ieee80211_node *ni)
1306 struct ieee80211vap *vap = ni->ni_vap;
1307 struct ieee80211com *ic = ni->ni_ic;
1308 struct rt2661_tx_desc *desc;
1309 struct rt2661_tx_data *data;
1310 struct ieee80211_frame *wh;
1311 struct ieee80211_key *k;
1312 bus_dma_segment_t segs[RT2661_MAX_SCATTER];
1314 uint32_t flags = 0; /* XXX HWSEQ */
1315 int nsegs, rate, error;
1317 desc = &sc->mgtq.desc[sc->mgtq.cur];
1318 data = &sc->mgtq.data[sc->mgtq.cur];
1320 rate = vap->iv_txparms[ieee80211_chan2mode(ic->ic_curchan)].mgmtrate;
1322 wh = mtod(m0, struct ieee80211_frame *);
1324 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
1325 k = ieee80211_crypto_encap(ni, m0);
1332 error = bus_dmamap_load_mbuf_sg(sc->mgtq.data_dmat, data->map, m0,
1335 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1341 if (ieee80211_radiotap_active_vap(vap)) {
1342 struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
1345 tap->wt_rate = rate;
1347 ieee80211_radiotap_tx(vap, m0);
1352 /* management frames are not taken into account for amrr */
1353 data->rix = IEEE80211_FIXED_RATE_NONE;
1355 wh = mtod(m0, struct ieee80211_frame *);
1357 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1358 flags |= RT2661_TX_NEED_ACK;
1360 dur = ieee80211_ack_duration(ic->ic_rt,
1361 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1362 *(uint16_t *)wh->i_dur = htole16(dur);
1364 /* tell hardware to add timestamp in probe responses */
1366 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
1367 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
1368 flags |= RT2661_TX_TIMESTAMP;
1371 rt2661_setup_tx_desc(sc, desc, flags, 0 /* XXX HWSEQ */,
1372 m0->m_pkthdr.len, rate, segs, nsegs, RT2661_QID_MGT);
1374 bus_dmamap_sync(sc->mgtq.data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1375 bus_dmamap_sync(sc->mgtq.desc_dmat, sc->mgtq.desc_map,
1376 BUS_DMASYNC_PREWRITE);
1378 DPRINTFN(sc, 10, "sending mgt frame len=%u idx=%u rate=%u\n",
1379 m0->m_pkthdr.len, sc->mgtq.cur, rate);
1383 sc->mgtq.cur = (sc->mgtq.cur + 1) % RT2661_MGT_RING_COUNT;
1384 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, RT2661_KICK_MGT);
1390 rt2661_sendprot(struct rt2661_softc *sc, int ac,
1391 const struct mbuf *m, struct ieee80211_node *ni, int prot, int rate)
1393 struct ieee80211com *ic = ni->ni_ic;
1394 struct rt2661_tx_ring *txq = &sc->txq[ac];
1395 const struct ieee80211_frame *wh;
1396 struct rt2661_tx_desc *desc;
1397 struct rt2661_tx_data *data;
1399 int protrate, ackrate, pktlen, flags, isshort, error;
1401 bus_dma_segment_t segs[RT2661_MAX_SCATTER];
1404 KASSERT(prot == IEEE80211_PROT_RTSCTS || prot == IEEE80211_PROT_CTSONLY,
1405 ("protection %d", prot));
1407 wh = mtod(m, const struct ieee80211_frame *);
1408 pktlen = m->m_pkthdr.len + IEEE80211_CRC_LEN;
1410 protrate = ieee80211_ctl_rate(ic->ic_rt, rate);
1411 ackrate = ieee80211_ack_rate(ic->ic_rt, rate);
1413 isshort = (ic->ic_flags & IEEE80211_F_SHPREAMBLE) != 0;
1414 dur = ieee80211_compute_duration(ic->ic_rt, pktlen, rate, isshort)
1415 + ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1416 flags = RT2661_TX_MORE_FRAG;
1417 if (prot == IEEE80211_PROT_RTSCTS) {
1418 /* NB: CTS is the same size as an ACK */
1419 dur += ieee80211_ack_duration(ic->ic_rt, rate, isshort);
1420 flags |= RT2661_TX_NEED_ACK;
1421 mprot = ieee80211_alloc_rts(ic, wh->i_addr1, wh->i_addr2, dur);
1423 mprot = ieee80211_alloc_cts(ic, ni->ni_vap->iv_myaddr, dur);
1425 if (mprot == NULL) {
1426 /* XXX stat + msg */
1430 data = &txq->data[txq->cur];
1431 desc = &txq->desc[txq->cur];
1433 error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, mprot, segs,
1436 device_printf(sc->sc_dev,
1437 "could not map mbuf (error %d)\n", error);
1443 data->ni = ieee80211_ref_node(ni);
1444 /* ctl frames are not taken into account for amrr */
1445 data->rix = IEEE80211_FIXED_RATE_NONE;
1447 rt2661_setup_tx_desc(sc, desc, flags, 0, mprot->m_pkthdr.len,
1448 protrate, segs, 1, ac);
1450 bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1451 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1454 txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
1460 rt2661_tx_data(struct rt2661_softc *sc, struct mbuf *m0,
1461 struct ieee80211_node *ni, int ac)
1463 struct ieee80211vap *vap = ni->ni_vap;
1464 struct ifnet *ifp = sc->sc_ifp;
1465 struct ieee80211com *ic = ifp->if_l2com;
1466 struct rt2661_tx_ring *txq = &sc->txq[ac];
1467 struct rt2661_tx_desc *desc;
1468 struct rt2661_tx_data *data;
1469 struct ieee80211_frame *wh;
1470 const struct ieee80211_txparam *tp;
1471 struct ieee80211_key *k;
1472 const struct chanAccParams *cap;
1474 bus_dma_segment_t segs[RT2661_MAX_SCATTER];
1477 int error, nsegs, rate, noack = 0;
1479 wh = mtod(m0, struct ieee80211_frame *);
1481 tp = &vap->iv_txparms[ieee80211_chan2mode(ni->ni_chan)];
1482 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1483 rate = tp->mcastrate;
1484 } else if (m0->m_flags & M_EAPOL) {
1485 rate = tp->mgmtrate;
1486 } else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) {
1487 rate = tp->ucastrate;
1489 (void) ieee80211_ratectl_rate(ni, NULL, 0);
1490 rate = ni->ni_txrate;
1492 rate &= IEEE80211_RATE_VAL;
1494 if (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_QOS) {
1495 cap = &ic->ic_wme.wme_chanParams;
1496 noack = cap->cap_wmeParams[ac].wmep_noackPolicy;
1499 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
1500 k = ieee80211_crypto_encap(ni, m0);
1506 /* packet header may have moved, reset our local pointer */
1507 wh = mtod(m0, struct ieee80211_frame *);
1511 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1512 int prot = IEEE80211_PROT_NONE;
1513 if (m0->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold)
1514 prot = IEEE80211_PROT_RTSCTS;
1515 else if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1516 ieee80211_rate2phytype(ic->ic_rt, rate) == IEEE80211_T_OFDM)
1517 prot = ic->ic_protmode;
1518 if (prot != IEEE80211_PROT_NONE) {
1519 error = rt2661_sendprot(sc, ac, m0, ni, prot, rate);
1524 flags |= RT2661_TX_LONG_RETRY | RT2661_TX_IFS;
1528 data = &txq->data[txq->cur];
1529 desc = &txq->desc[txq->cur];
1531 error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0, segs,
1533 if (error != 0 && error != EFBIG) {
1534 device_printf(sc->sc_dev, "could not map mbuf (error %d)\n",
1540 mnew = m_defrag(m0, M_NOWAIT);
1542 device_printf(sc->sc_dev,
1543 "could not defragment mbuf\n");
1549 error = bus_dmamap_load_mbuf_sg(txq->data_dmat, data->map, m0,
1552 device_printf(sc->sc_dev,
1553 "could not map mbuf (error %d)\n", error);
1558 /* packet header have moved, reset our local pointer */
1559 wh = mtod(m0, struct ieee80211_frame *);
1562 if (ieee80211_radiotap_active_vap(vap)) {
1563 struct rt2661_tx_radiotap_header *tap = &sc->sc_txtap;
1566 tap->wt_rate = rate;
1568 ieee80211_radiotap_tx(vap, m0);
1574 /* remember link conditions for rate adaptation algorithm */
1575 if (tp->ucastrate == IEEE80211_FIXED_RATE_NONE) {
1576 data->rix = ni->ni_txrate;
1577 /* XXX probably need last rssi value and not avg */
1578 data->rssi = ic->ic_node_getrssi(ni);
1580 data->rix = IEEE80211_FIXED_RATE_NONE;
1582 if (!noack && !IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1583 flags |= RT2661_TX_NEED_ACK;
1585 dur = ieee80211_ack_duration(ic->ic_rt,
1586 rate, ic->ic_flags & IEEE80211_F_SHPREAMBLE);
1587 *(uint16_t *)wh->i_dur = htole16(dur);
1590 rt2661_setup_tx_desc(sc, desc, flags, 0, m0->m_pkthdr.len, rate, segs,
1593 bus_dmamap_sync(txq->data_dmat, data->map, BUS_DMASYNC_PREWRITE);
1594 bus_dmamap_sync(txq->desc_dmat, txq->desc_map, BUS_DMASYNC_PREWRITE);
1596 DPRINTFN(sc, 10, "sending data frame len=%u idx=%u rate=%u\n",
1597 m0->m_pkthdr.len, txq->cur, rate);
1601 txq->cur = (txq->cur + 1) % RT2661_TX_RING_COUNT;
1602 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 1 << ac);
1608 rt2661_start_locked(struct ifnet *ifp)
1610 struct rt2661_softc *sc = ifp->if_softc;
1612 struct ieee80211_node *ni;
1615 RAL_LOCK_ASSERT(sc);
1617 /* prevent management frames from being sent if we're not ready */
1618 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING) || sc->sc_invalid)
1622 IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
1626 ac = M_WME_GETAC(m);
1627 if (sc->txq[ac].queued >= RT2661_TX_RING_COUNT - 1) {
1628 /* there is no place left in this ring */
1629 IFQ_DRV_PREPEND(&ifp->if_snd, m);
1630 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1633 ni = (struct ieee80211_node *) m->m_pkthdr.rcvif;
1634 if (rt2661_tx_data(sc, m, ni, ac) != 0) {
1635 ieee80211_free_node(ni);
1636 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
1640 sc->sc_tx_timer = 5;
1645 rt2661_start(struct ifnet *ifp)
1647 struct rt2661_softc *sc = ifp->if_softc;
1650 rt2661_start_locked(ifp);
1655 rt2661_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1656 const struct ieee80211_bpf_params *params)
1658 struct ieee80211com *ic = ni->ni_ic;
1659 struct ifnet *ifp = ic->ic_ifp;
1660 struct rt2661_softc *sc = ifp->if_softc;
1664 /* prevent management frames from being sent if we're not ready */
1665 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
1668 ieee80211_free_node(ni);
1671 if (sc->mgtq.queued >= RT2661_MGT_RING_COUNT) {
1672 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
1675 ieee80211_free_node(ni);
1676 return ENOBUFS; /* XXX */
1679 if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
1682 * Legacy path; interpret frame contents to decide
1683 * precisely how to send the frame.
1686 if (rt2661_tx_mgt(sc, m, ni) != 0)
1688 sc->sc_tx_timer = 5;
1694 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
1695 ieee80211_free_node(ni);
1697 return EIO; /* XXX */
1701 rt2661_watchdog(void *arg)
1703 struct rt2661_softc *sc = (struct rt2661_softc *)arg;
1704 struct ifnet *ifp = sc->sc_ifp;
1706 RAL_LOCK_ASSERT(sc);
1708 KASSERT(ifp->if_drv_flags & IFF_DRV_RUNNING, ("not running"));
1710 if (sc->sc_invalid) /* card ejected */
1713 if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) {
1714 if_printf(ifp, "device timeout\n");
1715 rt2661_init_locked(sc);
1716 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
1717 /* NB: callout is reset in rt2661_init() */
1720 callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc);
1724 rt2661_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1726 struct rt2661_softc *sc = ifp->if_softc;
1727 struct ieee80211com *ic = ifp->if_l2com;
1728 struct ifreq *ifr = (struct ifreq *) data;
1729 int error = 0, startall = 0;
1734 if (ifp->if_flags & IFF_UP) {
1735 if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
1736 rt2661_init_locked(sc);
1739 rt2661_update_promisc(ic);
1741 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
1742 rt2661_stop_locked(sc);
1746 ieee80211_start_all(ic);
1749 error = ifmedia_ioctl(ifp, ifr, &ic->ic_media, cmd);
1752 error = ether_ioctl(ifp, cmd, data);
1762 rt2661_bbp_write(struct rt2661_softc *sc, uint8_t reg, uint8_t val)
1767 for (ntries = 0; ntries < 100; ntries++) {
1768 if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
1772 if (ntries == 100) {
1773 device_printf(sc->sc_dev, "could not write to BBP\n");
1777 tmp = RT2661_BBP_BUSY | (reg & 0x7f) << 8 | val;
1778 RAL_WRITE(sc, RT2661_PHY_CSR3, tmp);
1780 DPRINTFN(sc, 15, "BBP R%u <- 0x%02x\n", reg, val);
1784 rt2661_bbp_read(struct rt2661_softc *sc, uint8_t reg)
1789 for (ntries = 0; ntries < 100; ntries++) {
1790 if (!(RAL_READ(sc, RT2661_PHY_CSR3) & RT2661_BBP_BUSY))
1794 if (ntries == 100) {
1795 device_printf(sc->sc_dev, "could not read from BBP\n");
1799 val = RT2661_BBP_BUSY | RT2661_BBP_READ | reg << 8;
1800 RAL_WRITE(sc, RT2661_PHY_CSR3, val);
1802 for (ntries = 0; ntries < 100; ntries++) {
1803 val = RAL_READ(sc, RT2661_PHY_CSR3);
1804 if (!(val & RT2661_BBP_BUSY))
1809 device_printf(sc->sc_dev, "could not read from BBP\n");
1814 rt2661_rf_write(struct rt2661_softc *sc, uint8_t reg, uint32_t val)
1819 for (ntries = 0; ntries < 100; ntries++) {
1820 if (!(RAL_READ(sc, RT2661_PHY_CSR4) & RT2661_RF_BUSY))
1824 if (ntries == 100) {
1825 device_printf(sc->sc_dev, "could not write to RF\n");
1829 tmp = RT2661_RF_BUSY | RT2661_RF_21BIT | (val & 0x1fffff) << 2 |
1831 RAL_WRITE(sc, RT2661_PHY_CSR4, tmp);
1833 /* remember last written value in sc */
1834 sc->rf_regs[reg] = val;
1836 DPRINTFN(sc, 15, "RF R[%u] <- 0x%05x\n", reg & 3, val & 0x1fffff);
1840 rt2661_tx_cmd(struct rt2661_softc *sc, uint8_t cmd, uint16_t arg)
1842 if (RAL_READ(sc, RT2661_H2M_MAILBOX_CSR) & RT2661_H2M_BUSY)
1843 return EIO; /* there is already a command pending */
1845 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR,
1846 RT2661_H2M_BUSY | RT2661_TOKEN_NO_INTR << 16 | arg);
1848 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, RT2661_KICK_CMD | cmd);
1854 rt2661_select_antenna(struct rt2661_softc *sc)
1856 uint8_t bbp4, bbp77;
1859 bbp4 = rt2661_bbp_read(sc, 4);
1860 bbp77 = rt2661_bbp_read(sc, 77);
1864 /* make sure Rx is disabled before switching antenna */
1865 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
1866 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
1868 rt2661_bbp_write(sc, 4, bbp4);
1869 rt2661_bbp_write(sc, 77, bbp77);
1871 /* restore Rx filter */
1872 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
1876 * Enable multi-rate retries for frames sent at OFDM rates.
1877 * In 802.11b/g mode, allow fallback to CCK rates.
1880 rt2661_enable_mrr(struct rt2661_softc *sc)
1882 struct ifnet *ifp = sc->sc_ifp;
1883 struct ieee80211com *ic = ifp->if_l2com;
1886 tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
1888 tmp &= ~RT2661_MRR_CCK_FALLBACK;
1889 if (!IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan))
1890 tmp |= RT2661_MRR_CCK_FALLBACK;
1891 tmp |= RT2661_MRR_ENABLED;
1893 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
1897 rt2661_set_txpreamble(struct rt2661_softc *sc)
1899 struct ifnet *ifp = sc->sc_ifp;
1900 struct ieee80211com *ic = ifp->if_l2com;
1903 tmp = RAL_READ(sc, RT2661_TXRX_CSR4);
1905 tmp &= ~RT2661_SHORT_PREAMBLE;
1906 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
1907 tmp |= RT2661_SHORT_PREAMBLE;
1909 RAL_WRITE(sc, RT2661_TXRX_CSR4, tmp);
1913 rt2661_set_basicrates(struct rt2661_softc *sc,
1914 const struct ieee80211_rateset *rs)
1916 #define RV(r) ((r) & IEEE80211_RATE_VAL)
1917 struct ifnet *ifp = sc->sc_ifp;
1918 struct ieee80211com *ic = ifp->if_l2com;
1923 for (i = 0; i < rs->rs_nrates; i++) {
1924 rate = rs->rs_rates[i];
1926 if (!(rate & IEEE80211_RATE_BASIC))
1929 mask |= 1 << ieee80211_legacy_rate_lookup(ic->ic_rt, RV(rate));
1932 RAL_WRITE(sc, RT2661_TXRX_CSR5, mask);
1934 DPRINTF(sc, "Setting basic rate mask to 0x%x\n", mask);
1939 * Reprogram MAC/BBP to switch to a new band. Values taken from the reference
1943 rt2661_select_band(struct rt2661_softc *sc, struct ieee80211_channel *c)
1945 uint8_t bbp17, bbp35, bbp96, bbp97, bbp98, bbp104;
1948 /* update all BBP registers that depend on the band */
1949 bbp17 = 0x20; bbp96 = 0x48; bbp104 = 0x2c;
1950 bbp35 = 0x50; bbp97 = 0x48; bbp98 = 0x48;
1951 if (IEEE80211_IS_CHAN_5GHZ(c)) {
1952 bbp17 += 0x08; bbp96 += 0x10; bbp104 += 0x0c;
1953 bbp35 += 0x10; bbp97 += 0x10; bbp98 += 0x10;
1955 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
1956 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
1957 bbp17 += 0x10; bbp96 += 0x10; bbp104 += 0x10;
1960 rt2661_bbp_write(sc, 17, bbp17);
1961 rt2661_bbp_write(sc, 96, bbp96);
1962 rt2661_bbp_write(sc, 104, bbp104);
1964 if ((IEEE80211_IS_CHAN_2GHZ(c) && sc->ext_2ghz_lna) ||
1965 (IEEE80211_IS_CHAN_5GHZ(c) && sc->ext_5ghz_lna)) {
1966 rt2661_bbp_write(sc, 75, 0x80);
1967 rt2661_bbp_write(sc, 86, 0x80);
1968 rt2661_bbp_write(sc, 88, 0x80);
1971 rt2661_bbp_write(sc, 35, bbp35);
1972 rt2661_bbp_write(sc, 97, bbp97);
1973 rt2661_bbp_write(sc, 98, bbp98);
1975 tmp = RAL_READ(sc, RT2661_PHY_CSR0);
1976 tmp &= ~(RT2661_PA_PE_2GHZ | RT2661_PA_PE_5GHZ);
1977 if (IEEE80211_IS_CHAN_2GHZ(c))
1978 tmp |= RT2661_PA_PE_2GHZ;
1980 tmp |= RT2661_PA_PE_5GHZ;
1981 RAL_WRITE(sc, RT2661_PHY_CSR0, tmp);
1985 rt2661_set_chan(struct rt2661_softc *sc, struct ieee80211_channel *c)
1987 struct ifnet *ifp = sc->sc_ifp;
1988 struct ieee80211com *ic = ifp->if_l2com;
1989 const struct rfprog *rfprog;
1990 uint8_t bbp3, bbp94 = RT2661_BBPR94_DEFAULT;
1994 chan = ieee80211_chan2ieee(ic, c);
1995 KASSERT(chan != 0 && chan != IEEE80211_CHAN_ANY, ("chan 0x%x", chan));
1997 /* select the appropriate RF settings based on what EEPROM says */
1998 rfprog = (sc->rfprog == 0) ? rt2661_rf5225_1 : rt2661_rf5225_2;
2000 /* find the settings for this channel (we know it exists) */
2001 for (i = 0; rfprog[i].chan != chan; i++);
2003 power = sc->txpow[i];
2007 } else if (power > 31) {
2008 bbp94 += power - 31;
2013 * If we are switching from the 2GHz band to the 5GHz band or
2014 * vice-versa, BBP registers need to be reprogrammed.
2016 if (c->ic_flags != sc->sc_curchan->ic_flags) {
2017 rt2661_select_band(sc, c);
2018 rt2661_select_antenna(sc);
2022 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2023 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2024 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
2025 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2029 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2030 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2031 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7 | 1);
2032 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2036 rt2661_rf_write(sc, RAL_RF1, rfprog[i].r1);
2037 rt2661_rf_write(sc, RAL_RF2, rfprog[i].r2);
2038 rt2661_rf_write(sc, RAL_RF3, rfprog[i].r3 | power << 7);
2039 rt2661_rf_write(sc, RAL_RF4, rfprog[i].r4 | sc->rffreq << 10);
2041 /* enable smart mode for MIMO-capable RFs */
2042 bbp3 = rt2661_bbp_read(sc, 3);
2044 bbp3 &= ~RT2661_SMART_MODE;
2045 if (sc->rf_rev == RT2661_RF_5325 || sc->rf_rev == RT2661_RF_2529)
2046 bbp3 |= RT2661_SMART_MODE;
2048 rt2661_bbp_write(sc, 3, bbp3);
2050 if (bbp94 != RT2661_BBPR94_DEFAULT)
2051 rt2661_bbp_write(sc, 94, bbp94);
2053 /* 5GHz radio needs a 1ms delay here */
2054 if (IEEE80211_IS_CHAN_5GHZ(c))
2059 rt2661_set_bssid(struct rt2661_softc *sc, const uint8_t *bssid)
2063 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
2064 RAL_WRITE(sc, RT2661_MAC_CSR4, tmp);
2066 tmp = bssid[4] | bssid[5] << 8 | RT2661_ONE_BSSID << 16;
2067 RAL_WRITE(sc, RT2661_MAC_CSR5, tmp);
2071 rt2661_set_macaddr(struct rt2661_softc *sc, const uint8_t *addr)
2075 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
2076 RAL_WRITE(sc, RT2661_MAC_CSR2, tmp);
2078 tmp = addr[4] | addr[5] << 8;
2079 RAL_WRITE(sc, RT2661_MAC_CSR3, tmp);
2083 rt2661_update_promisc(struct ieee80211com *ic)
2085 struct rt2661_softc *sc = ic->ic_softc;
2088 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2090 tmp &= ~RT2661_DROP_NOT_TO_ME;
2091 if (!(ic->ic_ifp->if_flags & IFF_PROMISC))
2092 tmp |= RT2661_DROP_NOT_TO_ME;
2094 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2096 DPRINTF(sc, "%s promiscuous mode\n",
2097 (ic->ic_ifp->if_flags & IFF_PROMISC) ? "entering" : "leaving");
2101 * Update QoS (802.11e) settings for each h/w Tx ring.
2104 rt2661_wme_update(struct ieee80211com *ic)
2106 struct rt2661_softc *sc = ic->ic_ifp->if_softc;
2107 const struct wmeParams *wmep;
2109 wmep = ic->ic_wme.wme_chanParams.cap_wmeParams;
2111 /* XXX: not sure about shifts. */
2112 /* XXX: the reference driver plays with AC_VI settings too. */
2115 RAL_WRITE(sc, RT2661_AC_TXOP_CSR0,
2116 wmep[WME_AC_BE].wmep_txopLimit << 16 |
2117 wmep[WME_AC_BK].wmep_txopLimit);
2118 RAL_WRITE(sc, RT2661_AC_TXOP_CSR1,
2119 wmep[WME_AC_VI].wmep_txopLimit << 16 |
2120 wmep[WME_AC_VO].wmep_txopLimit);
2123 RAL_WRITE(sc, RT2661_CWMIN_CSR,
2124 wmep[WME_AC_BE].wmep_logcwmin << 12 |
2125 wmep[WME_AC_BK].wmep_logcwmin << 8 |
2126 wmep[WME_AC_VI].wmep_logcwmin << 4 |
2127 wmep[WME_AC_VO].wmep_logcwmin);
2130 RAL_WRITE(sc, RT2661_CWMAX_CSR,
2131 wmep[WME_AC_BE].wmep_logcwmax << 12 |
2132 wmep[WME_AC_BK].wmep_logcwmax << 8 |
2133 wmep[WME_AC_VI].wmep_logcwmax << 4 |
2134 wmep[WME_AC_VO].wmep_logcwmax);
2137 RAL_WRITE(sc, RT2661_AIFSN_CSR,
2138 wmep[WME_AC_BE].wmep_aifsn << 12 |
2139 wmep[WME_AC_BK].wmep_aifsn << 8 |
2140 wmep[WME_AC_VI].wmep_aifsn << 4 |
2141 wmep[WME_AC_VO].wmep_aifsn);
2147 rt2661_update_slot(struct ieee80211com *ic)
2149 struct rt2661_softc *sc = ic->ic_softc;
2153 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
2155 tmp = RAL_READ(sc, RT2661_MAC_CSR9);
2156 tmp = (tmp & ~0xff) | slottime;
2157 RAL_WRITE(sc, RT2661_MAC_CSR9, tmp);
2161 rt2661_get_rf(int rev)
2164 case RT2661_RF_5225: return "RT5225";
2165 case RT2661_RF_5325: return "RT5325 (MIMO XR)";
2166 case RT2661_RF_2527: return "RT2527";
2167 case RT2661_RF_2529: return "RT2529 (MIMO XR)";
2168 default: return "unknown";
2173 rt2661_read_eeprom(struct rt2661_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
2178 /* read MAC address */
2179 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC01);
2180 macaddr[0] = val & 0xff;
2181 macaddr[1] = val >> 8;
2183 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC23);
2184 macaddr[2] = val & 0xff;
2185 macaddr[3] = val >> 8;
2187 val = rt2661_eeprom_read(sc, RT2661_EEPROM_MAC45);
2188 macaddr[4] = val & 0xff;
2189 macaddr[5] = val >> 8;
2191 val = rt2661_eeprom_read(sc, RT2661_EEPROM_ANTENNA);
2192 /* XXX: test if different from 0xffff? */
2193 sc->rf_rev = (val >> 11) & 0x1f;
2194 sc->hw_radio = (val >> 10) & 0x1;
2195 sc->rx_ant = (val >> 4) & 0x3;
2196 sc->tx_ant = (val >> 2) & 0x3;
2197 sc->nb_ant = val & 0x3;
2199 DPRINTF(sc, "RF revision=%d\n", sc->rf_rev);
2201 val = rt2661_eeprom_read(sc, RT2661_EEPROM_CONFIG2);
2202 sc->ext_5ghz_lna = (val >> 6) & 0x1;
2203 sc->ext_2ghz_lna = (val >> 4) & 0x1;
2205 DPRINTF(sc, "External 2GHz LNA=%d\nExternal 5GHz LNA=%d\n",
2206 sc->ext_2ghz_lna, sc->ext_5ghz_lna);
2208 val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_2GHZ_OFFSET);
2209 if ((val & 0xff) != 0xff)
2210 sc->rssi_2ghz_corr = (int8_t)(val & 0xff); /* signed */
2212 /* Only [-10, 10] is valid */
2213 if (sc->rssi_2ghz_corr < -10 || sc->rssi_2ghz_corr > 10)
2214 sc->rssi_2ghz_corr = 0;
2216 val = rt2661_eeprom_read(sc, RT2661_EEPROM_RSSI_5GHZ_OFFSET);
2217 if ((val & 0xff) != 0xff)
2218 sc->rssi_5ghz_corr = (int8_t)(val & 0xff); /* signed */
2220 /* Only [-10, 10] is valid */
2221 if (sc->rssi_5ghz_corr < -10 || sc->rssi_5ghz_corr > 10)
2222 sc->rssi_5ghz_corr = 0;
2224 /* adjust RSSI correction for external low-noise amplifier */
2225 if (sc->ext_2ghz_lna)
2226 sc->rssi_2ghz_corr -= 14;
2227 if (sc->ext_5ghz_lna)
2228 sc->rssi_5ghz_corr -= 14;
2230 DPRINTF(sc, "RSSI 2GHz corr=%d\nRSSI 5GHz corr=%d\n",
2231 sc->rssi_2ghz_corr, sc->rssi_5ghz_corr);
2233 val = rt2661_eeprom_read(sc, RT2661_EEPROM_FREQ_OFFSET);
2234 if ((val >> 8) != 0xff)
2235 sc->rfprog = (val >> 8) & 0x3;
2236 if ((val & 0xff) != 0xff)
2237 sc->rffreq = val & 0xff;
2239 DPRINTF(sc, "RF prog=%d\nRF freq=%d\n", sc->rfprog, sc->rffreq);
2241 /* read Tx power for all a/b/g channels */
2242 for (i = 0; i < 19; i++) {
2243 val = rt2661_eeprom_read(sc, RT2661_EEPROM_TXPOWER + i);
2244 sc->txpow[i * 2] = (int8_t)(val >> 8); /* signed */
2245 DPRINTF(sc, "Channel=%d Tx power=%d\n",
2246 rt2661_rf5225_1[i * 2].chan, sc->txpow[i * 2]);
2247 sc->txpow[i * 2 + 1] = (int8_t)(val & 0xff); /* signed */
2248 DPRINTF(sc, "Channel=%d Tx power=%d\n",
2249 rt2661_rf5225_1[i * 2 + 1].chan, sc->txpow[i * 2 + 1]);
2252 /* read vendor-specific BBP values */
2253 for (i = 0; i < 16; i++) {
2254 val = rt2661_eeprom_read(sc, RT2661_EEPROM_BBP_BASE + i);
2255 if (val == 0 || val == 0xffff)
2256 continue; /* skip invalid entries */
2257 sc->bbp_prom[i].reg = val >> 8;
2258 sc->bbp_prom[i].val = val & 0xff;
2259 DPRINTF(sc, "BBP R%d=%02x\n", sc->bbp_prom[i].reg,
2260 sc->bbp_prom[i].val);
2265 rt2661_bbp_init(struct rt2661_softc *sc)
2267 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2271 /* wait for BBP to be ready */
2272 for (ntries = 0; ntries < 100; ntries++) {
2273 val = rt2661_bbp_read(sc, 0);
2274 if (val != 0 && val != 0xff)
2278 if (ntries == 100) {
2279 device_printf(sc->sc_dev, "timeout waiting for BBP\n");
2283 /* initialize BBP registers to default values */
2284 for (i = 0; i < N(rt2661_def_bbp); i++) {
2285 rt2661_bbp_write(sc, rt2661_def_bbp[i].reg,
2286 rt2661_def_bbp[i].val);
2289 /* write vendor-specific BBP values (from EEPROM) */
2290 for (i = 0; i < 16; i++) {
2291 if (sc->bbp_prom[i].reg == 0)
2293 rt2661_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2301 rt2661_init_locked(struct rt2661_softc *sc)
2303 #define N(a) (sizeof (a) / sizeof ((a)[0]))
2304 struct ifnet *ifp = sc->sc_ifp;
2305 struct ieee80211com *ic = ifp->if_l2com;
2306 uint32_t tmp, sta[3];
2307 int i, error, ntries;
2309 RAL_LOCK_ASSERT(sc);
2311 if ((sc->sc_flags & RAL_FW_LOADED) == 0) {
2312 error = rt2661_load_microcode(sc);
2315 "%s: could not load 8051 microcode, error %d\n",
2319 sc->sc_flags |= RAL_FW_LOADED;
2322 rt2661_stop_locked(sc);
2324 /* initialize Tx rings */
2325 RAL_WRITE(sc, RT2661_AC1_BASE_CSR, sc->txq[1].physaddr);
2326 RAL_WRITE(sc, RT2661_AC0_BASE_CSR, sc->txq[0].physaddr);
2327 RAL_WRITE(sc, RT2661_AC2_BASE_CSR, sc->txq[2].physaddr);
2328 RAL_WRITE(sc, RT2661_AC3_BASE_CSR, sc->txq[3].physaddr);
2330 /* initialize Mgt ring */
2331 RAL_WRITE(sc, RT2661_MGT_BASE_CSR, sc->mgtq.physaddr);
2333 /* initialize Rx ring */
2334 RAL_WRITE(sc, RT2661_RX_BASE_CSR, sc->rxq.physaddr);
2336 /* initialize Tx rings sizes */
2337 RAL_WRITE(sc, RT2661_TX_RING_CSR0,
2338 RT2661_TX_RING_COUNT << 24 |
2339 RT2661_TX_RING_COUNT << 16 |
2340 RT2661_TX_RING_COUNT << 8 |
2341 RT2661_TX_RING_COUNT);
2343 RAL_WRITE(sc, RT2661_TX_RING_CSR1,
2344 RT2661_TX_DESC_WSIZE << 16 |
2345 RT2661_TX_RING_COUNT << 8 | /* XXX: HCCA ring unused */
2346 RT2661_MGT_RING_COUNT);
2348 /* initialize Rx rings */
2349 RAL_WRITE(sc, RT2661_RX_RING_CSR,
2350 RT2661_RX_DESC_BACK << 16 |
2351 RT2661_RX_DESC_WSIZE << 8 |
2352 RT2661_RX_RING_COUNT);
2354 /* XXX: some magic here */
2355 RAL_WRITE(sc, RT2661_TX_DMA_DST_CSR, 0xaa);
2357 /* load base addresses of all 5 Tx rings (4 data + 1 mgt) */
2358 RAL_WRITE(sc, RT2661_LOAD_TX_RING_CSR, 0x1f);
2360 /* load base address of Rx ring */
2361 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 2);
2363 /* initialize MAC registers to default values */
2364 for (i = 0; i < N(rt2661_def_mac); i++)
2365 RAL_WRITE(sc, rt2661_def_mac[i].reg, rt2661_def_mac[i].val);
2367 rt2661_set_macaddr(sc, IF_LLADDR(ifp));
2369 /* set host ready */
2370 RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
2371 RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
2373 /* wait for BBP/RF to wakeup */
2374 for (ntries = 0; ntries < 1000; ntries++) {
2375 if (RAL_READ(sc, RT2661_MAC_CSR12) & 8)
2379 if (ntries == 1000) {
2380 printf("timeout waiting for BBP/RF to wakeup\n");
2381 rt2661_stop_locked(sc);
2385 if (rt2661_bbp_init(sc) != 0) {
2386 rt2661_stop_locked(sc);
2390 /* select default channel */
2391 sc->sc_curchan = ic->ic_curchan;
2392 rt2661_select_band(sc, sc->sc_curchan);
2393 rt2661_select_antenna(sc);
2394 rt2661_set_chan(sc, sc->sc_curchan);
2396 /* update Rx filter */
2397 tmp = RAL_READ(sc, RT2661_TXRX_CSR0) & 0xffff;
2399 tmp |= RT2661_DROP_PHY_ERROR | RT2661_DROP_CRC_ERROR;
2400 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2401 tmp |= RT2661_DROP_CTL | RT2661_DROP_VER_ERROR |
2403 if (ic->ic_opmode != IEEE80211_M_HOSTAP &&
2404 ic->ic_opmode != IEEE80211_M_MBSS)
2405 tmp |= RT2661_DROP_TODS;
2406 if (!(ifp->if_flags & IFF_PROMISC))
2407 tmp |= RT2661_DROP_NOT_TO_ME;
2410 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2412 /* clear STA registers */
2413 RAL_READ_REGION_4(sc, RT2661_STA_CSR0, sta, N(sta));
2415 /* initialize ASIC */
2416 RAL_WRITE(sc, RT2661_MAC_CSR1, 4);
2418 /* clear any pending interrupt */
2419 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
2421 /* enable interrupts */
2422 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0x0000ff10);
2423 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0);
2426 RAL_WRITE(sc, RT2661_RX_CNTL_CSR, 1);
2428 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
2429 ifp->if_drv_flags |= IFF_DRV_RUNNING;
2431 callout_reset(&sc->watchdog_ch, hz, rt2661_watchdog, sc);
2436 rt2661_init(void *priv)
2438 struct rt2661_softc *sc = priv;
2439 struct ifnet *ifp = sc->sc_ifp;
2440 struct ieee80211com *ic = ifp->if_l2com;
2443 rt2661_init_locked(sc);
2446 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
2447 ieee80211_start_all(ic); /* start all vap's */
2451 rt2661_stop_locked(struct rt2661_softc *sc)
2453 struct ifnet *ifp = sc->sc_ifp;
2455 volatile int *flags = &sc->sc_flags;
2457 while (*flags & RAL_INPUT_RUNNING)
2458 msleep(sc, &sc->sc_mtx, 0, "ralrunning", hz/10);
2460 callout_stop(&sc->watchdog_ch);
2461 sc->sc_tx_timer = 0;
2463 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
2464 ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
2466 /* abort Tx (for all 5 Tx rings) */
2467 RAL_WRITE(sc, RT2661_TX_CNTL_CSR, 0x1f << 16);
2469 /* disable Rx (value remains after reset!) */
2470 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2471 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2474 RAL_WRITE(sc, RT2661_MAC_CSR1, 3);
2475 RAL_WRITE(sc, RT2661_MAC_CSR1, 0);
2477 /* disable interrupts */
2478 RAL_WRITE(sc, RT2661_INT_MASK_CSR, 0xffffffff);
2479 RAL_WRITE(sc, RT2661_MCU_INT_MASK_CSR, 0xffffffff);
2481 /* clear any pending interrupt */
2482 RAL_WRITE(sc, RT2661_INT_SOURCE_CSR, 0xffffffff);
2483 RAL_WRITE(sc, RT2661_MCU_INT_SOURCE_CSR, 0xffffffff);
2485 /* reset Tx and Rx rings */
2486 rt2661_reset_tx_ring(sc, &sc->txq[0]);
2487 rt2661_reset_tx_ring(sc, &sc->txq[1]);
2488 rt2661_reset_tx_ring(sc, &sc->txq[2]);
2489 rt2661_reset_tx_ring(sc, &sc->txq[3]);
2490 rt2661_reset_tx_ring(sc, &sc->mgtq);
2491 rt2661_reset_rx_ring(sc, &sc->rxq);
2496 rt2661_stop(void *priv)
2498 struct rt2661_softc *sc = priv;
2501 rt2661_stop_locked(sc);
2506 rt2661_load_microcode(struct rt2661_softc *sc)
2508 struct ifnet *ifp = sc->sc_ifp;
2509 const struct firmware *fp;
2510 const char *imagename;
2513 RAL_LOCK_ASSERT(sc);
2515 switch (sc->sc_id) {
2516 case 0x0301: imagename = "rt2561sfw"; break;
2517 case 0x0302: imagename = "rt2561fw"; break;
2518 case 0x0401: imagename = "rt2661fw"; break;
2520 if_printf(ifp, "%s: unexpected pci device id 0x%x, "
2521 "don't know how to retrieve firmware\n",
2522 __func__, sc->sc_id);
2526 fp = firmware_get(imagename);
2529 if_printf(ifp, "%s: unable to retrieve firmware image %s\n",
2530 __func__, imagename);
2535 * Load 8051 microcode into NIC.
2538 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
2540 /* cancel any pending Host to MCU command */
2541 RAL_WRITE(sc, RT2661_H2M_MAILBOX_CSR, 0);
2542 RAL_WRITE(sc, RT2661_M2H_CMD_DONE_CSR, 0xffffffff);
2543 RAL_WRITE(sc, RT2661_HOST_CMD_CSR, 0);
2545 /* write 8051's microcode */
2546 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET | RT2661_MCU_SEL);
2547 RAL_WRITE_REGION_1(sc, RT2661_MCU_CODE_BASE, fp->data, fp->datasize);
2548 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, RT2661_MCU_RESET);
2550 /* kick 8051's ass */
2551 RAL_WRITE(sc, RT2661_MCU_CNTL_CSR, 0);
2553 /* wait for 8051 to initialize */
2554 for (ntries = 0; ntries < 500; ntries++) {
2555 if (RAL_READ(sc, RT2661_MCU_CNTL_CSR) & RT2661_MCU_READY)
2559 if (ntries == 500) {
2560 if_printf(ifp, "%s: timeout waiting for MCU to initialize\n",
2566 firmware_put(fp, FIRMWARE_UNLOAD);
2572 * Dynamically tune Rx sensitivity (BBP register 17) based on average RSSI and
2573 * false CCA count. This function is called periodically (every seconds) when
2574 * in the RUN state. Values taken from the reference driver.
2577 rt2661_rx_tune(struct rt2661_softc *sc)
2584 * Tuning range depends on operating band and on the presence of an
2585 * external low-noise amplifier.
2588 if (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan))
2590 if ((IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan) && sc->ext_2ghz_lna) ||
2591 (IEEE80211_IS_CHAN_5GHZ(sc->sc_curchan) && sc->ext_5ghz_lna))
2595 /* retrieve false CCA count since last call (clear on read) */
2596 cca = RAL_READ(sc, RT2661_STA_CSR1) & 0xffff;
2600 } else if (dbm >= -58) {
2602 } else if (dbm >= -66) {
2604 } else if (dbm >= -74) {
2607 /* RSSI < -74dBm, tune using false CCA count */
2609 bbp17 = sc->bbp17; /* current value */
2611 hi -= 2 * (-74 - dbm);
2618 } else if (cca > 512) {
2621 } else if (cca < 100) {
2627 if (bbp17 != sc->bbp17) {
2628 rt2661_bbp_write(sc, 17, bbp17);
2634 * Enter/Leave radar detection mode.
2635 * This is for 802.11h additional regulatory domains.
2638 rt2661_radar_start(struct rt2661_softc *sc)
2643 tmp = RAL_READ(sc, RT2661_TXRX_CSR0);
2644 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp | RT2661_DISABLE_RX);
2646 rt2661_bbp_write(sc, 82, 0x20);
2647 rt2661_bbp_write(sc, 83, 0x00);
2648 rt2661_bbp_write(sc, 84, 0x40);
2650 /* save current BBP registers values */
2651 sc->bbp18 = rt2661_bbp_read(sc, 18);
2652 sc->bbp21 = rt2661_bbp_read(sc, 21);
2653 sc->bbp22 = rt2661_bbp_read(sc, 22);
2654 sc->bbp16 = rt2661_bbp_read(sc, 16);
2655 sc->bbp17 = rt2661_bbp_read(sc, 17);
2656 sc->bbp64 = rt2661_bbp_read(sc, 64);
2658 rt2661_bbp_write(sc, 18, 0xff);
2659 rt2661_bbp_write(sc, 21, 0x3f);
2660 rt2661_bbp_write(sc, 22, 0x3f);
2661 rt2661_bbp_write(sc, 16, 0xbd);
2662 rt2661_bbp_write(sc, 17, sc->ext_5ghz_lna ? 0x44 : 0x34);
2663 rt2661_bbp_write(sc, 64, 0x21);
2665 /* restore Rx filter */
2666 RAL_WRITE(sc, RT2661_TXRX_CSR0, tmp);
2670 rt2661_radar_stop(struct rt2661_softc *sc)
2674 /* read radar detection result */
2675 bbp66 = rt2661_bbp_read(sc, 66);
2677 /* restore BBP registers values */
2678 rt2661_bbp_write(sc, 16, sc->bbp16);
2679 rt2661_bbp_write(sc, 17, sc->bbp17);
2680 rt2661_bbp_write(sc, 18, sc->bbp18);
2681 rt2661_bbp_write(sc, 21, sc->bbp21);
2682 rt2661_bbp_write(sc, 22, sc->bbp22);
2683 rt2661_bbp_write(sc, 64, sc->bbp64);
2690 rt2661_prepare_beacon(struct rt2661_softc *sc, struct ieee80211vap *vap)
2692 struct ieee80211com *ic = vap->iv_ic;
2693 struct ieee80211_beacon_offsets bo;
2694 struct rt2661_tx_desc desc;
2698 m0 = ieee80211_beacon_alloc(vap->iv_bss, &bo);
2700 device_printf(sc->sc_dev, "could not allocate beacon frame\n");
2704 /* send beacons at the lowest available rate */
2705 rate = IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan) ? 12 : 2;
2707 rt2661_setup_tx_desc(sc, &desc, RT2661_TX_TIMESTAMP, RT2661_TX_HWSEQ,
2708 m0->m_pkthdr.len, rate, NULL, 0, RT2661_QID_MGT);
2710 /* copy the first 24 bytes of Tx descriptor into NIC memory */
2711 RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0, (uint8_t *)&desc, 24);
2713 /* copy beacon header and payload into NIC memory */
2714 RAL_WRITE_REGION_1(sc, RT2661_HW_BEACON_BASE0 + 24,
2715 mtod(m0, uint8_t *), m0->m_pkthdr.len);
2723 * Enable TSF synchronization and tell h/w to start sending beacons for IBSS
2724 * and HostAP operating modes.
2727 rt2661_enable_tsf_sync(struct rt2661_softc *sc)
2729 struct ifnet *ifp = sc->sc_ifp;
2730 struct ieee80211com *ic = ifp->if_l2com;
2731 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2734 if (vap->iv_opmode != IEEE80211_M_STA) {
2736 * Change default 16ms TBTT adjustment to 8ms.
2737 * Must be done before enabling beacon generation.
2739 RAL_WRITE(sc, RT2661_TXRX_CSR10, 1 << 12 | 8);
2742 tmp = RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000;
2744 /* set beacon interval (in 1/16ms unit) */
2745 tmp |= vap->iv_bss->ni_intval * 16;
2747 tmp |= RT2661_TSF_TICKING | RT2661_ENABLE_TBTT;
2748 if (vap->iv_opmode == IEEE80211_M_STA)
2749 tmp |= RT2661_TSF_MODE(1);
2751 tmp |= RT2661_TSF_MODE(2) | RT2661_GENERATE_BEACON;
2753 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp);
2757 rt2661_enable_tsf(struct rt2661_softc *sc)
2759 RAL_WRITE(sc, RT2661_TXRX_CSR9,
2760 (RAL_READ(sc, RT2661_TXRX_CSR9) & 0xff000000)
2761 | RT2661_TSF_TICKING | RT2661_TSF_MODE(2));
2765 * Retrieve the "Received Signal Strength Indicator" from the raw values
2766 * contained in Rx descriptors. The computation depends on which band the
2767 * frame was received. Correction values taken from the reference driver.
2770 rt2661_get_rssi(struct rt2661_softc *sc, uint8_t raw)
2774 lna = (raw >> 5) & 0x3;
2779 * No mapping available.
2781 * NB: Since RSSI is relative to noise floor, -1 is
2782 * adequate for caller to know error happened.
2787 rssi = (2 * agc) - RT2661_NOISE_FLOOR;
2789 if (IEEE80211_IS_CHAN_2GHZ(sc->sc_curchan)) {
2790 rssi += sc->rssi_2ghz_corr;
2799 rssi += sc->rssi_5ghz_corr;
2812 rt2661_scan_start(struct ieee80211com *ic)
2814 struct ifnet *ifp = ic->ic_ifp;
2815 struct rt2661_softc *sc = ifp->if_softc;
2818 /* abort TSF synchronization */
2819 tmp = RAL_READ(sc, RT2661_TXRX_CSR9);
2820 RAL_WRITE(sc, RT2661_TXRX_CSR9, tmp & ~0xffffff);
2821 rt2661_set_bssid(sc, ifp->if_broadcastaddr);
2825 rt2661_scan_end(struct ieee80211com *ic)
2827 struct ifnet *ifp = ic->ic_ifp;
2828 struct rt2661_softc *sc = ifp->if_softc;
2829 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2831 rt2661_enable_tsf_sync(sc);
2832 /* XXX keep local copy */
2833 rt2661_set_bssid(sc, vap->iv_bss->ni_bssid);
2837 rt2661_set_channel(struct ieee80211com *ic)
2839 struct ifnet *ifp = ic->ic_ifp;
2840 struct rt2661_softc *sc = ifp->if_softc;
2843 rt2661_set_chan(sc, ic->ic_curchan);