2 * Copyright (c) 2007-2010 Damien Bergamini <damien.bergamini@free.fr>
3 * Copyright (c) 2012 Bernhard Schmidt <bschmidt@FreeBSD.org>
5 * Permission to use, copy, modify, and distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
17 * $OpenBSD: rt2860.c,v 1.65 2010/10/23 14:24:54 damien Exp $
20 #include <sys/cdefs.h>
21 __FBSDID("$FreeBSD$");
24 * Ralink Technology RT2860/RT3090/RT3390/RT3562/RT5390/RT5392 chipset driver
25 * http://www.ralinktech.com/
28 #include <sys/param.h>
29 #include <sys/sysctl.h>
30 #include <sys/sockio.h>
32 #include <sys/kernel.h>
33 #include <sys/socket.h>
34 #include <sys/systm.h>
35 #include <sys/malloc.h>
37 #include <sys/mutex.h>
38 #include <sys/module.h>
40 #include <sys/endian.h>
41 #include <sys/firmware.h>
43 #include <machine/bus.h>
44 #include <machine/resource.h>
49 #include <net/if_var.h>
50 #include <net/if_arp.h>
51 #include <net/ethernet.h>
52 #include <net/if_dl.h>
53 #include <net/if_media.h>
54 #include <net/if_types.h>
56 #include <net80211/ieee80211_var.h>
57 #include <net80211/ieee80211_radiotap.h>
58 #include <net80211/ieee80211_regdomain.h>
59 #include <net80211/ieee80211_ratectl.h>
61 #include <netinet/in.h>
62 #include <netinet/in_systm.h>
63 #include <netinet/in_var.h>
64 #include <netinet/ip.h>
65 #include <netinet/if_ether.h>
67 #include <dev/ral/rt2860reg.h>
68 #include <dev/ral/rt2860var.h>
72 #define DPRINTF(x) do { if (sc->sc_debug > 0) printf x; } while (0)
73 #define DPRINTFN(n, x) do { if (sc->sc_debug >= (n)) printf x; } while (0)
76 #define DPRINTFN(n, x)
79 static struct ieee80211vap *rt2860_vap_create(struct ieee80211com *,
80 const char [IFNAMSIZ], int, enum ieee80211_opmode,
81 int, const uint8_t [IEEE80211_ADDR_LEN],
82 const uint8_t [IEEE80211_ADDR_LEN]);
83 static void rt2860_vap_delete(struct ieee80211vap *);
84 static void rt2860_dma_map_addr(void *, bus_dma_segment_t *, int, int);
85 static int rt2860_alloc_tx_ring(struct rt2860_softc *,
86 struct rt2860_tx_ring *);
87 static void rt2860_reset_tx_ring(struct rt2860_softc *,
88 struct rt2860_tx_ring *);
89 static void rt2860_free_tx_ring(struct rt2860_softc *,
90 struct rt2860_tx_ring *);
91 static int rt2860_alloc_tx_pool(struct rt2860_softc *);
92 static void rt2860_free_tx_pool(struct rt2860_softc *);
93 static int rt2860_alloc_rx_ring(struct rt2860_softc *,
94 struct rt2860_rx_ring *);
95 static void rt2860_reset_rx_ring(struct rt2860_softc *,
96 struct rt2860_rx_ring *);
97 static void rt2860_free_rx_ring(struct rt2860_softc *,
98 struct rt2860_rx_ring *);
99 static void rt2860_updatestats(struct rt2860_softc *);
100 static void rt2860_newassoc(struct ieee80211_node *, int);
101 static void rt2860_node_free(struct ieee80211_node *);
103 static int rt2860_ampdu_rx_start(struct ieee80211com *,
104 struct ieee80211_node *, uint8_t);
105 static void rt2860_ampdu_rx_stop(struct ieee80211com *,
106 struct ieee80211_node *, uint8_t);
108 static int rt2860_newstate(struct ieee80211vap *, enum ieee80211_state,
110 static uint16_t rt3090_efuse_read_2(struct rt2860_softc *, uint16_t);
111 static uint16_t rt2860_eeprom_read_2(struct rt2860_softc *, uint16_t);
112 static void rt2860_intr_coherent(struct rt2860_softc *);
113 static void rt2860_drain_stats_fifo(struct rt2860_softc *);
114 static void rt2860_tx_intr(struct rt2860_softc *, int);
115 static void rt2860_rx_intr(struct rt2860_softc *);
116 static void rt2860_tbtt_intr(struct rt2860_softc *);
117 static void rt2860_gp_intr(struct rt2860_softc *);
118 static int rt2860_tx(struct rt2860_softc *, struct mbuf *,
119 struct ieee80211_node *);
120 static int rt2860_raw_xmit(struct ieee80211_node *, struct mbuf *,
121 const struct ieee80211_bpf_params *);
122 static int rt2860_tx_raw(struct rt2860_softc *, struct mbuf *,
123 struct ieee80211_node *,
124 const struct ieee80211_bpf_params *params);
125 static int rt2860_transmit(struct ieee80211com *, struct mbuf *);
126 static void rt2860_start(struct rt2860_softc *);
127 static void rt2860_watchdog(void *);
128 static void rt2860_parent(struct ieee80211com *);
129 static void rt2860_mcu_bbp_write(struct rt2860_softc *, uint8_t, uint8_t);
130 static uint8_t rt2860_mcu_bbp_read(struct rt2860_softc *, uint8_t);
131 static void rt2860_rf_write(struct rt2860_softc *, uint8_t, uint32_t);
132 static uint8_t rt3090_rf_read(struct rt2860_softc *, uint8_t);
133 static void rt3090_rf_write(struct rt2860_softc *, uint8_t, uint8_t);
134 static int rt2860_mcu_cmd(struct rt2860_softc *, uint8_t, uint16_t, int);
135 static void rt2860_enable_mrr(struct rt2860_softc *);
136 static void rt2860_set_txpreamble(struct rt2860_softc *);
137 static void rt2860_set_basicrates(struct rt2860_softc *,
138 const struct ieee80211_rateset *);
139 static void rt2860_scan_start(struct ieee80211com *);
140 static void rt2860_scan_end(struct ieee80211com *);
141 static void rt2860_getradiocaps(struct ieee80211com *, int, int *,
142 struct ieee80211_channel[]);
143 static void rt2860_set_channel(struct ieee80211com *);
144 static void rt2860_select_chan_group(struct rt2860_softc *, int);
145 static void rt2860_set_chan(struct rt2860_softc *, u_int);
146 static void rt3090_set_chan(struct rt2860_softc *, u_int);
147 static void rt5390_set_chan(struct rt2860_softc *, u_int);
148 static int rt3090_rf_init(struct rt2860_softc *);
149 static void rt5390_rf_init(struct rt2860_softc *);
150 static void rt3090_rf_wakeup(struct rt2860_softc *);
151 static void rt5390_rf_wakeup(struct rt2860_softc *);
152 static int rt3090_filter_calib(struct rt2860_softc *, uint8_t, uint8_t,
154 static void rt3090_rf_setup(struct rt2860_softc *);
155 static void rt2860_set_leds(struct rt2860_softc *, uint16_t);
156 static void rt2860_set_gp_timer(struct rt2860_softc *, int);
157 static void rt2860_set_bssid(struct rt2860_softc *, const uint8_t *);
158 static void rt2860_set_macaddr(struct rt2860_softc *, const uint8_t *);
159 static void rt2860_update_promisc(struct ieee80211com *);
160 static void rt2860_updateslot(struct ieee80211com *);
161 static void rt2860_updateprot(struct rt2860_softc *);
162 static int rt2860_updateedca(struct ieee80211com *);
164 static int rt2860_set_key(struct ieee80211com *, struct ieee80211_node *,
165 struct ieee80211_key *);
166 static void rt2860_delete_key(struct ieee80211com *,
167 struct ieee80211_node *, struct ieee80211_key *);
169 static int8_t rt2860_rssi2dbm(struct rt2860_softc *, uint8_t, uint8_t);
170 static const char *rt2860_get_rf(uint16_t);
171 static int rt2860_read_eeprom(struct rt2860_softc *,
172 uint8_t macaddr[IEEE80211_ADDR_LEN]);
173 static int rt2860_bbp_init(struct rt2860_softc *);
174 static void rt5390_bbp_init(struct rt2860_softc *);
175 static int rt2860_txrx_enable(struct rt2860_softc *);
176 static void rt2860_init(void *);
177 static void rt2860_init_locked(struct rt2860_softc *);
178 static void rt2860_stop(void *);
179 static void rt2860_stop_locked(struct rt2860_softc *);
180 static int rt2860_load_microcode(struct rt2860_softc *);
182 static void rt2860_calib(struct rt2860_softc *);
184 static void rt3090_set_rx_antenna(struct rt2860_softc *, int);
185 static void rt2860_switch_chan(struct rt2860_softc *,
186 struct ieee80211_channel *);
187 static int rt2860_setup_beacon(struct rt2860_softc *,
188 struct ieee80211vap *);
189 static void rt2860_enable_tsf_sync(struct rt2860_softc *);
191 static const struct {
194 } rt2860_def_mac[] = {
198 static const struct {
201 } rt2860_def_bbp[] = {
203 }, rt5390_def_bbp[] = {
207 static const struct rfprog {
209 uint32_t r1, r2, r3, r4;
210 } rt2860_rf2850[] = {
220 static const struct {
223 } rt3090_def_rf[] = {
225 }, rt5390_def_rf[] = {
227 }, rt5392_def_rf[] = {
231 static const uint8_t rt2860_chan_5ghz[] =
232 { 36, 38, 40, 44, 46, 48, 52, 54, 56, 60, 62, 64, 100, 102, 104,
233 108, 110, 112, 116, 118, 120, 124, 126, 128, 132, 134, 136, 140,
234 149, 151, 153, 157, 159, 161, 165, 167, 169, 171, 173 };
237 rt2860_attach(device_t dev, int id)
239 struct rt2860_softc *sc = device_get_softc(dev);
240 struct ieee80211com *ic = &sc->sc_ic;
242 int error, ntries, qid;
247 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK,
248 MTX_DEF | MTX_RECURSE);
250 callout_init_mtx(&sc->watchdog_ch, &sc->sc_mtx, 0);
251 mbufq_init(&sc->sc_snd, ifqmaxlen);
253 /* wait for NIC to initialize */
254 for (ntries = 0; ntries < 100; ntries++) {
255 tmp = RAL_READ(sc, RT2860_ASIC_VER_ID);
256 if (tmp != 0 && tmp != 0xffffffff)
261 device_printf(sc->sc_dev,
262 "timeout waiting for NIC to initialize\n");
266 sc->mac_ver = tmp >> 16;
267 sc->mac_rev = tmp & 0xffff;
269 if (sc->mac_ver != 0x2860 &&
270 (id == 0x0681 || id == 0x0781 || id == 0x1059))
271 sc->sc_flags |= RT2860_ADVANCED_PS;
273 /* retrieve RF rev. no and various other things from EEPROM */
274 rt2860_read_eeprom(sc, ic->ic_macaddr);
275 device_printf(sc->sc_dev, "MAC/BBP RT%X (rev 0x%04X), "
276 "RF %s (MIMO %dT%dR), address %6D\n",
277 sc->mac_ver, sc->mac_rev, rt2860_get_rf(sc->rf_rev),
278 sc->ntxchains, sc->nrxchains, ic->ic_macaddr, ":");
281 * Allocate Tx (4 EDCAs + HCCA + Mgt) and Rx rings.
283 for (qid = 0; qid < 6; qid++) {
284 if ((error = rt2860_alloc_tx_ring(sc, &sc->txq[qid])) != 0) {
285 device_printf(sc->sc_dev,
286 "could not allocate Tx ring %d\n", qid);
291 if ((error = rt2860_alloc_rx_ring(sc, &sc->rxq)) != 0) {
292 device_printf(sc->sc_dev, "could not allocate Rx ring\n");
296 if ((error = rt2860_alloc_tx_pool(sc)) != 0) {
297 device_printf(sc->sc_dev, "could not allocate Tx pool\n");
301 /* mgmt ring is broken on RT2860C, use EDCA AC VO ring instead */
302 sc->mgtqid = (sc->mac_ver == 0x2860 && sc->mac_rev == 0x0100) ?
306 ic->ic_name = device_get_nameunit(dev);
307 ic->ic_opmode = IEEE80211_M_STA;
308 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
310 /* set device capabilities */
312 IEEE80211_C_STA /* station mode */
313 | IEEE80211_C_IBSS /* ibss, nee adhoc, mode */
314 | IEEE80211_C_HOSTAP /* hostap mode */
315 | IEEE80211_C_MONITOR /* monitor mode */
316 | IEEE80211_C_AHDEMO /* adhoc demo mode */
317 | IEEE80211_C_WDS /* 4-address traffic works */
318 | IEEE80211_C_MBSS /* mesh point link mode */
319 | IEEE80211_C_SHPREAMBLE /* short preamble supported */
320 | IEEE80211_C_SHSLOT /* short slot time supported */
321 | IEEE80211_C_WPA /* capable of WPA1+WPA2 */
323 | IEEE80211_C_BGSCAN /* capable of bg scanning */
325 | IEEE80211_C_WME /* 802.11e */
328 rt2860_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans,
331 ieee80211_ifattach(ic);
333 ic->ic_wme.wme_update = rt2860_updateedca;
334 ic->ic_scan_start = rt2860_scan_start;
335 ic->ic_scan_end = rt2860_scan_end;
336 ic->ic_getradiocaps = rt2860_getradiocaps;
337 ic->ic_set_channel = rt2860_set_channel;
338 ic->ic_updateslot = rt2860_updateslot;
339 ic->ic_update_promisc = rt2860_update_promisc;
340 ic->ic_raw_xmit = rt2860_raw_xmit;
341 sc->sc_node_free = ic->ic_node_free;
342 ic->ic_node_free = rt2860_node_free;
343 ic->ic_newassoc = rt2860_newassoc;
344 ic->ic_transmit = rt2860_transmit;
345 ic->ic_parent = rt2860_parent;
346 ic->ic_vap_create = rt2860_vap_create;
347 ic->ic_vap_delete = rt2860_vap_delete;
349 ieee80211_radiotap_attach(ic,
350 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap),
351 RT2860_TX_RADIOTAP_PRESENT,
352 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap),
353 RT2860_RX_RADIOTAP_PRESENT);
356 SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
357 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)), OID_AUTO,
358 "debug", CTLFLAG_RW, &sc->sc_debug, 0, "debug msgs");
361 ieee80211_announce(ic);
365 fail3: rt2860_free_rx_ring(sc, &sc->rxq);
366 fail2: while (--qid >= 0)
367 rt2860_free_tx_ring(sc, &sc->txq[qid]);
368 fail1: mtx_destroy(&sc->sc_mtx);
373 rt2860_detach(void *xsc)
375 struct rt2860_softc *sc = xsc;
376 struct ieee80211com *ic = &sc->sc_ic;
380 rt2860_stop_locked(sc);
383 ieee80211_ifdetach(ic);
384 mbufq_drain(&sc->sc_snd);
385 for (qid = 0; qid < 6; qid++)
386 rt2860_free_tx_ring(sc, &sc->txq[qid]);
387 rt2860_free_rx_ring(sc, &sc->rxq);
388 rt2860_free_tx_pool(sc);
390 mtx_destroy(&sc->sc_mtx);
396 rt2860_shutdown(void *xsc)
398 struct rt2860_softc *sc = xsc;
404 rt2860_suspend(void *xsc)
406 struct rt2860_softc *sc = xsc;
412 rt2860_resume(void *xsc)
414 struct rt2860_softc *sc = xsc;
416 if (sc->sc_ic.ic_nrunning > 0)
420 static struct ieee80211vap *
421 rt2860_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit,
422 enum ieee80211_opmode opmode, int flags,
423 const uint8_t bssid[IEEE80211_ADDR_LEN],
424 const uint8_t mac[IEEE80211_ADDR_LEN])
426 struct rt2860_softc *sc = ic->ic_softc;
427 struct rt2860_vap *rvp;
428 struct ieee80211vap *vap;
431 case IEEE80211_M_STA:
432 case IEEE80211_M_IBSS:
433 case IEEE80211_M_AHDEMO:
434 case IEEE80211_M_MONITOR:
435 case IEEE80211_M_HOSTAP:
436 case IEEE80211_M_MBSS:
438 if (!TAILQ_EMPTY(&ic->ic_vaps)) {
439 device_printf(sc->sc_dev, "only 1 vap supported\n");
442 if (opmode == IEEE80211_M_STA)
443 flags |= IEEE80211_CLONE_NOBEACONS;
445 case IEEE80211_M_WDS:
446 if (TAILQ_EMPTY(&ic->ic_vaps) ||
447 ic->ic_opmode != IEEE80211_M_HOSTAP) {
448 device_printf(sc->sc_dev,
449 "wds only supported in ap mode\n");
453 * Silently remove any request for a unique
454 * bssid; WDS vap's always share the local
457 flags &= ~IEEE80211_CLONE_BSSID;
460 device_printf(sc->sc_dev, "unknown opmode %d\n", opmode);
463 rvp = malloc(sizeof(struct rt2860_vap), M_80211_VAP, M_WAITOK | M_ZERO);
465 ieee80211_vap_setup(ic, vap, name, unit, opmode, flags, bssid);
467 /* override state transition machine */
468 rvp->ral_newstate = vap->iv_newstate;
469 vap->iv_newstate = rt2860_newstate;
471 vap->iv_update_beacon = rt2860_beacon_update;
474 /* HW supports up to 255 STAs (0-254) in HostAP and IBSS modes */
475 vap->iv_max_aid = min(IEEE80211_AID_MAX, RT2860_WCID_MAX);
477 ieee80211_ratectl_init(vap);
479 ieee80211_vap_attach(vap, ieee80211_media_change,
480 ieee80211_media_status, mac);
481 if (TAILQ_FIRST(&ic->ic_vaps) == vap)
482 ic->ic_opmode = opmode;
487 rt2860_vap_delete(struct ieee80211vap *vap)
489 struct rt2860_vap *rvp = RT2860_VAP(vap);
491 ieee80211_ratectl_deinit(vap);
492 ieee80211_vap_detach(vap);
493 free(rvp, M_80211_VAP);
497 rt2860_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error)
502 KASSERT(nseg == 1, ("too many DMA segments, %d should be 1", nseg));
504 *(bus_addr_t *)arg = segs[0].ds_addr;
508 rt2860_alloc_tx_ring(struct rt2860_softc *sc, struct rt2860_tx_ring *ring)
512 size = RT2860_TX_RING_COUNT * sizeof (struct rt2860_txd);
514 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 16, 0,
515 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
516 size, 1, size, 0, NULL, NULL, &ring->desc_dmat);
518 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
522 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->txd,
523 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map);
525 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
529 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->txd,
530 size, rt2860_dma_map_addr, &ring->paddr, 0);
532 device_printf(sc->sc_dev, "could not load desc DMA map\n");
536 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
540 fail: rt2860_free_tx_ring(sc, ring);
545 rt2860_reset_tx_ring(struct rt2860_softc *sc, struct rt2860_tx_ring *ring)
547 struct rt2860_tx_data *data;
550 for (i = 0; i < RT2860_TX_RING_COUNT; i++) {
551 if ((data = ring->data[i]) == NULL)
552 continue; /* nothing mapped in this slot */
554 if (data->m != NULL) {
555 bus_dmamap_sync(sc->txwi_dmat, data->map,
556 BUS_DMASYNC_POSTWRITE);
557 bus_dmamap_unload(sc->txwi_dmat, data->map);
561 if (data->ni != NULL) {
562 ieee80211_free_node(data->ni);
566 SLIST_INSERT_HEAD(&sc->data_pool, data, next);
567 ring->data[i] = NULL;
571 ring->cur = ring->next = 0;
575 rt2860_free_tx_ring(struct rt2860_softc *sc, struct rt2860_tx_ring *ring)
577 struct rt2860_tx_data *data;
580 if (ring->txd != NULL) {
581 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
582 BUS_DMASYNC_POSTWRITE);
583 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
584 bus_dmamem_free(ring->desc_dmat, ring->txd, ring->desc_map);
586 if (ring->desc_dmat != NULL)
587 bus_dma_tag_destroy(ring->desc_dmat);
589 for (i = 0; i < RT2860_TX_RING_COUNT; i++) {
590 if ((data = ring->data[i]) == NULL)
591 continue; /* nothing mapped in this slot */
593 if (data->m != NULL) {
594 bus_dmamap_sync(sc->txwi_dmat, data->map,
595 BUS_DMASYNC_POSTWRITE);
596 bus_dmamap_unload(sc->txwi_dmat, data->map);
599 if (data->ni != NULL)
600 ieee80211_free_node(data->ni);
602 SLIST_INSERT_HEAD(&sc->data_pool, data, next);
607 * Allocate a pool of TX Wireless Information blocks.
610 rt2860_alloc_tx_pool(struct rt2860_softc *sc)
616 size = RT2860_TX_POOL_COUNT * RT2860_TXWI_DMASZ;
618 /* init data_pool early in case of failure.. */
619 SLIST_INIT(&sc->data_pool);
621 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
622 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
623 size, 1, size, 0, NULL, NULL, &sc->txwi_dmat);
625 device_printf(sc->sc_dev, "could not create txwi DMA tag\n");
629 error = bus_dmamem_alloc(sc->txwi_dmat, (void **)&sc->txwi_vaddr,
630 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &sc->txwi_map);
632 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
636 error = bus_dmamap_load(sc->txwi_dmat, sc->txwi_map,
637 sc->txwi_vaddr, size, rt2860_dma_map_addr, &paddr, 0);
639 device_printf(sc->sc_dev, "could not load txwi DMA map\n");
643 bus_dmamap_sync(sc->txwi_dmat, sc->txwi_map, BUS_DMASYNC_PREWRITE);
645 vaddr = sc->txwi_vaddr;
646 for (i = 0; i < RT2860_TX_POOL_COUNT; i++) {
647 struct rt2860_tx_data *data = &sc->data[i];
649 error = bus_dmamap_create(sc->txwi_dmat, 0, &data->map);
651 device_printf(sc->sc_dev, "could not create DMA map\n");
654 data->txwi = (struct rt2860_txwi *)vaddr;
656 vaddr += RT2860_TXWI_DMASZ;
657 paddr += RT2860_TXWI_DMASZ;
659 SLIST_INSERT_HEAD(&sc->data_pool, data, next);
664 fail: rt2860_free_tx_pool(sc);
669 rt2860_free_tx_pool(struct rt2860_softc *sc)
671 if (sc->txwi_vaddr != NULL) {
672 bus_dmamap_sync(sc->txwi_dmat, sc->txwi_map,
673 BUS_DMASYNC_POSTWRITE);
674 bus_dmamap_unload(sc->txwi_dmat, sc->txwi_map);
675 bus_dmamem_free(sc->txwi_dmat, sc->txwi_vaddr, sc->txwi_map);
677 if (sc->txwi_dmat != NULL)
678 bus_dma_tag_destroy(sc->txwi_dmat);
680 while (!SLIST_EMPTY(&sc->data_pool)) {
681 struct rt2860_tx_data *data;
682 data = SLIST_FIRST(&sc->data_pool);
683 bus_dmamap_destroy(sc->txwi_dmat, data->map);
684 SLIST_REMOVE_HEAD(&sc->data_pool, next);
689 rt2860_alloc_rx_ring(struct rt2860_softc *sc, struct rt2860_rx_ring *ring)
694 size = RT2860_RX_RING_COUNT * sizeof (struct rt2860_rxd);
696 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 16, 0,
697 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL,
698 size, 1, size, 0, NULL, NULL, &ring->desc_dmat);
700 device_printf(sc->sc_dev, "could not create desc DMA tag\n");
704 error = bus_dmamem_alloc(ring->desc_dmat, (void **)&ring->rxd,
705 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &ring->desc_map);
707 device_printf(sc->sc_dev, "could not allocate DMA memory\n");
711 error = bus_dmamap_load(ring->desc_dmat, ring->desc_map, ring->rxd,
712 size, rt2860_dma_map_addr, &ring->paddr, 0);
714 device_printf(sc->sc_dev, "could not load desc DMA map\n");
718 error = bus_dma_tag_create(bus_get_dma_tag(sc->sc_dev), 1, 0,
719 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR, NULL, NULL, MCLBYTES,
720 1, MCLBYTES, 0, NULL, NULL, &ring->data_dmat);
722 device_printf(sc->sc_dev, "could not create data DMA tag\n");
726 for (i = 0; i < RT2860_RX_RING_COUNT; i++) {
727 struct rt2860_rx_data *data = &ring->data[i];
728 struct rt2860_rxd *rxd = &ring->rxd[i];
730 error = bus_dmamap_create(ring->data_dmat, 0, &data->map);
732 device_printf(sc->sc_dev, "could not create DMA map\n");
736 data->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
737 if (data->m == NULL) {
738 device_printf(sc->sc_dev,
739 "could not allocate rx mbuf\n");
744 error = bus_dmamap_load(ring->data_dmat, data->map,
745 mtod(data->m, void *), MCLBYTES, rt2860_dma_map_addr,
748 device_printf(sc->sc_dev,
749 "could not load rx buf DMA map");
753 rxd->sdp0 = htole32(physaddr);
754 rxd->sdl0 = htole16(MCLBYTES);
757 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
761 fail: rt2860_free_rx_ring(sc, ring);
766 rt2860_reset_rx_ring(struct rt2860_softc *sc, struct rt2860_rx_ring *ring)
770 for (i = 0; i < RT2860_RX_RING_COUNT; i++)
771 ring->rxd[i].sdl0 &= ~htole16(RT2860_RX_DDONE);
773 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
779 rt2860_free_rx_ring(struct rt2860_softc *sc, struct rt2860_rx_ring *ring)
783 if (ring->rxd != NULL) {
784 bus_dmamap_sync(ring->desc_dmat, ring->desc_map,
785 BUS_DMASYNC_POSTWRITE);
786 bus_dmamap_unload(ring->desc_dmat, ring->desc_map);
787 bus_dmamem_free(ring->desc_dmat, ring->rxd, ring->desc_map);
789 if (ring->desc_dmat != NULL)
790 bus_dma_tag_destroy(ring->desc_dmat);
792 for (i = 0; i < RT2860_RX_RING_COUNT; i++) {
793 struct rt2860_rx_data *data = &ring->data[i];
795 if (data->m != NULL) {
796 bus_dmamap_sync(ring->data_dmat, data->map,
797 BUS_DMASYNC_POSTREAD);
798 bus_dmamap_unload(ring->data_dmat, data->map);
801 if (data->map != NULL)
802 bus_dmamap_destroy(ring->data_dmat, data->map);
804 if (ring->data_dmat != NULL)
805 bus_dma_tag_destroy(ring->data_dmat);
809 rt2860_updatestats(struct rt2860_softc *sc)
811 struct ieee80211com *ic = &sc->sc_ic;
814 * In IBSS or HostAP modes (when the hardware sends beacons), the
815 * MAC can run into a livelock and start sending CTS-to-self frames
816 * like crazy if protection is enabled. Fortunately, we can detect
817 * when such a situation occurs and reset the MAC.
819 if (ic->ic_curmode != IEEE80211_M_STA) {
820 /* check if we're in a livelock situation.. */
821 uint32_t tmp = RAL_READ(sc, RT2860_DEBUG);
822 if ((tmp & (1 << 29)) && (tmp & (1 << 7 | 1 << 5))) {
823 /* ..and reset MAC/BBP for a while.. */
824 DPRINTF(("CTS-to-self livelock detected\n"));
825 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, RT2860_MAC_SRST);
826 RAL_BARRIER_WRITE(sc);
828 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL,
829 RT2860_MAC_RX_EN | RT2860_MAC_TX_EN);
835 rt2860_newassoc(struct ieee80211_node *ni, int isnew)
837 struct ieee80211com *ic = ni->ni_ic;
838 struct rt2860_softc *sc = ic->ic_softc;
841 wcid = IEEE80211_AID(ni->ni_associd);
842 if (isnew && ni->ni_associd != 0) {
843 sc->wcid2ni[wcid] = ni;
845 /* init WCID table entry */
846 RAL_WRITE_REGION_1(sc, RT2860_WCID_ENTRY(wcid),
847 ni->ni_macaddr, IEEE80211_ADDR_LEN);
849 DPRINTF(("new assoc isnew=%d addr=%s WCID=%d\n",
850 isnew, ether_sprintf(ni->ni_macaddr), wcid));
854 rt2860_node_free(struct ieee80211_node *ni)
856 struct ieee80211com *ic = ni->ni_ic;
857 struct rt2860_softc *sc = ic->ic_softc;
860 if (ni->ni_associd != 0) {
861 wcid = IEEE80211_AID(ni->ni_associd);
863 /* clear Rx WCID search table entry */
864 RAL_SET_REGION_4(sc, RT2860_WCID_ENTRY(wcid), 0, 2);
866 sc->sc_node_free(ni);
871 rt2860_ampdu_rx_start(struct ieee80211com *ic, struct ieee80211_node *ni,
874 struct rt2860_softc *sc = ic->ic_softc;
875 uint8_t wcid = ((struct rt2860_node *)ni)->wcid;
878 /* update BA session mask */
879 tmp = RAL_READ(sc, RT2860_WCID_ENTRY(wcid) + 4);
880 tmp |= (1 << tid) << 16;
881 RAL_WRITE(sc, RT2860_WCID_ENTRY(wcid) + 4, tmp);
886 rt2860_ampdu_rx_stop(struct ieee80211com *ic, struct ieee80211_node *ni,
889 struct rt2860_softc *sc = ic->ic_softc;
890 uint8_t wcid = ((struct rt2860_node *)ni)->wcid;
893 /* update BA session mask */
894 tmp = RAL_READ(sc, RT2860_WCID_ENTRY(wcid) + 4);
895 tmp &= ~((1 << tid) << 16);
896 RAL_WRITE(sc, RT2860_WCID_ENTRY(wcid) + 4, tmp);
901 rt2860_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg)
903 struct rt2860_vap *rvp = RT2860_VAP(vap);
904 struct ieee80211com *ic = vap->iv_ic;
905 struct rt2860_softc *sc = ic->ic_softc;
909 if (vap->iv_state == IEEE80211_S_RUN) {
910 /* turn link LED off */
911 rt2860_set_leds(sc, RT2860_LED_RADIO);
914 if (nstate == IEEE80211_S_INIT && vap->iv_state == IEEE80211_S_RUN) {
915 /* abort TSF synchronization */
916 tmp = RAL_READ(sc, RT2860_BCN_TIME_CFG);
917 RAL_WRITE(sc, RT2860_BCN_TIME_CFG,
918 tmp & ~(RT2860_BCN_TX_EN | RT2860_TSF_TIMER_EN |
919 RT2860_TBTT_TIMER_EN));
922 rt2860_set_gp_timer(sc, 0);
924 error = rvp->ral_newstate(vap, nstate, arg);
928 if (nstate == IEEE80211_S_RUN) {
929 struct ieee80211_node *ni = vap->iv_bss;
931 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
932 rt2860_enable_mrr(sc);
933 rt2860_set_txpreamble(sc);
934 rt2860_set_basicrates(sc, &ni->ni_rates);
935 rt2860_set_bssid(sc, ni->ni_bssid);
938 if (vap->iv_opmode == IEEE80211_M_HOSTAP ||
939 vap->iv_opmode == IEEE80211_M_IBSS ||
940 vap->iv_opmode == IEEE80211_M_MBSS) {
941 error = rt2860_setup_beacon(sc, vap);
946 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
947 rt2860_enable_tsf_sync(sc);
948 rt2860_set_gp_timer(sc, 500);
951 /* turn link LED on */
952 rt2860_set_leds(sc, RT2860_LED_RADIO |
953 (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan) ?
954 RT2860_LED_LINK_2GHZ : RT2860_LED_LINK_5GHZ));
959 /* Read 16-bit from eFUSE ROM (>=RT3071 only.) */
961 rt3090_efuse_read_2(struct rt2860_softc *sc, uint16_t addr)
969 * Read one 16-byte block into registers EFUSE_DATA[0-3]:
975 tmp = RAL_READ(sc, RT3070_EFUSE_CTRL);
976 tmp &= ~(RT3070_EFSROM_MODE_MASK | RT3070_EFSROM_AIN_MASK);
977 tmp |= (addr & ~0xf) << RT3070_EFSROM_AIN_SHIFT | RT3070_EFSROM_KICK;
978 RAL_WRITE(sc, RT3070_EFUSE_CTRL, tmp);
979 for (ntries = 0; ntries < 500; ntries++) {
980 tmp = RAL_READ(sc, RT3070_EFUSE_CTRL);
981 if (!(tmp & RT3070_EFSROM_KICK))
988 if ((tmp & RT3070_EFUSE_AOUT_MASK) == RT3070_EFUSE_AOUT_MASK)
989 return 0xffff; /* address not found */
991 /* determine to which 32-bit register our 16-bit word belongs */
992 reg = RT3070_EFUSE_DATA3 - (addr & 0xc);
993 tmp = RAL_READ(sc, reg);
995 return (addr & 2) ? tmp >> 16 : tmp & 0xffff;
999 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46,
1003 rt2860_eeprom_read_2(struct rt2860_softc *sc, uint16_t addr)
1009 /* clock C once before the first command */
1010 RT2860_EEPROM_CTL(sc, 0);
1012 RT2860_EEPROM_CTL(sc, RT2860_S);
1013 RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_C);
1014 RT2860_EEPROM_CTL(sc, RT2860_S);
1016 /* write start bit (1) */
1017 RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_D);
1018 RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_D | RT2860_C);
1020 /* write READ opcode (10) */
1021 RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_D);
1022 RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_D | RT2860_C);
1023 RT2860_EEPROM_CTL(sc, RT2860_S);
1024 RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_C);
1026 /* write address (A5-A0 or A7-A0) */
1027 n = ((RAL_READ(sc, RT2860_PCI_EECTRL) & 0x30) == 0) ? 5 : 7;
1028 for (; n >= 0; n--) {
1029 RT2860_EEPROM_CTL(sc, RT2860_S |
1030 (((addr >> n) & 1) << RT2860_SHIFT_D));
1031 RT2860_EEPROM_CTL(sc, RT2860_S |
1032 (((addr >> n) & 1) << RT2860_SHIFT_D) | RT2860_C);
1035 RT2860_EEPROM_CTL(sc, RT2860_S);
1037 /* read data Q15-Q0 */
1039 for (n = 15; n >= 0; n--) {
1040 RT2860_EEPROM_CTL(sc, RT2860_S | RT2860_C);
1041 tmp = RAL_READ(sc, RT2860_PCI_EECTRL);
1042 val |= ((tmp & RT2860_Q) >> RT2860_SHIFT_Q) << n;
1043 RT2860_EEPROM_CTL(sc, RT2860_S);
1046 RT2860_EEPROM_CTL(sc, 0);
1048 /* clear Chip Select and clock C */
1049 RT2860_EEPROM_CTL(sc, RT2860_S);
1050 RT2860_EEPROM_CTL(sc, 0);
1051 RT2860_EEPROM_CTL(sc, RT2860_C);
1056 static __inline uint16_t
1057 rt2860_srom_read(struct rt2860_softc *sc, uint8_t addr)
1059 /* either eFUSE ROM or EEPROM */
1060 return sc->sc_srom_read(sc, addr);
1064 rt2860_intr_coherent(struct rt2860_softc *sc)
1068 /* DMA finds data coherent event when checking the DDONE bit */
1070 DPRINTF(("Tx/Rx Coherent interrupt\n"));
1072 /* restart DMA engine */
1073 tmp = RAL_READ(sc, RT2860_WPDMA_GLO_CFG);
1074 tmp &= ~(RT2860_TX_WB_DDONE | RT2860_RX_DMA_EN | RT2860_TX_DMA_EN);
1075 RAL_WRITE(sc, RT2860_WPDMA_GLO_CFG, tmp);
1077 (void)rt2860_txrx_enable(sc);
1081 rt2860_drain_stats_fifo(struct rt2860_softc *sc)
1083 struct ieee80211_ratectl_tx_status *txs = &sc->sc_txs;
1084 struct ieee80211_node *ni;
1086 uint8_t wcid, mcs, pid;
1088 /* drain Tx status FIFO (maxsize = 16) */
1089 txs->flags = IEEE80211_RATECTL_STATUS_LONG_RETRY;
1090 while ((stat = RAL_READ(sc, RT2860_TX_STAT_FIFO)) & RT2860_TXQ_VLD) {
1091 DPRINTFN(4, ("tx stat 0x%08x\n", stat));
1093 wcid = (stat >> RT2860_TXQ_WCID_SHIFT) & 0xff;
1094 if (wcid > RT2860_WCID_MAX)
1096 ni = sc->wcid2ni[wcid];
1098 /* if no ACK was requested, no feedback is available */
1099 if (!(stat & RT2860_TXQ_ACKREQ) || ni == NULL)
1102 /* update per-STA AMRR stats */
1103 if (stat & RT2860_TXQ_OK) {
1105 * Check if there were retries, ie if the Tx success
1106 * rate is different from the requested rate. Note
1107 * that it works only because we do not allow rate
1108 * fallback from OFDM to CCK.
1110 mcs = (stat >> RT2860_TXQ_MCS_SHIFT) & 0x7f;
1111 pid = (stat >> RT2860_TXQ_PID_SHIFT) & 0xf;
1113 txs->long_retries = 1;
1115 txs->long_retries = 0;
1116 txs->status = IEEE80211_RATECTL_TX_SUCCESS;
1117 ieee80211_ratectl_tx_complete(ni, txs);
1119 txs->status = IEEE80211_RATECTL_TX_FAIL_UNSPECIFIED;
1120 txs->long_retries = 1; /* XXX */
1121 ieee80211_ratectl_tx_complete(ni, txs);
1122 if_inc_counter(ni->ni_vap->iv_ifp,
1123 IFCOUNTER_OERRORS, 1);
1129 rt2860_tx_intr(struct rt2860_softc *sc, int qid)
1131 struct rt2860_tx_ring *ring = &sc->txq[qid];
1134 rt2860_drain_stats_fifo(sc);
1136 hw = RAL_READ(sc, RT2860_TX_DTX_IDX(qid));
1137 while (ring->next != hw) {
1138 struct rt2860_tx_data *data = ring->data[ring->next];
1141 bus_dmamap_sync(sc->txwi_dmat, data->map,
1142 BUS_DMASYNC_POSTWRITE);
1143 bus_dmamap_unload(sc->txwi_dmat, data->map);
1144 ieee80211_tx_complete(data->ni, data->m, 0);
1147 SLIST_INSERT_HEAD(&sc->data_pool, data, next);
1148 ring->data[ring->next] = NULL;
1151 ring->next = (ring->next + 1) % RT2860_TX_RING_COUNT;
1154 sc->sc_tx_timer = 0;
1155 if (ring->queued < RT2860_TX_RING_COUNT)
1156 sc->qfullmsk &= ~(1 << qid);
1161 * Return the Rx chain with the highest RSSI for a given frame.
1163 static __inline uint8_t
1164 rt2860_maxrssi_chain(struct rt2860_softc *sc, const struct rt2860_rxwi *rxwi)
1166 uint8_t rxchain = 0;
1168 if (sc->nrxchains > 1) {
1169 if (rxwi->rssi[1] > rxwi->rssi[rxchain])
1171 if (sc->nrxchains > 2)
1172 if (rxwi->rssi[2] > rxwi->rssi[rxchain])
1179 rt2860_rx_intr(struct rt2860_softc *sc)
1181 struct epoch_tracker et;
1182 struct rt2860_rx_radiotap_header *tap;
1183 struct ieee80211com *ic = &sc->sc_ic;
1184 struct ieee80211_frame *wh;
1185 struct ieee80211_node *ni;
1186 struct mbuf *m, *m1;
1187 bus_addr_t physaddr;
1194 hw = RAL_READ(sc, RT2860_FS_DRX_IDX) & 0xfff;
1195 while (sc->rxq.cur != hw) {
1196 struct rt2860_rx_data *data = &sc->rxq.data[sc->rxq.cur];
1197 struct rt2860_rxd *rxd = &sc->rxq.rxd[sc->rxq.cur];
1198 struct rt2860_rxwi *rxwi;
1200 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1201 BUS_DMASYNC_POSTREAD);
1203 if (__predict_false(!(rxd->sdl0 & htole16(RT2860_RX_DDONE)))) {
1204 DPRINTF(("RXD DDONE bit not set!\n"));
1205 break; /* should not happen */
1208 if (__predict_false(rxd->flags &
1209 htole32(RT2860_RX_CRCERR | RT2860_RX_ICVERR))) {
1210 counter_u64_add(ic->ic_ierrors, 1);
1215 if (__predict_false(rxd->flags & htole32(RT2860_RX_MICERR))) {
1216 /* report MIC failures to net80211 for TKIP */
1217 ic->ic_stats.is_rx_locmicfail++;
1218 ieee80211_michael_mic_failure(ic, 0/* XXX */);
1219 counter_u64_add(ic->ic_ierrors, 1);
1224 m1 = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR);
1225 if (__predict_false(m1 == NULL)) {
1226 counter_u64_add(ic->ic_ierrors, 1);
1230 bus_dmamap_sync(sc->rxq.data_dmat, data->map,
1231 BUS_DMASYNC_POSTREAD);
1232 bus_dmamap_unload(sc->rxq.data_dmat, data->map);
1234 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1235 mtod(m1, void *), MCLBYTES, rt2860_dma_map_addr,
1237 if (__predict_false(error != 0)) {
1240 /* try to reload the old mbuf */
1241 error = bus_dmamap_load(sc->rxq.data_dmat, data->map,
1242 mtod(data->m, void *), MCLBYTES,
1243 rt2860_dma_map_addr, &physaddr, 0);
1244 if (__predict_false(error != 0)) {
1245 panic("%s: could not load old rx mbuf",
1246 device_get_name(sc->sc_dev));
1248 /* physical address may have changed */
1249 rxd->sdp0 = htole32(physaddr);
1250 counter_u64_add(ic->ic_ierrors, 1);
1255 * New mbuf successfully loaded, update Rx ring and continue
1260 rxd->sdp0 = htole32(physaddr);
1262 rxwi = mtod(m, struct rt2860_rxwi *);
1265 m->m_data = (caddr_t)(rxwi + 1);
1266 m->m_pkthdr.len = m->m_len = le16toh(rxwi->len) & 0xfff;
1268 wh = mtod(m, struct ieee80211_frame *);
1270 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
1271 /* frame is decrypted by hardware */
1272 wh->i_fc[1] &= ~IEEE80211_FC1_PROTECTED;
1276 /* HW may insert 2 padding bytes after 802.11 header */
1277 if (rxd->flags & htole32(RT2860_RX_L2PAD)) {
1278 u_int hdrlen = ieee80211_hdrsize(wh);
1279 ovbcopy(wh, (caddr_t)wh + 2, hdrlen);
1281 wh = mtod(m, struct ieee80211_frame *);
1284 ant = rt2860_maxrssi_chain(sc, rxwi);
1285 rssi = rt2860_rssi2dbm(sc, rxwi->rssi[ant], ant);
1286 nf = RT2860_NOISE_FLOOR;
1288 if (ieee80211_radiotap_active(ic)) {
1289 tap = &sc->sc_rxtap;
1291 tap->wr_antenna = ant;
1292 tap->wr_antsignal = nf + rssi;
1293 tap->wr_antnoise = nf;
1294 /* in case it can't be found below */
1296 phy = le16toh(rxwi->phy);
1297 switch (phy & RT2860_PHY_MODE) {
1298 case RT2860_PHY_CCK:
1299 switch ((phy & RT2860_PHY_MCS) & ~RT2860_PHY_SHPRE) {
1300 case 0: tap->wr_rate = 2; break;
1301 case 1: tap->wr_rate = 4; break;
1302 case 2: tap->wr_rate = 11; break;
1303 case 3: tap->wr_rate = 22; break;
1305 if (phy & RT2860_PHY_SHPRE)
1306 tap->wr_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
1308 case RT2860_PHY_OFDM:
1309 switch (phy & RT2860_PHY_MCS) {
1310 case 0: tap->wr_rate = 12; break;
1311 case 1: tap->wr_rate = 18; break;
1312 case 2: tap->wr_rate = 24; break;
1313 case 3: tap->wr_rate = 36; break;
1314 case 4: tap->wr_rate = 48; break;
1315 case 5: tap->wr_rate = 72; break;
1316 case 6: tap->wr_rate = 96; break;
1317 case 7: tap->wr_rate = 108; break;
1324 wh = mtod(m, struct ieee80211_frame *);
1326 /* send the frame to the 802.11 layer */
1327 ni = ieee80211_find_rxnode(ic,
1328 (struct ieee80211_frame_min *)wh);
1329 NET_EPOCH_ENTER(et);
1331 (void)ieee80211_input(ni, m, rssi - nf, nf);
1332 ieee80211_free_node(ni);
1334 (void)ieee80211_input_all(ic, m, rssi - nf, nf);
1339 skip: rxd->sdl0 &= ~htole16(RT2860_RX_DDONE);
1341 bus_dmamap_sync(sc->rxq.desc_dmat, sc->rxq.desc_map,
1342 BUS_DMASYNC_PREWRITE);
1344 sc->rxq.cur = (sc->rxq.cur + 1) % RT2860_RX_RING_COUNT;
1347 /* tell HW what we have processed */
1348 RAL_WRITE(sc, RT2860_RX_CALC_IDX,
1349 (sc->rxq.cur - 1) % RT2860_RX_RING_COUNT);
1353 rt2860_tbtt_intr(struct rt2860_softc *sc)
1356 struct ieee80211com *ic = &sc->sc_ic;
1358 #ifndef IEEE80211_STA_ONLY
1359 if (ic->ic_opmode == IEEE80211_M_HOSTAP) {
1360 /* one less beacon until next DTIM */
1361 if (ic->ic_dtim_count == 0)
1362 ic->ic_dtim_count = ic->ic_dtim_period - 1;
1364 ic->ic_dtim_count--;
1366 /* update dynamic parts of beacon */
1367 rt2860_setup_beacon(sc);
1369 /* flush buffered multicast frames */
1370 if (ic->ic_dtim_count == 0)
1371 ieee80211_notify_dtim(ic);
1374 /* check if protection mode has changed */
1375 if ((sc->sc_ic_flags ^ ic->ic_flags) & IEEE80211_F_USEPROT) {
1376 rt2860_updateprot(sc);
1377 sc->sc_ic_flags = ic->ic_flags;
1383 rt2860_gp_intr(struct rt2860_softc *sc)
1385 struct ieee80211com *ic = &sc->sc_ic;
1386 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
1388 DPRINTFN(2, ("GP timeout state=%d\n", vap->iv_state));
1390 if (vap->iv_state == IEEE80211_S_RUN)
1391 rt2860_updatestats(sc);
1395 rt2860_intr(void *arg)
1397 struct rt2860_softc *sc = arg;
1402 r = RAL_READ(sc, RT2860_INT_STATUS);
1403 if (__predict_false(r == 0xffffffff)) {
1405 return; /* device likely went away */
1409 return; /* not for us */
1412 /* acknowledge interrupts */
1413 RAL_WRITE(sc, RT2860_INT_STATUS, r);
1415 if (r & RT2860_TX_RX_COHERENT)
1416 rt2860_intr_coherent(sc);
1418 if (r & RT2860_MAC_INT_2) /* TX status */
1419 rt2860_drain_stats_fifo(sc);
1421 if (r & RT2860_TX_DONE_INT5)
1422 rt2860_tx_intr(sc, 5);
1424 if (r & RT2860_RX_DONE_INT)
1427 if (r & RT2860_TX_DONE_INT4)
1428 rt2860_tx_intr(sc, 4);
1430 if (r & RT2860_TX_DONE_INT3)
1431 rt2860_tx_intr(sc, 3);
1433 if (r & RT2860_TX_DONE_INT2)
1434 rt2860_tx_intr(sc, 2);
1436 if (r & RT2860_TX_DONE_INT1)
1437 rt2860_tx_intr(sc, 1);
1439 if (r & RT2860_TX_DONE_INT0)
1440 rt2860_tx_intr(sc, 0);
1442 if (r & RT2860_MAC_INT_0) /* TBTT */
1443 rt2860_tbtt_intr(sc);
1445 if (r & RT2860_MAC_INT_3) /* Auto wakeup */
1448 if (r & RT2860_MAC_INT_4) /* GP timer */
1455 rt2860_tx(struct rt2860_softc *sc, struct mbuf *m, struct ieee80211_node *ni)
1457 struct ieee80211com *ic = &sc->sc_ic;
1458 struct ieee80211vap *vap = ni->ni_vap;
1459 struct rt2860_tx_ring *ring;
1460 struct rt2860_tx_data *data;
1461 struct rt2860_txd *txd;
1462 struct rt2860_txwi *txwi;
1463 struct ieee80211_frame *wh;
1464 const struct ieee80211_txparam *tp = ni->ni_txparms;
1465 struct ieee80211_key *k;
1467 bus_dma_segment_t segs[RT2860_MAX_SCATTER];
1468 bus_dma_segment_t *seg;
1471 uint8_t type, qsel, mcs, pid, qid;
1472 int i, nsegs, ntxds, pad, rate, ridx, error;
1474 /* the data pool contains at least one element, pick the first */
1475 data = SLIST_FIRST(&sc->data_pool);
1477 wh = mtod(m, struct ieee80211_frame *);
1479 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) {
1480 k = ieee80211_crypto_encap(ni, m);
1486 /* packet header may have moved, reset our local pointer */
1487 wh = mtod(m, struct ieee80211_frame *);
1490 hdrlen = ieee80211_anyhdrsize(wh);
1491 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
1493 if (m->m_flags & M_EAPOL) {
1494 rate = tp->mgmtrate;
1495 } else if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1496 rate = tp->mcastrate;
1497 } else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) {
1498 rate = tp->ucastrate;
1500 (void) ieee80211_ratectl_rate(ni, NULL, 0);
1501 rate = ni->ni_txrate;
1503 rate &= IEEE80211_RATE_VAL;
1505 qid = M_WME_GETAC(m);
1506 if (IEEE80211_QOS_HAS_SEQ(wh)) {
1507 qos = ((const struct ieee80211_qosframe *)wh)->i_qos[0];
1511 ring = &sc->txq[qid];
1512 ridx = ieee80211_legacy_rate_lookup(ic->ic_rt, rate);
1514 /* get MCS code from rate index */
1515 mcs = rt2860_rates[ridx].mcs;
1517 /* setup TX Wireless Information */
1520 /* let HW generate seq numbers for non-QoS frames */
1521 txwi->xflags = qos ? 0 : RT2860_TX_NSEQ;
1522 if (type == IEEE80211_FC0_TYPE_DATA)
1523 txwi->wcid = IEEE80211_AID(ni->ni_associd);
1526 txwi->len = htole16(m->m_pkthdr.len);
1527 if (rt2860_rates[ridx].phy == IEEE80211_T_DS) {
1528 txwi->phy = htole16(RT2860_PHY_CCK);
1529 if (ridx != RT2860_RIDX_CCK1 &&
1530 (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1531 mcs |= RT2860_PHY_SHPRE;
1533 txwi->phy = htole16(RT2860_PHY_OFDM);
1534 txwi->phy |= htole16(mcs);
1537 * We store the MCS code into the driver-private PacketID field.
1538 * The PacketID is latched into TX_STAT_FIFO when Tx completes so
1539 * that we know at which initial rate the frame was transmitted.
1540 * We add 1 to the MCS code because setting the PacketID field to
1541 * 0 means that we don't want feedback in TX_STAT_FIFO.
1543 pid = (mcs + 1) & 0xf;
1544 txwi->len |= htole16(pid << RT2860_TX_PID_SHIFT);
1546 /* check if RTS/CTS or CTS-to-self protection is required */
1547 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) &&
1548 (m->m_pkthdr.len + IEEE80211_CRC_LEN > vap->iv_rtsthreshold ||
1549 ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1550 rt2860_rates[ridx].phy == IEEE80211_T_OFDM)))
1551 txwi->txop = RT2860_TX_TXOP_HT;
1553 txwi->txop = RT2860_TX_TXOP_BACKOFF;
1555 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) &&
1556 (!qos || (qos & IEEE80211_QOS_ACKPOLICY) !=
1557 IEEE80211_QOS_ACKPOLICY_NOACK)) {
1558 txwi->xflags |= RT2860_TX_ACK;
1560 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
1561 dur = rt2860_rates[ridx].sp_ack_dur;
1563 dur = rt2860_rates[ridx].lp_ack_dur;
1564 *(uint16_t *)wh->i_dur = htole16(dur);
1566 /* ask MAC to insert timestamp into probe responses */
1568 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
1569 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
1570 /* NOTE: beacons do not pass through tx_data() */
1571 txwi->flags |= RT2860_TX_TS;
1573 if (ieee80211_radiotap_active_vap(vap)) {
1574 struct rt2860_tx_radiotap_header *tap = &sc->sc_txtap;
1577 tap->wt_rate = rate;
1578 if (mcs & RT2860_PHY_SHPRE)
1579 tap->wt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
1581 ieee80211_radiotap_tx(vap, m);
1584 pad = (hdrlen + 3) & ~3;
1586 /* copy and trim 802.11 header */
1587 memcpy(txwi + 1, wh, hdrlen);
1590 error = bus_dmamap_load_mbuf_sg(sc->txwi_dmat, data->map, m, segs,
1592 if (__predict_false(error != 0 && error != EFBIG)) {
1593 device_printf(sc->sc_dev, "can't map mbuf (error %d)\n",
1598 if (__predict_true(error == 0)) {
1599 /* determine how many TXDs are required */
1600 ntxds = 1 + (nsegs / 2);
1602 if (ring->queued + ntxds >= RT2860_TX_RING_COUNT) {
1603 /* not enough free TXDs, force mbuf defrag */
1604 bus_dmamap_unload(sc->txwi_dmat, data->map);
1608 if (__predict_false(error != 0)) {
1609 m1 = m_defrag(m, M_NOWAIT);
1611 device_printf(sc->sc_dev,
1612 "could not defragment mbuf\n");
1618 error = bus_dmamap_load_mbuf_sg(sc->txwi_dmat, data->map, m,
1620 if (__predict_false(error != 0)) {
1621 device_printf(sc->sc_dev, "can't map mbuf (error %d)\n",
1627 /* determine how many TXDs are now required */
1628 ntxds = 1 + (nsegs / 2);
1630 if (ring->queued + ntxds >= RT2860_TX_RING_COUNT) {
1631 /* this is a hopeless case, drop the mbuf! */
1632 bus_dmamap_unload(sc->txwi_dmat, data->map);
1638 qsel = (qid < WME_NUM_AC) ? RT2860_TX_QSEL_EDCA : RT2860_TX_QSEL_MGMT;
1640 /* first segment is TXWI + 802.11 header */
1641 txd = &ring->txd[ring->cur];
1642 txd->sdp0 = htole32(data->paddr);
1643 txd->sdl0 = htole16(sizeof (struct rt2860_txwi) + pad);
1646 /* setup payload segments */
1648 for (i = nsegs; i >= 2; i -= 2) {
1649 txd->sdp1 = htole32(seg->ds_addr);
1650 txd->sdl1 = htole16(seg->ds_len);
1652 ring->cur = (ring->cur + 1) % RT2860_TX_RING_COUNT;
1653 /* grab a new Tx descriptor */
1654 txd = &ring->txd[ring->cur];
1655 txd->sdp0 = htole32(seg->ds_addr);
1656 txd->sdl0 = htole16(seg->ds_len);
1660 /* finalize last segment */
1662 txd->sdp1 = htole32(seg->ds_addr);
1663 txd->sdl1 = htole16(seg->ds_len | RT2860_TX_LS1);
1665 txd->sdl0 |= htole16(RT2860_TX_LS0);
1669 /* remove from the free pool and link it into the SW Tx slot */
1670 SLIST_REMOVE_HEAD(&sc->data_pool, next);
1673 ring->data[ring->cur] = data;
1675 bus_dmamap_sync(sc->txwi_dmat, sc->txwi_map, BUS_DMASYNC_PREWRITE);
1676 bus_dmamap_sync(sc->txwi_dmat, data->map, BUS_DMASYNC_PREWRITE);
1677 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
1679 DPRINTFN(4, ("sending frame qid=%d wcid=%d nsegs=%d ridx=%d\n",
1680 qid, txwi->wcid, nsegs, ridx));
1682 ring->cur = (ring->cur + 1) % RT2860_TX_RING_COUNT;
1683 ring->queued += ntxds;
1684 if (ring->queued >= RT2860_TX_RING_COUNT)
1685 sc->qfullmsk |= 1 << qid;
1688 RAL_WRITE(sc, RT2860_TX_CTX_IDX(qid), ring->cur);
1694 rt2860_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
1695 const struct ieee80211_bpf_params *params)
1697 struct ieee80211com *ic = ni->ni_ic;
1698 struct rt2860_softc *sc = ic->ic_softc;
1703 /* prevent management frames from being sent if we're not ready */
1704 if (!(sc->sc_flags & RT2860_RUNNING)) {
1709 if (params == NULL) {
1711 * Legacy path; interpret frame contents to decide
1712 * precisely how to send the frame.
1714 error = rt2860_tx(sc, m, ni);
1717 * Caller supplied explicit parameters to use in
1718 * sending the frame.
1720 error = rt2860_tx_raw(sc, m, ni, params);
1722 sc->sc_tx_timer = 5;
1728 rt2860_tx_raw(struct rt2860_softc *sc, struct mbuf *m,
1729 struct ieee80211_node *ni, const struct ieee80211_bpf_params *params)
1731 struct ieee80211com *ic = &sc->sc_ic;
1732 struct ieee80211vap *vap = ni->ni_vap;
1733 struct rt2860_tx_ring *ring;
1734 struct rt2860_tx_data *data;
1735 struct rt2860_txd *txd;
1736 struct rt2860_txwi *txwi;
1737 struct ieee80211_frame *wh;
1739 bus_dma_segment_t segs[RT2860_MAX_SCATTER];
1740 bus_dma_segment_t *seg;
1743 uint8_t qsel, mcs, pid, qid;
1744 int i, nsegs, ntxds, pad, rate, ridx, error;
1746 /* the data pool contains at least one element, pick the first */
1747 data = SLIST_FIRST(&sc->data_pool);
1749 wh = mtod(m, struct ieee80211_frame *);
1750 hdrlen = ieee80211_hdrsize(wh);
1752 /* Choose a TX rate index. */
1753 rate = params->ibp_rate0;
1754 ridx = ieee80211_legacy_rate_lookup(ic->ic_rt,
1755 rate & IEEE80211_RATE_VAL);
1756 if (ridx == (uint8_t)-1) {
1757 /* XXX fall back to mcast/mgmt rate? */
1762 qid = params->ibp_pri & 3;
1763 ring = &sc->txq[qid];
1765 /* get MCS code from rate index */
1766 mcs = rt2860_rates[ridx].mcs;
1768 /* setup TX Wireless Information */
1771 /* let HW generate seq numbers for non-QoS frames */
1772 txwi->xflags = params->ibp_pri & 3 ? 0 : RT2860_TX_NSEQ;
1774 txwi->len = htole16(m->m_pkthdr.len);
1775 if (rt2860_rates[ridx].phy == IEEE80211_T_DS) {
1776 txwi->phy = htole16(RT2860_PHY_CCK);
1777 if (ridx != RT2860_RIDX_CCK1 &&
1778 (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1779 mcs |= RT2860_PHY_SHPRE;
1781 txwi->phy = htole16(RT2860_PHY_OFDM);
1782 txwi->phy |= htole16(mcs);
1785 * We store the MCS code into the driver-private PacketID field.
1786 * The PacketID is latched into TX_STAT_FIFO when Tx completes so
1787 * that we know at which initial rate the frame was transmitted.
1788 * We add 1 to the MCS code because setting the PacketID field to
1789 * 0 means that we don't want feedback in TX_STAT_FIFO.
1791 pid = (mcs + 1) & 0xf;
1792 txwi->len |= htole16(pid << RT2860_TX_PID_SHIFT);
1794 /* check if RTS/CTS or CTS-to-self protection is required */
1795 if (params->ibp_flags & IEEE80211_BPF_RTS ||
1796 params->ibp_flags & IEEE80211_BPF_CTS)
1797 txwi->txop = RT2860_TX_TXOP_HT;
1799 txwi->txop = RT2860_TX_TXOP_BACKOFF;
1800 if ((params->ibp_flags & IEEE80211_BPF_NOACK) == 0) {
1801 txwi->xflags |= RT2860_TX_ACK;
1803 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
1804 dur = rt2860_rates[ridx].sp_ack_dur;
1806 dur = rt2860_rates[ridx].lp_ack_dur;
1807 *(uint16_t *)wh->i_dur = htole16(dur);
1809 /* ask MAC to insert timestamp into probe responses */
1811 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
1812 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
1813 /* NOTE: beacons do not pass through tx_data() */
1814 txwi->flags |= RT2860_TX_TS;
1816 if (ieee80211_radiotap_active_vap(vap)) {
1817 struct rt2860_tx_radiotap_header *tap = &sc->sc_txtap;
1820 tap->wt_rate = rate;
1821 if (mcs & RT2860_PHY_SHPRE)
1822 tap->wt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
1824 ieee80211_radiotap_tx(vap, m);
1827 pad = (hdrlen + 3) & ~3;
1829 /* copy and trim 802.11 header */
1830 memcpy(txwi + 1, wh, hdrlen);
1833 error = bus_dmamap_load_mbuf_sg(sc->txwi_dmat, data->map, m, segs,
1835 if (__predict_false(error != 0 && error != EFBIG)) {
1836 device_printf(sc->sc_dev, "can't map mbuf (error %d)\n",
1841 if (__predict_true(error == 0)) {
1842 /* determine how many TXDs are required */
1843 ntxds = 1 + (nsegs / 2);
1845 if (ring->queued + ntxds >= RT2860_TX_RING_COUNT) {
1846 /* not enough free TXDs, force mbuf defrag */
1847 bus_dmamap_unload(sc->txwi_dmat, data->map);
1851 if (__predict_false(error != 0)) {
1852 m1 = m_defrag(m, M_NOWAIT);
1854 device_printf(sc->sc_dev,
1855 "could not defragment mbuf\n");
1861 error = bus_dmamap_load_mbuf_sg(sc->txwi_dmat, data->map, m,
1863 if (__predict_false(error != 0)) {
1864 device_printf(sc->sc_dev, "can't map mbuf (error %d)\n",
1870 /* determine how many TXDs are now required */
1871 ntxds = 1 + (nsegs / 2);
1873 if (ring->queued + ntxds >= RT2860_TX_RING_COUNT) {
1874 /* this is a hopeless case, drop the mbuf! */
1875 bus_dmamap_unload(sc->txwi_dmat, data->map);
1881 qsel = (qid < WME_NUM_AC) ? RT2860_TX_QSEL_EDCA : RT2860_TX_QSEL_MGMT;
1883 /* first segment is TXWI + 802.11 header */
1884 txd = &ring->txd[ring->cur];
1885 txd->sdp0 = htole32(data->paddr);
1886 txd->sdl0 = htole16(sizeof (struct rt2860_txwi) + pad);
1889 /* setup payload segments */
1891 for (i = nsegs; i >= 2; i -= 2) {
1892 txd->sdp1 = htole32(seg->ds_addr);
1893 txd->sdl1 = htole16(seg->ds_len);
1895 ring->cur = (ring->cur + 1) % RT2860_TX_RING_COUNT;
1896 /* grab a new Tx descriptor */
1897 txd = &ring->txd[ring->cur];
1898 txd->sdp0 = htole32(seg->ds_addr);
1899 txd->sdl0 = htole16(seg->ds_len);
1903 /* finalize last segment */
1905 txd->sdp1 = htole32(seg->ds_addr);
1906 txd->sdl1 = htole16(seg->ds_len | RT2860_TX_LS1);
1908 txd->sdl0 |= htole16(RT2860_TX_LS0);
1912 /* remove from the free pool and link it into the SW Tx slot */
1913 SLIST_REMOVE_HEAD(&sc->data_pool, next);
1916 ring->data[ring->cur] = data;
1918 bus_dmamap_sync(sc->txwi_dmat, sc->txwi_map, BUS_DMASYNC_PREWRITE);
1919 bus_dmamap_sync(sc->txwi_dmat, data->map, BUS_DMASYNC_PREWRITE);
1920 bus_dmamap_sync(ring->desc_dmat, ring->desc_map, BUS_DMASYNC_PREWRITE);
1922 DPRINTFN(4, ("sending frame qid=%d wcid=%d nsegs=%d ridx=%d\n",
1923 qid, txwi->wcid, nsegs, ridx));
1925 ring->cur = (ring->cur + 1) % RT2860_TX_RING_COUNT;
1926 ring->queued += ntxds;
1927 if (ring->queued >= RT2860_TX_RING_COUNT)
1928 sc->qfullmsk |= 1 << qid;
1931 RAL_WRITE(sc, RT2860_TX_CTX_IDX(qid), ring->cur);
1937 rt2860_transmit(struct ieee80211com *ic, struct mbuf *m)
1939 struct rt2860_softc *sc = ic->ic_softc;
1943 if ((sc->sc_flags & RT2860_RUNNING) == 0) {
1947 error = mbufq_enqueue(&sc->sc_snd, m);
1959 rt2860_start(struct rt2860_softc *sc)
1961 struct ieee80211_node *ni;
1964 RAL_LOCK_ASSERT(sc);
1966 if ((sc->sc_flags & RT2860_RUNNING) == 0)
1969 while (!SLIST_EMPTY(&sc->data_pool) && sc->qfullmsk == 0 &&
1970 (m = mbufq_dequeue(&sc->sc_snd)) != NULL) {
1971 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif;
1972 if (rt2860_tx(sc, m, ni) != 0) {
1973 if_inc_counter(ni->ni_vap->iv_ifp,
1974 IFCOUNTER_OERRORS, 1);
1975 ieee80211_free_node(ni);
1978 sc->sc_tx_timer = 5;
1983 rt2860_watchdog(void *arg)
1985 struct rt2860_softc *sc = arg;
1987 RAL_LOCK_ASSERT(sc);
1989 KASSERT(sc->sc_flags & RT2860_RUNNING, ("not running"));
1991 if (sc->sc_invalid) /* card ejected */
1994 if (sc->sc_tx_timer > 0 && --sc->sc_tx_timer == 0) {
1995 device_printf(sc->sc_dev, "device timeout\n");
1996 rt2860_stop_locked(sc);
1997 rt2860_init_locked(sc);
1998 counter_u64_add(sc->sc_ic.ic_oerrors, 1);
2001 callout_reset(&sc->watchdog_ch, hz, rt2860_watchdog, sc);
2005 rt2860_parent(struct ieee80211com *ic)
2007 struct rt2860_softc *sc = ic->ic_softc;
2011 if (ic->ic_nrunning> 0) {
2012 if (!(sc->sc_flags & RT2860_RUNNING)) {
2013 rt2860_init_locked(sc);
2016 rt2860_update_promisc(ic);
2017 } else if (sc->sc_flags & RT2860_RUNNING)
2018 rt2860_stop_locked(sc);
2021 ieee80211_start_all(ic);
2025 * Reading and writing from/to the BBP is different from RT2560 and RT2661.
2026 * We access the BBP through the 8051 microcontroller unit which means that
2027 * the microcode must be loaded first.
2030 rt2860_mcu_bbp_write(struct rt2860_softc *sc, uint8_t reg, uint8_t val)
2034 for (ntries = 0; ntries < 100; ntries++) {
2035 if (!(RAL_READ(sc, RT2860_H2M_BBPAGENT) & RT2860_BBP_CSR_KICK))
2039 if (ntries == 100) {
2040 device_printf(sc->sc_dev,
2041 "could not write to BBP through MCU\n");
2045 RAL_WRITE(sc, RT2860_H2M_BBPAGENT, RT2860_BBP_RW_PARALLEL |
2046 RT2860_BBP_CSR_KICK | reg << 8 | val);
2047 RAL_BARRIER_WRITE(sc);
2049 rt2860_mcu_cmd(sc, RT2860_MCU_CMD_BBP, 0, 0);
2054 rt2860_mcu_bbp_read(struct rt2860_softc *sc, uint8_t reg)
2059 for (ntries = 0; ntries < 100; ntries++) {
2060 if (!(RAL_READ(sc, RT2860_H2M_BBPAGENT) & RT2860_BBP_CSR_KICK))
2064 if (ntries == 100) {
2065 device_printf(sc->sc_dev,
2066 "could not read from BBP through MCU\n");
2070 RAL_WRITE(sc, RT2860_H2M_BBPAGENT, RT2860_BBP_RW_PARALLEL |
2071 RT2860_BBP_CSR_KICK | RT2860_BBP_CSR_READ | reg << 8);
2072 RAL_BARRIER_WRITE(sc);
2074 rt2860_mcu_cmd(sc, RT2860_MCU_CMD_BBP, 0, 0);
2077 for (ntries = 0; ntries < 100; ntries++) {
2078 val = RAL_READ(sc, RT2860_H2M_BBPAGENT);
2079 if (!(val & RT2860_BBP_CSR_KICK))
2083 device_printf(sc->sc_dev, "could not read from BBP through MCU\n");
2089 * Write to one of the 4 programmable 24-bit RF registers.
2092 rt2860_rf_write(struct rt2860_softc *sc, uint8_t reg, uint32_t val)
2097 for (ntries = 0; ntries < 100; ntries++) {
2098 if (!(RAL_READ(sc, RT2860_RF_CSR_CFG0) & RT2860_RF_REG_CTRL))
2102 if (ntries == 100) {
2103 device_printf(sc->sc_dev, "could not write to RF\n");
2107 /* RF registers are 24-bit on the RT2860 */
2108 tmp = RT2860_RF_REG_CTRL | 24 << RT2860_RF_REG_WIDTH_SHIFT |
2109 (val & 0x3fffff) << 2 | (reg & 3);
2110 RAL_WRITE(sc, RT2860_RF_CSR_CFG0, tmp);
2114 rt3090_rf_read(struct rt2860_softc *sc, uint8_t reg)
2119 for (ntries = 0; ntries < 100; ntries++) {
2120 if (!(RAL_READ(sc, RT3070_RF_CSR_CFG) & RT3070_RF_KICK))
2124 if (ntries == 100) {
2125 device_printf(sc->sc_dev, "could not read RF register\n");
2128 tmp = RT3070_RF_KICK | reg << 8;
2129 RAL_WRITE(sc, RT3070_RF_CSR_CFG, tmp);
2131 for (ntries = 0; ntries < 100; ntries++) {
2132 tmp = RAL_READ(sc, RT3070_RF_CSR_CFG);
2133 if (!(tmp & RT3070_RF_KICK))
2137 if (ntries == 100) {
2138 device_printf(sc->sc_dev, "could not read RF register\n");
2145 rt3090_rf_write(struct rt2860_softc *sc, uint8_t reg, uint8_t val)
2150 for (ntries = 0; ntries < 10; ntries++) {
2151 if (!(RAL_READ(sc, RT3070_RF_CSR_CFG) & RT3070_RF_KICK))
2156 device_printf(sc->sc_dev, "could not write to RF\n");
2160 tmp = RT3070_RF_WRITE | RT3070_RF_KICK | reg << 8 | val;
2161 RAL_WRITE(sc, RT3070_RF_CSR_CFG, tmp);
2165 * Send a command to the 8051 microcontroller unit.
2168 rt2860_mcu_cmd(struct rt2860_softc *sc, uint8_t cmd, uint16_t arg, int wait)
2174 for (ntries = 0; ntries < 100; ntries++) {
2175 if (!(RAL_READ(sc, RT2860_H2M_MAILBOX) & RT2860_H2M_BUSY))
2182 cid = wait ? cmd : RT2860_TOKEN_NO_INTR;
2183 RAL_WRITE(sc, RT2860_H2M_MAILBOX, RT2860_H2M_BUSY | cid << 16 | arg);
2184 RAL_BARRIER_WRITE(sc);
2185 RAL_WRITE(sc, RT2860_HOST_CMD, cmd);
2189 /* wait for the command to complete */
2190 for (ntries = 0; ntries < 200; ntries++) {
2191 tmp = RAL_READ(sc, RT2860_H2M_MAILBOX_CID);
2192 /* find the command slot */
2193 for (slot = 0; slot < 4; slot++, tmp >>= 8)
2194 if ((tmp & 0xff) == cid)
2200 if (ntries == 200) {
2201 /* clear command and status */
2202 RAL_WRITE(sc, RT2860_H2M_MAILBOX_STATUS, 0xffffffff);
2203 RAL_WRITE(sc, RT2860_H2M_MAILBOX_CID, 0xffffffff);
2206 /* get command status (1 means success) */
2207 tmp = RAL_READ(sc, RT2860_H2M_MAILBOX_STATUS);
2208 tmp = (tmp >> (slot * 8)) & 0xff;
2209 DPRINTF(("MCU command=0x%02x slot=%d status=0x%02x\n",
2211 /* clear command and status */
2212 RAL_WRITE(sc, RT2860_H2M_MAILBOX_STATUS, 0xffffffff);
2213 RAL_WRITE(sc, RT2860_H2M_MAILBOX_CID, 0xffffffff);
2214 return (tmp == 1) ? 0 : EIO;
2218 rt2860_enable_mrr(struct rt2860_softc *sc)
2220 #define CCK(mcs) (mcs)
2221 #define OFDM(mcs) (1U << 3 | (mcs))
2222 RAL_WRITE(sc, RT2860_LG_FBK_CFG0,
2223 OFDM(6) << 28 | /* 54->48 */
2224 OFDM(5) << 24 | /* 48->36 */
2225 OFDM(4) << 20 | /* 36->24 */
2226 OFDM(3) << 16 | /* 24->18 */
2227 OFDM(2) << 12 | /* 18->12 */
2228 OFDM(1) << 8 | /* 12-> 9 */
2229 OFDM(0) << 4 | /* 9-> 6 */
2230 OFDM(0)); /* 6-> 6 */
2232 RAL_WRITE(sc, RT2860_LG_FBK_CFG1,
2233 CCK(2) << 12 | /* 11->5.5 */
2234 CCK(1) << 8 | /* 5.5-> 2 */
2235 CCK(0) << 4 | /* 2-> 1 */
2236 CCK(0)); /* 1-> 1 */
2242 rt2860_set_txpreamble(struct rt2860_softc *sc)
2244 struct ieee80211com *ic = &sc->sc_ic;
2247 tmp = RAL_READ(sc, RT2860_AUTO_RSP_CFG);
2248 tmp &= ~RT2860_CCK_SHORT_EN;
2249 if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
2250 tmp |= RT2860_CCK_SHORT_EN;
2251 RAL_WRITE(sc, RT2860_AUTO_RSP_CFG, tmp);
2255 rt2860_set_basicrates(struct rt2860_softc *sc,
2256 const struct ieee80211_rateset *rs)
2258 struct ieee80211com *ic = &sc->sc_ic;
2263 for (i = 0; i < rs->rs_nrates; i++) {
2264 rate = rs->rs_rates[i];
2266 if (!(rate & IEEE80211_RATE_BASIC))
2269 mask |= 1 << ieee80211_legacy_rate_lookup(ic->ic_rt,
2270 IEEE80211_RV(rate));
2273 RAL_WRITE(sc, RT2860_LEGACY_BASIC_RATE, mask);
2277 rt2860_scan_start(struct ieee80211com *ic)
2279 struct rt2860_softc *sc = ic->ic_softc;
2282 tmp = RAL_READ(sc, RT2860_BCN_TIME_CFG);
2283 RAL_WRITE(sc, RT2860_BCN_TIME_CFG,
2284 tmp & ~(RT2860_BCN_TX_EN | RT2860_TSF_TIMER_EN |
2285 RT2860_TBTT_TIMER_EN));
2286 rt2860_set_gp_timer(sc, 0);
2290 rt2860_scan_end(struct ieee80211com *ic)
2292 struct rt2860_softc *sc = ic->ic_softc;
2293 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
2295 if (vap->iv_state == IEEE80211_S_RUN) {
2296 rt2860_enable_tsf_sync(sc);
2297 rt2860_set_gp_timer(sc, 500);
2302 rt2860_getradiocaps(struct ieee80211com *ic, int maxchans, int *nchans,
2303 struct ieee80211_channel chans[])
2305 struct rt2860_softc *sc = ic->ic_softc;
2306 uint8_t bands[IEEE80211_MODE_BYTES];
2308 memset(bands, 0, sizeof(bands));
2309 setbit(bands, IEEE80211_MODE_11B);
2310 setbit(bands, IEEE80211_MODE_11G);
2311 ieee80211_add_channels_default_2ghz(chans, maxchans, nchans, bands, 0);
2313 if (sc->rf_rev == RT2860_RF_2750 || sc->rf_rev == RT2860_RF_2850) {
2314 setbit(bands, IEEE80211_MODE_11A);
2315 ieee80211_add_channel_list_5ghz(chans, maxchans, nchans,
2316 rt2860_chan_5ghz, nitems(rt2860_chan_5ghz), bands, 0);
2321 rt2860_set_channel(struct ieee80211com *ic)
2323 struct rt2860_softc *sc = ic->ic_softc;
2326 rt2860_switch_chan(sc, ic->ic_curchan);
2331 rt2860_select_chan_group(struct rt2860_softc *sc, int group)
2336 rt2860_mcu_bbp_write(sc, 62, 0x37 - sc->lna[group]);
2337 rt2860_mcu_bbp_write(sc, 63, 0x37 - sc->lna[group]);
2338 rt2860_mcu_bbp_write(sc, 64, 0x37 - sc->lna[group]);
2339 rt2860_mcu_bbp_write(sc, 86, 0x00);
2342 if (sc->ext_2ghz_lna) {
2343 rt2860_mcu_bbp_write(sc, 82, 0x62);
2344 rt2860_mcu_bbp_write(sc, 75, 0x46);
2346 rt2860_mcu_bbp_write(sc, 82, 0x84);
2347 rt2860_mcu_bbp_write(sc, 75, 0x50);
2350 if (sc->ext_5ghz_lna) {
2351 rt2860_mcu_bbp_write(sc, 82, 0xf2);
2352 rt2860_mcu_bbp_write(sc, 75, 0x46);
2354 rt2860_mcu_bbp_write(sc, 82, 0xf2);
2355 rt2860_mcu_bbp_write(sc, 75, 0x50);
2359 tmp = RAL_READ(sc, RT2860_TX_BAND_CFG);
2360 tmp &= ~(RT2860_5G_BAND_SEL_N | RT2860_5G_BAND_SEL_P);
2361 tmp |= (group == 0) ? RT2860_5G_BAND_SEL_N : RT2860_5G_BAND_SEL_P;
2362 RAL_WRITE(sc, RT2860_TX_BAND_CFG, tmp);
2364 /* enable appropriate Power Amplifiers and Low Noise Amplifiers */
2365 tmp = RT2860_RFTR_EN | RT2860_TRSW_EN | RT2860_LNA_PE0_EN;
2366 if (sc->nrxchains > 1)
2367 tmp |= RT2860_LNA_PE1_EN;
2368 if (sc->mac_ver == 0x3593 && sc->nrxchains > 2)
2369 tmp |= RT3593_LNA_PE2_EN;
2370 if (group == 0) { /* 2GHz */
2371 tmp |= RT2860_PA_PE_G0_EN;
2372 if (sc->ntxchains > 1)
2373 tmp |= RT2860_PA_PE_G1_EN;
2374 if (sc->mac_ver == 0x3593 && sc->ntxchains > 2)
2375 tmp |= RT3593_PA_PE_G2_EN;
2377 tmp |= RT2860_PA_PE_A0_EN;
2378 if (sc->ntxchains > 1)
2379 tmp |= RT2860_PA_PE_A1_EN;
2380 if (sc->mac_ver == 0x3593 && sc->ntxchains > 2)
2381 tmp |= RT3593_PA_PE_A2_EN;
2383 RAL_WRITE(sc, RT2860_TX_PIN_CFG, tmp);
2385 if (sc->mac_ver == 0x3593) {
2386 tmp = RAL_READ(sc, RT2860_GPIO_CTRL);
2387 if (sc->sc_flags & RT2860_PCIE) {
2396 tmp = (tmp & ~0x00001000) | 0x00000010;
2397 RAL_WRITE(sc, RT2860_GPIO_CTRL, tmp);
2400 /* set initial AGC value */
2401 if (group == 0) { /* 2GHz band */
2402 if (sc->mac_ver >= 0x3071)
2403 agc = 0x1c + sc->lna[0] * 2;
2405 agc = 0x2e + sc->lna[0];
2406 } else { /* 5GHz band */
2407 agc = 0x32 + (sc->lna[group] * 5) / 3;
2409 rt2860_mcu_bbp_write(sc, 66, agc);
2415 rt2860_set_chan(struct rt2860_softc *sc, u_int chan)
2417 const struct rfprog *rfprog = rt2860_rf2850;
2418 uint32_t r2, r3, r4;
2419 int8_t txpow1, txpow2;
2422 /* find the settings for this channel (we know it exists) */
2423 for (i = 0; rfprog[i].chan != chan; i++);
2426 if (sc->ntxchains == 1)
2427 r2 |= 1 << 12; /* 1T: disable Tx chain 2 */
2428 if (sc->nrxchains == 1)
2429 r2 |= 1 << 15 | 1 << 4; /* 1R: disable Rx chains 2 & 3 */
2430 else if (sc->nrxchains == 2)
2431 r2 |= 1 << 4; /* 2R: disable Rx chain 3 */
2433 /* use Tx power values from EEPROM */
2434 txpow1 = sc->txpow1[i];
2435 txpow2 = sc->txpow2[i];
2438 txpow1 = txpow1 << 1 | 1;
2440 txpow1 = (7 + txpow1) << 1;
2442 txpow2 = txpow2 << 1 | 1;
2444 txpow2 = (7 + txpow2) << 1;
2446 r3 = rfprog[i].r3 | txpow1 << 7;
2447 r4 = rfprog[i].r4 | sc->freq << 13 | txpow2 << 4;
2449 rt2860_rf_write(sc, RT2860_RF1, rfprog[i].r1);
2450 rt2860_rf_write(sc, RT2860_RF2, r2);
2451 rt2860_rf_write(sc, RT2860_RF3, r3);
2452 rt2860_rf_write(sc, RT2860_RF4, r4);
2456 rt2860_rf_write(sc, RT2860_RF1, rfprog[i].r1);
2457 rt2860_rf_write(sc, RT2860_RF2, r2);
2458 rt2860_rf_write(sc, RT2860_RF3, r3 | 1);
2459 rt2860_rf_write(sc, RT2860_RF4, r4);
2463 rt2860_rf_write(sc, RT2860_RF1, rfprog[i].r1);
2464 rt2860_rf_write(sc, RT2860_RF2, r2);
2465 rt2860_rf_write(sc, RT2860_RF3, r3);
2466 rt2860_rf_write(sc, RT2860_RF4, r4);
2470 rt3090_set_chan(struct rt2860_softc *sc, u_int chan)
2472 int8_t txpow1, txpow2;
2476 /* RT3090 is 2GHz only */
2477 KASSERT(chan >= 1 && chan <= 14, ("chan %d not support", chan));
2479 /* find the settings for this channel (we know it exists) */
2480 for (i = 0; rt2860_rf2850[i].chan != chan; i++);
2482 /* use Tx power values from EEPROM */
2483 txpow1 = sc->txpow1[i];
2484 txpow2 = sc->txpow2[i];
2486 rt3090_rf_write(sc, 2, rt3090_freqs[i].n);
2487 rf = rt3090_rf_read(sc, 3);
2488 rf = (rf & ~0x0f) | rt3090_freqs[i].k;
2489 rt3090_rf_write(sc, 3, rf);
2490 rf = rt3090_rf_read(sc, 6);
2491 rf = (rf & ~0x03) | rt3090_freqs[i].r;
2492 rt3090_rf_write(sc, 6, rf);
2495 rf = rt3090_rf_read(sc, 12);
2496 rf = (rf & ~0x1f) | txpow1;
2497 rt3090_rf_write(sc, 12, rf);
2500 rf = rt3090_rf_read(sc, 13);
2501 rf = (rf & ~0x1f) | txpow2;
2502 rt3090_rf_write(sc, 13, rf);
2504 rf = rt3090_rf_read(sc, 1);
2506 if (sc->ntxchains == 1)
2507 rf |= RT3070_TX1_PD | RT3070_TX2_PD;
2508 else if (sc->ntxchains == 2)
2509 rf |= RT3070_TX2_PD;
2510 if (sc->nrxchains == 1)
2511 rf |= RT3070_RX1_PD | RT3070_RX2_PD;
2512 else if (sc->nrxchains == 2)
2513 rf |= RT3070_RX2_PD;
2514 rt3090_rf_write(sc, 1, rf);
2517 rf = rt3090_rf_read(sc, 23);
2518 rf = (rf & ~0x7f) | sc->freq;
2519 rt3090_rf_write(sc, 23, rf);
2521 /* program RF filter */
2522 rf = rt3090_rf_read(sc, 24); /* Tx */
2523 rf = (rf & ~0x3f) | sc->rf24_20mhz;
2524 rt3090_rf_write(sc, 24, rf);
2525 rf = rt3090_rf_read(sc, 31); /* Rx */
2526 rf = (rf & ~0x3f) | sc->rf24_20mhz;
2527 rt3090_rf_write(sc, 31, rf);
2529 /* enable RF tuning */
2530 rf = rt3090_rf_read(sc, 7);
2531 rt3090_rf_write(sc, 7, rf | RT3070_TUNE);
2535 rt5390_set_chan(struct rt2860_softc *sc, u_int chan)
2537 uint8_t h20mhz, rf, tmp;
2538 int8_t txpow1, txpow2;
2541 /* RT5390 is 2GHz only */
2542 KASSERT(chan >= 1 && chan <= 14, ("chan %d not support", chan));
2544 /* find the settings for this channel (we know it exists) */
2545 for (i = 0; rt2860_rf2850[i].chan != chan; i++);
2547 /* use Tx power values from EEPROM */
2548 txpow1 = sc->txpow1[i];
2549 txpow2 = sc->txpow2[i];
2551 rt3090_rf_write(sc, 8, rt3090_freqs[i].n);
2552 rt3090_rf_write(sc, 9, rt3090_freqs[i].k & 0x0f);
2553 rf = rt3090_rf_read(sc, 11);
2554 rf = (rf & ~0x03) | (rt3090_freqs[i].r & 0x03);
2555 rt3090_rf_write(sc, 11, rf);
2557 rf = rt3090_rf_read(sc, 49);
2558 rf = (rf & ~0x3f) | (txpow1 & 0x3f);
2559 /* the valid range of the RF R49 is 0x00~0x27 */
2560 if ((rf & 0x3f) > 0x27)
2561 rf = (rf & ~0x3f) | 0x27;
2562 rt3090_rf_write(sc, 49, rf);
2563 if (sc->mac_ver == 0x5392) {
2564 rf = rt3090_rf_read(sc, 50);
2565 rf = (rf & ~0x3f) | (txpow2 & 0x3f);
2566 /* the valid range of the RF R50 is 0x00~0x27 */
2567 if ((rf & 0x3f) > 0x27)
2568 rf = (rf & ~0x3f) | 0x27;
2569 rt3090_rf_write(sc, 50, rf);
2572 rf = rt3090_rf_read(sc, 1);
2573 rf |= RT3070_RF_BLOCK | RT3070_PLL_PD | RT3070_RX0_PD | RT3070_TX0_PD;
2574 if (sc->mac_ver == 0x5392)
2575 rf |= RT3070_RX1_PD | RT3070_TX1_PD;
2576 rt3090_rf_write(sc, 1, rf);
2578 rf = rt3090_rf_read(sc, 2);
2579 rt3090_rf_write(sc, 2, rf | RT3593_RESCAL);
2581 rt3090_rf_write(sc, 2, rf & ~RT3593_RESCAL);
2583 rf = rt3090_rf_read(sc, 17);
2585 rf = (rf & ~0x7f) | (sc->freq & 0x7f);
2588 rt2860_mcu_cmd(sc, 0x74, (tmp << 8 ) | rf, 0);
2590 if (sc->mac_ver == 0x5390) {
2593 else if (chan >= 5 && chan <= 6)
2595 else if (chan >= 7 && chan <= 10)
2599 rt3090_rf_write(sc, 55, rf);
2607 else if (chan >= 4 && chan <= 6)
2609 else if (chan >= 7 && chan <= 12)
2611 else if (chan == 13)
2615 rt3090_rf_write(sc, 59, rf);
2619 h20mhz = (sc->rf24_20mhz & 0x20) >> 5;
2620 rf = rt3090_rf_read(sc, 30);
2621 rf = (rf & ~0x06) | (h20mhz << 1) | (h20mhz << 2);
2622 rt3090_rf_write(sc, 30, rf);
2624 /* Rx BB filter VCM */
2625 rf = rt3090_rf_read(sc, 30);
2626 rf = (rf & ~0x18) | 0x10;
2627 rt3090_rf_write(sc, 30, rf);
2629 /* Initiate VCO calibration. */
2630 rf = rt3090_rf_read(sc, 3);
2631 rf |= RT3593_VCOCAL;
2632 rt3090_rf_write(sc, 3, rf);
2636 rt3090_rf_init(struct rt2860_softc *sc)
2642 rf = rt3090_rf_read(sc, 30);
2643 /* toggle RF R30 bit 7 */
2644 rt3090_rf_write(sc, 30, rf | 0x80);
2646 rt3090_rf_write(sc, 30, rf & ~0x80);
2648 tmp = RAL_READ(sc, RT3070_LDO_CFG0);
2650 if (sc->patch_dac && sc->mac_rev < 0x0211)
2651 tmp |= 0x0d000000; /* 1.35V */
2653 tmp |= 0x01000000; /* 1.2V */
2654 RAL_WRITE(sc, RT3070_LDO_CFG0, tmp);
2656 /* patch LNA_PE_G1 */
2657 tmp = RAL_READ(sc, RT3070_GPIO_SWITCH);
2658 RAL_WRITE(sc, RT3070_GPIO_SWITCH, tmp & ~0x20);
2660 /* initialize RF registers to default value */
2661 for (i = 0; i < nitems(rt3090_def_rf); i++) {
2662 rt3090_rf_write(sc, rt3090_def_rf[i].reg,
2663 rt3090_def_rf[i].val);
2666 /* select 20MHz bandwidth */
2667 rt3090_rf_write(sc, 31, 0x14);
2669 rf = rt3090_rf_read(sc, 6);
2670 rt3090_rf_write(sc, 6, rf | 0x40);
2672 if (sc->mac_ver != 0x3593) {
2673 /* calibrate filter for 20MHz bandwidth */
2674 sc->rf24_20mhz = 0x1f; /* default value */
2675 rt3090_filter_calib(sc, 0x07, 0x16, &sc->rf24_20mhz);
2677 /* select 40MHz bandwidth */
2678 bbp = rt2860_mcu_bbp_read(sc, 4);
2679 rt2860_mcu_bbp_write(sc, 4, (bbp & ~0x08) | 0x10);
2680 rf = rt3090_rf_read(sc, 31);
2681 rt3090_rf_write(sc, 31, rf | 0x20);
2683 /* calibrate filter for 40MHz bandwidth */
2684 sc->rf24_40mhz = 0x2f; /* default value */
2685 rt3090_filter_calib(sc, 0x27, 0x19, &sc->rf24_40mhz);
2687 /* go back to 20MHz bandwidth */
2688 bbp = rt2860_mcu_bbp_read(sc, 4);
2689 rt2860_mcu_bbp_write(sc, 4, bbp & ~0x18);
2691 if (sc->mac_rev < 0x0211)
2692 rt3090_rf_write(sc, 27, 0x03);
2694 tmp = RAL_READ(sc, RT3070_OPT_14);
2695 RAL_WRITE(sc, RT3070_OPT_14, tmp | 1);
2697 if (sc->rf_rev == RT3070_RF_3020)
2698 rt3090_set_rx_antenna(sc, 0);
2700 bbp = rt2860_mcu_bbp_read(sc, 138);
2701 if (sc->mac_ver == 0x3593) {
2702 if (sc->ntxchains == 1)
2703 bbp |= 0x60; /* turn off DAC1 and DAC2 */
2704 else if (sc->ntxchains == 2)
2705 bbp |= 0x40; /* turn off DAC2 */
2706 if (sc->nrxchains == 1)
2707 bbp &= ~0x06; /* turn off ADC1 and ADC2 */
2708 else if (sc->nrxchains == 2)
2709 bbp &= ~0x04; /* turn off ADC2 */
2711 if (sc->ntxchains == 1)
2712 bbp |= 0x20; /* turn off DAC1 */
2713 if (sc->nrxchains == 1)
2714 bbp &= ~0x02; /* turn off ADC1 */
2716 rt2860_mcu_bbp_write(sc, 138, bbp);
2718 rf = rt3090_rf_read(sc, 1);
2719 rf &= ~(RT3070_RX0_PD | RT3070_TX0_PD);
2720 rf |= RT3070_RF_BLOCK | RT3070_RX1_PD | RT3070_TX1_PD;
2721 rt3090_rf_write(sc, 1, rf);
2723 rf = rt3090_rf_read(sc, 15);
2724 rt3090_rf_write(sc, 15, rf & ~RT3070_TX_LO2);
2726 rf = rt3090_rf_read(sc, 17);
2727 rf &= ~RT3070_TX_LO1;
2728 if (sc->mac_rev >= 0x0211 && !sc->ext_2ghz_lna)
2729 rf |= 0x20; /* fix for long range Rx issue */
2730 if (sc->txmixgain_2ghz >= 2)
2731 rf = (rf & ~0x7) | sc->txmixgain_2ghz;
2732 rt3090_rf_write(sc, 17, rf);
2734 rf = rt3090_rf_read(sc, 20);
2735 rt3090_rf_write(sc, 20, rf & ~RT3070_RX_LO1);
2737 rf = rt3090_rf_read(sc, 21);
2738 rt3090_rf_write(sc, 21, rf & ~RT3070_RX_LO2);
2744 rt5390_rf_init(struct rt2860_softc *sc)
2749 rf = rt3090_rf_read(sc, 2);
2750 /* Toggle RF R2 bit 7. */
2751 rt3090_rf_write(sc, 2, rf | RT3593_RESCAL);
2753 rt3090_rf_write(sc, 2, rf & ~RT3593_RESCAL);
2755 /* Initialize RF registers to default value. */
2756 if (sc->mac_ver == 0x5392) {
2757 for (i = 0; i < nitems(rt5392_def_rf); i++) {
2758 rt3090_rf_write(sc, rt5392_def_rf[i].reg,
2759 rt5392_def_rf[i].val);
2762 for (i = 0; i < nitems(rt5390_def_rf); i++) {
2763 rt3090_rf_write(sc, rt5390_def_rf[i].reg,
2764 rt5390_def_rf[i].val);
2768 sc->rf24_20mhz = 0x1f;
2769 sc->rf24_40mhz = 0x2f;
2771 if (sc->mac_rev < 0x0211)
2772 rt3090_rf_write(sc, 27, 0x03);
2774 /* Set led open drain enable. */
2775 RAL_WRITE(sc, RT3070_OPT_14, RAL_READ(sc, RT3070_OPT_14) | 1);
2777 RAL_WRITE(sc, RT2860_TX_SW_CFG1, 0);
2778 RAL_WRITE(sc, RT2860_TX_SW_CFG2, 0);
2780 if (sc->mac_ver == 0x5390)
2781 rt3090_set_rx_antenna(sc, 0);
2783 /* Patch RSSI inaccurate issue. */
2784 rt2860_mcu_bbp_write(sc, 79, 0x13);
2785 rt2860_mcu_bbp_write(sc, 80, 0x05);
2786 rt2860_mcu_bbp_write(sc, 81, 0x33);
2788 /* Enable DC filter. */
2789 if (sc->mac_rev >= 0x0211)
2790 rt2860_mcu_bbp_write(sc, 103, 0xc0);
2792 bbp = rt2860_mcu_bbp_read(sc, 138);
2793 if (sc->ntxchains == 1)
2794 bbp |= 0x20; /* Turn off DAC1. */
2795 if (sc->nrxchains == 1)
2796 bbp &= ~0x02; /* Turn off ADC1. */
2797 rt2860_mcu_bbp_write(sc, 138, bbp);
2799 /* Enable RX LO1 and LO2. */
2800 rt3090_rf_write(sc, 38, rt3090_rf_read(sc, 38) & ~RT5390_RX_LO1);
2801 rt3090_rf_write(sc, 39, rt3090_rf_read(sc, 39) & ~RT5390_RX_LO2);
2803 /* Avoid data lost and CRC error. */
2804 rt2860_mcu_bbp_write(sc, 4,
2805 rt2860_mcu_bbp_read(sc, 4) | RT5390_MAC_IF_CTRL);
2807 rf = rt3090_rf_read(sc, 30);
2808 rf = (rf & ~0x18) | 0x10;
2809 rt3090_rf_write(sc, 30, rf);
2813 rt3090_rf_wakeup(struct rt2860_softc *sc)
2818 if (sc->mac_ver == 0x3593) {
2820 rf = rt3090_rf_read(sc, 1);
2821 rt3090_rf_write(sc, 1, rf | RT3593_VCO);
2823 /* initiate VCO calibration */
2824 rf = rt3090_rf_read(sc, 3);
2825 rt3090_rf_write(sc, 3, rf | RT3593_VCOCAL);
2827 /* enable VCO bias current control */
2828 rf = rt3090_rf_read(sc, 6);
2829 rt3090_rf_write(sc, 6, rf | RT3593_VCO_IC);
2831 /* initiate res calibration */
2832 rf = rt3090_rf_read(sc, 2);
2833 rt3090_rf_write(sc, 2, rf | RT3593_RESCAL);
2835 /* set reference current control to 0.33 mA */
2836 rf = rt3090_rf_read(sc, 22);
2837 rf &= ~RT3593_CP_IC_MASK;
2838 rf |= 1 << RT3593_CP_IC_SHIFT;
2839 rt3090_rf_write(sc, 22, rf);
2842 rf = rt3090_rf_read(sc, 46);
2843 rt3090_rf_write(sc, 46, rf | RT3593_RX_CTB);
2845 rf = rt3090_rf_read(sc, 20);
2846 rf &= ~(RT3593_LDO_RF_VC_MASK | RT3593_LDO_PLL_VC_MASK);
2847 rt3090_rf_write(sc, 20, rf);
2849 /* enable RF block */
2850 rf = rt3090_rf_read(sc, 1);
2851 rt3090_rf_write(sc, 1, rf | RT3070_RF_BLOCK);
2853 /* enable VCO bias current control */
2854 rf = rt3090_rf_read(sc, 7);
2855 rt3090_rf_write(sc, 7, rf | 0x30);
2857 rf = rt3090_rf_read(sc, 9);
2858 rt3090_rf_write(sc, 9, rf | 0x0e);
2861 rf = rt3090_rf_read(sc, 21);
2862 rt3090_rf_write(sc, 21, rf | RT3070_RX_CTB);
2864 /* fix Tx to Rx IQ glitch by raising RF voltage */
2865 rf = rt3090_rf_read(sc, 27);
2867 if (sc->mac_rev < 0x0211)
2869 rt3090_rf_write(sc, 27, rf);
2871 if (sc->patch_dac && sc->mac_rev < 0x0211) {
2872 tmp = RAL_READ(sc, RT3070_LDO_CFG0);
2873 tmp = (tmp & ~0x1f000000) | 0x0d000000;
2874 RAL_WRITE(sc, RT3070_LDO_CFG0, tmp);
2879 rt5390_rf_wakeup(struct rt2860_softc *sc)
2884 rf = rt3090_rf_read(sc, 1);
2885 rf |= RT3070_RF_BLOCK | RT3070_PLL_PD | RT3070_RX0_PD |
2887 if (sc->mac_ver == 0x5392)
2888 rf |= RT3070_RX1_PD | RT3070_TX1_PD;
2889 rt3090_rf_write(sc, 1, rf);
2891 rf = rt3090_rf_read(sc, 6);
2892 rf |= RT3593_VCO_IC | RT3593_VCOCAL;
2893 if (sc->mac_ver == 0x5390)
2894 rf &= ~RT3593_VCO_IC;
2895 rt3090_rf_write(sc, 6, rf);
2897 rt3090_rf_write(sc, 2, rt3090_rf_read(sc, 2) | RT3593_RESCAL);
2899 rf = rt3090_rf_read(sc, 22);
2900 rf = (rf & ~0xe0) | 0x20;
2901 rt3090_rf_write(sc, 22, rf);
2903 rt3090_rf_write(sc, 42, rt3090_rf_read(sc, 42) | RT5390_RX_CTB);
2904 rt3090_rf_write(sc, 20, rt3090_rf_read(sc, 20) & ~0x77);
2905 rt3090_rf_write(sc, 3, rt3090_rf_read(sc, 3) | RT3593_VCOCAL);
2907 if (sc->patch_dac && sc->mac_rev < 0x0211) {
2908 tmp = RAL_READ(sc, RT3070_LDO_CFG0);
2909 tmp = (tmp & ~0x1f000000) | 0x0d000000;
2910 RAL_WRITE(sc, RT3070_LDO_CFG0, tmp);
2915 rt3090_filter_calib(struct rt2860_softc *sc, uint8_t init, uint8_t target,
2919 uint8_t bbp55_pb, bbp55_sb, delta;
2922 /* program filter */
2923 rf24 = rt3090_rf_read(sc, 24);
2924 rf24 = (rf24 & 0xc0) | init; /* initial filter value */
2925 rt3090_rf_write(sc, 24, rf24);
2927 /* enable baseband loopback mode */
2928 rf22 = rt3090_rf_read(sc, 22);
2929 rt3090_rf_write(sc, 22, rf22 | RT3070_BB_LOOPBACK);
2931 /* set power and frequency of passband test tone */
2932 rt2860_mcu_bbp_write(sc, 24, 0x00);
2933 for (ntries = 0; ntries < 100; ntries++) {
2934 /* transmit test tone */
2935 rt2860_mcu_bbp_write(sc, 25, 0x90);
2937 /* read received power */
2938 bbp55_pb = rt2860_mcu_bbp_read(sc, 55);
2945 /* set power and frequency of stopband test tone */
2946 rt2860_mcu_bbp_write(sc, 24, 0x06);
2947 for (ntries = 0; ntries < 100; ntries++) {
2948 /* transmit test tone */
2949 rt2860_mcu_bbp_write(sc, 25, 0x90);
2951 /* read received power */
2952 bbp55_sb = rt2860_mcu_bbp_read(sc, 55);
2954 delta = bbp55_pb - bbp55_sb;
2958 /* reprogram filter */
2960 rt3090_rf_write(sc, 24, rf24);
2964 rf24--; /* backtrack */
2966 rt3090_rf_write(sc, 24, rf24);
2969 /* restore initial state */
2970 rt2860_mcu_bbp_write(sc, 24, 0x00);
2972 /* disable baseband loopback mode */
2973 rf22 = rt3090_rf_read(sc, 22);
2974 rt3090_rf_write(sc, 22, rf22 & ~RT3070_BB_LOOPBACK);
2980 rt3090_rf_setup(struct rt2860_softc *sc)
2985 if (sc->mac_rev >= 0x0211) {
2986 /* enable DC filter */
2987 rt2860_mcu_bbp_write(sc, 103, 0xc0);
2989 /* improve power consumption */
2990 bbp = rt2860_mcu_bbp_read(sc, 31);
2991 rt2860_mcu_bbp_write(sc, 31, bbp & ~0x03);
2994 RAL_WRITE(sc, RT2860_TX_SW_CFG1, 0);
2995 if (sc->mac_rev < 0x0211) {
2996 RAL_WRITE(sc, RT2860_TX_SW_CFG2,
2997 sc->patch_dac ? 0x2c : 0x0f);
2999 RAL_WRITE(sc, RT2860_TX_SW_CFG2, 0);
3001 /* initialize RF registers from ROM */
3002 if (sc->mac_ver < 0x5390) {
3003 for (i = 0; i < 10; i++) {
3004 if (sc->rf[i].reg == 0 || sc->rf[i].reg == 0xff)
3006 rt3090_rf_write(sc, sc->rf[i].reg, sc->rf[i].val);
3012 rt2860_set_leds(struct rt2860_softc *sc, uint16_t which)
3014 rt2860_mcu_cmd(sc, RT2860_MCU_CMD_LEDS,
3015 which | (sc->leds & 0x7f), 0);
3019 * Hardware has a general-purpose programmable timer interrupt that can
3020 * periodically raise MAC_INT_4.
3023 rt2860_set_gp_timer(struct rt2860_softc *sc, int ms)
3027 /* disable GP timer before reprogramming it */
3028 tmp = RAL_READ(sc, RT2860_INT_TIMER_EN);
3029 RAL_WRITE(sc, RT2860_INT_TIMER_EN, tmp & ~RT2860_GP_TIMER_EN);
3034 tmp = RAL_READ(sc, RT2860_INT_TIMER_CFG);
3035 ms *= 16; /* Unit: 64us */
3036 tmp = (tmp & 0xffff) | ms << RT2860_GP_TIMER_SHIFT;
3037 RAL_WRITE(sc, RT2860_INT_TIMER_CFG, tmp);
3039 /* enable GP timer */
3040 tmp = RAL_READ(sc, RT2860_INT_TIMER_EN);
3041 RAL_WRITE(sc, RT2860_INT_TIMER_EN, tmp | RT2860_GP_TIMER_EN);
3045 rt2860_set_bssid(struct rt2860_softc *sc, const uint8_t *bssid)
3047 RAL_WRITE(sc, RT2860_MAC_BSSID_DW0,
3048 bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24);
3049 RAL_WRITE(sc, RT2860_MAC_BSSID_DW1,
3050 bssid[4] | bssid[5] << 8);
3054 rt2860_set_macaddr(struct rt2860_softc *sc, const uint8_t *addr)
3056 RAL_WRITE(sc, RT2860_MAC_ADDR_DW0,
3057 addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24);
3058 RAL_WRITE(sc, RT2860_MAC_ADDR_DW1,
3059 addr[4] | addr[5] << 8 | 0xff << 16);
3063 rt2860_updateslot(struct ieee80211com *ic)
3065 struct rt2860_softc *sc = ic->ic_softc;
3068 tmp = RAL_READ(sc, RT2860_BKOFF_SLOT_CFG);
3070 tmp |= IEEE80211_GET_SLOTTIME(ic);
3071 RAL_WRITE(sc, RT2860_BKOFF_SLOT_CFG, tmp);
3075 rt2860_updateprot(struct rt2860_softc *sc)
3077 struct ieee80211com *ic = &sc->sc_ic;
3080 tmp = RT2860_RTSTH_EN | RT2860_PROT_NAV_SHORT | RT2860_TXOP_ALLOW_ALL;
3081 /* setup protection frame rate (MCS code) */
3082 tmp |= IEEE80211_IS_CHAN_5GHZ(ic->ic_curchan) ?
3083 rt2860_rates[RT2860_RIDX_OFDM6].mcs :
3084 rt2860_rates[RT2860_RIDX_CCK11].mcs;
3086 /* CCK frames don't require protection */
3087 RAL_WRITE(sc, RT2860_CCK_PROT_CFG, tmp);
3089 if (ic->ic_flags & IEEE80211_F_USEPROT) {
3090 if (ic->ic_protmode == IEEE80211_PROT_RTSCTS)
3091 tmp |= RT2860_PROT_CTRL_RTS_CTS;
3092 else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY)
3093 tmp |= RT2860_PROT_CTRL_CTS;
3095 RAL_WRITE(sc, RT2860_OFDM_PROT_CFG, tmp);
3099 rt2860_update_promisc(struct ieee80211com *ic)
3101 struct rt2860_softc *sc = ic->ic_softc;
3104 tmp = RAL_READ(sc, RT2860_RX_FILTR_CFG);
3105 tmp &= ~RT2860_DROP_NOT_MYBSS;
3106 if (ic->ic_promisc == 0)
3107 tmp |= RT2860_DROP_NOT_MYBSS;
3108 RAL_WRITE(sc, RT2860_RX_FILTR_CFG, tmp);
3112 rt2860_updateedca(struct ieee80211com *ic)
3114 struct rt2860_softc *sc = ic->ic_softc;
3115 struct chanAccParams chp;
3116 const struct wmeParams *wmep;
3119 ieee80211_wme_ic_getparams(ic, &chp);
3121 wmep = chp.cap_wmeParams;
3123 /* update MAC TX configuration registers */
3124 for (aci = 0; aci < WME_NUM_AC; aci++) {
3125 RAL_WRITE(sc, RT2860_EDCA_AC_CFG(aci),
3126 wmep[aci].wmep_logcwmax << 16 |
3127 wmep[aci].wmep_logcwmin << 12 |
3128 wmep[aci].wmep_aifsn << 8 |
3129 wmep[aci].wmep_txopLimit);
3132 /* update SCH/DMA registers too */
3133 RAL_WRITE(sc, RT2860_WMM_AIFSN_CFG,
3134 wmep[WME_AC_VO].wmep_aifsn << 12 |
3135 wmep[WME_AC_VI].wmep_aifsn << 8 |
3136 wmep[WME_AC_BK].wmep_aifsn << 4 |
3137 wmep[WME_AC_BE].wmep_aifsn);
3138 RAL_WRITE(sc, RT2860_WMM_CWMIN_CFG,
3139 wmep[WME_AC_VO].wmep_logcwmin << 12 |
3140 wmep[WME_AC_VI].wmep_logcwmin << 8 |
3141 wmep[WME_AC_BK].wmep_logcwmin << 4 |
3142 wmep[WME_AC_BE].wmep_logcwmin);
3143 RAL_WRITE(sc, RT2860_WMM_CWMAX_CFG,
3144 wmep[WME_AC_VO].wmep_logcwmax << 12 |
3145 wmep[WME_AC_VI].wmep_logcwmax << 8 |
3146 wmep[WME_AC_BK].wmep_logcwmax << 4 |
3147 wmep[WME_AC_BE].wmep_logcwmax);
3148 RAL_WRITE(sc, RT2860_WMM_TXOP0_CFG,
3149 wmep[WME_AC_BK].wmep_txopLimit << 16 |
3150 wmep[WME_AC_BE].wmep_txopLimit);
3151 RAL_WRITE(sc, RT2860_WMM_TXOP1_CFG,
3152 wmep[WME_AC_VO].wmep_txopLimit << 16 |
3153 wmep[WME_AC_VI].wmep_txopLimit);
3160 rt2860_set_key(struct ieee80211com *ic, struct ieee80211_node *ni,
3161 struct ieee80211_key *k)
3163 struct rt2860_softc *sc = ic->ic_softc;
3166 uint8_t mode, wcid, iv[8];
3168 /* defer setting of WEP keys until interface is brought up */
3169 if ((ic->ic_if.if_flags & (IFF_UP | IFF_RUNNING)) !=
3170 (IFF_UP | IFF_RUNNING))
3173 /* map net80211 cipher to RT2860 security mode */
3174 switch (k->k_cipher) {
3175 case IEEE80211_CIPHER_WEP40:
3176 mode = RT2860_MODE_WEP40;
3178 case IEEE80211_CIPHER_WEP104:
3179 mode = RT2860_MODE_WEP104;
3181 case IEEE80211_CIPHER_TKIP:
3182 mode = RT2860_MODE_TKIP;
3184 case IEEE80211_CIPHER_CCMP:
3185 mode = RT2860_MODE_AES_CCMP;
3191 if (k->k_flags & IEEE80211_KEY_GROUP) {
3192 wcid = 0; /* NB: update WCID0 for group keys */
3193 base = RT2860_SKEY(0, k->k_id);
3195 wcid = ((struct rt2860_node *)ni)->wcid;
3196 base = RT2860_PKEY(wcid);
3199 if (k->k_cipher == IEEE80211_CIPHER_TKIP) {
3200 RAL_WRITE_REGION_1(sc, base, k->k_key, 16);
3201 #ifndef IEEE80211_STA_ONLY
3202 if (ic->ic_opmode == IEEE80211_M_HOSTAP) {
3203 RAL_WRITE_REGION_1(sc, base + 16, &k->k_key[16], 8);
3204 RAL_WRITE_REGION_1(sc, base + 24, &k->k_key[24], 8);
3208 RAL_WRITE_REGION_1(sc, base + 16, &k->k_key[24], 8);
3209 RAL_WRITE_REGION_1(sc, base + 24, &k->k_key[16], 8);
3212 RAL_WRITE_REGION_1(sc, base, k->k_key, k->k_len);
3214 if (!(k->k_flags & IEEE80211_KEY_GROUP) ||
3215 (k->k_flags & IEEE80211_KEY_TX)) {
3216 /* set initial packet number in IV+EIV */
3217 if (k->k_cipher == IEEE80211_CIPHER_WEP40 ||
3218 k->k_cipher == IEEE80211_CIPHER_WEP104) {
3219 uint32_t val = arc4random();
3220 /* skip weak IVs from Fluhrer/Mantin/Shamir */
3221 if (val >= 0x03ff00 && (val & 0xf8ff00) == 0x00ff00)
3226 iv[3] = k->k_id << 6;
3227 iv[4] = iv[5] = iv[6] = iv[7] = 0;
3229 if (k->k_cipher == IEEE80211_CIPHER_TKIP) {
3230 iv[0] = k->k_tsc >> 8;
3231 iv[1] = (iv[0] | 0x20) & 0x7f;
3235 iv[1] = k->k_tsc >> 8;
3238 iv[3] = k->k_id << 6 | IEEE80211_WEP_EXTIV;
3239 iv[4] = k->k_tsc >> 16;
3240 iv[5] = k->k_tsc >> 24;
3241 iv[6] = k->k_tsc >> 32;
3242 iv[7] = k->k_tsc >> 40;
3244 RAL_WRITE_REGION_1(sc, RT2860_IVEIV(wcid), iv, 8);
3247 if (k->k_flags & IEEE80211_KEY_GROUP) {
3248 /* install group key */
3249 attr = RAL_READ(sc, RT2860_SKEY_MODE_0_7);
3250 attr &= ~(0xf << (k->k_id * 4));
3251 attr |= mode << (k->k_id * 4);
3252 RAL_WRITE(sc, RT2860_SKEY_MODE_0_7, attr);
3254 /* install pairwise key */
3255 attr = RAL_READ(sc, RT2860_WCID_ATTR(wcid));
3256 attr = (attr & ~0xf) | (mode << 1) | RT2860_RX_PKEY_EN;
3257 RAL_WRITE(sc, RT2860_WCID_ATTR(wcid), attr);
3263 rt2860_delete_key(struct ieee80211com *ic, struct ieee80211_node *ni,
3264 struct ieee80211_key *k)
3266 struct rt2860_softc *sc = ic->ic_softc;
3270 if (k->k_flags & IEEE80211_KEY_GROUP) {
3271 /* remove group key */
3272 attr = RAL_READ(sc, RT2860_SKEY_MODE_0_7);
3273 attr &= ~(0xf << (k->k_id * 4));
3274 RAL_WRITE(sc, RT2860_SKEY_MODE_0_7, attr);
3277 /* remove pairwise key */
3278 wcid = ((struct rt2860_node *)ni)->wcid;
3279 attr = RAL_READ(sc, RT2860_WCID_ATTR(wcid));
3281 RAL_WRITE(sc, RT2860_WCID_ATTR(wcid), attr);
3287 rt2860_rssi2dbm(struct rt2860_softc *sc, uint8_t rssi, uint8_t rxchain)
3289 struct ieee80211com *ic = &sc->sc_ic;
3290 struct ieee80211_channel *c = ic->ic_curchan;
3293 if (IEEE80211_IS_CHAN_5GHZ(c)) {
3294 u_int chan = ieee80211_chan2ieee(ic, c);
3295 delta = sc->rssi_5ghz[rxchain];
3297 /* determine channel group */
3299 delta -= sc->lna[1];
3300 else if (chan <= 128)
3301 delta -= sc->lna[2];
3303 delta -= sc->lna[3];
3305 delta = sc->rssi_2ghz[rxchain] - sc->lna[0];
3307 return -12 - delta - rssi;
3311 * Add `delta' (signed) to each 4-bit sub-word of a 32-bit word.
3312 * Used to adjust per-rate Tx power registers.
3314 static __inline uint32_t
3315 b4inc(uint32_t b32, int8_t delta)
3319 for (i = 0; i < 8; i++) {
3326 b32 = b32 >> 4 | (uint32_t)b4 << 28;
3332 rt2860_get_rf(uint16_t rev)
3335 case RT2860_RF_2820: return "RT2820";
3336 case RT2860_RF_2850: return "RT2850";
3337 case RT2860_RF_2720: return "RT2720";
3338 case RT2860_RF_2750: return "RT2750";
3339 case RT3070_RF_3020: return "RT3020";
3340 case RT3070_RF_2020: return "RT2020";
3341 case RT3070_RF_3021: return "RT3021";
3342 case RT3070_RF_3022: return "RT3022";
3343 case RT3070_RF_3052: return "RT3052";
3344 case RT3070_RF_3320: return "RT3320";
3345 case RT3070_RF_3053: return "RT3053";
3346 case RT5390_RF_5360: return "RT5360";
3347 case RT5390_RF_5390: return "RT5390";
3348 default: return "unknown";
3353 rt2860_read_eeprom(struct rt2860_softc *sc, uint8_t macaddr[IEEE80211_ADDR_LEN])
3355 int8_t delta_2ghz, delta_5ghz;
3360 /* check whether the ROM is eFUSE ROM or EEPROM */
3361 sc->sc_srom_read = rt2860_eeprom_read_2;
3362 if (sc->mac_ver >= 0x3071) {
3363 tmp = RAL_READ(sc, RT3070_EFUSE_CTRL);
3364 DPRINTF(("EFUSE_CTRL=0x%08x\n", tmp));
3365 if (tmp & RT3070_SEL_EFUSE)
3366 sc->sc_srom_read = rt3090_efuse_read_2;
3370 /* read EEPROM version */
3371 val = rt2860_srom_read(sc, RT2860_EEPROM_VERSION);
3372 DPRINTF(("EEPROM rev=%d, FAE=%d\n", val >> 8, val & 0xff));
3375 /* read MAC address */
3376 val = rt2860_srom_read(sc, RT2860_EEPROM_MAC01);
3377 macaddr[0] = val & 0xff;
3378 macaddr[1] = val >> 8;
3379 val = rt2860_srom_read(sc, RT2860_EEPROM_MAC23);
3380 macaddr[2] = val & 0xff;
3381 macaddr[3] = val >> 8;
3382 val = rt2860_srom_read(sc, RT2860_EEPROM_MAC45);
3383 macaddr[4] = val & 0xff;
3384 macaddr[5] = val >> 8;
3387 /* read country code */
3388 val = rt2860_srom_read(sc, RT2860_EEPROM_COUNTRY);
3389 DPRINTF(("EEPROM region code=0x%04x\n", val));
3392 /* read vendor BBP settings */
3393 for (i = 0; i < 8; i++) {
3394 val = rt2860_srom_read(sc, RT2860_EEPROM_BBP_BASE + i);
3395 sc->bbp[i].val = val & 0xff;
3396 sc->bbp[i].reg = val >> 8;
3397 DPRINTF(("BBP%d=0x%02x\n", sc->bbp[i].reg, sc->bbp[i].val));
3399 if (sc->mac_ver >= 0x3071) {
3400 /* read vendor RF settings */
3401 for (i = 0; i < 10; i++) {
3402 val = rt2860_srom_read(sc, RT3071_EEPROM_RF_BASE + i);
3403 sc->rf[i].val = val & 0xff;
3404 sc->rf[i].reg = val >> 8;
3405 DPRINTF(("RF%d=0x%02x\n", sc->rf[i].reg,
3410 /* read RF frequency offset from EEPROM */
3411 val = rt2860_srom_read(sc, RT2860_EEPROM_FREQ_LEDS);
3412 sc->freq = ((val & 0xff) != 0xff) ? val & 0xff : 0;
3413 DPRINTF(("EEPROM freq offset %d\n", sc->freq & 0xff));
3414 if ((val >> 8) != 0xff) {
3415 /* read LEDs operating mode */
3416 sc->leds = val >> 8;
3417 sc->led[0] = rt2860_srom_read(sc, RT2860_EEPROM_LED1);
3418 sc->led[1] = rt2860_srom_read(sc, RT2860_EEPROM_LED2);
3419 sc->led[2] = rt2860_srom_read(sc, RT2860_EEPROM_LED3);
3421 /* broken EEPROM, use default settings */
3423 sc->led[0] = 0x5555;
3424 sc->led[1] = 0x2221;
3425 sc->led[2] = 0xa9f8;
3427 DPRINTF(("EEPROM LED mode=0x%02x, LEDs=0x%04x/0x%04x/0x%04x\n",
3428 sc->leds, sc->led[0], sc->led[1], sc->led[2]));
3430 /* read RF information */
3431 val = rt2860_srom_read(sc, RT2860_EEPROM_ANTENNA);
3432 if (sc->mac_ver >= 0x5390)
3433 sc->rf_rev = rt2860_srom_read(sc, RT2860_EEPROM_CHIPID);
3435 sc->rf_rev = (val >> 8) & 0xf;
3436 sc->ntxchains = (val >> 4) & 0xf;
3437 sc->nrxchains = val & 0xf;
3438 DPRINTF(("EEPROM RF rev=0x%02x chains=%dT%dR\n",
3439 sc->rf_rev, sc->ntxchains, sc->nrxchains));
3441 /* check if RF supports automatic Tx access gain control */
3442 val = rt2860_srom_read(sc, RT2860_EEPROM_CONFIG);
3443 DPRINTF(("EEPROM CFG 0x%04x\n", val));
3444 /* check if driver should patch the DAC issue */
3445 if ((val >> 8) != 0xff)
3446 sc->patch_dac = (val >> 15) & 1;
3447 if ((val & 0xff) != 0xff) {
3448 sc->ext_5ghz_lna = (val >> 3) & 1;
3449 sc->ext_2ghz_lna = (val >> 2) & 1;
3450 /* check if RF supports automatic Tx access gain control */
3451 sc->calib_2ghz = sc->calib_5ghz = 0; /* XXX (val >> 1) & 1 */
3452 /* check if we have a hardware radio switch */
3453 sc->rfswitch = val & 1;
3455 if (sc->sc_flags & RT2860_ADVANCED_PS) {
3456 /* read PCIe power save level */
3457 val = rt2860_srom_read(sc, RT2860_EEPROM_PCIE_PSLEVEL);
3458 if ((val & 0xff) != 0xff) {
3459 sc->pslevel = val & 0x3;
3460 val = rt2860_srom_read(sc, RT2860_EEPROM_REV);
3461 if ((val & 0xff80) != 0x9280)
3462 sc->pslevel = MIN(sc->pslevel, 1);
3463 DPRINTF(("EEPROM PCIe PS Level=%d\n", sc->pslevel));
3467 /* read power settings for 2GHz channels */
3468 for (i = 0; i < 14; i += 2) {
3469 val = rt2860_srom_read(sc,
3470 RT2860_EEPROM_PWR2GHZ_BASE1 + i / 2);
3471 sc->txpow1[i + 0] = (int8_t)(val & 0xff);
3472 sc->txpow1[i + 1] = (int8_t)(val >> 8);
3474 if (sc->mac_ver != 0x5390) {
3475 val = rt2860_srom_read(sc,
3476 RT2860_EEPROM_PWR2GHZ_BASE2 + i / 2);
3477 sc->txpow2[i + 0] = (int8_t)(val & 0xff);
3478 sc->txpow2[i + 1] = (int8_t)(val >> 8);
3481 /* fix broken Tx power entries */
3482 for (i = 0; i < 14; i++) {
3483 if (sc->txpow1[i] < 0 ||
3484 sc->txpow1[i] > ((sc->mac_ver >= 0x5390) ? 39 : 31))
3486 if (sc->mac_ver != 0x5390) {
3487 if (sc->txpow2[i] < 0 ||
3488 sc->txpow2[i] > ((sc->mac_ver == 0x5392) ? 39 : 31))
3491 DPRINTF(("chan %d: power1=%d, power2=%d\n",
3492 rt2860_rf2850[i].chan, sc->txpow1[i], sc->txpow2[i]));
3494 /* read power settings for 5GHz channels */
3495 for (i = 0; i < 40; i += 2) {
3496 val = rt2860_srom_read(sc,
3497 RT2860_EEPROM_PWR5GHZ_BASE1 + i / 2);
3498 sc->txpow1[i + 14] = (int8_t)(val & 0xff);
3499 sc->txpow1[i + 15] = (int8_t)(val >> 8);
3501 val = rt2860_srom_read(sc,
3502 RT2860_EEPROM_PWR5GHZ_BASE2 + i / 2);
3503 sc->txpow2[i + 14] = (int8_t)(val & 0xff);
3504 sc->txpow2[i + 15] = (int8_t)(val >> 8);
3506 /* fix broken Tx power entries */
3507 for (i = 0; i < 40; i++) {
3508 if (sc->txpow1[14 + i] < -7 || sc->txpow1[14 + i] > 15)
3509 sc->txpow1[14 + i] = 5;
3510 if (sc->txpow2[14 + i] < -7 || sc->txpow2[14 + i] > 15)
3511 sc->txpow2[14 + i] = 5;
3512 DPRINTF(("chan %d: power1=%d, power2=%d\n",
3513 rt2860_rf2850[14 + i].chan, sc->txpow1[14 + i],
3514 sc->txpow2[14 + i]));
3517 /* read Tx power compensation for each Tx rate */
3518 val = rt2860_srom_read(sc, RT2860_EEPROM_DELTAPWR);
3519 delta_2ghz = delta_5ghz = 0;
3520 if ((val & 0xff) != 0xff && (val & 0x80)) {
3521 delta_2ghz = val & 0xf;
3522 if (!(val & 0x40)) /* negative number */
3523 delta_2ghz = -delta_2ghz;
3526 if ((val & 0xff) != 0xff && (val & 0x80)) {
3527 delta_5ghz = val & 0xf;
3528 if (!(val & 0x40)) /* negative number */
3529 delta_5ghz = -delta_5ghz;
3531 DPRINTF(("power compensation=%d (2GHz), %d (5GHz)\n",
3532 delta_2ghz, delta_5ghz));
3534 for (ridx = 0; ridx < 5; ridx++) {
3537 val = rt2860_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2);
3539 val = rt2860_srom_read(sc, RT2860_EEPROM_RPWR + ridx * 2 + 1);
3540 reg |= (uint32_t)val << 16;
3542 sc->txpow20mhz[ridx] = reg;
3543 sc->txpow40mhz_2ghz[ridx] = b4inc(reg, delta_2ghz);
3544 sc->txpow40mhz_5ghz[ridx] = b4inc(reg, delta_5ghz);
3546 DPRINTF(("ridx %d: power 20MHz=0x%08x, 40MHz/2GHz=0x%08x, "
3547 "40MHz/5GHz=0x%08x\n", ridx, sc->txpow20mhz[ridx],
3548 sc->txpow40mhz_2ghz[ridx], sc->txpow40mhz_5ghz[ridx]));
3551 /* read factory-calibrated samples for temperature compensation */
3552 val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI1_2GHZ);
3553 sc->tssi_2ghz[0] = val & 0xff; /* [-4] */
3554 sc->tssi_2ghz[1] = val >> 8; /* [-3] */
3555 val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI2_2GHZ);
3556 sc->tssi_2ghz[2] = val & 0xff; /* [-2] */
3557 sc->tssi_2ghz[3] = val >> 8; /* [-1] */
3558 val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI3_2GHZ);
3559 sc->tssi_2ghz[4] = val & 0xff; /* [+0] */
3560 sc->tssi_2ghz[5] = val >> 8; /* [+1] */
3561 val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI4_2GHZ);
3562 sc->tssi_2ghz[6] = val & 0xff; /* [+2] */
3563 sc->tssi_2ghz[7] = val >> 8; /* [+3] */
3564 val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI5_2GHZ);
3565 sc->tssi_2ghz[8] = val & 0xff; /* [+4] */
3566 sc->step_2ghz = val >> 8;
3567 DPRINTF(("TSSI 2GHz: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x "
3568 "0x%02x 0x%02x step=%d\n", sc->tssi_2ghz[0], sc->tssi_2ghz[1],
3569 sc->tssi_2ghz[2], sc->tssi_2ghz[3], sc->tssi_2ghz[4],
3570 sc->tssi_2ghz[5], sc->tssi_2ghz[6], sc->tssi_2ghz[7],
3571 sc->tssi_2ghz[8], sc->step_2ghz));
3572 /* check that ref value is correct, otherwise disable calibration */
3573 if (sc->tssi_2ghz[4] == 0xff)
3576 val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI1_5GHZ);
3577 sc->tssi_5ghz[0] = val & 0xff; /* [-4] */
3578 sc->tssi_5ghz[1] = val >> 8; /* [-3] */
3579 val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI2_5GHZ);
3580 sc->tssi_5ghz[2] = val & 0xff; /* [-2] */
3581 sc->tssi_5ghz[3] = val >> 8; /* [-1] */
3582 val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI3_5GHZ);
3583 sc->tssi_5ghz[4] = val & 0xff; /* [+0] */
3584 sc->tssi_5ghz[5] = val >> 8; /* [+1] */
3585 val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI4_5GHZ);
3586 sc->tssi_5ghz[6] = val & 0xff; /* [+2] */
3587 sc->tssi_5ghz[7] = val >> 8; /* [+3] */
3588 val = rt2860_srom_read(sc, RT2860_EEPROM_TSSI5_5GHZ);
3589 sc->tssi_5ghz[8] = val & 0xff; /* [+4] */
3590 sc->step_5ghz = val >> 8;
3591 DPRINTF(("TSSI 5GHz: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x "
3592 "0x%02x 0x%02x step=%d\n", sc->tssi_5ghz[0], sc->tssi_5ghz[1],
3593 sc->tssi_5ghz[2], sc->tssi_5ghz[3], sc->tssi_5ghz[4],
3594 sc->tssi_5ghz[5], sc->tssi_5ghz[6], sc->tssi_5ghz[7],
3595 sc->tssi_5ghz[8], sc->step_5ghz));
3596 /* check that ref value is correct, otherwise disable calibration */
3597 if (sc->tssi_5ghz[4] == 0xff)
3600 /* read RSSI offsets and LNA gains from EEPROM */
3601 val = rt2860_srom_read(sc, RT2860_EEPROM_RSSI1_2GHZ);
3602 sc->rssi_2ghz[0] = val & 0xff; /* Ant A */
3603 sc->rssi_2ghz[1] = val >> 8; /* Ant B */
3604 val = rt2860_srom_read(sc, RT2860_EEPROM_RSSI2_2GHZ);
3605 if (sc->mac_ver >= 0x3071) {
3607 * On RT3090 chips (limited to 2 Rx chains), this ROM
3608 * field contains the Tx mixer gain for the 2GHz band.
3610 if ((val & 0xff) != 0xff)
3611 sc->txmixgain_2ghz = val & 0x7;
3612 DPRINTF(("tx mixer gain=%u (2GHz)\n", sc->txmixgain_2ghz));
3614 sc->rssi_2ghz[2] = val & 0xff; /* Ant C */
3615 sc->lna[2] = val >> 8; /* channel group 2 */
3617 val = rt2860_srom_read(sc, RT2860_EEPROM_RSSI1_5GHZ);
3618 sc->rssi_5ghz[0] = val & 0xff; /* Ant A */
3619 sc->rssi_5ghz[1] = val >> 8; /* Ant B */
3620 val = rt2860_srom_read(sc, RT2860_EEPROM_RSSI2_5GHZ);
3621 sc->rssi_5ghz[2] = val & 0xff; /* Ant C */
3622 sc->lna[3] = val >> 8; /* channel group 3 */
3624 val = rt2860_srom_read(sc, RT2860_EEPROM_LNA);
3625 if (sc->mac_ver >= 0x3071)
3626 sc->lna[0] = RT3090_DEF_LNA;
3627 else /* channel group 0 */
3628 sc->lna[0] = val & 0xff;
3629 sc->lna[1] = val >> 8; /* channel group 1 */
3631 /* fix broken 5GHz LNA entries */
3632 if (sc->lna[2] == 0 || sc->lna[2] == 0xff) {
3633 DPRINTF(("invalid LNA for channel group %d\n", 2));
3634 sc->lna[2] = sc->lna[1];
3636 if (sc->lna[3] == 0 || sc->lna[3] == 0xff) {
3637 DPRINTF(("invalid LNA for channel group %d\n", 3));
3638 sc->lna[3] = sc->lna[1];
3641 /* fix broken RSSI offset entries */
3642 for (ant = 0; ant < 3; ant++) {
3643 if (sc->rssi_2ghz[ant] < -10 || sc->rssi_2ghz[ant] > 10) {
3644 DPRINTF(("invalid RSSI%d offset: %d (2GHz)\n",
3645 ant + 1, sc->rssi_2ghz[ant]));
3646 sc->rssi_2ghz[ant] = 0;
3648 if (sc->rssi_5ghz[ant] < -10 || sc->rssi_5ghz[ant] > 10) {
3649 DPRINTF(("invalid RSSI%d offset: %d (5GHz)\n",
3650 ant + 1, sc->rssi_5ghz[ant]));
3651 sc->rssi_5ghz[ant] = 0;
3659 rt2860_bbp_init(struct rt2860_softc *sc)
3663 /* wait for BBP to wake up */
3664 for (ntries = 0; ntries < 20; ntries++) {
3665 uint8_t bbp0 = rt2860_mcu_bbp_read(sc, 0);
3666 if (bbp0 != 0 && bbp0 != 0xff)
3670 device_printf(sc->sc_dev,
3671 "timeout waiting for BBP to wake up\n");
3675 /* initialize BBP registers to default values */
3676 if (sc->mac_ver >= 0x5390)
3677 rt5390_bbp_init(sc);
3679 for (i = 0; i < nitems(rt2860_def_bbp); i++) {
3680 rt2860_mcu_bbp_write(sc, rt2860_def_bbp[i].reg,
3681 rt2860_def_bbp[i].val);
3685 /* fix BBP84 for RT2860E */
3686 if (sc->mac_ver == 0x2860 && sc->mac_rev != 0x0101)
3687 rt2860_mcu_bbp_write(sc, 84, 0x19);
3689 if (sc->mac_ver >= 0x3071) {
3690 rt2860_mcu_bbp_write(sc, 79, 0x13);
3691 rt2860_mcu_bbp_write(sc, 80, 0x05);
3692 rt2860_mcu_bbp_write(sc, 81, 0x33);
3693 } else if (sc->mac_ver == 0x2860 && sc->mac_rev == 0x0100) {
3694 rt2860_mcu_bbp_write(sc, 69, 0x16);
3695 rt2860_mcu_bbp_write(sc, 73, 0x12);
3702 rt5390_bbp_init(struct rt2860_softc *sc)
3707 /* Apply maximum likelihood detection for 2 stream case. */
3708 if (sc->nrxchains > 1) {
3709 bbp = rt2860_mcu_bbp_read(sc, 105);
3710 rt2860_mcu_bbp_write(sc, 105, bbp | RT5390_MLD);
3713 /* Avoid data lost and CRC error. */
3714 bbp = rt2860_mcu_bbp_read(sc, 4);
3715 rt2860_mcu_bbp_write(sc, 4, bbp | RT5390_MAC_IF_CTRL);
3717 for (i = 0; i < nitems(rt5390_def_bbp); i++) {
3718 rt2860_mcu_bbp_write(sc, rt5390_def_bbp[i].reg,
3719 rt5390_def_bbp[i].val);
3722 if (sc->mac_ver == 0x5392) {
3723 rt2860_mcu_bbp_write(sc, 84, 0x9a);
3724 rt2860_mcu_bbp_write(sc, 95, 0x9a);
3725 rt2860_mcu_bbp_write(sc, 98, 0x12);
3726 rt2860_mcu_bbp_write(sc, 106, 0x05);
3727 rt2860_mcu_bbp_write(sc, 134, 0xd0);
3728 rt2860_mcu_bbp_write(sc, 135, 0xf6);
3731 bbp = rt2860_mcu_bbp_read(sc, 152);
3732 rt2860_mcu_bbp_write(sc, 152, bbp | 0x80);
3734 /* Disable hardware antenna diversity. */
3735 if (sc->mac_ver == 0x5390)
3736 rt2860_mcu_bbp_write(sc, 154, 0);
3740 rt2860_txrx_enable(struct rt2860_softc *sc)
3742 struct ieee80211com *ic = &sc->sc_ic;
3746 /* enable Tx/Rx DMA engine */
3747 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, RT2860_MAC_TX_EN);
3748 RAL_BARRIER_READ_WRITE(sc);
3749 for (ntries = 0; ntries < 200; ntries++) {
3750 tmp = RAL_READ(sc, RT2860_WPDMA_GLO_CFG);
3751 if ((tmp & (RT2860_TX_DMA_BUSY | RT2860_RX_DMA_BUSY)) == 0)
3755 if (ntries == 200) {
3756 device_printf(sc->sc_dev, "timeout waiting for DMA engine\n");
3762 tmp |= RT2860_RX_DMA_EN | RT2860_TX_DMA_EN |
3763 RT2860_WPDMA_BT_SIZE64 << RT2860_WPDMA_BT_SIZE_SHIFT;
3764 RAL_WRITE(sc, RT2860_WPDMA_GLO_CFG, tmp);
3767 tmp = RT2860_DROP_CRC_ERR | RT2860_DROP_PHY_ERR;
3768 if (ic->ic_opmode != IEEE80211_M_MONITOR) {
3769 tmp |= RT2860_DROP_UC_NOME | RT2860_DROP_DUPL |
3770 RT2860_DROP_CTS | RT2860_DROP_BA | RT2860_DROP_ACK |
3771 RT2860_DROP_VER_ERR | RT2860_DROP_CTRL_RSV |
3772 RT2860_DROP_CFACK | RT2860_DROP_CFEND;
3773 if (ic->ic_opmode == IEEE80211_M_STA)
3774 tmp |= RT2860_DROP_RTS | RT2860_DROP_PSPOLL;
3776 RAL_WRITE(sc, RT2860_RX_FILTR_CFG, tmp);
3778 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL,
3779 RT2860_MAC_RX_EN | RT2860_MAC_TX_EN);
3785 rt2860_init(void *arg)
3787 struct rt2860_softc *sc = arg;
3788 struct ieee80211com *ic = &sc->sc_ic;
3791 rt2860_init_locked(sc);
3794 if (sc->sc_flags & RT2860_RUNNING)
3795 ieee80211_start_all(ic);
3799 rt2860_init_locked(struct rt2860_softc *sc)
3801 struct ieee80211com *ic = &sc->sc_ic;
3802 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
3805 int i, qid, ridx, ntries, error;
3807 RAL_LOCK_ASSERT(sc);
3810 /* hardware has a radio switch on GPIO pin 2 */
3811 if (!(RAL_READ(sc, RT2860_GPIO_CTRL) & (1 << 2))) {
3812 device_printf(sc->sc_dev,
3813 "radio is disabled by hardware switch\n");
3815 rt2860_stop_locked(sc);
3820 RAL_WRITE(sc, RT2860_PWR_PIN_CFG, RT2860_IO_RA_PE);
3823 tmp = RAL_READ(sc, RT2860_WPDMA_GLO_CFG);
3824 tmp &= ~(RT2860_RX_DMA_BUSY | RT2860_RX_DMA_EN | RT2860_TX_DMA_BUSY |
3826 tmp |= RT2860_TX_WB_DDONE;
3827 RAL_WRITE(sc, RT2860_WPDMA_GLO_CFG, tmp);
3829 /* reset DMA indexes */
3830 RAL_WRITE(sc, RT2860_WPDMA_RST_IDX, RT2860_RST_DRX_IDX0 |
3831 RT2860_RST_DTX_IDX5 | RT2860_RST_DTX_IDX4 | RT2860_RST_DTX_IDX3 |
3832 RT2860_RST_DTX_IDX2 | RT2860_RST_DTX_IDX1 | RT2860_RST_DTX_IDX0);
3834 /* PBF hardware reset */
3835 RAL_WRITE(sc, RT2860_SYS_CTRL, 0xe1f);
3836 RAL_BARRIER_WRITE(sc);
3837 RAL_WRITE(sc, RT2860_SYS_CTRL, 0xe00);
3839 if ((error = rt2860_load_microcode(sc)) != 0) {
3840 device_printf(sc->sc_dev, "could not load 8051 microcode\n");
3841 rt2860_stop_locked(sc);
3845 rt2860_set_macaddr(sc, vap ? vap->iv_myaddr : ic->ic_macaddr);
3847 /* init Tx power for all Tx rates (from EEPROM) */
3848 for (ridx = 0; ridx < 5; ridx++) {
3849 if (sc->txpow20mhz[ridx] == 0xffffffff)
3851 RAL_WRITE(sc, RT2860_TX_PWR_CFG(ridx), sc->txpow20mhz[ridx]);
3854 for (ntries = 0; ntries < 100; ntries++) {
3855 tmp = RAL_READ(sc, RT2860_WPDMA_GLO_CFG);
3856 if ((tmp & (RT2860_TX_DMA_BUSY | RT2860_RX_DMA_BUSY)) == 0)
3860 if (ntries == 100) {
3861 device_printf(sc->sc_dev, "timeout waiting for DMA engine\n");
3862 rt2860_stop_locked(sc);
3865 tmp &= ~(RT2860_RX_DMA_BUSY | RT2860_RX_DMA_EN | RT2860_TX_DMA_BUSY |
3867 tmp |= RT2860_TX_WB_DDONE;
3868 RAL_WRITE(sc, RT2860_WPDMA_GLO_CFG, tmp);
3870 /* reset Rx ring and all 6 Tx rings */
3871 RAL_WRITE(sc, RT2860_WPDMA_RST_IDX, 0x1003f);
3873 /* PBF hardware reset */
3874 RAL_WRITE(sc, RT2860_SYS_CTRL, 0xe1f);
3875 RAL_BARRIER_WRITE(sc);
3876 RAL_WRITE(sc, RT2860_SYS_CTRL, 0xe00);
3878 RAL_WRITE(sc, RT2860_PWR_PIN_CFG, RT2860_IO_RA_PE | RT2860_IO_RF_PE);
3880 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, RT2860_BBP_HRST | RT2860_MAC_SRST);
3881 RAL_BARRIER_WRITE(sc);
3882 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, 0);
3884 for (i = 0; i < nitems(rt2860_def_mac); i++)
3885 RAL_WRITE(sc, rt2860_def_mac[i].reg, rt2860_def_mac[i].val);
3886 if (sc->mac_ver >= 0x5390)
3887 RAL_WRITE(sc, RT2860_TX_SW_CFG0, 0x00000404);
3888 else if (sc->mac_ver >= 0x3071) {
3889 /* set delay of PA_PE assertion to 1us (unit of 0.25us) */
3890 RAL_WRITE(sc, RT2860_TX_SW_CFG0,
3891 4 << RT2860_DLY_PAPE_EN_SHIFT);
3894 if (!(RAL_READ(sc, RT2860_PCI_CFG) & RT2860_PCI_CFG_PCI)) {
3895 sc->sc_flags |= RT2860_PCIE;
3896 /* PCIe has different clock cycle count than PCI */
3897 tmp = RAL_READ(sc, RT2860_US_CYC_CNT);
3898 tmp = (tmp & ~0xff) | 0x7d;
3899 RAL_WRITE(sc, RT2860_US_CYC_CNT, tmp);
3902 /* wait while MAC is busy */
3903 for (ntries = 0; ntries < 100; ntries++) {
3904 if (!(RAL_READ(sc, RT2860_MAC_STATUS_REG) &
3905 (RT2860_RX_STATUS_BUSY | RT2860_TX_STATUS_BUSY)))
3909 if (ntries == 100) {
3910 device_printf(sc->sc_dev, "timeout waiting for MAC\n");
3911 rt2860_stop_locked(sc);
3915 /* clear Host to MCU mailbox */
3916 RAL_WRITE(sc, RT2860_H2M_BBPAGENT, 0);
3917 RAL_WRITE(sc, RT2860_H2M_MAILBOX, 0);
3919 rt2860_mcu_cmd(sc, RT2860_MCU_CMD_RFRESET, 0, 0);
3922 if ((error = rt2860_bbp_init(sc)) != 0) {
3923 rt2860_stop_locked(sc);
3927 /* clear RX WCID search table */
3928 RAL_SET_REGION_4(sc, RT2860_WCID_ENTRY(0), 0, 512);
3929 /* clear pairwise key table */
3930 RAL_SET_REGION_4(sc, RT2860_PKEY(0), 0, 2048);
3931 /* clear IV/EIV table */
3932 RAL_SET_REGION_4(sc, RT2860_IVEIV(0), 0, 512);
3933 /* clear WCID attribute table */
3934 RAL_SET_REGION_4(sc, RT2860_WCID_ATTR(0), 0, 256);
3935 /* clear shared key table */
3936 RAL_SET_REGION_4(sc, RT2860_SKEY(0, 0), 0, 8 * 32);
3937 /* clear shared key mode */
3938 RAL_SET_REGION_4(sc, RT2860_SKEY_MODE_0_7, 0, 4);
3940 /* init Tx rings (4 EDCAs + HCCA + Mgt) */
3941 for (qid = 0; qid < 6; qid++) {
3942 RAL_WRITE(sc, RT2860_TX_BASE_PTR(qid), sc->txq[qid].paddr);
3943 RAL_WRITE(sc, RT2860_TX_MAX_CNT(qid), RT2860_TX_RING_COUNT);
3944 RAL_WRITE(sc, RT2860_TX_CTX_IDX(qid), 0);
3948 RAL_WRITE(sc, RT2860_RX_BASE_PTR, sc->rxq.paddr);
3949 RAL_WRITE(sc, RT2860_RX_MAX_CNT, RT2860_RX_RING_COUNT);
3950 RAL_WRITE(sc, RT2860_RX_CALC_IDX, RT2860_RX_RING_COUNT - 1);
3952 /* setup maximum buffer sizes */
3953 RAL_WRITE(sc, RT2860_MAX_LEN_CFG, 1 << 12 |
3954 (MCLBYTES - sizeof (struct rt2860_rxwi) - 2));
3956 for (ntries = 0; ntries < 100; ntries++) {
3957 tmp = RAL_READ(sc, RT2860_WPDMA_GLO_CFG);
3958 if ((tmp & (RT2860_TX_DMA_BUSY | RT2860_RX_DMA_BUSY)) == 0)
3962 if (ntries == 100) {
3963 device_printf(sc->sc_dev, "timeout waiting for DMA engine\n");
3964 rt2860_stop_locked(sc);
3967 tmp &= ~(RT2860_RX_DMA_BUSY | RT2860_RX_DMA_EN | RT2860_TX_DMA_BUSY |
3969 tmp |= RT2860_TX_WB_DDONE;
3970 RAL_WRITE(sc, RT2860_WPDMA_GLO_CFG, tmp);
3972 /* disable interrupts mitigation */
3973 RAL_WRITE(sc, RT2860_DELAY_INT_CFG, 0);
3975 /* write vendor-specific BBP values (from EEPROM) */
3976 for (i = 0; i < 8; i++) {
3977 if (sc->bbp[i].reg == 0 || sc->bbp[i].reg == 0xff)
3979 rt2860_mcu_bbp_write(sc, sc->bbp[i].reg, sc->bbp[i].val);
3982 /* select Main antenna for 1T1R devices */
3983 if (sc->rf_rev == RT3070_RF_2020 ||
3984 sc->rf_rev == RT3070_RF_3020 ||
3985 sc->rf_rev == RT3070_RF_3320 ||
3986 sc->mac_ver == 0x5390)
3987 rt3090_set_rx_antenna(sc, 0);
3989 /* send LEDs operating mode to microcontroller */
3990 rt2860_mcu_cmd(sc, RT2860_MCU_CMD_LED1, sc->led[0], 0);
3991 rt2860_mcu_cmd(sc, RT2860_MCU_CMD_LED2, sc->led[1], 0);
3992 rt2860_mcu_cmd(sc, RT2860_MCU_CMD_LED3, sc->led[2], 0);
3994 if (sc->mac_ver >= 0x5390)
3996 else if (sc->mac_ver >= 0x3071) {
3997 if ((error = rt3090_rf_init(sc)) != 0) {
3998 rt2860_stop_locked(sc);
4003 rt2860_mcu_cmd(sc, RT2860_MCU_CMD_SLEEP, 0x02ff, 1);
4004 rt2860_mcu_cmd(sc, RT2860_MCU_CMD_WAKEUP, 0, 1);
4006 if (sc->mac_ver >= 0x5390)
4007 rt5390_rf_wakeup(sc);
4008 else if (sc->mac_ver >= 0x3071)
4009 rt3090_rf_wakeup(sc);
4011 /* disable non-existing Rx chains */
4012 bbp3 = rt2860_mcu_bbp_read(sc, 3);
4013 bbp3 &= ~(1 << 3 | 1 << 4);
4014 if (sc->nrxchains == 2)
4016 else if (sc->nrxchains == 3)
4018 rt2860_mcu_bbp_write(sc, 3, bbp3);
4020 /* disable non-existing Tx chains */
4021 bbp1 = rt2860_mcu_bbp_read(sc, 1);
4022 if (sc->ntxchains == 1)
4023 bbp1 = (bbp1 & ~(1 << 3 | 1 << 4));
4024 else if (sc->mac_ver == 0x3593 && sc->ntxchains == 2)
4025 bbp1 = (bbp1 & ~(1 << 4)) | 1 << 3;
4026 else if (sc->mac_ver == 0x3593 && sc->ntxchains == 3)
4027 bbp1 = (bbp1 & ~(1 << 3)) | 1 << 4;
4028 rt2860_mcu_bbp_write(sc, 1, bbp1);
4030 if (sc->mac_ver >= 0x3071)
4031 rt3090_rf_setup(sc);
4033 /* select default channel */
4034 rt2860_switch_chan(sc, ic->ic_curchan);
4036 /* reset RF from MCU */
4037 rt2860_mcu_cmd(sc, RT2860_MCU_CMD_RFRESET, 0, 0);
4039 /* set RTS threshold */
4040 tmp = RAL_READ(sc, RT2860_TX_RTS_CFG);
4042 tmp |= IEEE80211_RTS_DEFAULT << 8;
4043 RAL_WRITE(sc, RT2860_TX_RTS_CFG, tmp);
4045 /* setup initial protection mode */
4046 rt2860_updateprot(sc);
4048 /* turn radio LED on */
4049 rt2860_set_leds(sc, RT2860_LED_RADIO);
4051 /* enable Tx/Rx DMA engine */
4052 if ((error = rt2860_txrx_enable(sc)) != 0) {
4053 rt2860_stop_locked(sc);
4057 /* clear pending interrupts */
4058 RAL_WRITE(sc, RT2860_INT_STATUS, 0xffffffff);
4059 /* enable interrupts */
4060 RAL_WRITE(sc, RT2860_INT_MASK, 0x3fffc);
4062 if (sc->sc_flags & RT2860_ADVANCED_PS)
4063 rt2860_mcu_cmd(sc, RT2860_MCU_CMD_PSLEVEL, sc->pslevel, 0);
4065 sc->sc_flags |= RT2860_RUNNING;
4067 callout_reset(&sc->watchdog_ch, hz, rt2860_watchdog, sc);
4071 rt2860_stop(void *arg)
4073 struct rt2860_softc *sc = arg;
4076 rt2860_stop_locked(sc);
4081 rt2860_stop_locked(struct rt2860_softc *sc)
4086 if (sc->sc_flags & RT2860_RUNNING)
4087 rt2860_set_leds(sc, 0); /* turn all LEDs off */
4089 callout_stop(&sc->watchdog_ch);
4090 sc->sc_tx_timer = 0;
4091 sc->sc_flags &= ~RT2860_RUNNING;
4093 /* disable interrupts */
4094 RAL_WRITE(sc, RT2860_INT_MASK, 0);
4096 /* disable GP timer */
4097 rt2860_set_gp_timer(sc, 0);
4100 tmp = RAL_READ(sc, RT2860_MAC_SYS_CTRL);
4101 tmp &= ~(RT2860_MAC_RX_EN | RT2860_MAC_TX_EN);
4102 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, tmp);
4105 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, RT2860_BBP_HRST | RT2860_MAC_SRST);
4106 RAL_BARRIER_WRITE(sc);
4107 RAL_WRITE(sc, RT2860_MAC_SYS_CTRL, 0);
4109 /* reset Tx and Rx rings (and reclaim TXWIs) */
4111 for (qid = 0; qid < 6; qid++)
4112 rt2860_reset_tx_ring(sc, &sc->txq[qid]);
4113 rt2860_reset_rx_ring(sc, &sc->rxq);
4117 rt2860_load_microcode(struct rt2860_softc *sc)
4119 const struct firmware *fp;
4122 RAL_LOCK_ASSERT(sc);
4125 fp = firmware_get("rt2860fw");
4128 device_printf(sc->sc_dev,
4129 "unable to receive rt2860fw firmware image\n");
4133 /* set "host program ram write selection" bit */
4134 RAL_WRITE(sc, RT2860_SYS_CTRL, RT2860_HST_PM_SEL);
4135 /* write microcode image */
4136 RAL_WRITE_REGION_1(sc, RT2860_FW_BASE, fp->data, fp->datasize);
4137 /* kick microcontroller unit */
4138 RAL_WRITE(sc, RT2860_SYS_CTRL, 0);
4139 RAL_BARRIER_WRITE(sc);
4140 RAL_WRITE(sc, RT2860_SYS_CTRL, RT2860_MCU_RESET);
4142 RAL_WRITE(sc, RT2860_H2M_BBPAGENT, 0);
4143 RAL_WRITE(sc, RT2860_H2M_MAILBOX, 0);
4145 /* wait until microcontroller is ready */
4146 RAL_BARRIER_READ_WRITE(sc);
4147 for (ntries = 0; ntries < 1000; ntries++) {
4148 if (RAL_READ(sc, RT2860_SYS_CTRL) & RT2860_MCU_READY)
4152 if (ntries == 1000) {
4153 device_printf(sc->sc_dev,
4154 "timeout waiting for MCU to initialize\n");
4159 firmware_put(fp, FIRMWARE_UNLOAD);
4164 * This function is called periodically to adjust Tx power based on
4165 * temperature variation.
4169 rt2860_calib(struct rt2860_softc *sc)
4171 struct ieee80211com *ic = &sc->sc_ic;
4172 const uint8_t *tssi;
4173 uint8_t step, bbp49;
4176 /* read current temperature */
4177 bbp49 = rt2860_mcu_bbp_read(sc, 49);
4179 if (IEEE80211_IS_CHAN_2GHZ(ic->ic_bss->ni_chan)) {
4180 tssi = &sc->tssi_2ghz[4];
4181 step = sc->step_2ghz;
4183 tssi = &sc->tssi_5ghz[4];
4184 step = sc->step_5ghz;
4187 if (bbp49 < tssi[0]) { /* lower than reference */
4188 /* use higher Tx power than default */
4189 for (d = 0; d > -4 && bbp49 <= tssi[d - 1]; d--);
4190 } else if (bbp49 > tssi[0]) { /* greater than reference */
4191 /* use lower Tx power than default */
4192 for (d = 0; d < +4 && bbp49 >= tssi[d + 1]; d++);
4194 /* use default Tx power */
4199 DPRINTF(("BBP49=0x%02x, adjusting Tx power by %d\n", bbp49, d));
4201 /* write adjusted Tx power values for each Tx rate */
4202 for (ridx = 0; ridx < 5; ridx++) {
4203 if (sc->txpow20mhz[ridx] == 0xffffffff)
4205 RAL_WRITE(sc, RT2860_TX_PWR_CFG(ridx),
4206 b4inc(sc->txpow20mhz[ridx], d));
4212 rt3090_set_rx_antenna(struct rt2860_softc *sc, int aux)
4217 if (sc->mac_ver == 0x5390) {
4218 rt2860_mcu_bbp_write(sc, 152,
4219 rt2860_mcu_bbp_read(sc, 152) & ~0x80);
4221 tmp = RAL_READ(sc, RT2860_PCI_EECTRL);
4222 RAL_WRITE(sc, RT2860_PCI_EECTRL, tmp & ~RT2860_C);
4223 tmp = RAL_READ(sc, RT2860_GPIO_CTRL);
4224 RAL_WRITE(sc, RT2860_GPIO_CTRL, (tmp & ~0x0808) | 0x08);
4227 if (sc->mac_ver == 0x5390) {
4228 rt2860_mcu_bbp_write(sc, 152,
4229 rt2860_mcu_bbp_read(sc, 152) | 0x80);
4231 tmp = RAL_READ(sc, RT2860_PCI_EECTRL);
4232 RAL_WRITE(sc, RT2860_PCI_EECTRL, tmp | RT2860_C);
4233 tmp = RAL_READ(sc, RT2860_GPIO_CTRL);
4234 RAL_WRITE(sc, RT2860_GPIO_CTRL, tmp & ~0x0808);
4240 rt2860_switch_chan(struct rt2860_softc *sc, struct ieee80211_channel *c)
4242 struct ieee80211com *ic = &sc->sc_ic;
4245 chan = ieee80211_chan2ieee(ic, c);
4246 if (chan == 0 || chan == IEEE80211_CHAN_ANY)
4249 if (sc->mac_ver >= 0x5390)
4250 rt5390_set_chan(sc, chan);
4251 else if (sc->mac_ver >= 0x3071)
4252 rt3090_set_chan(sc, chan);
4254 rt2860_set_chan(sc, chan);
4256 /* determine channel group */
4259 else if (chan <= 64)
4261 else if (chan <= 128)
4266 /* XXX necessary only when group has changed! */
4267 if (sc->mac_ver < 0x5390)
4268 rt2860_select_chan_group(sc, group);
4274 rt2860_setup_beacon(struct rt2860_softc *sc, struct ieee80211vap *vap)
4276 struct ieee80211com *ic = vap->iv_ic;
4277 struct rt2860_txwi txwi;
4281 if ((m = ieee80211_beacon_alloc(vap->iv_bss)) == NULL)
4284 memset(&txwi, 0, sizeof txwi);
4286 txwi.len = htole16(m->m_pkthdr.len);
4287 /* send beacons at the lowest available rate */
4288 ridx = IEEE80211_IS_CHAN_5GHZ(ic->ic_bsschan) ?
4289 RT2860_RIDX_OFDM6 : RT2860_RIDX_CCK1;
4290 txwi.phy = htole16(rt2860_rates[ridx].mcs);
4291 if (rt2860_rates[ridx].phy == IEEE80211_T_OFDM)
4292 txwi.phy |= htole16(RT2860_PHY_OFDM);
4293 txwi.txop = RT2860_TX_TXOP_HT;
4294 txwi.flags = RT2860_TX_TS;
4295 txwi.xflags = RT2860_TX_NSEQ;
4297 RAL_WRITE_REGION_1(sc, RT2860_BCN_BASE(0),
4298 (uint8_t *)&txwi, sizeof txwi);
4299 RAL_WRITE_REGION_1(sc, RT2860_BCN_BASE(0) + sizeof txwi,
4300 mtod(m, uint8_t *), m->m_pkthdr.len);
4308 rt2860_enable_tsf_sync(struct rt2860_softc *sc)
4310 struct ieee80211com *ic = &sc->sc_ic;
4311 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps);
4314 tmp = RAL_READ(sc, RT2860_BCN_TIME_CFG);
4317 tmp |= vap->iv_bss->ni_intval * 16;
4318 tmp |= RT2860_TSF_TIMER_EN | RT2860_TBTT_TIMER_EN;
4319 if (vap->iv_opmode == IEEE80211_M_STA) {
4321 * Local TSF is always updated with remote TSF on beacon
4324 tmp |= 1 << RT2860_TSF_SYNC_MODE_SHIFT;
4326 else if (vap->iv_opmode == IEEE80211_M_IBSS ||
4327 vap->iv_opmode == IEEE80211_M_MBSS) {
4328 tmp |= RT2860_BCN_TX_EN;
4330 * Local TSF is updated with remote TSF on beacon reception
4331 * only if the remote TSF is greater than local TSF.
4333 tmp |= 2 << RT2860_TSF_SYNC_MODE_SHIFT;
4334 } else if (vap->iv_opmode == IEEE80211_M_HOSTAP) {
4335 tmp |= RT2860_BCN_TX_EN;
4336 /* SYNC with nobody */
4337 tmp |= 3 << RT2860_TSF_SYNC_MODE_SHIFT;
4340 RAL_WRITE(sc, RT2860_BCN_TIME_CFG, tmp);