2 * SPDX-License-Identifier: BSD-4-Clause
4 * Copyright (c) Comtrol Corporation <support@comtrol.com>
7 * PCI-specific part separated from:
8 * sys/i386/isa/rp.c,v 1.33 1999/09/28 11:45:27 phk Exp
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted prodived that the follwoing conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notive, this list of conditions and the following disclainer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials prodided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Comtrol Corporation.
21 * 4. The name of Comtrol Corporation may not be used to endorse or
22 * promote products derived from this software without specific
23 * prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY COMTROL CORPORATION ``AS IS'' AND ANY
26 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28 * ARE DISCLAIMED. IN NO EVENT SHALL COMTROL CORPORATION BE LIABLE FOR
29 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31 * OR SERVICES; LOSS OF USE, DATA, LIFE OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 #include <sys/cdefs.h>
39 __FBSDID("$FreeBSD$");
41 #include <sys/param.h>
42 #include <sys/systm.h>
43 #include <sys/fcntl.h>
44 #include <sys/malloc.h>
47 #include <sys/kernel.h>
48 #include <sys/module.h>
49 #include <machine/resource.h>
50 #include <machine/bus.h>
55 #include <dev/rp/rpreg.h>
56 #include <dev/rp/rpvar.h>
58 #include <dev/pci/pcireg.h>
59 #include <dev/pci/pcivar.h>
62 #define RP_VENDOR_ID 0x11FE
63 #define RP_DEVICE_ID_32I 0x0001
64 #define RP_DEVICE_ID_8I 0x0002
65 #define RP_DEVICE_ID_16I 0x0003
66 #define RP_DEVICE_ID_4Q 0x0004
67 #define RP_DEVICE_ID_8O 0x0005
68 #define RP_DEVICE_ID_8J 0x0006
69 #define RP_DEVICE_ID_4J 0x0007
70 #define RP_DEVICE_ID_6M 0x000C
71 #define RP_DEVICE_ID_4M 0x000D
72 #define RP_DEVICE_ID_UPCI_32 0x0801
73 #define RP_DEVICE_ID_UPCI_16 0x0803
74 #define RP_DEVICE_ID_UPCI_8O 0x0805
76 /**************************************************************************
77 MUDBAC remapped for PCI
78 **************************************************************************/
80 #define _CFG_INT_PCI 0x40
81 #define _PCI_INT_FUNC 0x3A
83 #define PCI_STROB 0x2000
84 #define INTR_EN_PCI 0x0010
86 /***************************************************************************
87 Function: sPCIControllerEOI
88 Purpose: Strobe the MUDBAC's End Of Interrupt bit.
89 Call: sPCIControllerEOI(CtlP)
90 CONTROLLER_T *CtlP; Ptr to controller structure
92 #define sPCIControllerEOI(CtlP) rp_writeio2(CtlP, 0, _PCI_INT_FUNC, PCI_STROB)
94 /***************************************************************************
95 Function: sPCIGetControllerIntStatus
96 Purpose: Get the controller interrupt status
97 Call: sPCIGetControllerIntStatus(CtlP)
98 CONTROLLER_T *CtlP; Ptr to controller structure
99 Return: Byte_t: The controller interrupt status in the lower 4
100 bits. Bits 0 through 3 represent AIOP's 0
101 through 3 respectively. If a bit is set that
102 AIOP is interrupting. Bits 4 through 7 will
105 #define sPCIGetControllerIntStatus(CTLP) ((rp_readio2(CTLP, 0, _PCI_INT_FUNC) >> 8) & 0x1f)
107 static devclass_t rp_devclass;
109 static int rp_pciprobe(device_t dev);
110 static int rp_pciattach(device_t dev);
112 static int rp_pcidetach(device_t dev);
113 static int rp_pcishutdown(device_t dev);
115 static void rp_pcireleaseresource(CONTROLLER_t *ctlp);
116 static int sPCIInitController( CONTROLLER_t *CtlP,
122 static rp_aiop2rid_t rp_pci_aiop2rid;
123 static rp_aiop2off_t rp_pci_aiop2off;
124 static rp_ctlmask_t rp_pci_ctlmask;
127 * The following functions are the pci-specific part
132 rp_pciprobe(device_t dev)
137 if (pci_get_vendor(dev) == RP_VENDOR_ID)
138 s = "RocketPort PCI";
141 device_set_desc(dev, s);
142 return (BUS_PROBE_DEFAULT);
149 rp_pciattach(device_t dev)
151 int num_ports, num_aiops;
157 ctlp = device_get_softc(dev);
158 bzero(ctlp, sizeof(*ctlp));
160 unit = device_get_unit(dev);
161 ctlp->aiop2rid = rp_pci_aiop2rid;
162 ctlp->aiop2off = rp_pci_aiop2off;
163 ctlp->ctlmask = rp_pci_ctlmask;
165 /* The IO ports of AIOPs for a PCI controller are continuous. */
167 ctlp->io_rid = malloc(sizeof(*(ctlp->io_rid)) * ctlp->io_num, M_DEVBUF, M_NOWAIT | M_ZERO);
168 ctlp->io = malloc(sizeof(*(ctlp->io)) * ctlp->io_num, M_DEVBUF, M_NOWAIT | M_ZERO);
169 if (ctlp->io_rid == NULL || ctlp->io == NULL) {
170 device_printf(dev, "rp_pciattach: Out of memory.\n");
175 ctlp->bus_ctlp = NULL;
177 switch (pci_get_device(dev)) {
178 case RP_DEVICE_ID_UPCI_16:
179 case RP_DEVICE_ID_UPCI_32:
180 case RP_DEVICE_ID_UPCI_8O:
181 ctlp->io_rid[0] = PCIR_BAR(2);
184 ctlp->io_rid[0] = PCIR_BAR(0);
187 ctlp->io[0] = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
188 &ctlp->io_rid[0], RF_ACTIVE);
189 if(ctlp->io[0] == NULL) {
190 device_printf(dev, "ioaddr mapping failed for RocketPort(PCI).\n");
195 num_aiops = sPCIInitController(ctlp,
196 MAX_AIOPS_PER_BOARD, 0,
197 FREQ_DIS, 0, pci_get_device(dev));
200 for(aiop=0; aiop < num_aiops; aiop++) {
201 sResetAiopByNum(ctlp, aiop);
202 num_ports += sGetAiopNumChan(ctlp, aiop);
205 retval = rp_attachcommon(ctlp, num_aiops, num_ports);
212 rp_pcireleaseresource(ctlp);
218 rp_pcidetach(device_t dev)
222 ctlp = device_get_softc(dev);
223 rp_pcireleaseresource(ctlp);
229 rp_pcishutdown(device_t dev)
233 ctlp = device_get_softc(dev);
234 rp_pcireleaseresource(ctlp);
240 rp_pcireleaseresource(CONTROLLER_t *ctlp)
242 rp_releaseresource(ctlp);
243 if (ctlp->io != NULL) {
244 if (ctlp->io[0] != NULL)
245 bus_release_resource(ctlp->dev, SYS_RES_IOPORT, ctlp->io_rid[0], ctlp->io[0]);
246 free(ctlp->io, M_DEVBUF);
249 if (ctlp->io_rid != NULL) {
250 free(ctlp->io_rid, M_DEVBUF);
256 sPCIInitController( CONTROLLER_t *CtlP,
265 CtlP->CtlID = CTLID_0001; /* controller release 1 */
267 sPCIControllerEOI(CtlP);
271 for(i=0; i < AiopNum; i++)
273 /*device_printf(CtlP->dev, "aiop %d.\n", i);*/
274 CtlP->AiopID[i] = sReadAiopID(CtlP, i); /* read AIOP ID */
275 /*device_printf(CtlP->dev, "ID = %d.\n", CtlP->AiopID[i]);*/
276 if(CtlP->AiopID[i] == AIOPID_NULL) /* if AIOP does not exist */
278 break; /* done looking for AIOPs */
281 switch( VendorDevice ) {
282 case RP_DEVICE_ID_4Q:
283 case RP_DEVICE_ID_4J:
284 case RP_DEVICE_ID_4M:
285 CtlP->AiopNumChan[i] = 4;
287 case RP_DEVICE_ID_6M:
288 CtlP->AiopNumChan[i] = 6;
290 case RP_DEVICE_ID_8O:
291 case RP_DEVICE_ID_8J:
292 case RP_DEVICE_ID_8I:
293 case RP_DEVICE_ID_16I:
294 case RP_DEVICE_ID_32I:
295 CtlP->AiopNumChan[i] = 8;
299 CtlP->AiopNumChan[i] = 8;
301 CtlP->AiopNumChan[i] = sReadAiopNumChan(CtlP, i);
305 /*device_printf(CtlP->dev, "%d channels.\n", CtlP->AiopNumChan[i]);*/
306 rp_writeaiop2(CtlP, i, _INDX_ADDR,_CLK_PRE); /* clock prescaler */
307 /*device_printf(CtlP->dev, "configuring clock prescaler.\n");*/
308 rp_writeaiop1(CtlP, i, _INDX_DATA,CLOCK_PRESC);
309 /*device_printf(CtlP->dev, "configured clock prescaler.\n");*/
310 CtlP->NumAiop++; /* bump count of AIOPs */
313 if(CtlP->NumAiop == 0)
316 return(CtlP->NumAiop);
321 * Maps (aiop, offset) to rid.
324 rp_pci_aiop2rid(int aiop, int offset)
326 /* Always return zero for a PCI controller. */
332 * Maps (aiop, offset) to the offset of resource.
335 rp_pci_aiop2off(int aiop, int offset)
337 /* Each AIOP reserves 0x40 bytes. */
338 return aiop * 0x40 + offset;
341 /* Read the int status for a PCI controller. */
343 rp_pci_ctlmask(CONTROLLER_t *ctlp)
345 return sPCIGetControllerIntStatus(ctlp);
348 static device_method_t rp_pcimethods[] = {
349 /* Device interface */
350 DEVMETHOD(device_probe, rp_pciprobe),
351 DEVMETHOD(device_attach, rp_pciattach),
352 DEVMETHOD(device_detach, rp_pcidetach),
353 DEVMETHOD(device_shutdown, rp_pcishutdown),
358 static driver_t rp_pcidriver = {
361 sizeof(CONTROLLER_t),
365 * rp can be attached to a pci bus.
367 DRIVER_MODULE(rp, pci, rp_pcidriver, rp_devclass, 0, 0);