2 * Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
34 #include <sys/mutex.h>
36 #include <sys/kernel.h>
37 #include <sys/socket.h>
38 #include <sys/systm.h>
39 #include <sys/malloc.h>
40 #include <sys/queue.h>
41 #include <sys/taskqueue.h>
43 #include <sys/endian.h>
44 #include <sys/linker.h>
47 #include <net/ethernet.h>
48 #include <net/if_media.h>
50 #include <net80211/ieee80211_var.h>
51 #include <net80211/ieee80211_radiotap.h>
53 #include <dev/rtwn/if_rtwnreg.h>
54 #include <dev/rtwn/if_rtwnvar.h>
56 #include <dev/rtwn/if_rtwn_debug.h>
58 #include <dev/rtwn/rtl8812a/r12a.h>
59 #include <dev/rtwn/rtl8812a/r12a_priv.h>
60 #include <dev/rtwn/rtl8812a/r12a_reg.h>
61 #include <dev/rtwn/rtl8812a/r12a_var.h>
65 r12a_lc_calib(struct rtwn_softc *sc)
70 RTWN_DPRINTF(sc, RTWN_DEBUG_CALIB,
71 "%s: LC calibration started\n", __func__);
73 txmode = rtwn_read_1(sc, R12A_SINGLETONE_CONT_TX + 2);
75 if ((txmode & 0x07) != 0) {
76 /* Disable all continuous Tx. */
78 * Skipped because BB turns off continuous Tx until
79 * next packet comes in.
82 /* Block all Tx queues. */
83 rtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL);
87 rtwn_rf_setbits(sc, 0, R12A_RF_LCK, 0, R12A_RF_LCK_MODE);
89 /* Start calibration. */
90 chnlbw = rtwn_rf_read(sc, 0, R92C_RF_CHNLBW);
91 rtwn_rf_write(sc, 0, R92C_RF_CHNLBW, chnlbw | R92C_RF_CHNLBW_LCSTART);
93 /* Give calibration the time to complete. */
94 rtwn_delay(sc, 150000); /* 150 ms */
97 rtwn_rf_setbits(sc, 0, R12A_RF_LCK, R12A_RF_LCK_MODE, 0);
99 /* Restore configuration. */
100 if ((txmode & 0x07) != 0) {
101 /* Continuous Tx case. */
103 * Skipped because BB turns off continuous Tx until
104 * next packet comes in.
107 /* Unblock all Tx queues. */
108 rtwn_write_1(sc, R92C_TXPAUSE, 0);
111 /* Recover channel number. */
112 rtwn_rf_write(sc, 0, R92C_RF_CHNLBW, chnlbw);
114 RTWN_DPRINTF(sc, RTWN_DEBUG_CALIB,
115 "%s: LC calibration finished\n", __func__);
118 #ifndef RTWN_WITHOUT_UCODE
120 r12a_iq_calib_fw_supported(struct rtwn_softc *sc)
122 if (sc->fwver == 0x19)
130 r12a_save_bb_afe_vals(struct rtwn_softc *sc, uint32_t vals[],
131 const uint16_t regs[], int size)
136 rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0x80000000, 0);
138 for (i = 0; i < size; i++)
139 vals[i] = rtwn_bb_read(sc, regs[i]);
143 r12a_restore_bb_afe_vals(struct rtwn_softc *sc, uint32_t vals[],
144 const uint16_t regs[], int size)
149 rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0x80000000, 0);
151 for (i = 0; i < size; i++)
152 rtwn_bb_write(sc, regs[i], vals[i]);
156 r12a_save_rf_vals(struct rtwn_softc *sc, uint32_t vals[],
157 const uint8_t regs[], int size)
162 rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0x80000000, 0);
164 for (c = 0; c < sc->nrxchains; c++)
165 for (i = 0; i < size; i++)
166 vals[c * size + i] = rtwn_rf_read(sc, c, regs[i]);
170 r12a_restore_rf_vals(struct rtwn_softc *sc, uint32_t vals[],
171 const uint8_t regs[], int size)
176 rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0x80000000, 0);
178 for (c = 0; c < sc->nrxchains; c++)
179 for (i = 0; i < size; i++)
180 rtwn_rf_write(sc, c, regs[i], vals[c * size + i]);
185 r12a_iq_tx(struct rtwn_softc *sc)
191 r12a_iq_config_mac(struct rtwn_softc *sc)
195 rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0x80000000, 0);
196 rtwn_write_1(sc, R92C_TXPAUSE,
197 R92C_TX_QUEUE_AC | R92C_TX_QUEUE_MGT | R92C_TX_QUEUE_HIGH);
198 /* BCN_CTRL & BCN_CTRL1 */
199 rtwn_setbits_1(sc, R92C_BCN_CTRL(0), R92C_BCN_CTRL_EN_BCN, 0);
200 rtwn_setbits_1(sc, R92C_BCN_CTRL(1), R92C_BCN_CTRL_EN_BCN, 0);
202 rtwn_write_1(sc, R12A_OFDMCCK_EN, 0);
204 rtwn_bb_setbits(sc, R12A_CCA_ON_SEC, 0x03, 0x0c);
205 /* CCK RX Path off */
206 rtwn_write_1(sc, R12A_CCK_RX_PATH + 3, 0x0f);
211 r12a_iq_calib_sw(struct rtwn_softc *sc)
213 #define R12A_MAX_NRXCHAINS 2
214 uint32_t bb_vals[nitems(r12a_iq_bb_regs)];
215 uint32_t afe_vals[nitems(r12a_iq_afe_regs)];
216 uint32_t rf_vals[nitems(r12a_iq_rf_regs) * R12A_MAX_NRXCHAINS];
219 KASSERT(sc->nrxchains <= R12A_MAX_NRXCHAINS,
220 ("nrxchains > %d (%d)\n", R12A_MAX_NRXCHAINS, sc->nrxchains));
222 /* Save registers. */
223 r12a_save_bb_afe_vals(sc, bb_vals, r12a_iq_bb_regs,
224 nitems(r12a_iq_bb_regs));
226 /* Select page C1. */
227 rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0, 0x80000000);
228 rfe[0] = rtwn_bb_read(sc, R12A_RFE(0));
229 rfe[1] = rtwn_bb_read(sc, R12A_RFE(1));
231 r12a_save_bb_afe_vals(sc, afe_vals, r12a_iq_afe_regs,
232 nitems(r12a_iq_afe_regs));
233 r12a_save_rf_vals(sc, rf_vals, r12a_iq_rf_regs,
234 nitems(r12a_iq_rf_regs));
238 rtwn_iq_config_mac(sc);
242 r12a_restore_rf_vals(sc, rf_vals, r12a_iq_rf_regs,
243 nitems(r12a_iq_rf_regs));
244 r12a_restore_bb_afe_vals(sc, afe_vals, r12a_iq_afe_regs,
245 nitems(r12a_iq_afe_regs));
247 /* Select page C1. */
248 rtwn_bb_setbits(sc, R12A_TXAGC_TABLE_SELECT, 0, 0x80000000);
251 rtwn_bb_write(sc, R12A_SLEEP_NAV(0), 0);
252 rtwn_bb_write(sc, R12A_PMPD(0), 0);
253 rtwn_bb_write(sc, 0xc88, 0);
254 rtwn_bb_write(sc, 0xc8c, 0x3c000000);
255 rtwn_bb_setbits(sc, 0xc90, 0, 0x00000080);
256 rtwn_bb_setbits(sc, 0xcc4, 0, 0x20040000);
257 rtwn_bb_setbits(sc, 0xcc8, 0, 0x20000000);
260 rtwn_bb_write(sc, R12A_SLEEP_NAV(1), 0);
261 rtwn_bb_write(sc, R12A_PMPD(1), 0);
262 rtwn_bb_write(sc, 0xe88, 0);
263 rtwn_bb_write(sc, 0xe8c, 0x3c000000);
264 rtwn_bb_setbits(sc, 0xe90, 0, 0x00000080);
265 rtwn_bb_setbits(sc, 0xec4, 0, 0x20040000);
266 rtwn_bb_setbits(sc, 0xec8, 0, 0x20000000);
268 rtwn_bb_write(sc, R12A_RFE(0), rfe[0]);
269 rtwn_bb_write(sc, R12A_RFE(1), rfe[1]);
271 r12a_restore_bb_afe_vals(sc, bb_vals, r12a_iq_bb_regs,
272 nitems(r12a_iq_bb_regs));
273 #undef R12A_MAX_NRXCHAINS
277 r12a_iq_calib(struct rtwn_softc *sc)
279 #ifndef RTWN_WITHOUT_UCODE
280 if ((sc->sc_flags & RTWN_FW_LOADED) &&
281 rtwn_r12a_iq_calib_fw_supported(sc))
282 r12a_iq_calib_fw(sc);
285 rtwn_r12a_iq_calib_sw(sc);