2 * Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 #include <dev/rtwn/rtl8188e/r88e_fw_cmd.h>
35 * Host to firmware commands.
37 /* Note: some parts are shared with RTL8188EU. */
38 #define R12A_CMD_MSR_RPT 0x01
39 #define R12A_CMD_SET_PWRMODE 0x20
40 #define R12A_CMD_IQ_CALIBRATE 0x45
42 /* Structure for R12A_CMD_MSR_RPT. */
43 struct r12a_fw_cmd_msrrpt {
45 #define R12A_MSRRPT_B0_DISASSOC 0x00
46 #define R12A_MSRRPT_B0_ASSOC 0x01
47 #define R12A_MSRRPT_B0_MACID_IND 0x02
53 /* Structure for R12A_CMD_SET_PWRMODE. */
54 struct r12a_fw_cmd_pwrmode {
61 #define R12A_PWRMODE_B5_NO_BTCOEX 0x40
64 /* Structure for R12A_CMD_IQ_CALIBRATE. */
65 struct r12a_fw_cmd_iq_calib {
68 #define RTWN_CMD_IQ_CHAN_WIDTH_20 0x01
69 #define RTWN_CMD_IQ_CHAN_WIDTH_40 0x02
70 #define RTWN_CMD_IQ_CHAN_WIDTH_80 0x04
71 #define RTWN_CMD_IQ_CHAN_WIDTH_160 0x08
72 #define RTWN_CMD_IQ_BAND_2GHZ 0x10
73 #define RTWN_CMD_IQ_BAND_5GHZ 0x20
75 uint8_t ext_5g_pa_lna;
76 #define RTWN_CMD_IQ_EXT_PA_5G(pa) (pa)
77 #define RTWN_CMD_IQ_EXT_LNA_5G(lna) ((lna) << 1)
84 #define R12A_C2H_DEBUG 0x00
85 #define R12A_C2H_TX_REPORT 0x03
86 #define R12A_C2H_BT_INFO 0x09
87 #define R12A_C2H_RA_REPORT 0x0c
88 #define R12A_C2H_IQK_FINISHED 0x11
90 /* Structure for R12A_C2H_TX_REPORT event. */
91 struct r12a_c2h_tx_rpt {
93 #define R12A_TXRPTB0_QSEL_M 0x1f
94 #define R12A_TXRPTB0_QSEL_S 0
95 #define R12A_TXRPTB0_BC 0x20
96 #define R12A_TXRPTB0_LIFE_EXPIRE 0x40
97 #define R12A_TXRPTB0_RETRY_OVER 0x80
101 #define R12A_TXRPTB2_RETRY_CNT_M 0x3f
102 #define R12A_TXRPTB2_RETRY_CNT_S 0
104 uint8_t queue_time_low; /* 256 msec unit */
105 uint8_t queue_time_high;
110 /* Structure for R12A_C2H_RA_REPORT event. */
111 struct r12a_c2h_ra_report {
113 #define R12A_RARPTB0_RATE_M 0x3f
114 #define R12A_RARPTB0_RATE_S 0
118 #define R12A_RARPTB0_LDPC 0x01
119 #define R12A_RARPTB0_TXBF 0x02
120 #define R12A_RARPTB0_NOISE 0x04
123 #endif /* R12A_FW_CMD_H */