sys/dev/rtwn/rtl8812a/r12a_var.h

   1 /*-
   2  * Copyright (c) 2016 Andriy Voskoboinyk <avos@FreeBSD.org>
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  * $FreeBSD$
  27  */
  28
  29 #ifndef R12A_VAR_H
  30 #define R12A_VAR_H
  31
  32 #include <dev/rtwn/rtl8812a/r12a_rom_defs.h>
  33
  34 struct r12a_softc {
  35         uint8_t                 chip;
  36 #define R12A_CHIP_C_CUT         0x01
  37
  38         uint8_t                 rs_flags;
  39 #define R12A_RXCKSUM_EN         0x01
  40 #define R12A_RXCKSUM6_EN        0x02
  41 #define R12A_IQK_RUNNING        0x04
  42
  43         /* ROM variables */
  44         int                     ext_pa_2g:1,
  45                                 ext_pa_5g:1,
  46                                 ext_lna_2g:1,
  47                                 ext_lna_5g:1,
  48                                 type_pa_2g:4,
  49                                 type_pa_5g:4,
  50                                 type_lna_2g:4,
  51                                 type_lna_5g:4,
  52                                 bt_coex:1,
  53                                 bt_ant_num:1;
  54
  55         uint8_t                 board_type;
  56         uint8_t                 regulatory;
  57         uint8_t                 crystalcap;
  58
  59         uint8_t                 rfe_type;
  60         uint8_t                 tx_bbswing_2g;
  61         uint8_t                 tx_bbswing_5g;
  62
  63         uint8_t cck_tx_pwr[R12A_MAX_RF_PATH][R12A_GROUP_2G];
  64         uint8_t ht40_tx_pwr_2g[R12A_MAX_RF_PATH][R12A_GROUP_2G];
  65         uint8_t ht40_tx_pwr_5g[R12A_MAX_RF_PATH][R12A_GROUP_5G];
  66
  67         uint8_t cck_tx_pwr_diff_2g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT];
  68         uint8_t ofdm_tx_pwr_diff_2g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT];
  69         uint8_t bw20_tx_pwr_diff_2g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT];
  70         uint8_t bw40_tx_pwr_diff_2g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT];
  71
  72         uint8_t ofdm_tx_pwr_diff_5g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT];
  73         uint8_t bw20_tx_pwr_diff_5g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT];
  74         uint8_t bw40_tx_pwr_diff_5g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT];
  75         uint8_t bw80_tx_pwr_diff_5g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT];
  76         uint8_t bw160_tx_pwr_diff_5g[R12A_MAX_RF_PATH][R12A_MAX_TX_COUNT];
  77
  78         int             sc_ant;
  79
  80         void            (*rs_crystalcap_write)(struct rtwn_softc *);
  81         void            (*rs_fix_spur)(struct rtwn_softc *,
  82                             struct ieee80211_channel *);
  83         void            (*rs_set_band_2ghz)(struct rtwn_softc *, uint32_t);
  84         void            (*rs_set_band_5ghz)(struct rtwn_softc *, uint32_t);
  85         void            (*rs_init_burstlen)(struct rtwn_softc *);
  86         void            (*rs_init_ampdu_fwhw)(struct rtwn_softc *);
  87 #ifndef RTWN_WITHOUT_UCODE
  88         int             (*rs_iq_calib_fw_supported)(struct rtwn_softc *);
  89 #endif
  90         void            (*rs_iq_calib_sw)(struct rtwn_softc *);
  91
  92         int             ac_usb_dma_size;
  93         int             ac_usb_dma_time;
  94         int             ampdu_max_time;
  95 };
  96 #define R12A_SOFTC(_sc) ((struct r12a_softc *)((_sc)->sc_priv))
  97
  98 #define rtwn_r12a_fix_spur(_sc, _c) \
  99         ((R12A_SOFTC(_sc)->rs_fix_spur)((_sc), (_c)))
 100 #define rtwn_r12a_set_band_2ghz(_sc, _rates) \
 101         ((R12A_SOFTC(_sc)->rs_set_band_2ghz)((_sc), (_rates)))
 102 #define rtwn_r12a_set_band_5ghz(_sc, _rates) \
 103         ((R12A_SOFTC(_sc)->rs_set_band_5ghz)((_sc), (_rates)))
 104 #define rtwn_r12a_init_burstlen(_sc) \
 105         ((R12A_SOFTC(_sc)->rs_init_burstlen)((_sc)))
 106 #define rtwn_r12a_init_ampdu_fwhw(_sc) \
 107         ((R12A_SOFTC(_sc)->rs_init_ampdu_fwhw)((_sc)))
 108 #define rtwn_r12a_crystalcap_write(_sc) \
 109         ((R12A_SOFTC(_sc)->rs_crystalcap_write)((_sc)))
 110 #ifndef RTWN_WITHOUT_UCODE
 111 #define rtwn_r12a_iq_calib_fw_supported(_sc) \
 112         ((R12A_SOFTC(_sc)->rs_iq_calib_fw_supported)((_sc)))
 113 #endif
 114 #define rtwn_r12a_iq_calib_sw(_sc) \
 115         ((R12A_SOFTC(_sc)->rs_iq_calib_sw)((_sc)))
 116
 117 #endif  /* R12A_VAR_H */