2 * Copyright (c) 2004-2006 Marcel Moolenaar
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 #ifndef _DEV_SCC_BFE_H_
30 #define _DEV_SCC_BFE_H_
32 #include <sys/serial.h>
35 * Bus access structure. This structure holds the minimum information needed
36 * to access the SCC. The rclk field, although not important to actually
37 * access the SCC, is important for baudrate programming, delay loops and
38 * other timing related computations.
42 bus_space_handle_t bsh;
48 #define scc_regofs(bas, reg) ((reg) << (bas)->regshft)
50 #define scc_getreg(bas, reg) \
51 bus_space_read_1((bas)->bst, (bas)->bsh, scc_regofs(bas, reg))
52 #define scc_setreg(bas, reg, value) \
53 bus_space_write_1((bas)->bst, (bas)->bsh, scc_regofs(bas, reg), value)
55 #define scc_barrier(bas) \
56 bus_space_barrier((bas)->bst, (bas)->bsh, 0, (bas)->range, \
57 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE)
60 * SCC mode (child) and channel control structures.
69 struct scc_chan *m_chan;
80 serdev_intr_t *ih_src[SCC_ISRCCNT];
85 struct resource ch_rres;
86 struct resource_list ch_rlist;
88 struct resource *ch_ires; /* Interrupt resource. */
92 struct scc_mode ch_mode[SCC_NMODES];
103 * SCC class & instance (=softc)
107 u_int cl_channels; /* Number of independent channels. */
108 u_int cl_class; /* SCC bus class ID. */
109 u_int cl_modes; /* Supported modes (bitset). */
113 extern struct scc_class scc_quicc_class;
114 extern struct scc_class scc_sab82532_class;
115 extern struct scc_class scc_z8530_class;
119 struct scc_class *sc_class;
120 struct scc_bas sc_bas;
123 struct mtx sc_hwmtx; /* Spinlock protecting hardware. */
125 struct resource *sc_rres; /* Register resource. */
127 int sc_rtype; /* SYS_RES_{IOPORT|MEMORY}. */
129 struct scc_chan *sc_chan;
135 uint32_t sc_hwsig; /* Signal state. Used by HW driver. */
138 extern devclass_t scc_devclass;
139 extern const char scc_driver_name[];
141 int scc_bfe_attach(device_t dev, u_int ipc);
142 int scc_bfe_detach(device_t dev);
143 int scc_bfe_probe(device_t dev, u_int regshft, u_int rclk, u_int rid);
145 struct resource *scc_bus_alloc_resource(device_t, device_t, int, int *,
146 rman_res_t, rman_res_t, rman_res_t, u_int);
147 int scc_bus_get_resource(device_t, device_t, int, int, rman_res_t *, rman_res_t *);
148 int scc_bus_read_ivar(device_t, device_t, int, uintptr_t *);
149 int scc_bus_release_resource(device_t, device_t, int, int, struct resource *);
150 int scc_bus_setup_intr(device_t, device_t, struct resource *, int,
151 driver_filter_t *, void (*)(void *), void *, void **);
152 int scc_bus_teardown_intr(device_t, device_t, struct resource *, void *);
154 #endif /* _DEV_SCC_BFE_H_ */