2 * Copyright (C) 2008-2009 Semihalf, Piotr Ziecik
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
18 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
19 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
20 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
21 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
22 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
23 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 * Freescale integrated Security Engine (SEC) driver. Currently SEC 2.0 and
31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
34 #include <sys/param.h>
35 #include <sys/systm.h>
37 #include <sys/endian.h>
38 #include <sys/kernel.h>
40 #include <sys/malloc.h>
42 #include <sys/module.h>
43 #include <sys/mutex.h>
44 #include <sys/random.h>
47 #include <machine/_inttypes.h>
48 #include <machine/bus.h>
49 #include <machine/resource.h>
51 #include <opencrypto/cryptodev.h>
52 #include "cryptodev_if.h"
54 #include <dev/ofw/ofw_bus_subr.h>
55 #include <dev/sec/sec.h>
57 static int sec_probe(device_t dev);
58 static int sec_attach(device_t dev);
59 static int sec_detach(device_t dev);
60 static int sec_suspend(device_t dev);
61 static int sec_resume(device_t dev);
62 static int sec_shutdown(device_t dev);
63 static void sec_primary_intr(void *arg);
64 static void sec_secondary_intr(void *arg);
65 static int sec_setup_intr(struct sec_softc *sc, struct resource **ires,
66 void **ihand, int *irid, driver_intr_t handler, const char *iname);
67 static void sec_release_intr(struct sec_softc *sc, struct resource *ires,
68 void *ihand, int irid, const char *iname);
69 static int sec_controller_reset(struct sec_softc *sc);
70 static int sec_channel_reset(struct sec_softc *sc, int channel, int full);
71 static int sec_init(struct sec_softc *sc);
72 static int sec_alloc_dma_mem(struct sec_softc *sc,
73 struct sec_dma_mem *dma_mem, bus_size_t size);
74 static int sec_desc_map_dma(struct sec_softc *sc,
75 struct sec_dma_mem *dma_mem, void *mem, bus_size_t size, int type,
76 struct sec_desc_map_info *sdmi);
77 static void sec_free_dma_mem(struct sec_dma_mem *dma_mem);
78 static void sec_enqueue(struct sec_softc *sc);
79 static int sec_enqueue_desc(struct sec_softc *sc, struct sec_desc *desc,
81 static int sec_eu_channel(struct sec_softc *sc, int eu);
82 static int sec_make_pointer(struct sec_softc *sc, struct sec_desc *desc,
83 u_int n, void *data, bus_size_t doffset, bus_size_t dsize, int dtype);
84 static int sec_make_pointer_direct(struct sec_softc *sc,
85 struct sec_desc *desc, u_int n, bus_addr_t data, bus_size_t dsize);
86 static int sec_alloc_session(struct sec_softc *sc);
87 static int sec_newsession(device_t dev, u_int32_t *sidp,
88 struct cryptoini *cri);
89 static int sec_freesession(device_t dev, uint64_t tid);
90 static int sec_process(device_t dev, struct cryptop *crp, int hint);
91 static int sec_split_cri(struct cryptoini *cri, struct cryptoini **enc,
92 struct cryptoini **mac);
93 static int sec_split_crp(struct cryptop *crp, struct cryptodesc **enc,
94 struct cryptodesc **mac);
95 static int sec_build_common_ns_desc(struct sec_softc *sc,
96 struct sec_desc *desc, struct sec_session *ses, struct cryptop *crp,
97 struct cryptodesc *enc, int buftype);
98 static int sec_build_common_s_desc(struct sec_softc *sc,
99 struct sec_desc *desc, struct sec_session *ses, struct cryptop *crp,
100 struct cryptodesc *enc, struct cryptodesc *mac, int buftype);
102 static struct sec_session *sec_get_session(struct sec_softc *sc, u_int sid);
103 static struct sec_desc *sec_find_desc(struct sec_softc *sc, bus_addr_t paddr);
106 static int sec_aesu_newsession(struct sec_softc *sc,
107 struct sec_session *ses, struct cryptoini *enc, struct cryptoini *mac);
108 static int sec_aesu_make_desc(struct sec_softc *sc,
109 struct sec_session *ses, struct sec_desc *desc, struct cryptop *crp,
113 static int sec_deu_newsession(struct sec_softc *sc,
114 struct sec_session *ses, struct cryptoini *enc, struct cryptoini *mac);
115 static int sec_deu_make_desc(struct sec_softc *sc,
116 struct sec_session *ses, struct sec_desc *desc, struct cryptop *crp,
120 static int sec_mdeu_can_handle(u_int alg);
121 static int sec_mdeu_config(struct cryptodesc *crd,
122 u_int *eu, u_int *mode, u_int *hashlen);
123 static int sec_mdeu_newsession(struct sec_softc *sc,
124 struct sec_session *ses, struct cryptoini *enc, struct cryptoini *mac);
125 static int sec_mdeu_make_desc(struct sec_softc *sc,
126 struct sec_session *ses, struct sec_desc *desc, struct cryptop *crp,
129 static device_method_t sec_methods[] = {
130 /* Device interface */
131 DEVMETHOD(device_probe, sec_probe),
132 DEVMETHOD(device_attach, sec_attach),
133 DEVMETHOD(device_detach, sec_detach),
135 DEVMETHOD(device_suspend, sec_suspend),
136 DEVMETHOD(device_resume, sec_resume),
137 DEVMETHOD(device_shutdown, sec_shutdown),
140 DEVMETHOD(cryptodev_newsession, sec_newsession),
141 DEVMETHOD(cryptodev_freesession,sec_freesession),
142 DEVMETHOD(cryptodev_process, sec_process),
146 static driver_t sec_driver = {
149 sizeof(struct sec_softc),
152 static devclass_t sec_devclass;
153 DRIVER_MODULE(sec, simplebus, sec_driver, sec_devclass, 0, 0);
154 MODULE_DEPEND(sec, crypto, 1, 1, 1);
156 static struct sec_eu_methods sec_eus[] = {
173 sec_sync_dma_mem(struct sec_dma_mem *dma_mem, bus_dmasync_op_t op)
176 /* Sync only if dma memory is valid */
177 if (dma_mem->dma_vaddr != NULL)
178 bus_dmamap_sync(dma_mem->dma_tag, dma_mem->dma_map, op);
182 sec_free_session(struct sec_softc *sc, struct sec_session *ses)
185 SEC_LOCK(sc, sessions);
187 SEC_UNLOCK(sc, sessions);
191 sec_get_pointer_data(struct sec_desc *desc, u_int n)
194 return (desc->sd_ptr_dmem[n].dma_vaddr);
198 sec_probe(device_t dev)
200 struct sec_softc *sc;
203 if (!ofw_bus_status_okay(dev))
206 if (!ofw_bus_is_compatible(dev, "fsl,sec2.0"))
209 sc = device_get_softc(dev);
212 sc->sc_rres = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_rrid,
215 if (sc->sc_rres == NULL)
218 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
219 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
221 id = SEC_READ(sc, SEC_ID);
223 bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_rrid, sc->sc_rres);
227 device_set_desc(dev, "Freescale Security Engine 2.0");
231 device_set_desc(dev, "Freescale Security Engine 3.0");
235 device_set_desc(dev, "Freescale Security Engine 3.1");
239 device_printf(dev, "unknown SEC ID 0x%016"PRIx64"!\n", id);
247 sec_attach(device_t dev)
249 struct sec_softc *sc;
250 struct sec_hw_lt *lt;
254 sc = device_get_softc(dev);
259 sc->sc_cid = crypto_get_driverid(dev, CRYPTOCAP_F_HARDWARE);
260 if (sc->sc_cid < 0) {
261 device_printf(dev, "could not get crypto driver ID!\n");
266 mtx_init(&sc->sc_controller_lock, device_get_nameunit(dev),
267 "SEC Controller lock", MTX_DEF);
268 mtx_init(&sc->sc_descriptors_lock, device_get_nameunit(dev),
269 "SEC Descriptors lock", MTX_DEF);
270 mtx_init(&sc->sc_sessions_lock, device_get_nameunit(dev),
271 "SEC Sessions lock", MTX_DEF);
273 /* Allocate I/O memory for SEC registers */
275 sc->sc_rres = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_rrid,
278 if (sc->sc_rres == NULL) {
279 device_printf(dev, "could not allocate I/O memory!\n");
283 sc->sc_bas.bsh = rman_get_bushandle(sc->sc_rres);
284 sc->sc_bas.bst = rman_get_bustag(sc->sc_rres);
286 /* Setup interrupts */
288 error = sec_setup_intr(sc, &sc->sc_pri_ires, &sc->sc_pri_ihand,
289 &sc->sc_pri_irid, sec_primary_intr, "primary");
295 if (sc->sc_version == 3) {
297 error = sec_setup_intr(sc, &sc->sc_sec_ires, &sc->sc_sec_ihand,
298 &sc->sc_sec_irid, sec_secondary_intr, "secondary");
304 /* Alloc DMA memory for descriptors and link tables */
305 error = sec_alloc_dma_mem(sc, &(sc->sc_desc_dmem),
306 SEC_DESCRIPTORS * sizeof(struct sec_hw_desc));
311 error = sec_alloc_dma_mem(sc, &(sc->sc_lt_dmem),
312 (SEC_LT_ENTRIES + 1) * sizeof(struct sec_hw_lt));
317 /* Fill in descriptors and link tables */
318 for (i = 0; i < SEC_DESCRIPTORS; i++) {
319 sc->sc_desc[i].sd_desc =
320 (struct sec_hw_desc*)(sc->sc_desc_dmem.dma_vaddr) + i;
321 sc->sc_desc[i].sd_desc_paddr = sc->sc_desc_dmem.dma_paddr +
322 (i * sizeof(struct sec_hw_desc));
325 for (i = 0; i < SEC_LT_ENTRIES + 1; i++) {
327 (struct sec_hw_lt*)(sc->sc_lt_dmem.dma_vaddr) + i;
328 sc->sc_lt[i].sl_lt_paddr = sc->sc_lt_dmem.dma_paddr +
329 (i * sizeof(struct sec_hw_lt));
332 /* Last entry in link table is used to create a circle */
333 lt = sc->sc_lt[SEC_LT_ENTRIES].sl_lt;
337 lt->shl_ptr = sc->sc_lt[0].sl_lt_paddr;
339 /* Init descriptor and link table queues pointers */
340 SEC_CNT_INIT(sc, sc_free_desc_get_cnt, SEC_DESCRIPTORS);
341 SEC_CNT_INIT(sc, sc_free_desc_put_cnt, SEC_DESCRIPTORS);
342 SEC_CNT_INIT(sc, sc_ready_desc_get_cnt, SEC_DESCRIPTORS);
343 SEC_CNT_INIT(sc, sc_ready_desc_put_cnt, SEC_DESCRIPTORS);
344 SEC_CNT_INIT(sc, sc_queued_desc_get_cnt, SEC_DESCRIPTORS);
345 SEC_CNT_INIT(sc, sc_queued_desc_put_cnt, SEC_DESCRIPTORS);
346 SEC_CNT_INIT(sc, sc_lt_alloc_cnt, SEC_LT_ENTRIES);
347 SEC_CNT_INIT(sc, sc_lt_free_cnt, SEC_LT_ENTRIES);
349 /* Create masks for fast checks */
350 sc->sc_int_error_mask = 0;
351 for (i = 0; i < SEC_CHANNELS; i++)
352 sc->sc_int_error_mask |= (~0ULL & SEC_INT_CH_ERR(i));
354 switch (sc->sc_version) {
356 sc->sc_channel_idle_mask =
357 (SEC_CHAN_CSR2_FFLVL_M << SEC_CHAN_CSR2_FFLVL_S) |
358 (SEC_CHAN_CSR2_MSTATE_M << SEC_CHAN_CSR2_MSTATE_S) |
359 (SEC_CHAN_CSR2_PSTATE_M << SEC_CHAN_CSR2_PSTATE_S) |
360 (SEC_CHAN_CSR2_GSTATE_M << SEC_CHAN_CSR2_GSTATE_S);
363 sc->sc_channel_idle_mask =
364 (SEC_CHAN_CSR3_FFLVL_M << SEC_CHAN_CSR3_FFLVL_S) |
365 (SEC_CHAN_CSR3_MSTATE_M << SEC_CHAN_CSR3_MSTATE_S) |
366 (SEC_CHAN_CSR3_PSTATE_M << SEC_CHAN_CSR3_PSTATE_S) |
367 (SEC_CHAN_CSR3_GSTATE_M << SEC_CHAN_CSR3_GSTATE_S);
372 error = sec_init(sc);
377 /* Register in OCF (AESU) */
378 crypto_register(sc->sc_cid, CRYPTO_AES_CBC, 0, 0);
380 /* Register in OCF (DEU) */
381 crypto_register(sc->sc_cid, CRYPTO_DES_CBC, 0, 0);
382 crypto_register(sc->sc_cid, CRYPTO_3DES_CBC, 0, 0);
384 /* Register in OCF (MDEU) */
385 crypto_register(sc->sc_cid, CRYPTO_MD5, 0, 0);
386 crypto_register(sc->sc_cid, CRYPTO_MD5_HMAC, 0, 0);
387 crypto_register(sc->sc_cid, CRYPTO_SHA1, 0, 0);
388 crypto_register(sc->sc_cid, CRYPTO_SHA1_HMAC, 0, 0);
389 crypto_register(sc->sc_cid, CRYPTO_SHA2_256_HMAC, 0, 0);
390 if (sc->sc_version >= 3) {
391 crypto_register(sc->sc_cid, CRYPTO_SHA2_384_HMAC, 0, 0);
392 crypto_register(sc->sc_cid, CRYPTO_SHA2_512_HMAC, 0, 0);
398 sec_free_dma_mem(&(sc->sc_lt_dmem));
400 sec_free_dma_mem(&(sc->sc_desc_dmem));
402 sec_release_intr(sc, sc->sc_sec_ires, sc->sc_sec_ihand,
403 sc->sc_sec_irid, "secondary");
405 sec_release_intr(sc, sc->sc_pri_ires, sc->sc_pri_ihand,
406 sc->sc_pri_irid, "primary");
408 bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_rrid, sc->sc_rres);
410 mtx_destroy(&sc->sc_controller_lock);
411 mtx_destroy(&sc->sc_descriptors_lock);
412 mtx_destroy(&sc->sc_sessions_lock);
418 sec_detach(device_t dev)
420 struct sec_softc *sc = device_get_softc(dev);
421 int i, error, timeout = SEC_TIMEOUT;
423 /* Prepare driver to shutdown */
424 SEC_LOCK(sc, descriptors);
426 SEC_UNLOCK(sc, descriptors);
428 /* Wait until all queued processing finishes */
430 SEC_LOCK(sc, descriptors);
431 i = SEC_READY_DESC_CNT(sc) + SEC_QUEUED_DESC_CNT(sc);
432 SEC_UNLOCK(sc, descriptors);
438 device_printf(dev, "queue flush timeout!\n");
440 /* DMA can be still active - stop it */
441 for (i = 0; i < SEC_CHANNELS; i++)
442 sec_channel_reset(sc, i, 1);
451 /* Disable interrupts */
452 SEC_WRITE(sc, SEC_IER, 0);
454 /* Unregister from OCF */
455 crypto_unregister_all(sc->sc_cid);
457 /* Free DMA memory */
458 for (i = 0; i < SEC_DESCRIPTORS; i++)
459 SEC_DESC_FREE_POINTERS(&(sc->sc_desc[i]));
461 sec_free_dma_mem(&(sc->sc_lt_dmem));
462 sec_free_dma_mem(&(sc->sc_desc_dmem));
464 /* Release interrupts */
465 sec_release_intr(sc, sc->sc_pri_ires, sc->sc_pri_ihand,
466 sc->sc_pri_irid, "primary");
467 sec_release_intr(sc, sc->sc_sec_ires, sc->sc_sec_ihand,
468 sc->sc_sec_irid, "secondary");
472 error = bus_release_resource(dev, SYS_RES_MEMORY, sc->sc_rrid,
475 device_printf(dev, "bus_release_resource() failed for"
476 " I/O memory, error %d\n", error);
481 mtx_destroy(&sc->sc_controller_lock);
482 mtx_destroy(&sc->sc_descriptors_lock);
483 mtx_destroy(&sc->sc_sessions_lock);
489 sec_suspend(device_t dev)
496 sec_resume(device_t dev)
503 sec_shutdown(device_t dev)
510 sec_setup_intr(struct sec_softc *sc, struct resource **ires, void **ihand,
511 int *irid, driver_intr_t handler, const char *iname)
515 (*ires) = bus_alloc_resource_any(sc->sc_dev, SYS_RES_IRQ, irid,
518 if ((*ires) == NULL) {
519 device_printf(sc->sc_dev, "could not allocate %s IRQ\n", iname);
523 error = bus_setup_intr(sc->sc_dev, *ires, INTR_MPSAFE | INTR_TYPE_NET,
524 NULL, handler, sc, ihand);
527 device_printf(sc->sc_dev, "failed to set up %s IRQ\n", iname);
528 if (bus_release_resource(sc->sc_dev, SYS_RES_IRQ, *irid, *ires))
529 device_printf(sc->sc_dev, "could not release %s IRQ\n",
540 sec_release_intr(struct sec_softc *sc, struct resource *ires, void *ihand,
541 int irid, const char *iname)
548 error = bus_teardown_intr(sc->sc_dev, ires, ihand);
550 device_printf(sc->sc_dev, "bus_teardown_intr() failed for %s"
551 " IRQ, error %d\n", iname, error);
553 error = bus_release_resource(sc->sc_dev, SYS_RES_IRQ, irid, ires);
555 device_printf(sc->sc_dev, "bus_release_resource() failed for %s"
556 " IRQ, error %d\n", iname, error);
560 sec_primary_intr(void *arg)
562 struct sec_softc *sc = arg;
563 struct sec_desc *desc;
567 SEC_LOCK(sc, controller);
569 /* Check for errors */
570 isr = SEC_READ(sc, SEC_ISR);
571 if (isr & sc->sc_int_error_mask) {
572 /* Check each channel for error */
573 for (i = 0; i < SEC_CHANNELS; i++) {
574 if ((isr & SEC_INT_CH_ERR(i)) == 0)
577 device_printf(sc->sc_dev,
578 "I/O error on channel %i!\n", i);
580 /* Find and mark problematic descriptor */
581 desc = sec_find_desc(sc, SEC_READ(sc,
585 desc->sd_error = EIO;
587 /* Do partial channel reset */
588 sec_channel_reset(sc, i, 0);
593 SEC_WRITE(sc, SEC_ICR, 0xFFFFFFFFFFFFFFFFULL);
595 SEC_UNLOCK(sc, controller);
596 SEC_LOCK(sc, descriptors);
598 /* Handle processed descriptors */
599 SEC_DESC_SYNC(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
601 while (SEC_QUEUED_DESC_CNT(sc) > 0) {
602 desc = SEC_GET_QUEUED_DESC(sc);
604 if (desc->sd_desc->shd_done != 0xFF && desc->sd_error == 0) {
605 SEC_PUT_BACK_QUEUED_DESC(sc);
609 SEC_DESC_SYNC_POINTERS(desc, BUS_DMASYNC_PREREAD |
610 BUS_DMASYNC_PREWRITE);
612 desc->sd_crp->crp_etype = desc->sd_error;
613 crypto_done(desc->sd_crp);
615 SEC_DESC_FREE_POINTERS(desc);
616 SEC_DESC_FREE_LT(sc, desc);
617 SEC_DESC_QUEUED2FREE(sc);
620 SEC_DESC_SYNC(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
622 if (!sc->sc_shutdown) {
623 wakeup = sc->sc_blocked;
627 SEC_UNLOCK(sc, descriptors);
629 /* Enqueue ready descriptors in hardware */
633 crypto_unblock(sc->sc_cid, wakeup);
637 sec_secondary_intr(void *arg)
639 struct sec_softc *sc = arg;
641 device_printf(sc->sc_dev, "spurious secondary interrupt!\n");
642 sec_primary_intr(arg);
646 sec_controller_reset(struct sec_softc *sc)
648 int timeout = SEC_TIMEOUT;
650 /* Reset Controller */
651 SEC_WRITE(sc, SEC_MCR, SEC_MCR_SWR);
653 while (SEC_READ(sc, SEC_MCR) & SEC_MCR_SWR) {
658 device_printf(sc->sc_dev, "timeout while waiting for "
668 sec_channel_reset(struct sec_softc *sc, int channel, int full)
670 int timeout = SEC_TIMEOUT;
671 uint64_t bit = (full) ? SEC_CHAN_CCR_R : SEC_CHAN_CCR_CON;
675 reg = SEC_READ(sc, SEC_CHAN_CCR(channel));
676 SEC_WRITE(sc, SEC_CHAN_CCR(channel), reg | bit);
678 while (SEC_READ(sc, SEC_CHAN_CCR(channel)) & bit) {
683 device_printf(sc->sc_dev, "timeout while waiting for "
690 reg = SEC_CHAN_CCR_CDIE | SEC_CHAN_CCR_NT | SEC_CHAN_CCR_BS;
692 switch(sc->sc_version) {
694 reg |= SEC_CHAN_CCR_CDWE;
697 reg |= SEC_CHAN_CCR_AWSE | SEC_CHAN_CCR_WGN;
701 SEC_WRITE(sc, SEC_CHAN_CCR(channel), reg);
708 sec_init(struct sec_softc *sc)
713 /* Reset controller twice to clear all pending interrupts */
714 error = sec_controller_reset(sc);
718 error = sec_controller_reset(sc);
723 for (i = 0; i < SEC_CHANNELS; i++) {
724 error = sec_channel_reset(sc, i, 1);
729 /* Enable Interrupts */
731 for (i = 0; i < SEC_CHANNELS; i++)
732 reg |= SEC_INT_CH_DN(i) | SEC_INT_CH_ERR(i);
734 SEC_WRITE(sc, SEC_IER, reg);
740 sec_alloc_dma_mem_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
742 struct sec_dma_mem *dma_mem = arg;
747 KASSERT(nseg == 1, ("Wrong number of segments, should be 1"));
748 dma_mem->dma_paddr = segs->ds_addr;
752 sec_dma_map_desc_cb(void *arg, bus_dma_segment_t *segs, int nseg,
755 struct sec_desc_map_info *sdmi = arg;
756 struct sec_softc *sc = sdmi->sdmi_sc;
757 struct sec_lt *lt = NULL;
762 SEC_LOCK_ASSERT(sc, descriptors);
767 for (i = 0; i < nseg; i++) {
768 addr = segs[i].ds_addr;
769 size = segs[i].ds_len;
771 /* Skip requested offset */
772 if (sdmi->sdmi_offset >= size) {
773 sdmi->sdmi_offset -= size;
777 addr += sdmi->sdmi_offset;
778 size -= sdmi->sdmi_offset;
779 sdmi->sdmi_offset = 0;
781 /* Do not link more than requested */
782 if (sdmi->sdmi_size < size)
783 size = sdmi->sdmi_size;
785 lt = SEC_ALLOC_LT_ENTRY(sc);
786 lt->sl_lt->shl_length = size;
787 lt->sl_lt->shl_r = 0;
788 lt->sl_lt->shl_n = 0;
789 lt->sl_lt->shl_ptr = addr;
791 if (sdmi->sdmi_lt_first == NULL)
792 sdmi->sdmi_lt_first = lt;
794 sdmi->sdmi_lt_used += 1;
796 if ((sdmi->sdmi_size -= size) == 0)
800 sdmi->sdmi_lt_last = lt;
804 sec_dma_map_desc_cb2(void *arg, bus_dma_segment_t *segs, int nseg,
805 bus_size_t size, int error)
808 sec_dma_map_desc_cb(arg, segs, nseg, error);
812 sec_alloc_dma_mem(struct sec_softc *sc, struct sec_dma_mem *dma_mem,
817 if (dma_mem->dma_vaddr != NULL)
820 error = bus_dma_tag_create(NULL, /* parent */
821 SEC_DMA_ALIGNMENT, 0, /* alignment, boundary */
822 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
823 BUS_SPACE_MAXADDR, /* highaddr */
824 NULL, NULL, /* filtfunc, filtfuncarg */
825 size, 1, /* maxsize, nsegments */
826 size, 0, /* maxsegsz, flags */
827 NULL, NULL, /* lockfunc, lockfuncarg */
828 &(dma_mem->dma_tag)); /* dmat */
831 device_printf(sc->sc_dev, "failed to allocate busdma tag, error"
836 error = bus_dmamem_alloc(dma_mem->dma_tag, &(dma_mem->dma_vaddr),
837 BUS_DMA_NOWAIT | BUS_DMA_ZERO, &(dma_mem->dma_map));
840 device_printf(sc->sc_dev, "failed to allocate DMA safe"
841 " memory, error %i!\n", error);
845 error = bus_dmamap_load(dma_mem->dma_tag, dma_mem->dma_map,
846 dma_mem->dma_vaddr, size, sec_alloc_dma_mem_cb, dma_mem,
850 device_printf(sc->sc_dev, "cannot get address of the DMA"
851 " memory, error %i\n", error);
855 dma_mem->dma_is_map = 0;
859 bus_dmamem_free(dma_mem->dma_tag, dma_mem->dma_vaddr, dma_mem->dma_map);
861 bus_dma_tag_destroy(dma_mem->dma_tag);
863 dma_mem->dma_vaddr = NULL;
868 sec_desc_map_dma(struct sec_softc *sc, struct sec_dma_mem *dma_mem, void *mem,
869 bus_size_t size, int type, struct sec_desc_map_info *sdmi)
873 if (dma_mem->dma_vaddr != NULL)
880 size = SEC_FREE_LT_CNT(sc) * SEC_MAX_DMA_BLOCK_SIZE;
883 size = m_length((struct mbuf*)mem, NULL);
889 error = bus_dma_tag_create(NULL, /* parent */
890 SEC_DMA_ALIGNMENT, 0, /* alignment, boundary */
891 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
892 BUS_SPACE_MAXADDR, /* highaddr */
893 NULL, NULL, /* filtfunc, filtfuncarg */
895 SEC_FREE_LT_CNT(sc), /* nsegments */
896 SEC_MAX_DMA_BLOCK_SIZE, 0, /* maxsegsz, flags */
897 NULL, NULL, /* lockfunc, lockfuncarg */
898 &(dma_mem->dma_tag)); /* dmat */
901 device_printf(sc->sc_dev, "failed to allocate busdma tag, error"
903 dma_mem->dma_vaddr = NULL;
907 error = bus_dmamap_create(dma_mem->dma_tag, 0, &(dma_mem->dma_map));
910 device_printf(sc->sc_dev, "failed to create DMA map, error %i!"
912 bus_dma_tag_destroy(dma_mem->dma_tag);
918 error = bus_dmamap_load(dma_mem->dma_tag, dma_mem->dma_map,
919 mem, size, sec_dma_map_desc_cb, sdmi, BUS_DMA_NOWAIT);
922 error = bus_dmamap_load_uio(dma_mem->dma_tag, dma_mem->dma_map,
923 mem, sec_dma_map_desc_cb2, sdmi, BUS_DMA_NOWAIT);
926 error = bus_dmamap_load_mbuf(dma_mem->dma_tag, dma_mem->dma_map,
927 mem, sec_dma_map_desc_cb2, sdmi, BUS_DMA_NOWAIT);
932 device_printf(sc->sc_dev, "cannot get address of the DMA"
933 " memory, error %i!\n", error);
934 bus_dmamap_destroy(dma_mem->dma_tag, dma_mem->dma_map);
935 bus_dma_tag_destroy(dma_mem->dma_tag);
939 dma_mem->dma_is_map = 1;
940 dma_mem->dma_vaddr = mem;
946 sec_free_dma_mem(struct sec_dma_mem *dma_mem)
949 /* Check for double free */
950 if (dma_mem->dma_vaddr == NULL)
953 bus_dmamap_unload(dma_mem->dma_tag, dma_mem->dma_map);
955 if (dma_mem->dma_is_map)
956 bus_dmamap_destroy(dma_mem->dma_tag, dma_mem->dma_map);
958 bus_dmamem_free(dma_mem->dma_tag, dma_mem->dma_vaddr,
961 bus_dma_tag_destroy(dma_mem->dma_tag);
962 dma_mem->dma_vaddr = NULL;
966 sec_eu_channel(struct sec_softc *sc, int eu)
971 SEC_LOCK_ASSERT(sc, controller);
973 reg = SEC_READ(sc, SEC_EUASR);
977 channel = SEC_EUASR_AFEU(reg);
980 channel = SEC_EUASR_DEU(reg);
984 channel = SEC_EUASR_MDEU(reg);
987 channel = SEC_EUASR_RNGU(reg);
990 channel = SEC_EUASR_PKEU(reg);
993 channel = SEC_EUASR_AESU(reg);
996 channel = SEC_EUASR_KEU(reg);
999 channel = SEC_EUASR_CRCU(reg);
1003 return (channel - 1);
1007 sec_enqueue_desc(struct sec_softc *sc, struct sec_desc *desc, int channel)
1009 u_int fflvl = SEC_MAX_FIFO_LEVEL;
1013 SEC_LOCK_ASSERT(sc, controller);
1015 /* Find free channel if have not got one */
1017 for (i = 0; i < SEC_CHANNELS; i++) {
1018 reg = SEC_READ(sc, SEC_CHAN_CSR(channel));
1020 if ((reg & sc->sc_channel_idle_mask) == 0) {
1027 /* There is no free channel */
1031 /* Check FIFO level on selected channel */
1032 reg = SEC_READ(sc, SEC_CHAN_CSR(channel));
1034 switch(sc->sc_version) {
1036 fflvl = (reg >> SEC_CHAN_CSR2_FFLVL_S) & SEC_CHAN_CSR2_FFLVL_M;
1039 fflvl = (reg >> SEC_CHAN_CSR3_FFLVL_S) & SEC_CHAN_CSR3_FFLVL_M;
1043 if (fflvl >= SEC_MAX_FIFO_LEVEL)
1046 /* Enqueue descriptor in channel */
1047 SEC_WRITE(sc, SEC_CHAN_FF(channel), desc->sd_desc_paddr);
1053 sec_enqueue(struct sec_softc *sc)
1055 struct sec_desc *desc;
1058 SEC_LOCK(sc, descriptors);
1059 SEC_LOCK(sc, controller);
1061 while (SEC_READY_DESC_CNT(sc) > 0) {
1062 desc = SEC_GET_READY_DESC(sc);
1064 ch0 = sec_eu_channel(sc, desc->sd_desc->shd_eu_sel0);
1065 ch1 = sec_eu_channel(sc, desc->sd_desc->shd_eu_sel1);
1068 * Both EU are used by the same channel.
1069 * Enqueue descriptor in channel used by busy EUs.
1071 if (ch0 >= 0 && ch0 == ch1) {
1072 if (sec_enqueue_desc(sc, desc, ch0) >= 0) {
1073 SEC_DESC_READY2QUEUED(sc);
1079 * Only one EU is free.
1080 * Enqueue descriptor in channel used by busy EU.
1082 if ((ch0 >= 0 && ch1 < 0) || (ch1 >= 0 && ch0 < 0)) {
1083 if (sec_enqueue_desc(sc, desc, (ch0 >= 0) ? ch0 : ch1)
1085 SEC_DESC_READY2QUEUED(sc);
1092 * Enqueue descriptor in first free channel.
1094 if (ch0 < 0 && ch1 < 0) {
1095 if (sec_enqueue_desc(sc, desc, -1) >= 0) {
1096 SEC_DESC_READY2QUEUED(sc);
1101 /* Current descriptor can not be queued at the moment */
1102 SEC_PUT_BACK_READY_DESC(sc);
1106 SEC_UNLOCK(sc, controller);
1107 SEC_UNLOCK(sc, descriptors);
1110 static struct sec_desc *
1111 sec_find_desc(struct sec_softc *sc, bus_addr_t paddr)
1113 struct sec_desc *desc = NULL;
1116 SEC_LOCK_ASSERT(sc, descriptors);
1118 for (i = 0; i < SEC_CHANNELS; i++) {
1119 if (sc->sc_desc[i].sd_desc_paddr == paddr) {
1120 desc = &(sc->sc_desc[i]);
1129 sec_make_pointer_direct(struct sec_softc *sc, struct sec_desc *desc, u_int n,
1130 bus_addr_t data, bus_size_t dsize)
1132 struct sec_hw_desc_ptr *ptr;
1134 SEC_LOCK_ASSERT(sc, descriptors);
1136 ptr = &(desc->sd_desc->shd_pointer[n]);
1137 ptr->shdp_length = dsize;
1138 ptr->shdp_extent = 0;
1140 ptr->shdp_ptr = data;
1146 sec_make_pointer(struct sec_softc *sc, struct sec_desc *desc,
1147 u_int n, void *data, bus_size_t doffset, bus_size_t dsize, int dtype)
1149 struct sec_desc_map_info sdmi = { sc, dsize, doffset, NULL, NULL, 0 };
1150 struct sec_hw_desc_ptr *ptr;
1153 SEC_LOCK_ASSERT(sc, descriptors);
1155 /* For flat memory map only requested region */
1156 if (dtype == SEC_MEMORY) {
1157 data = (uint8_t*)(data) + doffset;
1158 sdmi.sdmi_offset = 0;
1161 error = sec_desc_map_dma(sc, &(desc->sd_ptr_dmem[n]), data, dsize,
1167 sdmi.sdmi_lt_last->sl_lt->shl_r = 1;
1168 desc->sd_lt_used += sdmi.sdmi_lt_used;
1170 ptr = &(desc->sd_desc->shd_pointer[n]);
1171 ptr->shdp_length = dsize;
1172 ptr->shdp_extent = 0;
1174 ptr->shdp_ptr = sdmi.sdmi_lt_first->sl_lt_paddr;
1180 sec_split_cri(struct cryptoini *cri, struct cryptoini **enc,
1181 struct cryptoini **mac)
1183 struct cryptoini *e, *m;
1188 /* We can haldle only two operations */
1189 if (m && m->cri_next)
1192 if (sec_mdeu_can_handle(e->cri_alg)) {
1198 if (m && !sec_mdeu_can_handle(m->cri_alg))
1208 sec_split_crp(struct cryptop *crp, struct cryptodesc **enc,
1209 struct cryptodesc **mac)
1211 struct cryptodesc *e, *m, *t;
1216 /* We can haldle only two operations */
1217 if (m && m->crd_next)
1220 if (sec_mdeu_can_handle(e->crd_alg)) {
1226 if (m && !sec_mdeu_can_handle(m->crd_alg))
1236 sec_alloc_session(struct sec_softc *sc)
1238 struct sec_session *ses = NULL;
1242 SEC_LOCK(sc, sessions);
1244 for (i = 0; i < SEC_MAX_SESSIONS; i++) {
1245 if (sc->sc_sessions[i].ss_used == 0) {
1246 ses = &(sc->sc_sessions[i]);
1256 SEC_UNLOCK(sc, sessions);
1261 static struct sec_session *
1262 sec_get_session(struct sec_softc *sc, u_int sid)
1264 struct sec_session *ses;
1266 if (sid >= SEC_MAX_SESSIONS)
1269 SEC_LOCK(sc, sessions);
1271 ses = &(sc->sc_sessions[sid]);
1273 if (ses->ss_used == 0)
1276 SEC_UNLOCK(sc, sessions);
1282 sec_newsession(device_t dev, u_int32_t *sidp, struct cryptoini *cri)
1284 struct sec_softc *sc = device_get_softc(dev);
1285 struct sec_eu_methods *eu = sec_eus;
1286 struct cryptoini *enc = NULL;
1287 struct cryptoini *mac = NULL;
1288 struct sec_session *ses;
1292 error = sec_split_cri(cri, &enc, &mac);
1296 /* Check key lengths */
1297 if (enc && enc->cri_key && (enc->cri_klen / 8) > SEC_MAX_KEY_LEN)
1300 if (mac && mac->cri_key && (mac->cri_klen / 8) > SEC_MAX_KEY_LEN)
1303 /* Only SEC 3.0 supports digests larger than 256 bits */
1304 if (sc->sc_version < 3 && mac && mac->cri_klen > 256)
1307 sid = sec_alloc_session(sc);
1311 ses = sec_get_session(sc, sid);
1313 /* Find EU for this session */
1314 while (eu->sem_make_desc != NULL) {
1315 error = eu->sem_newsession(sc, ses, enc, mac);
1322 /* If not found, return EINVAL */
1324 sec_free_session(sc, ses);
1328 /* Save cipher key */
1329 if (enc && enc->cri_key) {
1330 ses->ss_klen = enc->cri_klen / 8;
1331 memcpy(ses->ss_key, enc->cri_key, ses->ss_klen);
1334 /* Save digest key */
1335 if (mac && mac->cri_key) {
1336 ses->ss_mklen = mac->cri_klen / 8;
1337 memcpy(ses->ss_mkey, mac->cri_key, ses->ss_mklen);
1347 sec_freesession(device_t dev, uint64_t tid)
1349 struct sec_softc *sc = device_get_softc(dev);
1350 struct sec_session *ses;
1353 ses = sec_get_session(sc, CRYPTO_SESID2LID(tid));
1357 sec_free_session(sc, ses);
1363 sec_process(device_t dev, struct cryptop *crp, int hint)
1365 struct sec_softc *sc = device_get_softc(dev);
1366 struct sec_desc *desc = NULL;
1367 struct cryptodesc *mac, *enc;
1368 struct sec_session *ses;
1369 int buftype, error = 0;
1371 /* Check Session ID */
1372 ses = sec_get_session(sc, CRYPTO_SESID2LID(crp->crp_sid));
1374 crp->crp_etype = EINVAL;
1379 /* Check for input length */
1380 if (crp->crp_ilen > SEC_MAX_DMA_BLOCK_SIZE) {
1381 crp->crp_etype = E2BIG;
1386 /* Get descriptors */
1387 if (sec_split_crp(crp, &enc, &mac)) {
1388 crp->crp_etype = EINVAL;
1393 SEC_LOCK(sc, descriptors);
1394 SEC_DESC_SYNC(sc, BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
1396 /* Block driver if there is no free descriptors or we are going down */
1397 if (SEC_FREE_DESC_CNT(sc) == 0 || sc->sc_shutdown) {
1398 sc->sc_blocked |= CRYPTO_SYMQ;
1399 SEC_UNLOCK(sc, descriptors);
1403 /* Prepare descriptor */
1404 desc = SEC_GET_FREE_DESC(sc);
1405 desc->sd_lt_used = 0;
1409 if (crp->crp_flags & CRYPTO_F_IOV)
1411 else if (crp->crp_flags & CRYPTO_F_IMBUF)
1414 buftype = SEC_MEMORY;
1416 if (enc && enc->crd_flags & CRD_F_ENCRYPT) {
1417 if (enc->crd_flags & CRD_F_IV_EXPLICIT)
1418 memcpy(desc->sd_desc->shd_iv, enc->crd_iv,
1421 arc4rand(desc->sd_desc->shd_iv, ses->ss_ivlen, 0);
1423 if ((enc->crd_flags & CRD_F_IV_PRESENT) == 0)
1424 crypto_copyback(crp->crp_flags, crp->crp_buf,
1425 enc->crd_inject, ses->ss_ivlen,
1426 desc->sd_desc->shd_iv);
1428 if (enc->crd_flags & CRD_F_IV_EXPLICIT)
1429 memcpy(desc->sd_desc->shd_iv, enc->crd_iv,
1432 crypto_copydata(crp->crp_flags, crp->crp_buf,
1433 enc->crd_inject, ses->ss_ivlen,
1434 desc->sd_desc->shd_iv);
1437 if (enc && enc->crd_flags & CRD_F_KEY_EXPLICIT) {
1438 if ((enc->crd_klen / 8) <= SEC_MAX_KEY_LEN) {
1439 ses->ss_klen = enc->crd_klen / 8;
1440 memcpy(ses->ss_key, enc->crd_key, ses->ss_klen);
1445 if (!error && mac && mac->crd_flags & CRD_F_KEY_EXPLICIT) {
1446 if ((mac->crd_klen / 8) <= SEC_MAX_KEY_LEN) {
1447 ses->ss_mklen = mac->crd_klen / 8;
1448 memcpy(ses->ss_mkey, mac->crd_key, ses->ss_mklen);
1454 memcpy(desc->sd_desc->shd_key, ses->ss_key, ses->ss_klen);
1455 memcpy(desc->sd_desc->shd_mkey, ses->ss_mkey, ses->ss_mklen);
1457 error = ses->ss_eu->sem_make_desc(sc, ses, desc, crp, buftype);
1461 SEC_DESC_FREE_POINTERS(desc);
1462 SEC_DESC_PUT_BACK_LT(sc, desc);
1463 SEC_PUT_BACK_FREE_DESC(sc);
1464 SEC_UNLOCK(sc, descriptors);
1465 crp->crp_etype = error;
1471 * Skip DONE interrupt if this is not last request in burst, but only
1472 * if we are running on SEC 3.X. On SEC 2.X we have to enable DONE
1473 * signaling on each descriptor.
1475 if ((hint & CRYPTO_HINT_MORE) && sc->sc_version == 3)
1476 desc->sd_desc->shd_dn = 0;
1478 desc->sd_desc->shd_dn = 1;
1480 SEC_DESC_SYNC(sc, BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
1481 SEC_DESC_SYNC_POINTERS(desc, BUS_DMASYNC_POSTREAD |
1482 BUS_DMASYNC_POSTWRITE);
1483 SEC_DESC_FREE2READY(sc);
1484 SEC_UNLOCK(sc, descriptors);
1486 /* Enqueue ready descriptors in hardware */
1493 sec_build_common_ns_desc(struct sec_softc *sc, struct sec_desc *desc,
1494 struct sec_session *ses, struct cryptop *crp, struct cryptodesc *enc,
1497 struct sec_hw_desc *hd = desc->sd_desc;
1500 hd->shd_desc_type = SEC_DT_COMMON_NONSNOOP;
1501 hd->shd_eu_sel1 = SEC_EU_NONE;
1504 /* Pointer 0: NULL */
1505 error = sec_make_pointer_direct(sc, desc, 0, 0, 0);
1509 /* Pointer 1: IV IN */
1510 error = sec_make_pointer_direct(sc, desc, 1, desc->sd_desc_paddr +
1511 offsetof(struct sec_hw_desc, shd_iv), ses->ss_ivlen);
1515 /* Pointer 2: Cipher Key */
1516 error = sec_make_pointer_direct(sc, desc, 2, desc->sd_desc_paddr +
1517 offsetof(struct sec_hw_desc, shd_key), ses->ss_klen);
1521 /* Pointer 3: Data IN */
1522 error = sec_make_pointer(sc, desc, 3, crp->crp_buf, enc->crd_skip,
1523 enc->crd_len, buftype);
1527 /* Pointer 4: Data OUT */
1528 error = sec_make_pointer(sc, desc, 4, crp->crp_buf, enc->crd_skip,
1529 enc->crd_len, buftype);
1533 /* Pointer 5: IV OUT (Not used: NULL) */
1534 error = sec_make_pointer_direct(sc, desc, 5, 0, 0);
1538 /* Pointer 6: NULL */
1539 error = sec_make_pointer_direct(sc, desc, 6, 0, 0);
1545 sec_build_common_s_desc(struct sec_softc *sc, struct sec_desc *desc,
1546 struct sec_session *ses, struct cryptop *crp, struct cryptodesc *enc,
1547 struct cryptodesc *mac, int buftype)
1549 struct sec_hw_desc *hd = desc->sd_desc;
1550 u_int eu, mode, hashlen;
1553 if (mac->crd_len < enc->crd_len)
1556 if (mac->crd_skip + mac->crd_len != enc->crd_skip + enc->crd_len)
1559 error = sec_mdeu_config(mac, &eu, &mode, &hashlen);
1563 hd->shd_desc_type = SEC_DT_HMAC_SNOOP;
1564 hd->shd_eu_sel1 = eu;
1565 hd->shd_mode1 = mode;
1567 /* Pointer 0: HMAC Key */
1568 error = sec_make_pointer_direct(sc, desc, 0, desc->sd_desc_paddr +
1569 offsetof(struct sec_hw_desc, shd_mkey), ses->ss_mklen);
1573 /* Pointer 1: HMAC-Only Data IN */
1574 error = sec_make_pointer(sc, desc, 1, crp->crp_buf, mac->crd_skip,
1575 mac->crd_len - enc->crd_len, buftype);
1579 /* Pointer 2: Cipher Key */
1580 error = sec_make_pointer_direct(sc, desc, 2, desc->sd_desc_paddr +
1581 offsetof(struct sec_hw_desc, shd_key), ses->ss_klen);
1585 /* Pointer 3: IV IN */
1586 error = sec_make_pointer_direct(sc, desc, 3, desc->sd_desc_paddr +
1587 offsetof(struct sec_hw_desc, shd_iv), ses->ss_ivlen);
1591 /* Pointer 4: Data IN */
1592 error = sec_make_pointer(sc, desc, 4, crp->crp_buf, enc->crd_skip,
1593 enc->crd_len, buftype);
1597 /* Pointer 5: Data OUT */
1598 error = sec_make_pointer(sc, desc, 5, crp->crp_buf, enc->crd_skip,
1599 enc->crd_len, buftype);
1603 /* Pointer 6: HMAC OUT */
1604 error = sec_make_pointer(sc, desc, 6, crp->crp_buf, mac->crd_inject,
1613 sec_aesu_newsession(struct sec_softc *sc, struct sec_session *ses,
1614 struct cryptoini *enc, struct cryptoini *mac)
1620 if (enc->cri_alg != CRYPTO_AES_CBC)
1623 ses->ss_ivlen = AES_BLOCK_LEN;
1629 sec_aesu_make_desc(struct sec_softc *sc, struct sec_session *ses,
1630 struct sec_desc *desc, struct cryptop *crp, int buftype)
1632 struct sec_hw_desc *hd = desc->sd_desc;
1633 struct cryptodesc *enc, *mac;
1636 error = sec_split_crp(crp, &enc, &mac);
1643 hd->shd_eu_sel0 = SEC_EU_AESU;
1644 hd->shd_mode0 = SEC_AESU_MODE_CBC;
1646 if (enc->crd_alg != CRYPTO_AES_CBC)
1649 if (enc->crd_flags & CRD_F_ENCRYPT) {
1650 hd->shd_mode0 |= SEC_AESU_MODE_ED;
1656 error = sec_build_common_s_desc(sc, desc, ses, crp, enc, mac,
1659 error = sec_build_common_ns_desc(sc, desc, ses, crp, enc,
1668 sec_deu_newsession(struct sec_softc *sc, struct sec_session *ses,
1669 struct cryptoini *enc, struct cryptoini *mac)
1675 switch (enc->cri_alg) {
1676 case CRYPTO_DES_CBC:
1677 case CRYPTO_3DES_CBC:
1683 ses->ss_ivlen = DES_BLOCK_LEN;
1689 sec_deu_make_desc(struct sec_softc *sc, struct sec_session *ses,
1690 struct sec_desc *desc, struct cryptop *crp, int buftype)
1692 struct sec_hw_desc *hd = desc->sd_desc;
1693 struct cryptodesc *enc, *mac;
1696 error = sec_split_crp(crp, &enc, &mac);
1703 hd->shd_eu_sel0 = SEC_EU_DEU;
1704 hd->shd_mode0 = SEC_DEU_MODE_CBC;
1706 switch (enc->crd_alg) {
1707 case CRYPTO_3DES_CBC:
1708 hd->shd_mode0 |= SEC_DEU_MODE_TS;
1710 case CRYPTO_DES_CBC:
1716 if (enc->crd_flags & CRD_F_ENCRYPT) {
1717 hd->shd_mode0 |= SEC_DEU_MODE_ED;
1723 error = sec_build_common_s_desc(sc, desc, ses, crp, enc, mac,
1726 error = sec_build_common_ns_desc(sc, desc, ses, crp, enc,
1735 sec_mdeu_can_handle(u_int alg)
1740 case CRYPTO_MD5_HMAC:
1741 case CRYPTO_SHA1_HMAC:
1742 case CRYPTO_SHA2_256_HMAC:
1743 case CRYPTO_SHA2_384_HMAC:
1744 case CRYPTO_SHA2_512_HMAC:
1752 sec_mdeu_config(struct cryptodesc *crd, u_int *eu, u_int *mode, u_int *hashlen)
1755 *mode = SEC_MDEU_MODE_PD | SEC_MDEU_MODE_INIT;
1758 switch (crd->crd_alg) {
1759 case CRYPTO_MD5_HMAC:
1760 *mode |= SEC_MDEU_MODE_HMAC;
1763 *eu = SEC_EU_MDEU_A;
1764 *mode |= SEC_MDEU_MODE_MD5;
1765 *hashlen = MD5_HASH_LEN;
1767 case CRYPTO_SHA1_HMAC:
1768 *mode |= SEC_MDEU_MODE_HMAC;
1771 *eu = SEC_EU_MDEU_A;
1772 *mode |= SEC_MDEU_MODE_SHA1;
1773 *hashlen = SHA1_HASH_LEN;
1775 case CRYPTO_SHA2_256_HMAC:
1776 *mode |= SEC_MDEU_MODE_HMAC | SEC_MDEU_MODE_SHA256;
1777 *eu = SEC_EU_MDEU_A;
1779 case CRYPTO_SHA2_384_HMAC:
1780 *mode |= SEC_MDEU_MODE_HMAC | SEC_MDEU_MODE_SHA384;
1781 *eu = SEC_EU_MDEU_B;
1783 case CRYPTO_SHA2_512_HMAC:
1784 *mode |= SEC_MDEU_MODE_HMAC | SEC_MDEU_MODE_SHA512;
1785 *eu = SEC_EU_MDEU_B;
1791 if (*mode & SEC_MDEU_MODE_HMAC)
1792 *hashlen = SEC_HMAC_HASH_LEN;
1798 sec_mdeu_newsession(struct sec_softc *sc, struct sec_session *ses,
1799 struct cryptoini *enc, struct cryptoini *mac)
1802 if (mac && sec_mdeu_can_handle(mac->cri_alg))
1809 sec_mdeu_make_desc(struct sec_softc *sc, struct sec_session *ses,
1810 struct sec_desc *desc, struct cryptop *crp, int buftype)
1812 struct cryptodesc *enc, *mac;
1813 struct sec_hw_desc *hd = desc->sd_desc;
1814 u_int eu, mode, hashlen;
1817 error = sec_split_crp(crp, &enc, &mac);
1824 error = sec_mdeu_config(mac, &eu, &mode, &hashlen);
1828 hd->shd_desc_type = SEC_DT_COMMON_NONSNOOP;
1829 hd->shd_eu_sel0 = eu;
1830 hd->shd_mode0 = mode;
1831 hd->shd_eu_sel1 = SEC_EU_NONE;
1834 /* Pointer 0: NULL */
1835 error = sec_make_pointer_direct(sc, desc, 0, 0, 0);
1839 /* Pointer 1: Context In (Not used: NULL) */
1840 error = sec_make_pointer_direct(sc, desc, 1, 0, 0);
1844 /* Pointer 2: HMAC Key (or NULL, depending on digest type) */
1845 if (hd->shd_mode0 & SEC_MDEU_MODE_HMAC)
1846 error = sec_make_pointer_direct(sc, desc, 2,
1847 desc->sd_desc_paddr + offsetof(struct sec_hw_desc,
1848 shd_mkey), ses->ss_mklen);
1850 error = sec_make_pointer_direct(sc, desc, 2, 0, 0);
1855 /* Pointer 3: Input Data */
1856 error = sec_make_pointer(sc, desc, 3, crp->crp_buf, mac->crd_skip,
1857 mac->crd_len, buftype);
1861 /* Pointer 4: NULL */
1862 error = sec_make_pointer_direct(sc, desc, 4, 0, 0);
1866 /* Pointer 5: Hash out */
1867 error = sec_make_pointer(sc, desc, 5, crp->crp_buf,
1868 mac->crd_inject, hashlen, buftype);
1872 /* Pointer 6: NULL */
1873 error = sec_make_pointer_direct(sc, desc, 6, 0, 0);