2 * Copyright (c) 2015-2016 Solarflare Communications Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * The views and conclusions contained in the software and documentation are
27 * those of the authors and should not be interpreted as representing official
28 * policies, either expressed or implied, of the FreeBSD Project.
33 #ifndef _SYS_EF10_IMPL_H
34 #define _SYS_EF10_IMPL_H
40 #if (EFSYS_OPT_HUNTINGTON && EFSYS_OPT_MEDFORD)
41 #define EF10_MAX_PIOBUF_NBUFS MAX(HUNT_PIOBUF_NBUFS, MEDFORD_PIOBUF_NBUFS)
42 #elif EFSYS_OPT_HUNTINGTON
43 #define EF10_MAX_PIOBUF_NBUFS HUNT_PIOBUF_NBUFS
44 #elif EFSYS_OPT_MEDFORD
45 #define EF10_MAX_PIOBUF_NBUFS MEDFORD_PIOBUF_NBUFS
49 * FIXME: This is just a power of 2 which fits in an MCDI v1 message, and could
50 * possibly be increased, or the write size reported by newer firmware used
53 #define EF10_NVRAM_CHUNK 0x80
55 /* Alignment requirement for value written to RX WPTR:
56 * the WPTR must be aligned to an 8 descriptor boundary
58 #define EF10_RX_WPTR_ALIGN 8
61 * Max byte offset into the packet the TCP header must start for the hardware
62 * to be able to parse the packet correctly.
64 #define EF10_TCP_HEADER_OFFSET_LIMIT 208
66 /* Invalid RSS context handle */
67 #define EF10_RSS_CONTEXT_INVALID (0xffffffff)
72 __checkReturn efx_rc_t
80 __checkReturn efx_rc_t
83 __in unsigned int index,
84 __in efsys_mem_t *esmp,
95 __checkReturn efx_rc_t
98 __in unsigned int count);
105 __checkReturn efx_rc_t
108 __in unsigned int us);
112 ef10_ev_qstats_update(
114 __inout_ecount(EV_NQSTATS) efsys_stat_t *stat);
115 #endif /* EFSYS_OPT_QSTATS */
118 ef10_ev_rxlabel_init(
121 __in unsigned int label);
124 ef10_ev_rxlabel_fini(
126 __in unsigned int label);
130 __checkReturn efx_rc_t
133 __in efx_intr_type_t type,
134 __in efsys_mem_t *esmp);
138 __in efx_nic_t *enp);
142 __in efx_nic_t *enp);
145 ef10_intr_disable_unlocked(
146 __in efx_nic_t *enp);
148 __checkReturn efx_rc_t
151 __in unsigned int level);
154 ef10_intr_status_line(
156 __out boolean_t *fatalp,
157 __out uint32_t *qmaskp);
160 ef10_intr_status_message(
162 __in unsigned int message,
163 __out boolean_t *fatalp);
167 __in efx_nic_t *enp);
170 __in efx_nic_t *enp);
174 extern __checkReturn efx_rc_t
176 __in efx_nic_t *enp);
178 extern __checkReturn efx_rc_t
179 ef10_nic_set_drv_limits(
180 __inout efx_nic_t *enp,
181 __in efx_drv_limits_t *edlp);
183 extern __checkReturn efx_rc_t
184 ef10_nic_get_vi_pool(
186 __out uint32_t *vi_countp);
188 extern __checkReturn efx_rc_t
189 ef10_nic_get_bar_region(
191 __in efx_nic_region_t region,
192 __out uint32_t *offsetp,
193 __out size_t *sizep);
195 extern __checkReturn efx_rc_t
197 __in efx_nic_t *enp);
199 extern __checkReturn efx_rc_t
201 __in efx_nic_t *enp);
205 extern __checkReturn efx_rc_t
206 ef10_nic_register_test(
207 __in efx_nic_t *enp);
209 #endif /* EFSYS_OPT_DIAG */
213 __in efx_nic_t *enp);
217 __in efx_nic_t *enp);
222 extern __checkReturn efx_rc_t
225 __out efx_link_mode_t *link_modep);
227 extern __checkReturn efx_rc_t
230 __out boolean_t *mac_upp);
232 extern __checkReturn efx_rc_t
234 __in efx_nic_t *enp);
236 extern __checkReturn efx_rc_t
238 __in efx_nic_t *enp);
240 extern __checkReturn efx_rc_t
245 extern __checkReturn efx_rc_t
246 ef10_mac_reconfigure(
247 __in efx_nic_t *enp);
249 extern __checkReturn efx_rc_t
250 ef10_mac_multicast_list_set(
251 __in efx_nic_t *enp);
253 extern __checkReturn efx_rc_t
254 ef10_mac_filter_default_rxq_set(
257 __in boolean_t using_rss);
260 ef10_mac_filter_default_rxq_clear(
261 __in efx_nic_t *enp);
263 #if EFSYS_OPT_LOOPBACK
265 extern __checkReturn efx_rc_t
266 ef10_mac_loopback_set(
268 __in efx_link_mode_t link_mode,
269 __in efx_loopback_type_t loopback_type);
271 #endif /* EFSYS_OPT_LOOPBACK */
273 #if EFSYS_OPT_MAC_STATS
275 extern __checkReturn efx_rc_t
276 ef10_mac_stats_get_mask(
278 __inout_bcount(mask_size) uint32_t *maskp,
279 __in size_t mask_size);
281 extern __checkReturn efx_rc_t
282 ef10_mac_stats_update(
284 __in efsys_mem_t *esmp,
285 __inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat,
286 __inout_opt uint32_t *generationp);
288 #endif /* EFSYS_OPT_MAC_STATS */
295 extern __checkReturn efx_rc_t
298 __in const efx_mcdi_transport_t *mtp);
302 __in efx_nic_t *enp);
305 ef10_mcdi_send_request(
307 __in_bcount(hdr_len) void *hdrp,
309 __in_bcount(sdu_len) void *sdup,
310 __in size_t sdu_len);
312 extern __checkReturn boolean_t
313 ef10_mcdi_poll_response(
314 __in efx_nic_t *enp);
317 ef10_mcdi_read_response(
319 __out_bcount(length) void *bufferp,
324 ef10_mcdi_poll_reboot(
325 __in efx_nic_t *enp);
327 extern __checkReturn efx_rc_t
328 ef10_mcdi_feature_supported(
330 __in efx_mcdi_feature_id_t id,
331 __out boolean_t *supportedp);
334 ef10_mcdi_get_timeout(
336 __in efx_mcdi_req_t *emrp,
337 __out uint32_t *timeoutp);
339 #endif /* EFSYS_OPT_MCDI */
343 #if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD
345 extern __checkReturn efx_rc_t
346 ef10_nvram_buf_read_tlv(
348 __in_bcount(max_seg_size) caddr_t seg_data,
349 __in size_t max_seg_size,
351 __deref_out_bcount_opt(*sizep) caddr_t *datap,
352 __out size_t *sizep);
354 extern __checkReturn efx_rc_t
355 ef10_nvram_buf_write_tlv(
356 __inout_bcount(partn_size) caddr_t partn_data,
357 __in size_t partn_size,
359 __in_bcount(tag_size) caddr_t tag_data,
360 __in size_t tag_size,
361 __out size_t *total_lengthp);
363 extern __checkReturn efx_rc_t
364 ef10_nvram_partn_read_tlv(
368 __deref_out_bcount_opt(*sizep) caddr_t *datap,
369 __out size_t *sizep);
371 extern __checkReturn efx_rc_t
372 ef10_nvram_partn_write_tlv(
376 __in_bcount(size) caddr_t data,
379 extern __checkReturn efx_rc_t
380 ef10_nvram_partn_write_segment_tlv(
384 __in_bcount(size) caddr_t data,
386 __in boolean_t all_segments);
388 extern __checkReturn efx_rc_t
389 ef10_nvram_partn_lock(
391 __in uint32_t partn);
393 extern __checkReturn efx_rc_t
394 ef10_nvram_partn_unlock(
397 __out_opt uint32_t *resultp);
399 #endif /* EFSYS_OPT_NVRAM || EFSYS_OPT_VPD */
405 extern __checkReturn efx_rc_t
407 __in efx_nic_t *enp);
409 #endif /* EFSYS_OPT_DIAG */
411 extern __checkReturn efx_rc_t
412 ef10_nvram_type_to_partn(
414 __in efx_nvram_type_t type,
415 __out uint32_t *partnp);
417 extern __checkReturn efx_rc_t
418 ef10_nvram_partn_size(
421 __out size_t *sizep);
423 extern __checkReturn efx_rc_t
424 ef10_nvram_partn_rw_start(
427 __out size_t *chunk_sizep);
429 extern __checkReturn efx_rc_t
430 ef10_nvram_partn_read_mode(
433 __in unsigned int offset,
434 __out_bcount(size) caddr_t data,
438 extern __checkReturn efx_rc_t
439 ef10_nvram_partn_read(
442 __in unsigned int offset,
443 __out_bcount(size) caddr_t data,
446 extern __checkReturn efx_rc_t
447 ef10_nvram_partn_erase(
450 __in unsigned int offset,
453 extern __checkReturn efx_rc_t
454 ef10_nvram_partn_write(
457 __in unsigned int offset,
458 __out_bcount(size) caddr_t data,
461 extern __checkReturn efx_rc_t
462 ef10_nvram_partn_rw_finish(
464 __in uint32_t partn);
466 extern __checkReturn efx_rc_t
467 ef10_nvram_partn_get_version(
470 __out uint32_t *subtypep,
471 __out_ecount(4) uint16_t version[4]);
473 extern __checkReturn efx_rc_t
474 ef10_nvram_partn_set_version(
477 __in_ecount(4) uint16_t version[4]);
479 extern __checkReturn efx_rc_t
480 ef10_nvram_buffer_validate(
483 __in_bcount(buffer_size)
485 __in size_t buffer_size);
487 extern __checkReturn efx_rc_t
488 ef10_nvram_buffer_create(
490 __in uint16_t partn_type,
491 __in_bcount(buffer_size)
493 __in size_t buffer_size);
495 extern __checkReturn efx_rc_t
496 ef10_nvram_buffer_find_item_start(
497 __in_bcount(buffer_size)
499 __in size_t buffer_size,
500 __out uint32_t *startp
503 extern __checkReturn efx_rc_t
504 ef10_nvram_buffer_find_end(
505 __in_bcount(buffer_size)
507 __in size_t buffer_size,
508 __in uint32_t offset,
512 extern __checkReturn __success(return != B_FALSE) boolean_t
513 ef10_nvram_buffer_find_item(
514 __in_bcount(buffer_size)
516 __in size_t buffer_size,
517 __in uint32_t offset,
518 __out uint32_t *startp,
519 __out uint32_t *lengthp
522 extern __checkReturn efx_rc_t
523 ef10_nvram_buffer_get_item(
524 __in_bcount(buffer_size)
526 __in size_t buffer_size,
527 __in uint32_t offset,
528 __in uint32_t length,
529 __out_bcount_part(item_max_size, *lengthp)
531 __in size_t item_max_size,
532 __out uint32_t *lengthp
535 extern __checkReturn efx_rc_t
536 ef10_nvram_buffer_insert_item(
537 __in_bcount(buffer_size)
539 __in size_t buffer_size,
540 __in uint32_t offset,
541 __in_bcount(length) caddr_t keyp,
542 __in uint32_t length,
543 __out uint32_t *lengthp
546 extern __checkReturn efx_rc_t
547 ef10_nvram_buffer_delete_item(
548 __in_bcount(buffer_size)
550 __in size_t buffer_size,
551 __in uint32_t offset,
552 __in uint32_t length,
556 extern __checkReturn efx_rc_t
557 ef10_nvram_buffer_finish(
558 __in_bcount(buffer_size)
560 __in size_t buffer_size
563 #endif /* EFSYS_OPT_NVRAM */
568 typedef struct ef10_link_state_s {
569 uint32_t els_adv_cap_mask;
570 uint32_t els_lp_cap_mask;
571 unsigned int els_fcntl;
572 efx_link_mode_t els_link_mode;
573 #if EFSYS_OPT_LOOPBACK
574 efx_loopback_type_t els_loopback;
576 boolean_t els_mac_up;
582 __in efx_qword_t *eqp,
583 __out efx_link_mode_t *link_modep);
585 extern __checkReturn efx_rc_t
588 __out ef10_link_state_t *elsp);
590 extern __checkReturn efx_rc_t
595 extern __checkReturn efx_rc_t
596 ef10_phy_reconfigure(
597 __in efx_nic_t *enp);
599 extern __checkReturn efx_rc_t
601 __in efx_nic_t *enp);
603 extern __checkReturn efx_rc_t
606 __out uint32_t *ouip);
608 #if EFSYS_OPT_PHY_STATS
610 extern __checkReturn efx_rc_t
611 ef10_phy_stats_update(
613 __in efsys_mem_t *esmp,
614 __inout_ecount(EFX_PHY_NSTATS) uint32_t *stat);
616 #endif /* EFSYS_OPT_PHY_STATS */
620 extern __checkReturn efx_rc_t
621 ef10_bist_enable_offline(
622 __in efx_nic_t *enp);
624 extern __checkReturn efx_rc_t
627 __in efx_bist_type_t type);
629 extern __checkReturn efx_rc_t
632 __in efx_bist_type_t type,
633 __out efx_bist_result_t *resultp,
634 __out_opt __drv_when(count > 0, __notnull)
635 uint32_t *value_maskp,
636 __out_ecount_opt(count) __drv_when(count > 0, __notnull)
637 unsigned long *valuesp,
643 __in efx_bist_type_t type);
645 #endif /* EFSYS_OPT_BIST */
649 extern __checkReturn efx_rc_t
651 __in efx_nic_t *enp);
655 __in efx_nic_t *enp);
657 extern __checkReturn efx_rc_t
660 __in unsigned int index,
661 __in unsigned int label,
662 __in efsys_mem_t *esmp,
668 __out unsigned int *addedp);
672 __in efx_txq_t *etp);
674 extern __checkReturn efx_rc_t
677 __in_ecount(n) efx_buffer_t *eb,
679 __in unsigned int completed,
680 __inout unsigned int *addedp);
685 __in unsigned int added,
686 __in unsigned int pushed);
688 extern __checkReturn efx_rc_t
691 __in unsigned int ns);
693 extern __checkReturn efx_rc_t
695 __in efx_txq_t *etp);
699 __in efx_txq_t *etp);
701 extern __checkReturn efx_rc_t
703 __in efx_txq_t *etp);
706 ef10_tx_qpio_disable(
707 __in efx_txq_t *etp);
709 extern __checkReturn efx_rc_t
712 __in_ecount(buf_length) uint8_t *buffer,
713 __in size_t buf_length,
714 __in size_t pio_buf_offset);
716 extern __checkReturn efx_rc_t
719 __in size_t pkt_length,
720 __in unsigned int completed,
721 __inout unsigned int *addedp);
723 extern __checkReturn efx_rc_t
726 __in_ecount(n) efx_desc_t *ed,
728 __in unsigned int completed,
729 __inout unsigned int *addedp);
732 ef10_tx_qdesc_dma_create(
734 __in efsys_dma_addr_t addr,
737 __out efx_desc_t *edp);
740 ef10_tx_qdesc_tso_create(
742 __in uint16_t ipv4_id,
743 __in uint32_t tcp_seq,
744 __in uint8_t tcp_flags,
745 __out efx_desc_t *edp);
748 ef10_tx_qdesc_tso2_create(
750 __in uint16_t ipv4_id,
751 __in uint32_t tcp_seq,
752 __in uint16_t tcp_mss,
753 __out_ecount(count) efx_desc_t *edp,
757 ef10_tx_qdesc_vlantci_create(
759 __in uint16_t vlan_tci,
760 __out efx_desc_t *edp);
766 ef10_tx_qstats_update(
768 __inout_ecount(TX_NQSTATS) efsys_stat_t *stat);
770 #endif /* EFSYS_OPT_QSTATS */
772 typedef uint32_t efx_piobuf_handle_t;
774 #define EFX_PIOBUF_HANDLE_INVALID ((efx_piobuf_handle_t) -1)
776 extern __checkReturn efx_rc_t
778 __inout efx_nic_t *enp,
779 __out uint32_t *bufnump,
780 __out efx_piobuf_handle_t *handlep,
781 __out uint32_t *blknump,
782 __out uint32_t *offsetp,
783 __out size_t *sizep);
785 extern __checkReturn efx_rc_t
787 __inout efx_nic_t *enp,
788 __in uint32_t bufnum,
789 __in uint32_t blknum);
791 extern __checkReturn efx_rc_t
793 __inout efx_nic_t *enp,
794 __in uint32_t vi_index,
795 __in efx_piobuf_handle_t handle);
797 extern __checkReturn efx_rc_t
799 __inout efx_nic_t *enp,
800 __in uint32_t vi_index);
807 extern __checkReturn efx_rc_t
809 __in efx_nic_t *enp);
811 extern __checkReturn efx_rc_t
814 __out size_t *sizep);
816 extern __checkReturn efx_rc_t
819 __out_bcount(size) caddr_t data,
822 extern __checkReturn efx_rc_t
825 __in_bcount(size) caddr_t data,
828 extern __checkReturn efx_rc_t
831 __in_bcount(size) caddr_t data,
834 extern __checkReturn efx_rc_t
837 __in_bcount(size) caddr_t data,
839 __inout efx_vpd_value_t *evvp);
841 extern __checkReturn efx_rc_t
844 __in_bcount(size) caddr_t data,
846 __in efx_vpd_value_t *evvp);
848 extern __checkReturn efx_rc_t
851 __in_bcount(size) caddr_t data,
853 __out efx_vpd_value_t *evvp,
854 __inout unsigned int *contp);
856 extern __checkReturn efx_rc_t
859 __in_bcount(size) caddr_t data,
864 __in efx_nic_t *enp);
866 #endif /* EFSYS_OPT_VPD */
871 extern __checkReturn efx_rc_t
873 __in efx_nic_t *enp);
875 #if EFSYS_OPT_RX_SCATTER
876 extern __checkReturn efx_rc_t
877 ef10_rx_scatter_enable(
879 __in unsigned int buf_size);
880 #endif /* EFSYS_OPT_RX_SCATTER */
883 #if EFSYS_OPT_RX_SCALE
885 extern __checkReturn efx_rc_t
886 ef10_rx_scale_mode_set(
888 __in efx_rx_hash_alg_t alg,
889 __in efx_rx_hash_type_t type,
890 __in boolean_t insert);
892 extern __checkReturn efx_rc_t
893 ef10_rx_scale_key_set(
895 __in_ecount(n) uint8_t *key,
898 extern __checkReturn efx_rc_t
899 ef10_rx_scale_tbl_set(
901 __in_ecount(n) unsigned int *table,
904 extern __checkReturn uint32_t
907 __in efx_rx_hash_alg_t func,
908 __in uint8_t *buffer);
910 #endif /* EFSYS_OPT_RX_SCALE */
912 extern __checkReturn efx_rc_t
913 ef10_rx_prefix_pktlen(
915 __in uint8_t *buffer,
916 __out uint16_t *lengthp);
921 __in_ecount(n) efsys_dma_addr_t *addrp,
924 __in unsigned int completed,
925 __in unsigned int added);
930 __in unsigned int added,
931 __inout unsigned int *pushedp);
933 extern __checkReturn efx_rc_t
935 __in efx_rxq_t *erp);
939 __in efx_rxq_t *erp);
941 extern __checkReturn efx_rc_t
944 __in unsigned int index,
945 __in unsigned int label,
946 __in efx_rxq_type_t type,
947 __in efsys_mem_t *esmp,
951 __in efx_rxq_t *erp);
955 __in efx_rxq_t *erp);
959 __in efx_nic_t *enp);
963 typedef struct ef10_filter_handle_s {
966 } ef10_filter_handle_t;
968 typedef struct ef10_filter_entry_s {
969 uintptr_t efe_spec; /* pointer to filter spec plus busy bit */
970 ef10_filter_handle_t efe_handle;
971 } ef10_filter_entry_t;
974 * BUSY flag indicates that an update is in progress.
975 * AUTO_OLD flag is used to mark and sweep MAC packet filters.
977 #define EFX_EF10_FILTER_FLAG_BUSY 1U
978 #define EFX_EF10_FILTER_FLAG_AUTO_OLD 2U
979 #define EFX_EF10_FILTER_FLAGS 3U
982 * Size of the hash table used by the driver. Doesn't need to be the
983 * same size as the hardware's table.
985 #define EFX_EF10_FILTER_TBL_ROWS 8192
987 /* Only need to allow for one directed and one unknown unicast filter */
988 #define EFX_EF10_FILTER_UNICAST_FILTERS_MAX 2
990 /* Allow for the broadcast address to be added to the multicast list */
991 #define EFX_EF10_FILTER_MULTICAST_FILTERS_MAX (EFX_MAC_MULTICAST_LIST_MAX + 1)
993 typedef struct ef10_filter_table_s {
994 ef10_filter_entry_t eft_entry[EFX_EF10_FILTER_TBL_ROWS];
995 efx_rxq_t *eft_default_rxq;
996 boolean_t eft_using_rss;
997 uint32_t eft_unicst_filter_indexes[
998 EFX_EF10_FILTER_UNICAST_FILTERS_MAX];
999 uint32_t eft_unicst_filter_count;
1000 uint32_t eft_mulcst_filter_indexes[
1001 EFX_EF10_FILTER_MULTICAST_FILTERS_MAX];
1002 uint32_t eft_mulcst_filter_count;
1003 boolean_t eft_using_all_mulcst;
1004 } ef10_filter_table_t;
1006 __checkReturn efx_rc_t
1008 __in efx_nic_t *enp);
1012 __in efx_nic_t *enp);
1014 __checkReturn efx_rc_t
1015 ef10_filter_restore(
1016 __in efx_nic_t *enp);
1018 __checkReturn efx_rc_t
1020 __in efx_nic_t *enp,
1021 __inout efx_filter_spec_t *spec,
1022 __in boolean_t may_replace);
1024 __checkReturn efx_rc_t
1026 __in efx_nic_t *enp,
1027 __inout efx_filter_spec_t *spec);
1029 extern __checkReturn efx_rc_t
1030 ef10_filter_supported_filters(
1031 __in efx_nic_t *enp,
1032 __out_ecount(buffer_length) uint32_t *buffer,
1033 __in size_t buffer_length,
1034 __out size_t *list_lengthp);
1036 extern __checkReturn efx_rc_t
1037 ef10_filter_reconfigure(
1038 __in efx_nic_t *enp,
1039 __in_ecount(6) uint8_t const *mac_addr,
1040 __in boolean_t all_unicst,
1041 __in boolean_t mulcst,
1042 __in boolean_t all_mulcst,
1043 __in boolean_t brdcst,
1044 __in_ecount(6*count) uint8_t const *addrs,
1045 __in uint32_t count);
1048 ef10_filter_get_default_rxq(
1049 __in efx_nic_t *enp,
1050 __out efx_rxq_t **erpp,
1051 __out boolean_t *using_rss);
1054 ef10_filter_default_rxq_set(
1055 __in efx_nic_t *enp,
1056 __in efx_rxq_t *erp,
1057 __in boolean_t using_rss);
1060 ef10_filter_default_rxq_clear(
1061 __in efx_nic_t *enp);
1064 #endif /* EFSYS_OPT_FILTER */
1066 extern __checkReturn efx_rc_t
1067 efx_mcdi_get_function_info(
1068 __in efx_nic_t *enp,
1069 __out uint32_t *pfp,
1070 __out_opt uint32_t *vfp);
1072 extern __checkReturn efx_rc_t
1073 efx_mcdi_privilege_mask(
1074 __in efx_nic_t *enp,
1077 __out uint32_t *maskp);
1079 extern __checkReturn efx_rc_t
1080 efx_mcdi_get_port_assignment(
1081 __in efx_nic_t *enp,
1082 __out uint32_t *portp);
1084 extern __checkReturn efx_rc_t
1085 efx_mcdi_get_port_modes(
1086 __in efx_nic_t *enp,
1087 __out uint32_t *modesp,
1088 __out_opt uint32_t *current_modep);
1090 extern __checkReturn efx_rc_t
1091 ef10_nic_get_port_mode_bandwidth(
1092 __in uint32_t port_mode,
1093 __out uint32_t *bandwidth_mbpsp);
1095 extern __checkReturn efx_rc_t
1096 efx_mcdi_get_mac_address_pf(
1097 __in efx_nic_t *enp,
1098 __out_ecount_opt(6) uint8_t mac_addrp[6]);
1100 extern __checkReturn efx_rc_t
1101 efx_mcdi_get_mac_address_vf(
1102 __in efx_nic_t *enp,
1103 __out_ecount_opt(6) uint8_t mac_addrp[6]);
1105 extern __checkReturn efx_rc_t
1107 __in efx_nic_t *enp,
1108 __out uint32_t *sys_freqp,
1109 __out uint32_t *dpcpu_freqp);
1112 extern __checkReturn efx_rc_t
1113 efx_mcdi_get_vector_cfg(
1114 __in efx_nic_t *enp,
1115 __out_opt uint32_t *vec_basep,
1116 __out_opt uint32_t *pf_nvecp,
1117 __out_opt uint32_t *vf_nvecp);
1119 extern __checkReturn efx_rc_t
1120 ef10_get_datapath_caps(
1121 __in efx_nic_t *enp);
1123 extern __checkReturn efx_rc_t
1124 ef10_get_privilege_mask(
1125 __in efx_nic_t *enp,
1126 __out uint32_t *maskp);
1128 extern __checkReturn efx_rc_t
1129 ef10_external_port_mapping(
1130 __in efx_nic_t *enp,
1132 __out uint8_t *external_portp);
1139 #endif /* _SYS_EF10_IMPL_H */