2 * Copyright (c) 2015-2016 Solarflare Communications Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * The views and conclusions contained in the software and documentation are
27 * those of the authors and should not be interpreted as representing official
28 * policies, either expressed or implied, of the FreeBSD Project.
33 #ifndef _SYS_EF10_IMPL_H
34 #define _SYS_EF10_IMPL_H
40 #if (EFSYS_OPT_HUNTINGTON && EFSYS_OPT_MEDFORD)
41 #define EF10_MAX_PIOBUF_NBUFS MAX(HUNT_PIOBUF_NBUFS, MEDFORD_PIOBUF_NBUFS)
42 #elif EFSYS_OPT_HUNTINGTON
43 #define EF10_MAX_PIOBUF_NBUFS HUNT_PIOBUF_NBUFS
44 #elif EFSYS_OPT_MEDFORD
45 #define EF10_MAX_PIOBUF_NBUFS MEDFORD_PIOBUF_NBUFS
49 * FIXME: This is just a power of 2 which fits in an MCDI v1 message, and could
50 * possibly be increased, or the write size reported by newer firmware used
53 #define EF10_NVRAM_CHUNK 0x80
55 /* Alignment requirement for value written to RX WPTR:
56 * the WPTR must be aligned to an 8 descriptor boundary
58 #define EF10_RX_WPTR_ALIGN 8
61 * Max byte offset into the packet the TCP header must start for the hardware
62 * to be able to parse the packet correctly.
64 #define EF10_TCP_HEADER_OFFSET_LIMIT 208
66 /* Invalid RSS context handle */
67 #define EF10_RSS_CONTEXT_INVALID (0xffffffff)
72 __checkReturn efx_rc_t
80 __checkReturn efx_rc_t
83 __in unsigned int index,
84 __in efsys_mem_t *esmp,
93 __checkReturn efx_rc_t
96 __in unsigned int count);
103 __checkReturn efx_rc_t
106 __in unsigned int us);
110 ef10_ev_qstats_update(
112 __inout_ecount(EV_NQSTATS) efsys_stat_t *stat);
113 #endif /* EFSYS_OPT_QSTATS */
116 ef10_ev_rxlabel_init(
119 __in unsigned int label);
122 ef10_ev_rxlabel_fini(
124 __in unsigned int label);
128 __checkReturn efx_rc_t
131 __in efx_intr_type_t type,
132 __in efsys_mem_t *esmp);
136 __in efx_nic_t *enp);
140 __in efx_nic_t *enp);
143 ef10_intr_disable_unlocked(
144 __in efx_nic_t *enp);
146 __checkReturn efx_rc_t
149 __in unsigned int level);
152 ef10_intr_status_line(
154 __out boolean_t *fatalp,
155 __out uint32_t *qmaskp);
158 ef10_intr_status_message(
160 __in unsigned int message,
161 __out boolean_t *fatalp);
165 __in efx_nic_t *enp);
168 __in efx_nic_t *enp);
172 extern __checkReturn efx_rc_t
174 __in efx_nic_t *enp);
176 extern __checkReturn efx_rc_t
177 ef10_nic_set_drv_limits(
178 __inout efx_nic_t *enp,
179 __in efx_drv_limits_t *edlp);
181 extern __checkReturn efx_rc_t
182 ef10_nic_get_vi_pool(
184 __out uint32_t *vi_countp);
186 extern __checkReturn efx_rc_t
187 ef10_nic_get_bar_region(
189 __in efx_nic_region_t region,
190 __out uint32_t *offsetp,
191 __out size_t *sizep);
193 extern __checkReturn efx_rc_t
195 __in efx_nic_t *enp);
197 extern __checkReturn efx_rc_t
199 __in efx_nic_t *enp);
203 extern __checkReturn efx_rc_t
204 ef10_nic_register_test(
205 __in efx_nic_t *enp);
207 #endif /* EFSYS_OPT_DIAG */
211 __in efx_nic_t *enp);
215 __in efx_nic_t *enp);
220 extern __checkReturn efx_rc_t
223 __out efx_link_mode_t *link_modep);
225 extern __checkReturn efx_rc_t
228 __out boolean_t *mac_upp);
230 extern __checkReturn efx_rc_t
232 __in efx_nic_t *enp);
234 extern __checkReturn efx_rc_t
236 __in efx_nic_t *enp);
238 extern __checkReturn efx_rc_t
243 extern __checkReturn efx_rc_t
244 ef10_mac_reconfigure(
245 __in efx_nic_t *enp);
247 extern __checkReturn efx_rc_t
248 ef10_mac_multicast_list_set(
249 __in efx_nic_t *enp);
251 extern __checkReturn efx_rc_t
252 ef10_mac_filter_default_rxq_set(
255 __in boolean_t using_rss);
258 ef10_mac_filter_default_rxq_clear(
259 __in efx_nic_t *enp);
261 #if EFSYS_OPT_LOOPBACK
263 extern __checkReturn efx_rc_t
264 ef10_mac_loopback_set(
266 __in efx_link_mode_t link_mode,
267 __in efx_loopback_type_t loopback_type);
269 #endif /* EFSYS_OPT_LOOPBACK */
271 #if EFSYS_OPT_MAC_STATS
273 extern __checkReturn efx_rc_t
274 ef10_mac_stats_update(
276 __in efsys_mem_t *esmp,
277 __inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat,
278 __inout_opt uint32_t *generationp);
280 #endif /* EFSYS_OPT_MAC_STATS */
287 extern __checkReturn efx_rc_t
290 __in const efx_mcdi_transport_t *mtp);
294 __in efx_nic_t *enp);
297 ef10_mcdi_send_request(
302 __in size_t sdu_len);
304 extern __checkReturn boolean_t
305 ef10_mcdi_poll_response(
306 __in efx_nic_t *enp);
309 ef10_mcdi_read_response(
311 __out_bcount(length) void *bufferp,
316 ef10_mcdi_poll_reboot(
317 __in efx_nic_t *enp);
319 extern __checkReturn efx_rc_t
320 ef10_mcdi_feature_supported(
322 __in efx_mcdi_feature_id_t id,
323 __out boolean_t *supportedp);
325 #endif /* EFSYS_OPT_MCDI */
329 #if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD
331 extern __checkReturn efx_rc_t
332 ef10_nvram_buf_read_tlv(
334 __in_bcount(max_seg_size) caddr_t seg_data,
335 __in size_t max_seg_size,
337 __deref_out_bcount_opt(*sizep) caddr_t *datap,
338 __out size_t *sizep);
340 extern __checkReturn efx_rc_t
341 ef10_nvram_buf_write_tlv(
342 __inout_bcount(partn_size) caddr_t partn_data,
343 __in size_t partn_size,
345 __in_bcount(tag_size) caddr_t tag_data,
346 __in size_t tag_size,
347 __out size_t *total_lengthp);
349 extern __checkReturn efx_rc_t
350 ef10_nvram_partn_read_tlv(
354 __deref_out_bcount_opt(*sizep) caddr_t *datap,
355 __out size_t *sizep);
357 extern __checkReturn efx_rc_t
358 ef10_nvram_partn_write_tlv(
362 __in_bcount(size) caddr_t data,
365 extern __checkReturn efx_rc_t
366 ef10_nvram_partn_write_segment_tlv(
370 __in_bcount(size) caddr_t data,
372 __in boolean_t all_segments);
374 extern __checkReturn efx_rc_t
375 ef10_nvram_partn_lock(
377 __in uint32_t partn);
380 ef10_nvram_partn_unlock(
382 __in uint32_t partn);
384 #endif /* EFSYS_OPT_NVRAM || EFSYS_OPT_VPD */
390 extern __checkReturn efx_rc_t
392 __in efx_nic_t *enp);
394 #endif /* EFSYS_OPT_DIAG */
396 extern __checkReturn efx_rc_t
397 ef10_nvram_type_to_partn(
399 __in efx_nvram_type_t type,
400 __out uint32_t *partnp);
402 extern __checkReturn efx_rc_t
403 ef10_nvram_partn_size(
406 __out size_t *sizep);
408 extern __checkReturn efx_rc_t
409 ef10_nvram_partn_rw_start(
412 __out size_t *chunk_sizep);
414 extern __checkReturn efx_rc_t
415 ef10_nvram_partn_read_mode(
418 __in unsigned int offset,
419 __out_bcount(size) caddr_t data,
423 extern __checkReturn efx_rc_t
424 ef10_nvram_partn_read(
427 __in unsigned int offset,
428 __out_bcount(size) caddr_t data,
431 extern __checkReturn efx_rc_t
432 ef10_nvram_partn_erase(
435 __in unsigned int offset,
438 extern __checkReturn efx_rc_t
439 ef10_nvram_partn_write(
442 __in unsigned int offset,
443 __out_bcount(size) caddr_t data,
447 ef10_nvram_partn_rw_finish(
449 __in uint32_t partn);
451 extern __checkReturn efx_rc_t
452 ef10_nvram_partn_get_version(
455 __out uint32_t *subtypep,
456 __out_ecount(4) uint16_t version[4]);
458 extern __checkReturn efx_rc_t
459 ef10_nvram_partn_set_version(
462 __in_ecount(4) uint16_t version[4]);
464 extern __checkReturn efx_rc_t
465 ef10_nvram_buffer_validate(
468 __in_bcount(buffer_size)
470 __in size_t buffer_size);
472 extern __checkReturn efx_rc_t
473 ef10_nvram_buffer_create(
475 __in uint16_t partn_type,
476 __in_bcount(buffer_size)
478 __in size_t buffer_size);
480 extern __checkReturn efx_rc_t
481 ef10_nvram_buffer_find_item_start(
482 __in_bcount(buffer_size)
484 __in size_t buffer_size,
485 __out uint32_t *startp
488 extern __checkReturn efx_rc_t
489 ef10_nvram_buffer_find_end(
490 __in_bcount(buffer_size)
492 __in size_t buffer_size,
493 __in uint32_t offset,
497 extern __checkReturn __success(return != B_FALSE) boolean_t
498 ef10_nvram_buffer_find_item(
499 __in_bcount(buffer_size)
501 __in size_t buffer_size,
502 __in uint32_t offset,
503 __out uint32_t *startp,
504 __out uint32_t *lengthp
507 extern __checkReturn efx_rc_t
508 ef10_nvram_buffer_get_item(
509 __in_bcount(buffer_size)
511 __in size_t buffer_size,
512 __in uint32_t offset,
513 __in uint32_t length,
514 __out_bcount_part(item_max_size, *lengthp)
516 __in size_t item_max_size,
517 __out uint32_t *lengthp
520 extern __checkReturn efx_rc_t
521 ef10_nvram_buffer_insert_item(
522 __in_bcount(buffer_size)
524 __in size_t buffer_size,
525 __in uint32_t offset,
526 __in_bcount(length) caddr_t keyp,
527 __in uint32_t length,
528 __out uint32_t *lengthp
531 extern __checkReturn efx_rc_t
532 ef10_nvram_buffer_delete_item(
533 __in_bcount(buffer_size)
535 __in size_t buffer_size,
536 __in uint32_t offset,
537 __in uint32_t length,
541 extern __checkReturn efx_rc_t
542 ef10_nvram_buffer_finish(
543 __in_bcount(buffer_size)
545 __in size_t buffer_size
548 #endif /* EFSYS_OPT_NVRAM */
553 typedef struct ef10_link_state_s {
554 uint32_t els_adv_cap_mask;
555 uint32_t els_lp_cap_mask;
556 unsigned int els_fcntl;
557 efx_link_mode_t els_link_mode;
558 #if EFSYS_OPT_LOOPBACK
559 efx_loopback_type_t els_loopback;
561 boolean_t els_mac_up;
567 __in efx_qword_t *eqp,
568 __out efx_link_mode_t *link_modep);
570 extern __checkReturn efx_rc_t
573 __out ef10_link_state_t *elsp);
575 extern __checkReturn efx_rc_t
580 extern __checkReturn efx_rc_t
581 ef10_phy_reconfigure(
582 __in efx_nic_t *enp);
584 extern __checkReturn efx_rc_t
586 __in efx_nic_t *enp);
588 extern __checkReturn efx_rc_t
591 __out uint32_t *ouip);
593 #if EFSYS_OPT_PHY_STATS
595 extern __checkReturn efx_rc_t
596 ef10_phy_stats_update(
598 __in efsys_mem_t *esmp,
599 __inout_ecount(EFX_PHY_NSTATS) uint32_t *stat);
601 #endif /* EFSYS_OPT_PHY_STATS */
606 extern __checkReturn efx_rc_t
608 __in efx_nic_t *enp);
612 __in efx_nic_t *enp);
614 extern __checkReturn efx_rc_t
617 __in unsigned int index,
618 __in unsigned int label,
619 __in efsys_mem_t *esmp,
625 __out unsigned int *addedp);
629 __in efx_txq_t *etp);
631 extern __checkReturn efx_rc_t
634 __in_ecount(n) efx_buffer_t *eb,
636 __in unsigned int completed,
637 __inout unsigned int *addedp);
642 __in unsigned int added,
643 __in unsigned int pushed);
645 extern __checkReturn efx_rc_t
648 __in unsigned int ns);
650 extern __checkReturn efx_rc_t
652 __in efx_txq_t *etp);
656 __in efx_txq_t *etp);
658 extern __checkReturn efx_rc_t
660 __in efx_txq_t *etp);
663 ef10_tx_qpio_disable(
664 __in efx_txq_t *etp);
666 extern __checkReturn efx_rc_t
669 __in_ecount(buf_length) uint8_t *buffer,
670 __in size_t buf_length,
671 __in size_t pio_buf_offset);
673 extern __checkReturn efx_rc_t
676 __in size_t pkt_length,
677 __in unsigned int completed,
678 __inout unsigned int *addedp);
680 extern __checkReturn efx_rc_t
683 __in_ecount(n) efx_desc_t *ed,
685 __in unsigned int completed,
686 __inout unsigned int *addedp);
689 ef10_tx_qdesc_dma_create(
691 __in efsys_dma_addr_t addr,
694 __out efx_desc_t *edp);
697 ef10_tx_qdesc_tso_create(
699 __in uint16_t ipv4_id,
700 __in uint32_t tcp_seq,
701 __in uint8_t tcp_flags,
702 __out efx_desc_t *edp);
705 ef10_tx_qdesc_tso2_create(
707 __in uint16_t ipv4_id,
708 __in uint32_t tcp_seq,
709 __in uint16_t tcp_mss,
710 __out_ecount(count) efx_desc_t *edp,
714 ef10_tx_qdesc_vlantci_create(
716 __in uint16_t vlan_tci,
717 __out efx_desc_t *edp);
723 ef10_tx_qstats_update(
725 __inout_ecount(TX_NQSTATS) efsys_stat_t *stat);
727 #endif /* EFSYS_OPT_QSTATS */
729 typedef uint32_t efx_piobuf_handle_t;
731 #define EFX_PIOBUF_HANDLE_INVALID ((efx_piobuf_handle_t) -1)
733 extern __checkReturn efx_rc_t
735 __inout efx_nic_t *enp,
736 __out uint32_t *bufnump,
737 __out efx_piobuf_handle_t *handlep,
738 __out uint32_t *blknump,
739 __out uint32_t *offsetp,
740 __out size_t *sizep);
742 extern __checkReturn efx_rc_t
744 __inout efx_nic_t *enp,
745 __in uint32_t bufnum,
746 __in uint32_t blknum);
748 extern __checkReturn efx_rc_t
750 __inout efx_nic_t *enp,
751 __in uint32_t vi_index,
752 __in efx_piobuf_handle_t handle);
754 extern __checkReturn efx_rc_t
756 __inout efx_nic_t *enp,
757 __in uint32_t vi_index);
764 extern __checkReturn efx_rc_t
766 __in efx_nic_t *enp);
768 extern __checkReturn efx_rc_t
771 __out size_t *sizep);
773 extern __checkReturn efx_rc_t
776 __out_bcount(size) caddr_t data,
779 extern __checkReturn efx_rc_t
782 __in_bcount(size) caddr_t data,
785 extern __checkReturn efx_rc_t
788 __in_bcount(size) caddr_t data,
791 extern __checkReturn efx_rc_t
794 __in_bcount(size) caddr_t data,
796 __inout efx_vpd_value_t *evvp);
798 extern __checkReturn efx_rc_t
801 __in_bcount(size) caddr_t data,
803 __in efx_vpd_value_t *evvp);
805 extern __checkReturn efx_rc_t
808 __in_bcount(size) caddr_t data,
810 __out efx_vpd_value_t *evvp,
811 __inout unsigned int *contp);
813 extern __checkReturn efx_rc_t
816 __in_bcount(size) caddr_t data,
821 __in efx_nic_t *enp);
823 #endif /* EFSYS_OPT_VPD */
828 extern __checkReturn efx_rc_t
830 __in efx_nic_t *enp);
832 #if EFSYS_OPT_RX_SCATTER
833 extern __checkReturn efx_rc_t
834 ef10_rx_scatter_enable(
836 __in unsigned int buf_size);
837 #endif /* EFSYS_OPT_RX_SCATTER */
840 #if EFSYS_OPT_RX_SCALE
842 extern __checkReturn efx_rc_t
843 ef10_rx_scale_mode_set(
845 __in efx_rx_hash_alg_t alg,
846 __in efx_rx_hash_type_t type,
847 __in boolean_t insert);
849 extern __checkReturn efx_rc_t
850 ef10_rx_scale_key_set(
852 __in_ecount(n) uint8_t *key,
855 extern __checkReturn efx_rc_t
856 ef10_rx_scale_tbl_set(
858 __in_ecount(n) unsigned int *table,
861 extern __checkReturn uint32_t
864 __in efx_rx_hash_alg_t func,
865 __in uint8_t *buffer);
867 #endif /* EFSYS_OPT_RX_SCALE */
869 extern __checkReturn efx_rc_t
870 ef10_rx_prefix_pktlen(
872 __in uint8_t *buffer,
873 __out uint16_t *lengthp);
878 __in_ecount(n) efsys_dma_addr_t *addrp,
881 __in unsigned int completed,
882 __in unsigned int added);
887 __in unsigned int added,
888 __inout unsigned int *pushedp);
890 extern __checkReturn efx_rc_t
892 __in efx_rxq_t *erp);
896 __in efx_rxq_t *erp);
898 extern __checkReturn efx_rc_t
901 __in unsigned int index,
902 __in unsigned int label,
903 __in efx_rxq_type_t type,
904 __in efsys_mem_t *esmp,
908 __in efx_rxq_t *erp);
912 __in efx_rxq_t *erp);
916 __in efx_nic_t *enp);
920 typedef struct ef10_filter_handle_s {
923 } ef10_filter_handle_t;
925 typedef struct ef10_filter_entry_s {
926 uintptr_t efe_spec; /* pointer to filter spec plus busy bit */
927 ef10_filter_handle_t efe_handle;
928 } ef10_filter_entry_t;
931 * BUSY flag indicates that an update is in progress.
932 * AUTO_OLD flag is used to mark and sweep MAC packet filters.
934 #define EFX_EF10_FILTER_FLAG_BUSY 1U
935 #define EFX_EF10_FILTER_FLAG_AUTO_OLD 2U
936 #define EFX_EF10_FILTER_FLAGS 3U
939 * Size of the hash table used by the driver. Doesn't need to be the
940 * same size as the hardware's table.
942 #define EFX_EF10_FILTER_TBL_ROWS 8192
944 /* Only need to allow for one directed and one unknown unicast filter */
945 #define EFX_EF10_FILTER_UNICAST_FILTERS_MAX 2
947 /* Allow for the broadcast address to be added to the multicast list */
948 #define EFX_EF10_FILTER_MULTICAST_FILTERS_MAX (EFX_MAC_MULTICAST_LIST_MAX + 1)
950 typedef struct ef10_filter_table_s {
951 ef10_filter_entry_t eft_entry[EFX_EF10_FILTER_TBL_ROWS];
952 efx_rxq_t * eft_default_rxq;
953 boolean_t eft_using_rss;
954 uint32_t eft_unicst_filter_indexes[
955 EFX_EF10_FILTER_UNICAST_FILTERS_MAX];
956 boolean_t eft_unicst_filter_count;
957 uint32_t eft_mulcst_filter_indexes[
958 EFX_EF10_FILTER_MULTICAST_FILTERS_MAX];
959 uint32_t eft_mulcst_filter_count;
960 boolean_t eft_using_all_mulcst;
961 } ef10_filter_table_t;
963 __checkReturn efx_rc_t
965 __in efx_nic_t *enp);
969 __in efx_nic_t *enp);
971 __checkReturn efx_rc_t
973 __in efx_nic_t *enp);
975 __checkReturn efx_rc_t
978 __inout efx_filter_spec_t *spec,
979 __in boolean_t may_replace);
981 __checkReturn efx_rc_t
984 __inout efx_filter_spec_t *spec);
986 extern __checkReturn efx_rc_t
987 ef10_filter_supported_filters(
989 __out uint32_t *list,
990 __out size_t *length);
992 extern __checkReturn efx_rc_t
993 ef10_filter_reconfigure(
995 __in_ecount(6) uint8_t const *mac_addr,
996 __in boolean_t all_unicst,
997 __in boolean_t mulcst,
998 __in boolean_t all_mulcst,
999 __in boolean_t brdcst,
1000 __in_ecount(6*count) uint8_t const *addrs,
1001 __in uint32_t count);
1004 ef10_filter_get_default_rxq(
1005 __in efx_nic_t *enp,
1006 __out efx_rxq_t **erpp,
1007 __out boolean_t *using_rss);
1010 ef10_filter_default_rxq_set(
1011 __in efx_nic_t *enp,
1012 __in efx_rxq_t *erp,
1013 __in boolean_t using_rss);
1016 ef10_filter_default_rxq_clear(
1017 __in efx_nic_t *enp);
1020 #endif /* EFSYS_OPT_FILTER */
1022 extern __checkReturn efx_rc_t
1023 efx_mcdi_get_function_info(
1024 __in efx_nic_t *enp,
1025 __out uint32_t *pfp,
1026 __out_opt uint32_t *vfp);
1028 extern __checkReturn efx_rc_t
1029 efx_mcdi_privilege_mask(
1030 __in efx_nic_t *enp,
1033 __out uint32_t *maskp);
1035 extern __checkReturn efx_rc_t
1036 efx_mcdi_get_port_assignment(
1037 __in efx_nic_t *enp,
1038 __out uint32_t *portp);
1040 extern __checkReturn efx_rc_t
1041 efx_mcdi_get_port_modes(
1042 __in efx_nic_t *enp,
1043 __out uint32_t *modesp,
1044 __out_opt uint32_t *current_modep);
1046 extern __checkReturn efx_rc_t
1047 ef10_nic_get_port_mode_bandwidth(
1048 __in uint32_t port_mode,
1049 __out uint32_t *bandwidth_mbpsp);
1051 extern __checkReturn efx_rc_t
1052 efx_mcdi_get_mac_address_pf(
1053 __in efx_nic_t *enp,
1054 __out_ecount_opt(6) uint8_t mac_addrp[6]);
1056 extern __checkReturn efx_rc_t
1057 efx_mcdi_get_mac_address_vf(
1058 __in efx_nic_t *enp,
1059 __out_ecount_opt(6) uint8_t mac_addrp[6]);
1061 extern __checkReturn efx_rc_t
1063 __in efx_nic_t *enp,
1064 __out uint32_t *sys_freqp,
1065 __out uint32_t *dpcpu_freqp);
1068 extern __checkReturn efx_rc_t
1069 efx_mcdi_get_vector_cfg(
1070 __in efx_nic_t *enp,
1071 __out_opt uint32_t *vec_basep,
1072 __out_opt uint32_t *pf_nvecp,
1073 __out_opt uint32_t *vf_nvecp);
1075 extern __checkReturn efx_rc_t
1076 ef10_get_datapath_caps(
1077 __in efx_nic_t *enp);
1079 extern __checkReturn efx_rc_t
1080 ef10_get_privilege_mask(
1081 __in efx_nic_t *enp,
1082 __out uint32_t *maskp);
1084 extern __checkReturn efx_rc_t
1085 ef10_external_port_mapping(
1086 __in efx_nic_t *enp,
1088 __out uint8_t *external_portp);
1095 #endif /* _SYS_EF10_IMPL_H */