2 * Copyright (c) 2010-2015 Solarflare Communications Inc.
5 * This software was developed in part by Philip Paeps under contract for
6 * Solarflare Communications, Inc.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
11 * 1. Redistributions of source code must retain the above copyright notice,
12 * this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright notice,
14 * this list of conditions and the following disclaimer in the documentation
15 * and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
19 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
21 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
22 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
23 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
24 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
26 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
27 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 * The views and conclusions contained in the software and documentation are
30 * those of the authors and should not be interpreted as representing official
31 * policies, either expressed or implied, of the FreeBSD Project.
43 #include <sys/param.h>
45 #include <sys/endian.h>
47 #include <sys/malloc.h>
49 #include <sys/mutex.h>
50 #include <sys/rwlock.h>
52 #include <sys/systm.h>
54 #include <machine/bus.h>
55 #include <machine/endian.h>
57 #define EFSYS_HAS_UINT64 1
58 #if defined(__x86_64__)
59 #define EFSYS_USE_UINT64 1
61 #define EFSYS_USE_UINT64 0
63 #define EFSYS_HAS_SSE2_M128 0
64 #if _BYTE_ORDER == _BIG_ENDIAN
65 #define EFSYS_IS_BIG_ENDIAN 1
66 #define EFSYS_IS_LITTLE_ENDIAN 0
67 #elif _BYTE_ORDER == _LITTLE_ENDIAN
68 #define EFSYS_IS_BIG_ENDIAN 0
69 #define EFSYS_IS_LITTLE_ENDIAN 1
71 #include "efx_types.h"
73 /* Common code requires this */
74 #if __FreeBSD_version < 800068
75 #define memmove(d, s, l) bcopy(s, d, l)
78 /* FreeBSD equivalents of Solaris things */
91 #define IS_P2ALIGNED(v, a) ((((uintptr_t)(v)) & ((uintptr_t)(a) - 1)) == 0)
95 #define P2ROUNDUP(x, align) (-(-(x) & -(align)))
99 #define P2ALIGN(_x, _a) ((_x) & -(_a))
103 #define ISP2(x) (((x) & ((x) - 1)) == 0)
106 #if defined(__x86_64__) && __FreeBSD_version >= 1000000
108 #define SFXGE_USE_BUS_SPACE_8 1
110 #if !defined(bus_space_read_stream_8)
112 #define bus_space_read_stream_8(t, h, o) \
113 bus_space_read_8((t), (h), (o))
115 #define bus_space_write_stream_8(t, h, o, v) \
116 bus_space_write_8((t), (h), (o), (v))
122 #define ENOTACTIVE EINVAL
124 /* Memory type to use on FreeBSD */
125 MALLOC_DECLARE(M_SFXGE);
127 /* Machine dependend prefetch wrappers */
128 #if defined(__i386__) || defined(__amd64__)
130 prefetch_read_many(void *addr)
140 prefetch_read_once(void *addr)
148 #elif defined(__sparc64__)
150 prefetch_read_many(void *addr)
160 prefetch_read_once(void *addr)
170 prefetch_read_many(void *addr)
176 prefetch_read_once(void *addr)
182 #if defined(__i386__) || defined(__amd64__)
187 sfxge_map_mbuf_fast(bus_dma_tag_t tag, bus_dmamap_t map,
188 struct mbuf *m, bus_dma_segment_t *seg)
190 #if defined(__i386__) || defined(__amd64__)
191 seg->ds_addr = pmap_kextract(mtod(m, vm_offset_t));
192 seg->ds_len = m->m_len;
196 bus_dmamap_load_mbuf_sg(tag, map, m, seg, &nsegstmp, 0);
200 /* Modifiers used for Windows builds */
203 #define __in_ecount(_n)
204 #define __in_ecount_opt(_n)
205 #define __in_bcount(_n)
206 #define __in_bcount_opt(_n)
210 #define __out_ecount(_n)
211 #define __out_ecount_opt(_n)
212 #define __out_bcount(_n)
213 #define __out_bcount_opt(_n)
214 #define __out_bcount_part(_n, _l)
215 #define __out_bcount_part_opt(_n, _l)
221 #define __inout_ecount(_n)
222 #define __inout_ecount_opt(_n)
223 #define __inout_bcount(_n)
224 #define __inout_bcount_opt(_n)
225 #define __inout_bcount_full_opt(_n)
227 #define __deref_out_bcount_opt(n)
229 #define __checkReturn
230 #define __success(_x)
232 #define __drv_when(_p, _c)
234 /* Code inclusion options */
237 #define EFSYS_OPT_NAMES 1
239 #define EFSYS_OPT_SIENA 1
240 #define EFSYS_OPT_HUNTINGTON 1
241 #define EFSYS_OPT_MEDFORD 0
243 #define EFSYS_OPT_CHECK_REG 1
245 #define EFSYS_OPT_CHECK_REG 0
248 #define EFSYS_OPT_MCDI 1
249 #define EFSYS_OPT_MCDI_LOGGING 0
250 #define EFSYS_OPT_MCDI_PROXY_AUTH 0
252 #define EFSYS_OPT_MAC_STATS 1
254 #define EFSYS_OPT_LOOPBACK 0
256 #define EFSYS_OPT_MON_MCDI 0
257 #define EFSYS_OPT_MON_STATS 0
259 #define EFSYS_OPT_PHY_STATS 1
260 #define EFSYS_OPT_PHY_PROPS 0
261 #define EFSYS_OPT_BIST 1
262 #define EFSYS_OPT_PHY_LED_CONTROL 1
263 #define EFSYS_OPT_PHY_FLAGS 0
265 #define EFSYS_OPT_VPD 1
266 #define EFSYS_OPT_NVRAM 1
267 #define EFSYS_OPT_BOOTCFG 0
269 #define EFSYS_OPT_DIAG 0
270 #define EFSYS_OPT_WOL 1
271 #define EFSYS_OPT_RX_SCALE 1
272 #define EFSYS_OPT_QSTATS 1
273 #define EFSYS_OPT_FILTER 1
274 #define EFSYS_OPT_RX_SCATTER 0
276 #define EFSYS_OPT_EV_PREFETCH 0
278 #define EFSYS_OPT_DECODE_INTR_FATAL 1
280 #define EFSYS_OPT_LICENSING 0
284 typedef struct __efsys_identifier_s efsys_identifier_t;
290 #define EFSYS_PROBE(_name)
292 #define EFSYS_PROBE1(_name, _type1, _arg1)
294 #define EFSYS_PROBE2(_name, _type1, _arg1, _type2, _arg2)
296 #define EFSYS_PROBE3(_name, _type1, _arg1, _type2, _arg2, \
299 #define EFSYS_PROBE4(_name, _type1, _arg1, _type2, _arg2, \
300 _type3, _arg3, _type4, _arg4)
302 #define EFSYS_PROBE5(_name, _type1, _arg1, _type2, _arg2, \
303 _type3, _arg3, _type4, _arg4, _type5, _arg5)
305 #define EFSYS_PROBE6(_name, _type1, _arg1, _type2, _arg2, \
306 _type3, _arg3, _type4, _arg4, _type5, _arg5, \
309 #define EFSYS_PROBE7(_name, _type1, _arg1, _type2, _arg2, \
310 _type3, _arg3, _type4, _arg4, _type5, _arg5, \
311 _type6, _arg6, _type7, _arg7)
313 #else /* DTRACE_PROBE */
315 #define EFSYS_PROBE(_name) \
318 #define EFSYS_PROBE1(_name, _type1, _arg1) \
319 DTRACE_PROBE1(_name, _type1, _arg1)
321 #define EFSYS_PROBE2(_name, _type1, _arg1, _type2, _arg2) \
322 DTRACE_PROBE2(_name, _type1, _arg1, _type2, _arg2)
324 #define EFSYS_PROBE3(_name, _type1, _arg1, _type2, _arg2, \
326 DTRACE_PROBE3(_name, _type1, _arg1, _type2, _arg2, \
329 #define EFSYS_PROBE4(_name, _type1, _arg1, _type2, _arg2, \
330 _type3, _arg3, _type4, _arg4) \
331 DTRACE_PROBE4(_name, _type1, _arg1, _type2, _arg2, \
332 _type3, _arg3, _type4, _arg4)
335 #define EFSYS_PROBE5(_name, _type1, _arg1, _type2, _arg2, \
336 _type3, _arg3, _type4, _arg4, _type5, _arg5) \
337 DTRACE_PROBE5(_name, _type1, _arg1, _type2, _arg2, \
338 _type3, _arg3, _type4, _arg4, _type5, _arg5)
340 #define EFSYS_PROBE5(_name, _type1, _arg1, _type2, _arg2, \
341 _type3, _arg3, _type4, _arg4, _type5, _arg5) \
342 DTRACE_PROBE4(_name, _type1, _arg1, _type2, _arg2, \
343 _type3, _arg3, _type4, _arg4)
347 #define EFSYS_PROBE6(_name, _type1, _arg1, _type2, _arg2, \
348 _type3, _arg3, _type4, _arg4, _type5, _arg5, \
350 DTRACE_PROBE6(_name, _type1, _arg1, _type2, _arg2, \
351 _type3, _arg3, _type4, _arg4, _type5, _arg5, \
354 #define EFSYS_PROBE6(_name, _type1, _arg1, _type2, _arg2, \
355 _type3, _arg3, _type4, _arg4, _type5, _arg5, \
357 EFSYS_PROBE5(_name, _type1, _arg1, _type2, _arg2, \
358 _type3, _arg3, _type4, _arg4, _type5, _arg5)
362 #define EFSYS_PROBE7(_name, _type1, _arg1, _type2, _arg2, \
363 _type3, _arg3, _type4, _arg4, _type5, _arg5, \
364 _type6, _arg6, _type7, _arg7) \
365 DTRACE_PROBE7(_name, _type1, _arg1, _type2, _arg2, \
366 _type3, _arg3, _type4, _arg4, _type5, _arg5, \
367 _type6, _arg6, _type7, _arg7)
369 #define EFSYS_PROBE7(_name, _type1, _arg1, _type2, _arg2, \
370 _type3, _arg3, _type4, _arg4, _type5, _arg5, \
371 _type6, _arg6, _type7, _arg7) \
372 EFSYS_PROBE6(_name, _type1, _arg1, _type2, _arg2, \
373 _type3, _arg3, _type4, _arg4, _type5, _arg5, \
377 #endif /* DTRACE_PROBE */
381 typedef uint64_t efsys_dma_addr_t;
383 typedef struct efsys_mem_s {
384 bus_dma_tag_t esm_tag;
385 bus_dmamap_t esm_map;
387 efsys_dma_addr_t esm_addr;
391 #define EFSYS_MEM_ZERO(_esmp, _size) \
393 (void) memset((_esmp)->esm_base, 0, (_size)); \
395 _NOTE(CONSTANTCONDITION) \
398 #define EFSYS_MEM_READD(_esmp, _offset, _edp) \
402 _NOTE(CONSTANTCONDITION) \
403 KASSERT(IS_P2ALIGNED(_offset, sizeof (efx_dword_t)), \
404 ("not power of 2 aligned")); \
406 addr = (void *)((_esmp)->esm_base + (_offset)); \
408 (_edp)->ed_u32[0] = *addr; \
410 EFSYS_PROBE2(mem_readd, unsigned int, (_offset), \
411 uint32_t, (_edp)->ed_u32[0]); \
413 _NOTE(CONSTANTCONDITION) \
416 #if defined(__x86_64__)
417 #define EFSYS_MEM_READQ(_esmp, _offset, _eqp) \
421 _NOTE(CONSTANTCONDITION) \
422 KASSERT(IS_P2ALIGNED(_offset, sizeof (efx_qword_t)), \
423 ("not power of 2 aligned")); \
425 addr = (void *)((_esmp)->esm_base + (_offset)); \
427 (_eqp)->eq_u64[0] = *addr; \
429 EFSYS_PROBE3(mem_readq, unsigned int, (_offset), \
430 uint32_t, (_eqp)->eq_u32[1], \
431 uint32_t, (_eqp)->eq_u32[0]); \
433 _NOTE(CONSTANTCONDITION) \
436 #define EFSYS_MEM_READQ(_esmp, _offset, _eqp) \
440 _NOTE(CONSTANTCONDITION) \
441 KASSERT(IS_P2ALIGNED(_offset, sizeof (efx_qword_t)), \
442 ("not power of 2 aligned")); \
444 addr = (void *)((_esmp)->esm_base + (_offset)); \
446 (_eqp)->eq_u32[0] = *addr++; \
447 (_eqp)->eq_u32[1] = *addr; \
449 EFSYS_PROBE3(mem_readq, unsigned int, (_offset), \
450 uint32_t, (_eqp)->eq_u32[1], \
451 uint32_t, (_eqp)->eq_u32[0]); \
453 _NOTE(CONSTANTCONDITION) \
457 #if defined(__x86_64__)
458 #define EFSYS_MEM_READO(_esmp, _offset, _eop) \
462 _NOTE(CONSTANTCONDITION) \
463 KASSERT(IS_P2ALIGNED(_offset, sizeof (efx_oword_t)), \
464 ("not power of 2 aligned")); \
466 addr = (void *)((_esmp)->esm_base + (_offset)); \
468 (_eop)->eo_u64[0] = *addr++; \
469 (_eop)->eo_u64[1] = *addr; \
471 EFSYS_PROBE5(mem_reado, unsigned int, (_offset), \
472 uint32_t, (_eop)->eo_u32[3], \
473 uint32_t, (_eop)->eo_u32[2], \
474 uint32_t, (_eop)->eo_u32[1], \
475 uint32_t, (_eop)->eo_u32[0]); \
477 _NOTE(CONSTANTCONDITION) \
480 #define EFSYS_MEM_READO(_esmp, _offset, _eop) \
484 _NOTE(CONSTANTCONDITION) \
485 KASSERT(IS_P2ALIGNED(_offset, sizeof (efx_oword_t)), \
486 ("not power of 2 aligned")); \
488 addr = (void *)((_esmp)->esm_base + (_offset)); \
490 (_eop)->eo_u32[0] = *addr++; \
491 (_eop)->eo_u32[1] = *addr++; \
492 (_eop)->eo_u32[2] = *addr++; \
493 (_eop)->eo_u32[3] = *addr; \
495 EFSYS_PROBE5(mem_reado, unsigned int, (_offset), \
496 uint32_t, (_eop)->eo_u32[3], \
497 uint32_t, (_eop)->eo_u32[2], \
498 uint32_t, (_eop)->eo_u32[1], \
499 uint32_t, (_eop)->eo_u32[0]); \
501 _NOTE(CONSTANTCONDITION) \
505 #define EFSYS_MEM_WRITED(_esmp, _offset, _edp) \
509 _NOTE(CONSTANTCONDITION) \
510 KASSERT(IS_P2ALIGNED(_offset, sizeof (efx_dword_t)), \
511 ("not power of 2 aligned")); \
513 EFSYS_PROBE2(mem_writed, unsigned int, (_offset), \
514 uint32_t, (_edp)->ed_u32[0]); \
516 addr = (void *)((_esmp)->esm_base + (_offset)); \
518 *addr = (_edp)->ed_u32[0]; \
520 _NOTE(CONSTANTCONDITION) \
523 #if defined(__x86_64__)
524 #define EFSYS_MEM_WRITEQ(_esmp, _offset, _eqp) \
528 _NOTE(CONSTANTCONDITION) \
529 KASSERT(IS_P2ALIGNED(_offset, sizeof (efx_qword_t)), \
530 ("not power of 2 aligned")); \
532 EFSYS_PROBE3(mem_writeq, unsigned int, (_offset), \
533 uint32_t, (_eqp)->eq_u32[1], \
534 uint32_t, (_eqp)->eq_u32[0]); \
536 addr = (void *)((_esmp)->esm_base + (_offset)); \
538 *addr = (_eqp)->eq_u64[0]; \
540 _NOTE(CONSTANTCONDITION) \
544 #define EFSYS_MEM_WRITEQ(_esmp, _offset, _eqp) \
548 _NOTE(CONSTANTCONDITION) \
549 KASSERT(IS_P2ALIGNED(_offset, sizeof (efx_qword_t)), \
550 ("not power of 2 aligned")); \
552 EFSYS_PROBE3(mem_writeq, unsigned int, (_offset), \
553 uint32_t, (_eqp)->eq_u32[1], \
554 uint32_t, (_eqp)->eq_u32[0]); \
556 addr = (void *)((_esmp)->esm_base + (_offset)); \
558 *addr++ = (_eqp)->eq_u32[0]; \
559 *addr = (_eqp)->eq_u32[1]; \
561 _NOTE(CONSTANTCONDITION) \
565 #if defined(__x86_64__)
566 #define EFSYS_MEM_WRITEO(_esmp, _offset, _eop) \
570 _NOTE(CONSTANTCONDITION) \
571 KASSERT(IS_P2ALIGNED(_offset, sizeof (efx_oword_t)), \
572 ("not power of 2 aligned")); \
574 EFSYS_PROBE5(mem_writeo, unsigned int, (_offset), \
575 uint32_t, (_eop)->eo_u32[3], \
576 uint32_t, (_eop)->eo_u32[2], \
577 uint32_t, (_eop)->eo_u32[1], \
578 uint32_t, (_eop)->eo_u32[0]); \
580 addr = (void *)((_esmp)->esm_base + (_offset)); \
582 *addr++ = (_eop)->eo_u64[0]; \
583 *addr = (_eop)->eo_u64[1]; \
585 _NOTE(CONSTANTCONDITION) \
588 #define EFSYS_MEM_WRITEO(_esmp, _offset, _eop) \
592 _NOTE(CONSTANTCONDITION) \
593 KASSERT(IS_P2ALIGNED(_offset, sizeof (efx_oword_t)), \
594 ("not power of 2 aligned")); \
596 EFSYS_PROBE5(mem_writeo, unsigned int, (_offset), \
597 uint32_t, (_eop)->eo_u32[3], \
598 uint32_t, (_eop)->eo_u32[2], \
599 uint32_t, (_eop)->eo_u32[1], \
600 uint32_t, (_eop)->eo_u32[0]); \
602 addr = (void *)((_esmp)->esm_base + (_offset)); \
604 *addr++ = (_eop)->eo_u32[0]; \
605 *addr++ = (_eop)->eo_u32[1]; \
606 *addr++ = (_eop)->eo_u32[2]; \
607 *addr = (_eop)->eo_u32[3]; \
609 _NOTE(CONSTANTCONDITION) \
613 #define EFSYS_MEM_ADDR(_esmp) \
616 #define EFSYS_MEM_IS_NULL(_esmp) \
617 ((_esmp)->esm_base == NULL)
621 #define SFXGE_LOCK_NAME_MAX 16
623 typedef struct efsys_bar_s {
625 char esb_lock_name[SFXGE_LOCK_NAME_MAX];
626 bus_space_tag_t esb_tag;
627 bus_space_handle_t esb_handle;
629 struct resource *esb_res;
632 #define SFXGE_BAR_LOCK_INIT(_esbp, _ifname) \
634 snprintf((_esbp)->esb_lock_name, \
635 sizeof((_esbp)->esb_lock_name), \
636 "%s:bar", (_ifname)); \
637 mtx_init(&(_esbp)->esb_lock, (_esbp)->esb_lock_name, \
639 _NOTE(CONSTANTCONDITION) \
641 #define SFXGE_BAR_LOCK_DESTROY(_esbp) \
642 mtx_destroy(&(_esbp)->esb_lock)
643 #define SFXGE_BAR_LOCK(_esbp) \
644 mtx_lock(&(_esbp)->esb_lock)
645 #define SFXGE_BAR_UNLOCK(_esbp) \
646 mtx_unlock(&(_esbp)->esb_lock)
648 #define EFSYS_BAR_READD(_esbp, _offset, _edp, _lock) \
650 _NOTE(CONSTANTCONDITION) \
651 KASSERT(IS_P2ALIGNED(_offset, sizeof (efx_dword_t)), \
652 ("not power of 2 aligned")); \
654 _NOTE(CONSTANTCONDITION) \
656 SFXGE_BAR_LOCK(_esbp); \
658 (_edp)->ed_u32[0] = bus_space_read_stream_4( \
659 (_esbp)->esb_tag, (_esbp)->esb_handle, \
662 EFSYS_PROBE2(bar_readd, unsigned int, (_offset), \
663 uint32_t, (_edp)->ed_u32[0]); \
665 _NOTE(CONSTANTCONDITION) \
667 SFXGE_BAR_UNLOCK(_esbp); \
668 _NOTE(CONSTANTCONDITION) \
671 #if defined(SFXGE_USE_BUS_SPACE_8)
672 #define EFSYS_BAR_READQ(_esbp, _offset, _eqp) \
674 _NOTE(CONSTANTCONDITION) \
675 KASSERT(IS_P2ALIGNED(_offset, sizeof (efx_qword_t)), \
676 ("not power of 2 aligned")); \
678 SFXGE_BAR_LOCK(_esbp); \
680 (_eqp)->eq_u64[0] = bus_space_read_stream_8( \
681 (_esbp)->esb_tag, (_esbp)->esb_handle, \
684 EFSYS_PROBE3(bar_readq, unsigned int, (_offset), \
685 uint32_t, (_eqp)->eq_u32[1], \
686 uint32_t, (_eqp)->eq_u32[0]); \
688 SFXGE_BAR_UNLOCK(_esbp); \
689 _NOTE(CONSTANTCONDITION) \
692 #define EFSYS_BAR_READO(_esbp, _offset, _eop, _lock) \
694 _NOTE(CONSTANTCONDITION) \
695 KASSERT(IS_P2ALIGNED(_offset, sizeof (efx_oword_t)), \
696 ("not power of 2 aligned")); \
698 _NOTE(CONSTANTCONDITION) \
700 SFXGE_BAR_LOCK(_esbp); \
702 (_eop)->eo_u64[0] = bus_space_read_stream_8( \
703 (_esbp)->esb_tag, (_esbp)->esb_handle, \
705 (_eop)->eo_u64[1] = bus_space_read_stream_8( \
706 (_esbp)->esb_tag, (_esbp)->esb_handle, \
709 EFSYS_PROBE5(bar_reado, unsigned int, (_offset), \
710 uint32_t, (_eop)->eo_u32[3], \
711 uint32_t, (_eop)->eo_u32[2], \
712 uint32_t, (_eop)->eo_u32[1], \
713 uint32_t, (_eop)->eo_u32[0]); \
715 _NOTE(CONSTANTCONDITION) \
717 SFXGE_BAR_UNLOCK(_esbp); \
718 _NOTE(CONSTANTCONDITION) \
722 #define EFSYS_BAR_READQ(_esbp, _offset, _eqp) \
724 _NOTE(CONSTANTCONDITION) \
725 KASSERT(IS_P2ALIGNED(_offset, sizeof (efx_qword_t)), \
726 ("not power of 2 aligned")); \
728 SFXGE_BAR_LOCK(_esbp); \
730 (_eqp)->eq_u32[0] = bus_space_read_stream_4( \
731 (_esbp)->esb_tag, (_esbp)->esb_handle, \
733 (_eqp)->eq_u32[1] = bus_space_read_stream_4( \
734 (_esbp)->esb_tag, (_esbp)->esb_handle, \
737 EFSYS_PROBE3(bar_readq, unsigned int, (_offset), \
738 uint32_t, (_eqp)->eq_u32[1], \
739 uint32_t, (_eqp)->eq_u32[0]); \
741 SFXGE_BAR_UNLOCK(_esbp); \
742 _NOTE(CONSTANTCONDITION) \
745 #define EFSYS_BAR_READO(_esbp, _offset, _eop, _lock) \
747 _NOTE(CONSTANTCONDITION) \
748 KASSERT(IS_P2ALIGNED(_offset, sizeof (efx_oword_t)), \
749 ("not power of 2 aligned")); \
751 _NOTE(CONSTANTCONDITION) \
753 SFXGE_BAR_LOCK(_esbp); \
755 (_eop)->eo_u32[0] = bus_space_read_stream_4( \
756 (_esbp)->esb_tag, (_esbp)->esb_handle, \
758 (_eop)->eo_u32[1] = bus_space_read_stream_4( \
759 (_esbp)->esb_tag, (_esbp)->esb_handle, \
761 (_eop)->eo_u32[2] = bus_space_read_stream_4( \
762 (_esbp)->esb_tag, (_esbp)->esb_handle, \
764 (_eop)->eo_u32[3] = bus_space_read_stream_4( \
765 (_esbp)->esb_tag, (_esbp)->esb_handle, \
768 EFSYS_PROBE5(bar_reado, unsigned int, (_offset), \
769 uint32_t, (_eop)->eo_u32[3], \
770 uint32_t, (_eop)->eo_u32[2], \
771 uint32_t, (_eop)->eo_u32[1], \
772 uint32_t, (_eop)->eo_u32[0]); \
774 _NOTE(CONSTANTCONDITION) \
776 SFXGE_BAR_UNLOCK(_esbp); \
777 _NOTE(CONSTANTCONDITION) \
781 #define EFSYS_BAR_WRITED(_esbp, _offset, _edp, _lock) \
783 _NOTE(CONSTANTCONDITION) \
784 KASSERT(IS_P2ALIGNED(_offset, sizeof (efx_dword_t)), \
785 ("not power of 2 aligned")); \
787 _NOTE(CONSTANTCONDITION) \
789 SFXGE_BAR_LOCK(_esbp); \
791 EFSYS_PROBE2(bar_writed, unsigned int, (_offset), \
792 uint32_t, (_edp)->ed_u32[0]); \
795 * Make sure that previous writes to the dword have \
796 * been done. It should be cheaper than barrier just \
797 * after the write below. \
799 bus_space_barrier((_esbp)->esb_tag, (_esbp)->esb_handle,\
800 (_offset), sizeof (efx_dword_t), \
801 BUS_SPACE_BARRIER_WRITE); \
802 bus_space_write_stream_4((_esbp)->esb_tag, \
803 (_esbp)->esb_handle, \
804 (_offset), (_edp)->ed_u32[0]); \
806 _NOTE(CONSTANTCONDITION) \
808 SFXGE_BAR_UNLOCK(_esbp); \
809 _NOTE(CONSTANTCONDITION) \
812 #if defined(SFXGE_USE_BUS_SPACE_8)
813 #define EFSYS_BAR_WRITEQ(_esbp, _offset, _eqp) \
815 _NOTE(CONSTANTCONDITION) \
816 KASSERT(IS_P2ALIGNED(_offset, sizeof (efx_qword_t)), \
817 ("not power of 2 aligned")); \
819 SFXGE_BAR_LOCK(_esbp); \
821 EFSYS_PROBE3(bar_writeq, unsigned int, (_offset), \
822 uint32_t, (_eqp)->eq_u32[1], \
823 uint32_t, (_eqp)->eq_u32[0]); \
826 * Make sure that previous writes to the qword have \
827 * been done. It should be cheaper than barrier just \
828 * after the write below. \
830 bus_space_barrier((_esbp)->esb_tag, (_esbp)->esb_handle,\
831 (_offset), sizeof (efx_qword_t), \
832 BUS_SPACE_BARRIER_WRITE); \
833 bus_space_write_stream_8((_esbp)->esb_tag, \
834 (_esbp)->esb_handle, \
835 (_offset), (_eqp)->eq_u64[0]); \
837 SFXGE_BAR_UNLOCK(_esbp); \
838 _NOTE(CONSTANTCONDITION) \
841 #define EFSYS_BAR_WRITEQ(_esbp, _offset, _eqp) \
843 _NOTE(CONSTANTCONDITION) \
844 KASSERT(IS_P2ALIGNED(_offset, sizeof (efx_qword_t)), \
845 ("not power of 2 aligned")); \
847 SFXGE_BAR_LOCK(_esbp); \
849 EFSYS_PROBE3(bar_writeq, unsigned int, (_offset), \
850 uint32_t, (_eqp)->eq_u32[1], \
851 uint32_t, (_eqp)->eq_u32[0]); \
854 * Make sure that previous writes to the qword have \
855 * been done. It should be cheaper than barrier just \
856 * after the last write below. \
858 bus_space_barrier((_esbp)->esb_tag, (_esbp)->esb_handle,\
859 (_offset), sizeof (efx_qword_t), \
860 BUS_SPACE_BARRIER_WRITE); \
861 bus_space_write_stream_4((_esbp)->esb_tag, \
862 (_esbp)->esb_handle, \
863 (_offset), (_eqp)->eq_u32[0]); \
865 * It should be guaranteed that the last dword comes \
866 * the last, so barrier entire qword to be sure that \
867 * neither above nor below writes are reordered. \
869 bus_space_barrier((_esbp)->esb_tag, (_esbp)->esb_handle,\
870 (_offset), sizeof (efx_qword_t), \
871 BUS_SPACE_BARRIER_WRITE); \
872 bus_space_write_stream_4((_esbp)->esb_tag, \
873 (_esbp)->esb_handle, \
874 (_offset) + 4, (_eqp)->eq_u32[1]); \
876 SFXGE_BAR_UNLOCK(_esbp); \
877 _NOTE(CONSTANTCONDITION) \
882 * Guarantees 64bit aligned 64bit writes to write combined BAR mapping
883 * (required by PIO hardware)
885 #define EFSYS_BAR_WC_WRITEQ(_esbp, _offset, _eqp) \
887 _NOTE(CONSTANTCONDITION) \
888 KASSERT(IS_P2ALIGNED(_offset, sizeof (efx_qword_t)), \
889 ("not power of 2 aligned")); \
893 /* FIXME: Perform a 64-bit write */ \
894 KASSERT(0, ("not implemented")); \
896 _NOTE(CONSTANTCONDITION) \
899 #if defined(SFXGE_USE_BUS_SPACE_8)
900 #define EFSYS_BAR_WRITEO(_esbp, _offset, _eop, _lock) \
902 _NOTE(CONSTANTCONDITION) \
903 KASSERT(IS_P2ALIGNED(_offset, sizeof (efx_oword_t)), \
904 ("not power of 2 aligned")); \
906 _NOTE(CONSTANTCONDITION) \
908 SFXGE_BAR_LOCK(_esbp); \
910 EFSYS_PROBE5(bar_writeo, unsigned int, (_offset), \
911 uint32_t, (_eop)->eo_u32[3], \
912 uint32_t, (_eop)->eo_u32[2], \
913 uint32_t, (_eop)->eo_u32[1], \
914 uint32_t, (_eop)->eo_u32[0]); \
917 * Make sure that previous writes to the oword have \
918 * been done. It should be cheaper than barrier just \
919 * after the last write below. \
921 bus_space_barrier((_esbp)->esb_tag, (_esbp)->esb_handle,\
922 (_offset), sizeof (efx_oword_t), \
923 BUS_SPACE_BARRIER_WRITE); \
924 bus_space_write_stream_8((_esbp)->esb_tag, \
925 (_esbp)->esb_handle, \
926 (_offset), (_eop)->eo_u64[0]); \
928 * It should be guaranteed that the last qword comes \
929 * the last, so barrier entire oword to be sure that \
930 * neither above nor below writes are reordered. \
932 bus_space_barrier((_esbp)->esb_tag, (_esbp)->esb_handle,\
933 (_offset), sizeof (efx_oword_t), \
934 BUS_SPACE_BARRIER_WRITE); \
935 bus_space_write_stream_8((_esbp)->esb_tag, \
936 (_esbp)->esb_handle, \
937 (_offset) + 8, (_eop)->eo_u64[1]); \
939 _NOTE(CONSTANTCONDITION) \
941 SFXGE_BAR_UNLOCK(_esbp); \
942 _NOTE(CONSTANTCONDITION) \
946 #define EFSYS_BAR_WRITEO(_esbp, _offset, _eop, _lock) \
948 _NOTE(CONSTANTCONDITION) \
949 KASSERT(IS_P2ALIGNED(_offset, sizeof (efx_oword_t)), \
950 ("not power of 2 aligned")); \
952 _NOTE(CONSTANTCONDITION) \
954 SFXGE_BAR_LOCK(_esbp); \
956 EFSYS_PROBE5(bar_writeo, unsigned int, (_offset), \
957 uint32_t, (_eop)->eo_u32[3], \
958 uint32_t, (_eop)->eo_u32[2], \
959 uint32_t, (_eop)->eo_u32[1], \
960 uint32_t, (_eop)->eo_u32[0]); \
963 * Make sure that previous writes to the oword have \
964 * been done. It should be cheaper than barrier just \
965 * after the last write below. \
967 bus_space_barrier((_esbp)->esb_tag, (_esbp)->esb_handle,\
968 (_offset), sizeof (efx_oword_t), \
969 BUS_SPACE_BARRIER_WRITE); \
970 bus_space_write_stream_4((_esbp)->esb_tag, \
971 (_esbp)->esb_handle, \
972 (_offset), (_eop)->eo_u32[0]); \
973 bus_space_write_stream_4((_esbp)->esb_tag, \
974 (_esbp)->esb_handle, \
975 (_offset) + 4, (_eop)->eo_u32[1]); \
976 bus_space_write_stream_4((_esbp)->esb_tag, \
977 (_esbp)->esb_handle, \
978 (_offset) + 8, (_eop)->eo_u32[2]); \
980 * It should be guaranteed that the last dword comes \
981 * the last, so barrier entire oword to be sure that \
982 * neither above nor below writes are reordered. \
984 bus_space_barrier((_esbp)->esb_tag, (_esbp)->esb_handle,\
985 (_offset), sizeof (efx_oword_t), \
986 BUS_SPACE_BARRIER_WRITE); \
987 bus_space_write_stream_4((_esbp)->esb_tag, \
988 (_esbp)->esb_handle, \
989 (_offset) + 12, (_eop)->eo_u32[3]); \
991 _NOTE(CONSTANTCONDITION) \
993 SFXGE_BAR_UNLOCK(_esbp); \
994 _NOTE(CONSTANTCONDITION) \
998 /* Use the standard octo-word write for doorbell writes */
999 #define EFSYS_BAR_DOORBELL_WRITEO(_esbp, _offset, _eop) \
1001 EFSYS_BAR_WRITEO((_esbp), (_offset), (_eop), B_FALSE); \
1002 _NOTE(CONSTANTCONDITION) \
1007 #define EFSYS_SPIN(_us) \
1010 _NOTE(CONSTANTCONDITION) \
1013 #define EFSYS_SLEEP EFSYS_SPIN
1017 #define EFSYS_MEM_READ_BARRIER() rmb()
1018 #define EFSYS_PIO_WRITE_BARRIER()
1021 #define EFSYS_DMA_SYNC_FOR_KERNEL(_esmp, _offset, _size) \
1023 bus_dmamap_sync((_esmp)->esm_tag, \
1025 BUS_DMASYNC_POSTREAD); \
1026 _NOTE(CONSTANTCONDITION) \
1029 #define EFSYS_DMA_SYNC_FOR_DEVICE(_esmp, _offset, _size) \
1031 bus_dmamap_sync((_esmp)->esm_tag, \
1033 BUS_DMASYNC_PREWRITE); \
1034 _NOTE(CONSTANTCONDITION) \
1039 typedef clock_t efsys_timestamp_t;
1041 #define EFSYS_TIMESTAMP(_usp) \
1046 *(_usp) = now * hz / 1000000; \
1047 _NOTE(CONSTANTCONDITION) \
1052 #define EFSYS_KMEM_ALLOC(_esip, _size, _p) \
1054 (_esip) = (_esip); \
1056 * The macro is used in non-sleepable contexts, for \
1057 * example, holding a mutex. \
1059 (_p) = malloc((_size), M_SFXGE, M_NOWAIT|M_ZERO); \
1060 _NOTE(CONSTANTCONDITION) \
1063 #define EFSYS_KMEM_FREE(_esip, _size, _p) \
1067 free((_p), M_SFXGE); \
1068 _NOTE(CONSTANTCONDITION) \
1073 typedef struct efsys_lock_s {
1075 char lock_name[SFXGE_LOCK_NAME_MAX];
1078 #define SFXGE_EFSYS_LOCK_INIT(_eslp, _ifname, _label) \
1080 efsys_lock_t *__eslp = (_eslp); \
1082 snprintf((__eslp)->lock_name, \
1083 sizeof((__eslp)->lock_name), \
1084 "%s:%s", (_ifname), (_label)); \
1085 mtx_init(&(__eslp)->lock, (__eslp)->lock_name, \
1088 #define SFXGE_EFSYS_LOCK_DESTROY(_eslp) \
1089 mtx_destroy(&(_eslp)->lock)
1090 #define SFXGE_EFSYS_LOCK(_eslp) \
1091 mtx_lock(&(_eslp)->lock)
1092 #define SFXGE_EFSYS_UNLOCK(_eslp) \
1093 mtx_unlock(&(_eslp)->lock)
1094 #define SFXGE_EFSYS_LOCK_ASSERT_OWNED(_eslp) \
1095 mtx_assert(&(_eslp)->lock, MA_OWNED)
1097 #define EFSYS_LOCK_MAGIC 0x000010c4
1099 #define EFSYS_LOCK(_lockp, _state) \
1101 SFXGE_EFSYS_LOCK(_lockp); \
1102 (_state) = EFSYS_LOCK_MAGIC; \
1103 _NOTE(CONSTANTCONDITION) \
1106 #define EFSYS_UNLOCK(_lockp, _state) \
1108 if ((_state) != EFSYS_LOCK_MAGIC) \
1109 KASSERT(B_FALSE, ("not locked")); \
1110 SFXGE_EFSYS_UNLOCK(_lockp); \
1111 _NOTE(CONSTANTCONDITION) \
1116 #define EFSYS_PREEMPT_DISABLE(_state) \
1118 (_state) = (_state); \
1120 _NOTE(CONSTANTCONDITION) \
1123 #define EFSYS_PREEMPT_ENABLE(_state) \
1125 (_state) = (_state); \
1126 critical_exit(_state); \
1127 _NOTE(CONSTANTCONDITION) \
1132 typedef uint64_t efsys_stat_t;
1134 #define EFSYS_STAT_INCR(_knp, _delta) \
1136 *(_knp) += (_delta); \
1137 _NOTE(CONSTANTCONDITION) \
1140 #define EFSYS_STAT_DECR(_knp, _delta) \
1142 *(_knp) -= (_delta); \
1143 _NOTE(CONSTANTCONDITION) \
1146 #define EFSYS_STAT_SET(_knp, _val) \
1149 _NOTE(CONSTANTCONDITION) \
1152 #define EFSYS_STAT_SET_QWORD(_knp, _valp) \
1154 *(_knp) = le64toh((_valp)->eq_u64[0]); \
1155 _NOTE(CONSTANTCONDITION) \
1158 #define EFSYS_STAT_SET_DWORD(_knp, _valp) \
1160 *(_knp) = le32toh((_valp)->ed_u32[0]); \
1161 _NOTE(CONSTANTCONDITION) \
1164 #define EFSYS_STAT_INCR_QWORD(_knp, _valp) \
1166 *(_knp) += le64toh((_valp)->eq_u64[0]); \
1167 _NOTE(CONSTANTCONDITION) \
1170 #define EFSYS_STAT_SUBR_QWORD(_knp, _valp) \
1172 *(_knp) -= le64toh((_valp)->eq_u64[0]); \
1173 _NOTE(CONSTANTCONDITION) \
1178 extern void sfxge_err(efsys_identifier_t *, unsigned int,
1179 uint32_t, uint32_t);
1181 #if EFSYS_OPT_DECODE_INTR_FATAL
1182 #define EFSYS_ERR(_esip, _code, _dword0, _dword1) \
1184 sfxge_err((_esip), (_code), (_dword0), (_dword1)); \
1185 _NOTE(CONSTANTCONDITION) \
1191 #define EFSYS_ASSERT(_exp) do { \
1193 panic("%s", #_exp); \
1196 #define EFSYS_ASSERT3(_x, _op, _y, _t) do { \
1197 const _t __x = (_t)(_x); \
1198 const _t __y = (_t)(_y); \
1199 if (!(__x _op __y)) \
1200 panic("assertion failed at %s:%u", __FILE__, __LINE__); \
1203 #define EFSYS_ASSERT3U(_x, _op, _y) EFSYS_ASSERT3(_x, _op, _y, uint64_t)
1204 #define EFSYS_ASSERT3S(_x, _op, _y) EFSYS_ASSERT3(_x, _op, _y, int64_t)
1205 #define EFSYS_ASSERT3P(_x, _op, _y) EFSYS_ASSERT3(_x, _op, _y, uintptr_t)
1209 #define EFSYS_HAS_ROTL_DWORD 0
1215 #endif /* _SYS_EFSYS_H */