2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2007-2016 Solarflare Communications Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
10 * 1. Redistributions of source code must retain the above copyright notice,
11 * this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright notice,
13 * this list of conditions and the following disclaimer in the documentation
14 * and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
18 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
20 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
21 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
23 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
25 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
26 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 * The views and conclusions contained in the software and documentation are
29 * those of the authors and should not be interpreted as representing official
30 * policies, either expressed or implied, of the FreeBSD Project.
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
41 static __checkReturn efx_rc_t
42 siena_mac_multicast_list_set(
45 #endif /* EFSYS_OPT_SIENA */
48 static const efx_mac_ops_t __efx_mac_siena_ops = {
49 siena_mac_poll, /* emo_poll */
50 siena_mac_up, /* emo_up */
51 siena_mac_reconfigure, /* emo_addr_set */
52 siena_mac_reconfigure, /* emo_pdu_set */
53 siena_mac_pdu_get, /* emo_pdu_get */
54 siena_mac_reconfigure, /* emo_reconfigure */
55 siena_mac_multicast_list_set, /* emo_multicast_list_set */
56 NULL, /* emo_filter_set_default_rxq */
57 NULL, /* emo_filter_default_rxq_clear */
58 #if EFSYS_OPT_LOOPBACK
59 siena_mac_loopback_set, /* emo_loopback_set */
60 #endif /* EFSYS_OPT_LOOPBACK */
61 #if EFSYS_OPT_MAC_STATS
62 siena_mac_stats_get_mask, /* emo_stats_get_mask */
63 efx_mcdi_mac_stats_clear, /* emo_stats_clear */
64 efx_mcdi_mac_stats_upload, /* emo_stats_upload */
65 efx_mcdi_mac_stats_periodic, /* emo_stats_periodic */
66 siena_mac_stats_update /* emo_stats_update */
67 #endif /* EFSYS_OPT_MAC_STATS */
69 #endif /* EFSYS_OPT_SIENA */
71 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
72 static const efx_mac_ops_t __efx_mac_ef10_ops = {
73 ef10_mac_poll, /* emo_poll */
74 ef10_mac_up, /* emo_up */
75 ef10_mac_addr_set, /* emo_addr_set */
76 ef10_mac_pdu_set, /* emo_pdu_set */
77 ef10_mac_pdu_get, /* emo_pdu_get */
78 ef10_mac_reconfigure, /* emo_reconfigure */
79 ef10_mac_multicast_list_set, /* emo_multicast_list_set */
80 ef10_mac_filter_default_rxq_set, /* emo_filter_default_rxq_set */
81 ef10_mac_filter_default_rxq_clear,
82 /* emo_filter_default_rxq_clear */
83 #if EFSYS_OPT_LOOPBACK
84 ef10_mac_loopback_set, /* emo_loopback_set */
85 #endif /* EFSYS_OPT_LOOPBACK */
86 #if EFSYS_OPT_MAC_STATS
87 ef10_mac_stats_get_mask, /* emo_stats_get_mask */
88 efx_mcdi_mac_stats_clear, /* emo_stats_clear */
89 efx_mcdi_mac_stats_upload, /* emo_stats_upload */
90 efx_mcdi_mac_stats_periodic, /* emo_stats_periodic */
91 ef10_mac_stats_update /* emo_stats_update */
92 #endif /* EFSYS_OPT_MAC_STATS */
94 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
96 __checkReturn efx_rc_t
101 efx_port_t *epp = &(enp->en_port);
102 const efx_mac_ops_t *emop = epp->ep_emop;
106 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
107 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT);
108 EFSYS_ASSERT(emop != NULL);
110 if (pdu < EFX_MAC_PDU_MIN) {
115 if (pdu > EFX_MAC_PDU_MAX) {
120 old_pdu = epp->ep_mac_pdu;
121 epp->ep_mac_pdu = (uint32_t)pdu;
122 if ((rc = emop->emo_pdu_set(enp)) != 0)
130 epp->ep_mac_pdu = old_pdu;
135 EFSYS_PROBE1(fail1, efx_rc_t, rc);
140 __checkReturn efx_rc_t
145 efx_port_t *epp = &(enp->en_port);
146 const efx_mac_ops_t *emop = epp->ep_emop;
149 if ((rc = emop->emo_pdu_get(enp, pdu)) != 0)
155 EFSYS_PROBE1(fail1, efx_rc_t, rc);
160 __checkReturn efx_rc_t
165 efx_port_t *epp = &(enp->en_port);
166 const efx_mac_ops_t *emop = epp->ep_emop;
171 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
172 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT);
174 if (EFX_MAC_ADDR_IS_MULTICAST(addr)) {
179 oui = addr[0] << 16 | addr[1] << 8 | addr[2];
180 if (oui == 0x000000) {
185 EFX_MAC_ADDR_COPY(old_addr, epp->ep_mac_addr);
186 EFX_MAC_ADDR_COPY(epp->ep_mac_addr, addr);
187 if ((rc = emop->emo_addr_set(enp)) != 0)
195 EFX_MAC_ADDR_COPY(epp->ep_mac_addr, old_addr);
200 EFSYS_PROBE1(fail1, efx_rc_t, rc);
205 __checkReturn efx_rc_t
208 __in boolean_t all_unicst,
209 __in boolean_t mulcst,
210 __in boolean_t all_mulcst,
211 __in boolean_t brdcst)
213 efx_port_t *epp = &(enp->en_port);
214 const efx_mac_ops_t *emop = epp->ep_emop;
215 boolean_t old_all_unicst;
216 boolean_t old_mulcst;
217 boolean_t old_all_mulcst;
218 boolean_t old_brdcst;
221 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
222 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT);
224 old_all_unicst = epp->ep_all_unicst;
225 old_mulcst = epp->ep_mulcst;
226 old_all_mulcst = epp->ep_all_mulcst;
227 old_brdcst = epp->ep_brdcst;
229 epp->ep_all_unicst = all_unicst;
230 epp->ep_mulcst = mulcst;
231 epp->ep_all_mulcst = all_mulcst;
232 epp->ep_brdcst = brdcst;
234 if ((rc = emop->emo_reconfigure(enp)) != 0)
240 EFSYS_PROBE1(fail1, efx_rc_t, rc);
242 epp->ep_all_unicst = old_all_unicst;
243 epp->ep_mulcst = old_mulcst;
244 epp->ep_all_mulcst = old_all_mulcst;
245 epp->ep_brdcst = old_brdcst;
250 __checkReturn efx_rc_t
253 __in boolean_t enabled)
255 efx_port_t *epp = &(enp->en_port);
256 const efx_mac_ops_t *emop = epp->ep_emop;
259 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
260 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT);
261 EFSYS_ASSERT(emop != NULL);
263 if (epp->ep_mac_drain == enabled)
266 epp->ep_mac_drain = enabled;
268 if ((rc = emop->emo_reconfigure(enp)) != 0)
274 EFSYS_PROBE1(fail1, efx_rc_t, rc);
279 __checkReturn efx_rc_t
282 __out boolean_t *mac_upp)
284 efx_port_t *epp = &(enp->en_port);
285 const efx_mac_ops_t *emop = epp->ep_emop;
288 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
289 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT);
291 if ((rc = emop->emo_up(enp, mac_upp)) != 0)
297 EFSYS_PROBE1(fail1, efx_rc_t, rc);
302 __checkReturn efx_rc_t
305 __in unsigned int fcntl,
306 __in boolean_t autoneg)
308 efx_port_t *epp = &(enp->en_port);
309 const efx_mac_ops_t *emop = epp->ep_emop;
310 const efx_phy_ops_t *epop = epp->ep_epop;
311 unsigned int old_fcntl;
312 boolean_t old_autoneg;
313 unsigned int old_adv_cap;
316 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
317 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT);
319 if ((fcntl & ~(EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE)) != 0) {
325 * Ignore a request to set flow control auto-negotiation
326 * if the PHY doesn't support it.
328 if (~epp->ep_phy_cap_mask & (1 << EFX_PHY_CAP_AN))
331 old_fcntl = epp->ep_fcntl;
332 old_autoneg = epp->ep_fcntl_autoneg;
333 old_adv_cap = epp->ep_adv_cap_mask;
335 epp->ep_fcntl = fcntl;
336 epp->ep_fcntl_autoneg = autoneg;
339 * Always encode the flow control settings in the advertised
340 * capabilities even if we are not trying to auto-negotiate
341 * them and reconfigure both the PHY and the MAC.
343 if (fcntl & EFX_FCNTL_RESPOND)
344 epp->ep_adv_cap_mask |= (1 << EFX_PHY_CAP_PAUSE |
345 1 << EFX_PHY_CAP_ASYM);
347 epp->ep_adv_cap_mask &= ~(1 << EFX_PHY_CAP_PAUSE |
348 1 << EFX_PHY_CAP_ASYM);
350 if (fcntl & EFX_FCNTL_GENERATE)
351 epp->ep_adv_cap_mask ^= (1 << EFX_PHY_CAP_ASYM);
353 if ((rc = epop->epo_reconfigure(enp)) != 0)
356 if ((rc = emop->emo_reconfigure(enp)) != 0)
367 epp->ep_fcntl = old_fcntl;
368 epp->ep_fcntl_autoneg = old_autoneg;
369 epp->ep_adv_cap_mask = old_adv_cap;
372 EFSYS_PROBE1(fail1, efx_rc_t, rc);
380 __out unsigned int *fcntl_wantedp,
381 __out unsigned int *fcntl_linkp)
383 efx_port_t *epp = &(enp->en_port);
384 unsigned int wanted = 0;
386 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
387 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT);
390 * Decode the requested flow control settings from the PHY
391 * advertised capabilities.
393 if (epp->ep_adv_cap_mask & (1 << EFX_PHY_CAP_PAUSE))
394 wanted = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
395 if (epp->ep_adv_cap_mask & (1 << EFX_PHY_CAP_ASYM))
396 wanted ^= EFX_FCNTL_GENERATE;
398 *fcntl_linkp = epp->ep_fcntl;
399 *fcntl_wantedp = wanted;
402 __checkReturn efx_rc_t
403 efx_mac_multicast_list_set(
405 __in_ecount(6*count) uint8_t const *addrs,
408 efx_port_t *epp = &(enp->en_port);
409 const efx_mac_ops_t *emop = epp->ep_emop;
410 uint8_t *old_mulcst_addr_list = NULL;
411 uint32_t old_mulcst_addr_count;
414 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
415 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT);
417 if (count > EFX_MAC_MULTICAST_LIST_MAX) {
422 old_mulcst_addr_count = epp->ep_mulcst_addr_count;
423 if (old_mulcst_addr_count > 0) {
424 /* Allocate memory to store old list (instead of using stack) */
425 EFSYS_KMEM_ALLOC(enp->en_esip,
426 old_mulcst_addr_count * EFX_MAC_ADDR_LEN,
427 old_mulcst_addr_list);
428 if (old_mulcst_addr_list == NULL) {
433 /* Save the old list in case we need to rollback */
434 memcpy(old_mulcst_addr_list, epp->ep_mulcst_addr_list,
435 old_mulcst_addr_count * EFX_MAC_ADDR_LEN);
438 /* Store the new list */
439 memcpy(epp->ep_mulcst_addr_list, addrs,
440 count * EFX_MAC_ADDR_LEN);
441 epp->ep_mulcst_addr_count = count;
443 if ((rc = emop->emo_multicast_list_set(enp)) != 0)
446 if (old_mulcst_addr_count > 0) {
447 EFSYS_KMEM_FREE(enp->en_esip,
448 old_mulcst_addr_count * EFX_MAC_ADDR_LEN,
449 old_mulcst_addr_list);
457 /* Restore original list on failure */
458 epp->ep_mulcst_addr_count = old_mulcst_addr_count;
459 if (old_mulcst_addr_count > 0) {
460 memcpy(epp->ep_mulcst_addr_list, old_mulcst_addr_list,
461 old_mulcst_addr_count * EFX_MAC_ADDR_LEN);
463 EFSYS_KMEM_FREE(enp->en_esip,
464 old_mulcst_addr_count * EFX_MAC_ADDR_LEN,
465 old_mulcst_addr_list);
472 EFSYS_PROBE1(fail1, efx_rc_t, rc);
478 __checkReturn efx_rc_t
479 efx_mac_filter_default_rxq_set(
482 __in boolean_t using_rss)
484 efx_port_t *epp = &(enp->en_port);
485 const efx_mac_ops_t *emop = epp->ep_emop;
488 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
489 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT);
491 if (emop->emo_filter_default_rxq_set != NULL) {
492 rc = emop->emo_filter_default_rxq_set(enp, erp, using_rss);
500 EFSYS_PROBE1(fail1, efx_rc_t, rc);
506 efx_mac_filter_default_rxq_clear(
509 efx_port_t *epp = &(enp->en_port);
510 const efx_mac_ops_t *emop = epp->ep_emop;
512 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
513 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT);
515 if (emop->emo_filter_default_rxq_clear != NULL)
516 emop->emo_filter_default_rxq_clear(enp);
520 #if EFSYS_OPT_MAC_STATS
524 /* START MKCONFIG GENERATED EfxMacStatNamesBlock 1a45a82fcfb30c1b */
525 static const char * const __efx_mac_stat_name[] = {
534 "rx_128_to_255_pkts",
535 "rx_256_to_511_pkts",
536 "rx_512_to_1023_pkts",
537 "rx_1024_to_15xx_pkts",
542 "rx_false_carrier_errors",
545 "rx_internal_errors",
556 "rx_nodesc_drop_cnt",
565 "tx_128_to_255_pkts",
566 "tx_256_to_511_pkts",
567 "tx_512_to_1023_pkts",
568 "tx_1024_to_15xx_pkts",
577 "pm_trunc_bb_overflow",
578 "pm_discard_bb_overflow",
579 "pm_trunc_vfifo_full",
580 "pm_discard_vfifo_full",
583 "pm_discard_mapping",
584 "rxdp_q_disabled_pkts",
585 "rxdp_di_dropped_pkts",
586 "rxdp_streaming_pkts",
589 "vadapter_rx_unicast_packets",
590 "vadapter_rx_unicast_bytes",
591 "vadapter_rx_multicast_packets",
592 "vadapter_rx_multicast_bytes",
593 "vadapter_rx_broadcast_packets",
594 "vadapter_rx_broadcast_bytes",
595 "vadapter_rx_bad_packets",
596 "vadapter_rx_bad_bytes",
597 "vadapter_rx_overflow",
598 "vadapter_tx_unicast_packets",
599 "vadapter_tx_unicast_bytes",
600 "vadapter_tx_multicast_packets",
601 "vadapter_tx_multicast_bytes",
602 "vadapter_tx_broadcast_packets",
603 "vadapter_tx_broadcast_bytes",
604 "vadapter_tx_bad_packets",
605 "vadapter_tx_bad_bytes",
606 "vadapter_tx_overflow",
607 "fec_uncorrected_errors",
608 "fec_corrected_errors",
609 "fec_corrected_symbols_lane0",
610 "fec_corrected_symbols_lane1",
611 "fec_corrected_symbols_lane2",
612 "fec_corrected_symbols_lane3",
613 "ctpio_vi_busy_fallback",
614 "ctpio_long_write_success",
615 "ctpio_missing_dbell_fail",
616 "ctpio_overflow_fail",
617 "ctpio_underflow_fail",
618 "ctpio_timeout_fail",
619 "ctpio_noncontig_wr_fail",
620 "ctpio_frm_clobber_fail",
621 "ctpio_invalid_wr_fail",
622 "ctpio_vi_clobber_fallback",
623 "ctpio_unqualified_fallback",
624 "ctpio_runt_fallback",
629 "rxdp_scatter_disabled_trunc",
633 /* END MKCONFIG GENERATED EfxMacStatNamesBlock */
635 __checkReturn const char *
638 __in unsigned int id)
640 _NOTE(ARGUNUSED(enp))
641 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
643 EFSYS_ASSERT3U(id, <, EFX_MAC_NSTATS);
644 return (__efx_mac_stat_name[id]);
647 #endif /* EFSYS_OPT_NAMES */
650 efx_mac_stats_mask_add_range(
651 __inout_bcount(mask_size) uint32_t *maskp,
652 __in size_t mask_size,
653 __in const struct efx_mac_stats_range *rngp)
655 unsigned int mask_npages = mask_size / sizeof (*maskp);
664 if ((mask_npages * EFX_MAC_STATS_MASK_BITS_PER_PAGE) <=
665 (unsigned int)rngp->last) {
670 EFSYS_ASSERT3U(rngp->first, <=, rngp->last);
671 EFSYS_ASSERT3U(rngp->last, <, EFX_MAC_NSTATS);
673 for (el = 0; el < mask_npages; ++el) {
674 el_min = el * EFX_MAC_STATS_MASK_BITS_PER_PAGE;
676 el_min + (EFX_MAC_STATS_MASK_BITS_PER_PAGE - 1);
677 if ((unsigned int)rngp->first > el_max ||
678 (unsigned int)rngp->last < el_min)
680 low = MAX((unsigned int)rngp->first, el_min);
681 high = MIN((unsigned int)rngp->last, el_max);
682 width = high - low + 1;
684 (width == EFX_MAC_STATS_MASK_BITS_PER_PAGE) ?
685 (~0ULL) : (((1ULL << width) - 1) << (low - el_min));
691 EFSYS_PROBE1(fail1, efx_rc_t, rc);
697 efx_mac_stats_mask_add_ranges(
698 __inout_bcount(mask_size) uint32_t *maskp,
699 __in size_t mask_size,
700 __in_ecount(rng_count) const struct efx_mac_stats_range *rngp,
701 __in unsigned int rng_count)
706 for (i = 0; i < rng_count; ++i) {
707 if ((rc = efx_mac_stats_mask_add_range(maskp, mask_size,
715 EFSYS_PROBE1(fail1, efx_rc_t, rc);
720 __checkReturn efx_rc_t
721 efx_mac_stats_get_mask(
723 __out_bcount(mask_size) uint32_t *maskp,
724 __in size_t mask_size)
726 efx_port_t *epp = &(enp->en_port);
727 const efx_mac_ops_t *emop = epp->ep_emop;
730 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
731 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PROBE);
732 EFSYS_ASSERT(maskp != NULL);
733 EFSYS_ASSERT(mask_size % sizeof (maskp[0]) == 0);
735 (void) memset(maskp, 0, mask_size);
737 if ((rc = emop->emo_stats_get_mask(enp, maskp, mask_size)) != 0)
743 EFSYS_PROBE1(fail1, efx_rc_t, rc);
748 __checkReturn efx_rc_t
752 efx_port_t *epp = &(enp->en_port);
753 const efx_mac_ops_t *emop = epp->ep_emop;
756 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
757 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT);
758 EFSYS_ASSERT(emop != NULL);
760 if ((rc = emop->emo_stats_clear(enp)) != 0)
766 EFSYS_PROBE1(fail1, efx_rc_t, rc);
771 __checkReturn efx_rc_t
772 efx_mac_stats_upload(
774 __in efsys_mem_t *esmp)
776 efx_port_t *epp = &(enp->en_port);
777 const efx_mac_ops_t *emop = epp->ep_emop;
780 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
781 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT);
782 EFSYS_ASSERT(emop != NULL);
784 if ((rc = emop->emo_stats_upload(enp, esmp)) != 0)
790 EFSYS_PROBE1(fail1, efx_rc_t, rc);
795 __checkReturn efx_rc_t
796 efx_mac_stats_periodic(
798 __in efsys_mem_t *esmp,
799 __in uint16_t period_ms,
800 __in boolean_t events)
802 efx_port_t *epp = &(enp->en_port);
803 const efx_mac_ops_t *emop = epp->ep_emop;
806 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
807 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT);
809 EFSYS_ASSERT(emop != NULL);
811 if (emop->emo_stats_periodic == NULL) {
816 if ((rc = emop->emo_stats_periodic(enp, esmp, period_ms, events)) != 0)
824 EFSYS_PROBE1(fail1, efx_rc_t, rc);
830 __checkReturn efx_rc_t
831 efx_mac_stats_update(
833 __in efsys_mem_t *esmp,
834 __inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *essp,
835 __inout_opt uint32_t *generationp)
837 efx_port_t *epp = &(enp->en_port);
838 const efx_mac_ops_t *emop = epp->ep_emop;
841 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
842 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT);
843 EFSYS_ASSERT(emop != NULL);
845 rc = emop->emo_stats_update(enp, esmp, essp, generationp);
850 #endif /* EFSYS_OPT_MAC_STATS */
852 __checkReturn efx_rc_t
856 efx_port_t *epp = &(enp->en_port);
857 efx_mac_type_t type = EFX_MAC_INVALID;
858 const efx_mac_ops_t *emop;
861 switch (enp->en_family) {
863 case EFX_FAMILY_SIENA:
864 emop = &__efx_mac_siena_ops;
865 type = EFX_MAC_SIENA;
867 #endif /* EFSYS_OPT_SIENA */
869 #if EFSYS_OPT_HUNTINGTON
870 case EFX_FAMILY_HUNTINGTON:
871 emop = &__efx_mac_ef10_ops;
872 type = EFX_MAC_HUNTINGTON;
874 #endif /* EFSYS_OPT_HUNTINGTON */
876 #if EFSYS_OPT_MEDFORD
877 case EFX_FAMILY_MEDFORD:
878 emop = &__efx_mac_ef10_ops;
879 type = EFX_MAC_MEDFORD;
881 #endif /* EFSYS_OPT_MEDFORD */
883 #if EFSYS_OPT_MEDFORD2
884 case EFX_FAMILY_MEDFORD2:
885 emop = &__efx_mac_ef10_ops;
886 type = EFX_MAC_MEDFORD2;
888 #endif /* EFSYS_OPT_MEDFORD2 */
895 EFSYS_ASSERT(type != EFX_MAC_INVALID);
896 EFSYS_ASSERT3U(type, <, EFX_MAC_NTYPES);
897 EFSYS_ASSERT(emop != NULL);
900 epp->ep_mac_type = type;
905 EFSYS_PROBE1(fail1, efx_rc_t, rc);
913 #define EFX_MAC_HASH_BITS (1 << 8)
915 /* Compute the multicast hash as used on Falcon and Siena. */
917 siena_mac_multicast_hash_compute(
918 __in_ecount(6*count) uint8_t const *addrs,
920 __out efx_oword_t *hash_low,
921 __out efx_oword_t *hash_high)
926 EFSYS_ASSERT(hash_low != NULL);
927 EFSYS_ASSERT(hash_high != NULL);
929 EFX_ZERO_OWORD(*hash_low);
930 EFX_ZERO_OWORD(*hash_high);
932 for (i = 0; i < count; i++) {
933 /* Calculate hash bucket (IEEE 802.3 CRC32 of the MAC addr) */
934 crc = efx_crc32_calculate(0xffffffff, addrs, EFX_MAC_ADDR_LEN);
935 index = crc % EFX_MAC_HASH_BITS;
937 EFX_SET_OWORD_BIT(*hash_low, index);
939 EFX_SET_OWORD_BIT(*hash_high, index - 128);
942 addrs += EFX_MAC_ADDR_LEN;
946 static __checkReturn efx_rc_t
947 siena_mac_multicast_list_set(
950 efx_port_t *epp = &(enp->en_port);
951 const efx_mac_ops_t *emop = epp->ep_emop;
952 efx_oword_t old_hash[2];
955 EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
956 EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_PORT);
958 memcpy(old_hash, epp->ep_multicst_hash, sizeof (old_hash));
960 siena_mac_multicast_hash_compute(
961 epp->ep_mulcst_addr_list,
962 epp->ep_mulcst_addr_count,
963 &epp->ep_multicst_hash[0],
964 &epp->ep_multicst_hash[1]);
966 if ((rc = emop->emo_reconfigure(enp)) != 0)
972 EFSYS_PROBE1(fail1, efx_rc_t, rc);
974 memcpy(epp->ep_multicst_hash, old_hash, sizeof (old_hash));
979 #endif /* EFSYS_OPT_SIENA */