2 * Copyright (c) 2012-2015 Solarflare Communications Inc.
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6 * modification, are permitted provided that the following conditions are met:
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
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11 * this list of conditions and the following disclaimer in the documentation
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31 #include <sys/cdefs.h>
32 __FBSDID("$FreeBSD$");
37 #if EFSYS_OPT_HUNTINGTON
41 __in uint32_t mcdi_cap,
42 __out uint32_t *maskp)
45 * TBD: consider common Siena/Hunt function: Hunt is a superset of
46 * Siena here (adds 40G)
52 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_10HDX_LBN))
53 mask |= (1 << EFX_PHY_CAP_10HDX);
54 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_10FDX_LBN))
55 mask |= (1 << EFX_PHY_CAP_10FDX);
56 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_100HDX_LBN))
57 mask |= (1 << EFX_PHY_CAP_100HDX);
58 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_100FDX_LBN))
59 mask |= (1 << EFX_PHY_CAP_100FDX);
60 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_1000HDX_LBN))
61 mask |= (1 << EFX_PHY_CAP_1000HDX);
62 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_1000FDX_LBN))
63 mask |= (1 << EFX_PHY_CAP_1000FDX);
64 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_10000FDX_LBN))
65 mask |= (1 << EFX_PHY_CAP_10000FDX);
66 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_40000FDX_LBN))
67 mask |= (1 << EFX_PHY_CAP_40000FDX);
68 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_PAUSE_LBN))
69 mask |= (1 << EFX_PHY_CAP_PAUSE);
70 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_ASYM_LBN))
71 mask |= (1 << EFX_PHY_CAP_ASYM);
72 if (mcdi_cap & (1 << MC_CMD_PHY_CAP_AN_LBN))
73 mask |= (1 << EFX_PHY_CAP_AN);
79 hunt_phy_decode_link_mode(
81 __in uint32_t link_flags,
82 __in unsigned int speed,
83 __in unsigned int fcntl,
84 __out efx_link_mode_t *link_modep,
85 __out unsigned int *fcntlp)
88 * TBD: consider common Siena/Hunt function: Hunt is a superset of
89 * Siena here (adds 40G and generate-only flow control)
92 boolean_t fd = !!(link_flags &
93 (1 << MC_CMD_GET_LINK_OUT_FULL_DUPLEX_LBN));
94 boolean_t up = !!(link_flags &
95 (1 << MC_CMD_GET_LINK_OUT_LINK_UP_LBN));
100 *link_modep = EFX_LINK_DOWN;
101 else if (speed == 40000 && fd)
102 *link_modep = EFX_LINK_40000FDX;
103 else if (speed == 10000 && fd)
104 *link_modep = EFX_LINK_10000FDX;
105 else if (speed == 1000)
106 *link_modep = fd ? EFX_LINK_1000FDX : EFX_LINK_1000HDX;
107 else if (speed == 100)
108 *link_modep = fd ? EFX_LINK_100FDX : EFX_LINK_100HDX;
109 else if (speed == 10)
110 *link_modep = fd ? EFX_LINK_10FDX : EFX_LINK_10HDX;
112 *link_modep = EFX_LINK_UNKNOWN;
114 if (fcntl == MC_CMD_FCNTL_OFF)
116 else if (fcntl == MC_CMD_FCNTL_RESPOND)
117 *fcntlp = EFX_FCNTL_RESPOND;
118 else if (fcntl == MC_CMD_FCNTL_GENERATE)
119 *fcntlp = EFX_FCNTL_GENERATE;
120 else if (fcntl == MC_CMD_FCNTL_BIDIR)
121 *fcntlp = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
123 EFSYS_PROBE1(mc_pcol_error, int, fcntl);
132 __in efx_qword_t *eqp,
133 __out efx_link_mode_t *link_modep)
136 * TBD: consider common Siena/Hunt function: Hunt is a superset of
137 * Siena here (adds 40G)
140 efx_port_t *epp = &(enp->en_port);
141 unsigned int link_flags;
144 efx_link_mode_t link_mode;
145 uint32_t lp_cap_mask;
148 * Convert the LINKCHANGE speed enumeration into mbit/s, in the
149 * same way as GET_LINK encodes the speed
151 switch (MCDI_EV_FIELD(eqp, LINKCHANGE_SPEED)) {
152 case MCDI_EVENT_LINKCHANGE_SPEED_100M:
155 case MCDI_EVENT_LINKCHANGE_SPEED_1G:
158 case MCDI_EVENT_LINKCHANGE_SPEED_10G:
161 case MCDI_EVENT_LINKCHANGE_SPEED_40G:
169 link_flags = MCDI_EV_FIELD(eqp, LINKCHANGE_LINK_FLAGS);
170 hunt_phy_decode_link_mode(enp, link_flags, speed,
171 MCDI_EV_FIELD(eqp, LINKCHANGE_FCNTL),
173 hunt_phy_decode_cap(MCDI_EV_FIELD(eqp, LINKCHANGE_LP_CAP),
177 * It's safe to update ep_lp_cap_mask without the driver's port lock
178 * because presumably any concurrently running efx_port_poll() is
179 * only going to arrive at the same value.
181 * ep_fcntl has two meanings. It's either the link common fcntl
182 * (if the PHY supports AN), or it's the forced link state. If
183 * the former, it's safe to update the value for the same reason as
184 * for ep_lp_cap_mask. If the latter, then just ignore the value,
185 * because we can race with efx_mac_fcntl_set().
187 epp->ep_lp_cap_mask = lp_cap_mask;
188 epp->ep_fcntl = fcntl;
190 *link_modep = link_mode;
193 __checkReturn efx_rc_t
196 __in boolean_t power)
198 /* TBD: consider common Siena/Hunt function: essentially identical */
205 /* Check if the PHY is a zombie */
206 if ((rc = hunt_phy_verify(enp)) != 0)
209 enp->en_reset_flags |= EFX_RESET_PHY;
214 EFSYS_PROBE1(fail1, efx_rc_t, rc);
219 __checkReturn efx_rc_t
222 __out hunt_link_state_t *hlsp)
225 * TBD: consider common Siena/Hunt function: Hunt is very similar
226 * (at least for now; not clear that the loopbacks should necessarily
227 * be quite the same...)
231 uint8_t payload[MAX(MC_CMD_GET_LINK_IN_LEN,
232 MC_CMD_GET_LINK_OUT_LEN)];
235 (void) memset(payload, 0, sizeof (payload));
236 req.emr_cmd = MC_CMD_GET_LINK;
237 req.emr_in_buf = payload;
238 req.emr_in_length = MC_CMD_GET_LINK_IN_LEN;
239 req.emr_out_buf = payload;
240 req.emr_out_length = MC_CMD_GET_LINK_OUT_LEN;
242 efx_mcdi_execute(enp, &req);
244 if (req.emr_rc != 0) {
249 if (req.emr_out_length_used < MC_CMD_GET_LINK_OUT_LEN) {
254 hunt_phy_decode_cap(MCDI_OUT_DWORD(req, GET_LINK_OUT_CAP),
255 &hlsp->hls_adv_cap_mask);
256 hunt_phy_decode_cap(MCDI_OUT_DWORD(req, GET_LINK_OUT_LP_CAP),
257 &hlsp->hls_lp_cap_mask);
259 hunt_phy_decode_link_mode(enp, MCDI_OUT_DWORD(req, GET_LINK_OUT_FLAGS),
260 MCDI_OUT_DWORD(req, GET_LINK_OUT_LINK_SPEED),
261 MCDI_OUT_DWORD(req, GET_LINK_OUT_FCNTL),
262 &hlsp->hls_link_mode, &hlsp->hls_fcntl);
264 #if EFSYS_OPT_LOOPBACK
265 /* Assert the MC_CMD_LOOPBACK and EFX_LOOPBACK namespace agree */
266 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_NONE == EFX_LOOPBACK_OFF);
267 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_DATA == EFX_LOOPBACK_DATA);
268 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GMAC == EFX_LOOPBACK_GMAC);
269 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XGMII == EFX_LOOPBACK_XGMII);
270 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XGXS == EFX_LOOPBACK_XGXS);
271 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XAUI == EFX_LOOPBACK_XAUI);
272 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GMII == EFX_LOOPBACK_GMII);
273 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_SGMII == EFX_LOOPBACK_SGMII);
274 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XGBR == EFX_LOOPBACK_XGBR);
275 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XFI == EFX_LOOPBACK_XFI);
276 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XAUI_FAR == EFX_LOOPBACK_XAUI_FAR);
277 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GMII_FAR == EFX_LOOPBACK_GMII_FAR);
278 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_SGMII_FAR == EFX_LOOPBACK_SGMII_FAR);
279 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_XFI_FAR == EFX_LOOPBACK_XFI_FAR);
280 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_GPHY == EFX_LOOPBACK_GPHY);
281 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_PHYXS == EFX_LOOPBACK_PHY_XS);
282 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_PCS == EFX_LOOPBACK_PCS);
283 EFX_STATIC_ASSERT(MC_CMD_LOOPBACK_PMAPMD == EFX_LOOPBACK_PMA_PMD);
285 hlsp->hls_loopback = MCDI_OUT_DWORD(req, GET_LINK_OUT_LOOPBACK_MODE);
286 #endif /* EFSYS_OPT_LOOPBACK */
288 hlsp->hls_mac_up = MCDI_OUT_DWORD(req, GET_LINK_OUT_MAC_FAULT) == 0;
295 EFSYS_PROBE1(fail1, efx_rc_t, rc);
300 __checkReturn efx_rc_t
301 hunt_phy_reconfigure(
305 * TBD: this is a little different for now (no LED support for Hunt
306 * yet), but ultimately should consider common Siena/Hunt function:
307 * Hunt should be a superset of Siena here (adds 40G)
310 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
311 efx_port_t *epp = &(enp->en_port);
313 uint8_t payload[MAX(MC_CMD_SET_LINK_IN_LEN,
314 MC_CMD_SET_LINK_OUT_LEN)];
316 unsigned int led_mode;
320 if (~encp->enc_func_flags & EFX_NIC_FUNC_LINKCTRL)
323 (void) memset(payload, 0, sizeof (payload));
324 req.emr_cmd = MC_CMD_SET_LINK;
325 req.emr_in_buf = payload;
326 req.emr_in_length = MC_CMD_SET_LINK_IN_LEN;
327 req.emr_out_buf = payload;
328 req.emr_out_length = MC_CMD_SET_LINK_OUT_LEN;
330 cap_mask = epp->ep_adv_cap_mask;
331 MCDI_IN_POPULATE_DWORD_10(req, SET_LINK_IN_CAP,
332 PHY_CAP_10HDX, (cap_mask >> EFX_PHY_CAP_10HDX) & 0x1,
333 PHY_CAP_10FDX, (cap_mask >> EFX_PHY_CAP_10FDX) & 0x1,
334 PHY_CAP_100HDX, (cap_mask >> EFX_PHY_CAP_100HDX) & 0x1,
335 PHY_CAP_100FDX, (cap_mask >> EFX_PHY_CAP_100FDX) & 0x1,
336 PHY_CAP_1000HDX, (cap_mask >> EFX_PHY_CAP_1000HDX) & 0x1,
337 PHY_CAP_1000FDX, (cap_mask >> EFX_PHY_CAP_1000FDX) & 0x1,
338 PHY_CAP_10000FDX, (cap_mask >> EFX_PHY_CAP_10000FDX) & 0x1,
339 PHY_CAP_PAUSE, (cap_mask >> EFX_PHY_CAP_PAUSE) & 0x1,
340 PHY_CAP_ASYM, (cap_mask >> EFX_PHY_CAP_ASYM) & 0x1,
341 PHY_CAP_AN, (cap_mask >> EFX_PHY_CAP_AN) & 0x1);
342 /* Too many fields for for POPULATE macros, so insert this afterwards */
343 MCDI_IN_SET_DWORD_FIELD(req, SET_LINK_IN_CAP,
344 PHY_CAP_40000FDX, (cap_mask >> EFX_PHY_CAP_40000FDX) & 0x1);
346 #if EFSYS_OPT_LOOPBACK
347 MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_MODE,
348 epp->ep_loopback_type);
349 switch (epp->ep_loopback_link_mode) {
350 case EFX_LINK_100FDX:
353 case EFX_LINK_1000FDX:
356 case EFX_LINK_10000FDX:
359 case EFX_LINK_40000FDX:
366 MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_MODE, MC_CMD_LOOPBACK_NONE);
368 #endif /* EFSYS_OPT_LOOPBACK */
369 MCDI_IN_SET_DWORD(req, SET_LINK_IN_LOOPBACK_SPEED, speed);
371 #if EFSYS_OPT_PHY_FLAGS
372 MCDI_IN_SET_DWORD(req, SET_LINK_IN_FLAGS, epp->ep_phy_flags);
374 MCDI_IN_SET_DWORD(req, SET_LINK_IN_FLAGS, 0);
375 #endif /* EFSYS_OPT_PHY_FLAGS */
377 efx_mcdi_execute(enp, &req);
379 if (req.emr_rc != 0) {
384 /* And set the blink mode */
385 (void) memset(payload, 0, sizeof (payload));
386 req.emr_cmd = MC_CMD_SET_ID_LED;
387 req.emr_in_buf = payload;
388 req.emr_in_length = MC_CMD_SET_ID_LED_IN_LEN;
389 req.emr_out_buf = payload;
390 req.emr_out_length = MC_CMD_SET_ID_LED_OUT_LEN;
392 #if EFSYS_OPT_PHY_LED_CONTROL
393 switch (epp->ep_phy_led_mode) {
394 case EFX_PHY_LED_DEFAULT:
395 led_mode = MC_CMD_LED_DEFAULT;
397 case EFX_PHY_LED_OFF:
398 led_mode = MC_CMD_LED_OFF;
401 led_mode = MC_CMD_LED_ON;
405 led_mode = MC_CMD_LED_DEFAULT;
408 MCDI_IN_SET_DWORD(req, SET_ID_LED_IN_STATE, led_mode);
410 MCDI_IN_SET_DWORD(req, SET_ID_LED_IN_STATE, MC_CMD_LED_DEFAULT);
411 #endif /* EFSYS_OPT_PHY_LED_CONTROL */
413 efx_mcdi_execute(enp, &req);
415 if (req.emr_rc != 0) {
425 EFSYS_PROBE1(fail1, efx_rc_t, rc);
430 __checkReturn efx_rc_t
434 /* TBD: consider common Siena/Hunt function: essentially identical */
437 uint8_t payload[MAX(MC_CMD_GET_PHY_STATE_IN_LEN,
438 MC_CMD_GET_PHY_STATE_OUT_LEN)];
442 (void) memset(payload, 0, sizeof (payload));
443 req.emr_cmd = MC_CMD_GET_PHY_STATE;
444 req.emr_in_buf = payload;
445 req.emr_in_length = MC_CMD_GET_PHY_STATE_IN_LEN;
446 req.emr_out_buf = payload;
447 req.emr_out_length = MC_CMD_GET_PHY_STATE_OUT_LEN;
449 efx_mcdi_execute(enp, &req);
451 if (req.emr_rc != 0) {
456 if (req.emr_out_length_used < MC_CMD_GET_PHY_STATE_OUT_LEN) {
461 state = MCDI_OUT_DWORD(req, GET_PHY_STATE_OUT_STATE);
462 if (state != MC_CMD_PHY_STATE_OK) {
463 if (state != MC_CMD_PHY_STATE_ZOMBIE)
464 EFSYS_PROBE1(mc_pcol_error, int, state);
476 EFSYS_PROBE1(fail1, efx_rc_t, rc);
481 __checkReturn efx_rc_t
484 __out uint32_t *ouip)
486 _NOTE(ARGUNUSED(enp, ouip))
491 #if EFSYS_OPT_PHY_STATS
493 __checkReturn efx_rc_t
494 hunt_phy_stats_update(
496 __in efsys_mem_t *esmp,
497 __inout_ecount(EFX_PHY_NSTATS) uint32_t *stat)
499 /* TBD: no stats support in firmware yet */
500 _NOTE(ARGUNUSED(enp, esmp))
501 memset(stat, 0, EFX_PHY_NSTATS * sizeof (*stat));
506 #endif /* EFSYS_OPT_PHY_STATS */
508 #if EFSYS_OPT_PHY_PROPS
515 __in unsigned int id)
517 _NOTE(ARGUNUSED(enp, id))
522 #endif /* EFSYS_OPT_NAMES */
524 extern __checkReturn efx_rc_t
527 __in unsigned int id,
529 __out uint32_t *valp)
531 _NOTE(ARGUNUSED(enp, id, flags, valp))
536 extern __checkReturn efx_rc_t
539 __in unsigned int id,
542 _NOTE(ARGUNUSED(enp, id, val))
547 #endif /* EFSYS_OPT_PHY_PROPS */
551 __checkReturn efx_rc_t
552 hunt_bist_enable_offline(
557 if ((rc = efx_mcdi_bist_enable_offline(enp)) != 0)
563 EFSYS_PROBE1(fail1, efx_rc_t, rc);
568 __checkReturn efx_rc_t
571 __in efx_bist_type_t type)
575 if ((rc = efx_mcdi_bist_start(enp, type)) != 0)
581 EFSYS_PROBE1(fail1, efx_rc_t, rc);
586 __checkReturn efx_rc_t
589 __in efx_bist_type_t type,
590 __out efx_bist_result_t *resultp,
591 __out_opt __drv_when(count > 0, __notnull)
592 uint32_t *value_maskp,
593 __out_ecount_opt(count) __drv_when(count > 0, __notnull)
594 unsigned long *valuesp,
597 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
599 uint8_t payload[MAX(MC_CMD_POLL_BIST_IN_LEN,
600 MCDI_CTL_SDU_LEN_MAX)];
601 uint32_t value_mask = 0;
605 (void) memset(payload, 0, sizeof (payload));
606 req.emr_cmd = MC_CMD_POLL_BIST;
607 req.emr_in_buf = payload;
608 req.emr_in_length = MC_CMD_POLL_BIST_IN_LEN;
609 req.emr_out_buf = payload;
610 req.emr_out_length = MCDI_CTL_SDU_LEN_MAX;
612 efx_mcdi_execute(enp, &req);
614 if (req.emr_rc != 0) {
619 if (req.emr_out_length_used < MC_CMD_POLL_BIST_OUT_RESULT_OFST + 4) {
625 (void) memset(valuesp, '\0', count * sizeof (unsigned long));
627 result = MCDI_OUT_DWORD(req, POLL_BIST_OUT_RESULT);
629 if (result == MC_CMD_POLL_BIST_FAILED &&
630 req.emr_out_length >= MC_CMD_POLL_BIST_OUT_MEM_LEN &&
631 count > EFX_BIST_MEM_ECC_FATAL) {
632 if (valuesp != NULL) {
633 valuesp[EFX_BIST_MEM_TEST] =
634 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_TEST);
635 valuesp[EFX_BIST_MEM_ADDR] =
636 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ADDR);
637 valuesp[EFX_BIST_MEM_BUS] =
638 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_BUS);
639 valuesp[EFX_BIST_MEM_EXPECT] =
640 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_EXPECT);
641 valuesp[EFX_BIST_MEM_ACTUAL] =
642 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ACTUAL);
643 valuesp[EFX_BIST_MEM_ECC] =
644 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ECC);
645 valuesp[EFX_BIST_MEM_ECC_PARITY] =
646 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ECC_PARITY);
647 valuesp[EFX_BIST_MEM_ECC_FATAL] =
648 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MEM_ECC_FATAL);
650 value_mask |= (1 << EFX_BIST_MEM_TEST) |
651 (1 << EFX_BIST_MEM_ADDR) |
652 (1 << EFX_BIST_MEM_BUS) |
653 (1 << EFX_BIST_MEM_EXPECT) |
654 (1 << EFX_BIST_MEM_ACTUAL) |
655 (1 << EFX_BIST_MEM_ECC) |
656 (1 << EFX_BIST_MEM_ECC_PARITY) |
657 (1 << EFX_BIST_MEM_ECC_FATAL);
658 } else if (result == MC_CMD_POLL_BIST_FAILED &&
659 encp->enc_phy_type == EFX_PHY_XFI_FARMI &&
660 req.emr_out_length >= MC_CMD_POLL_BIST_OUT_MRSFP_LEN &&
661 count > EFX_BIST_FAULT_CODE) {
663 valuesp[EFX_BIST_FAULT_CODE] =
664 MCDI_OUT_DWORD(req, POLL_BIST_OUT_MRSFP_TEST);
665 value_mask |= 1 << EFX_BIST_FAULT_CODE;
668 if (value_maskp != NULL)
669 *value_maskp = value_mask;
671 EFSYS_ASSERT(resultp != NULL);
672 if (result == MC_CMD_POLL_BIST_RUNNING)
673 *resultp = EFX_BIST_RESULT_RUNNING;
674 else if (result == MC_CMD_POLL_BIST_PASSED)
675 *resultp = EFX_BIST_RESULT_PASSED;
677 *resultp = EFX_BIST_RESULT_FAILED;
684 EFSYS_PROBE1(fail1, efx_rc_t, rc);
692 __in efx_bist_type_t type)
694 /* There is no way to stop BIST on Huntinton. */
695 _NOTE(ARGUNUSED(enp, type))
698 #endif /* EFSYS_OPT_BIST */
700 #endif /* EFSYS_OPT_HUNTINGTON */