2 * Copyright (c) 2009-2015 Solarflare Communications Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * The views and conclusions contained in the software and documentation are
27 * those of the authors and should not be interpreted as representing official
28 * policies, either expressed or implied, of the FreeBSD Project.
33 #ifndef _SYS_SIENA_IMPL_H
34 #define _SYS_SIENA_IMPL_H
39 #include "siena_flash.h"
45 #if EFSYS_OPT_PHY_PROPS
47 /* START MKCONFIG GENERATED SienaPhyHeaderPropsBlock a8db1f8eb5106efd */
48 typedef enum siena_phy_prop_e {
52 /* END MKCONFIG GENERATED SienaPhyHeaderPropsBlock */
54 #endif /* EFSYS_OPT_PHY_PROPS */
56 #define SIENA_NVRAM_CHUNK 0x80
58 extern __checkReturn efx_rc_t
62 #if EFSYS_OPT_PCIE_TUNE
64 extern __checkReturn efx_rc_t
65 siena_nic_pcie_extended_sync(
70 extern __checkReturn efx_rc_t
74 extern __checkReturn efx_rc_t
80 extern __checkReturn efx_rc_t
81 siena_nic_register_test(
84 #endif /* EFSYS_OPT_DIAG */
94 #define SIENA_SRAM_ROWS 0x12000
102 extern __checkReturn efx_rc_t
105 __in efx_sram_pattern_fn_t func);
107 #endif /* EFSYS_OPT_DIAG */
111 extern __checkReturn efx_rc_t
114 __in const efx_mcdi_transport_t *mtp);
117 siena_mcdi_send_request(
122 __in size_t sdu_len);
124 extern __checkReturn boolean_t
125 siena_mcdi_poll_response(
126 __in efx_nic_t *enp);
129 siena_mcdi_read_response(
131 __out_bcount(length) void *bufferp,
136 siena_mcdi_poll_reboot(
137 __in efx_nic_t *enp);
141 __in efx_nic_t *enp);
143 extern __checkReturn efx_rc_t
144 siena_mcdi_feature_supported(
146 __in efx_mcdi_feature_id_t id,
147 __out boolean_t *supportedp);
149 #endif /* EFSYS_OPT_MCDI */
151 #if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD
153 extern __checkReturn efx_rc_t
154 siena_nvram_partn_lock(
156 __in uint32_t partn);
158 extern __checkReturn efx_rc_t
159 siena_nvram_partn_erase(
162 __in unsigned int offset,
165 extern __checkReturn efx_rc_t
166 siena_nvram_partn_write(
169 __in unsigned int offset,
170 __out_bcount(size) caddr_t data,
174 siena_nvram_partn_unlock(
176 __in uint32_t partn);
178 extern __checkReturn efx_rc_t
179 siena_nvram_get_dynamic_cfg(
183 __out siena_mc_dynamic_config_hdr_t **dcfgp,
184 __out size_t *sizep);
186 #endif /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */
192 extern __checkReturn efx_rc_t
194 __in efx_nic_t *enp);
196 #endif /* EFSYS_OPT_DIAG */
198 extern __checkReturn efx_rc_t
199 siena_nvram_get_subtype(
202 __out uint32_t *subtypep);
204 extern __checkReturn efx_rc_t
205 siena_nvram_get_version(
207 __in efx_nvram_type_t type,
208 __out uint32_t *subtypep,
209 __out_ecount(4) uint16_t version[4]);
211 extern __checkReturn efx_rc_t
214 __in efx_nvram_type_t type);
216 extern __checkReturn efx_rc_t
217 siena_nvram_write_chunk(
219 __in efx_nvram_type_t type,
220 __in unsigned int offset,
221 __in_bcount(size) caddr_t data,
225 siena_nvram_rw_finish(
227 __in efx_nvram_type_t type);
229 extern __checkReturn efx_rc_t
230 siena_nvram_set_version(
232 __in efx_nvram_type_t type,
233 __in_ecount(4) uint16_t version[4]);
235 extern __checkReturn efx_rc_t
236 siena_nvram_type_to_partn(
238 __in efx_nvram_type_t type,
239 __out uint32_t *partnp);
241 extern __checkReturn efx_rc_t
242 siena_nvram_partn_size(
245 __out size_t *sizep);
247 extern __checkReturn efx_rc_t
248 siena_nvram_partn_rw_start(
251 __out size_t *chunk_sizep);
253 extern __checkReturn efx_rc_t
254 siena_nvram_partn_read(
257 __in unsigned int offset,
258 __out_bcount(size) caddr_t data,
261 #endif /* EFSYS_OPT_NVRAM */
265 extern __checkReturn efx_rc_t
267 __in efx_nic_t *enp);
269 extern __checkReturn efx_rc_t
272 __out size_t *sizep);
274 extern __checkReturn efx_rc_t
277 __out_bcount(size) caddr_t data,
280 extern __checkReturn efx_rc_t
283 __in_bcount(size) caddr_t data,
286 extern __checkReturn efx_rc_t
289 __in_bcount(size) caddr_t data,
292 extern __checkReturn efx_rc_t
295 __in_bcount(size) caddr_t data,
297 __inout efx_vpd_value_t *evvp);
299 extern __checkReturn efx_rc_t
302 __in_bcount(size) caddr_t data,
304 __in efx_vpd_value_t *evvp);
306 extern __checkReturn efx_rc_t
309 __in_bcount(size) caddr_t data,
311 __out efx_vpd_value_t *evvp,
312 __inout unsigned int *contp);
314 extern __checkReturn efx_rc_t
317 __in_bcount(size) caddr_t data,
322 __in efx_nic_t *enp);
324 #endif /* EFSYS_OPT_VPD */
326 typedef struct siena_link_state_s {
327 uint32_t sls_adv_cap_mask;
328 uint32_t sls_lp_cap_mask;
329 unsigned int sls_fcntl;
330 efx_link_mode_t sls_link_mode;
331 #if EFSYS_OPT_LOOPBACK
332 efx_loopback_type_t sls_loopback;
334 boolean_t sls_mac_up;
335 } siena_link_state_t;
340 __in efx_qword_t *eqp,
341 __out efx_link_mode_t *link_modep);
343 extern __checkReturn efx_rc_t
346 __out siena_link_state_t *slsp);
348 extern __checkReturn efx_rc_t
353 extern __checkReturn efx_rc_t
354 siena_phy_reconfigure(
355 __in efx_nic_t *enp);
357 extern __checkReturn efx_rc_t
359 __in efx_nic_t *enp);
361 extern __checkReturn efx_rc_t
364 __out uint32_t *ouip);
366 #if EFSYS_OPT_PHY_STATS
369 siena_phy_decode_stats(
372 __in_opt efsys_mem_t *esmp,
373 __out_opt uint64_t *smaskp,
374 __inout_ecount_opt(EFX_PHY_NSTATS) uint32_t *stat);
376 extern __checkReturn efx_rc_t
377 siena_phy_stats_update(
379 __in efsys_mem_t *esmp,
380 __inout_ecount(EFX_PHY_NSTATS) uint32_t *stat);
382 #endif /* EFSYS_OPT_PHY_STATS */
384 #if EFSYS_OPT_PHY_PROPS
391 __in unsigned int id);
393 #endif /* EFSYS_OPT_NAMES */
395 extern __checkReturn efx_rc_t
398 __in unsigned int id,
400 __out uint32_t *valp);
402 extern __checkReturn efx_rc_t
405 __in unsigned int id,
408 #endif /* EFSYS_OPT_PHY_PROPS */
412 extern __checkReturn efx_rc_t
413 siena_phy_bist_start(
415 __in efx_bist_type_t type);
417 extern __checkReturn efx_rc_t
420 __in efx_bist_type_t type,
421 __out efx_bist_result_t *resultp,
422 __out_opt __drv_when(count > 0, __notnull)
423 uint32_t *value_maskp,
424 __out_ecount_opt(count) __drv_when(count > 0, __notnull)
425 unsigned long *valuesp,
431 __in efx_bist_type_t type);
433 #endif /* EFSYS_OPT_BIST */
435 extern __checkReturn efx_rc_t
438 __out efx_link_mode_t *link_modep);
440 extern __checkReturn efx_rc_t
443 __out boolean_t *mac_upp);
445 extern __checkReturn efx_rc_t
446 siena_mac_reconfigure(
447 __in efx_nic_t *enp);
449 #if EFSYS_OPT_LOOPBACK
451 extern __checkReturn efx_rc_t
452 siena_mac_loopback_set(
454 __in efx_link_mode_t link_mode,
455 __in efx_loopback_type_t loopback_type);
457 #endif /* EFSYS_OPT_LOOPBACK */
459 #if EFSYS_OPT_MAC_STATS
461 extern __checkReturn efx_rc_t
462 siena_mac_stats_update(
464 __in efsys_mem_t *esmp,
465 __inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat,
466 __inout_opt uint32_t *generationp);
468 #endif /* EFSYS_OPT_MAC_STATS */
474 #endif /* _SYS_SIENA_IMPL_H */