2 * Copyright (c) 2009-2015 Solarflare Communications Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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33 #ifndef _SYS_SIENA_IMPL_H
34 #define _SYS_SIENA_IMPL_H
39 #include "siena_flash.h"
45 #if EFSYS_OPT_PHY_PROPS
47 /* START MKCONFIG GENERATED SienaPhyHeaderPropsBlock a8db1f8eb5106efd */
48 typedef enum siena_phy_prop_e {
52 /* END MKCONFIG GENERATED SienaPhyHeaderPropsBlock */
54 #endif /* EFSYS_OPT_PHY_PROPS */
56 #define SIENA_NVRAM_CHUNK 0x80
58 extern __checkReturn efx_rc_t
62 #if EFSYS_OPT_PCIE_TUNE
64 extern __checkReturn efx_rc_t
65 siena_nic_pcie_extended_sync(
70 extern __checkReturn efx_rc_t
74 extern __checkReturn efx_rc_t
80 extern __checkReturn efx_rc_t
81 siena_nic_register_test(
84 #endif /* EFSYS_OPT_DIAG */
94 #define SIENA_SRAM_ROWS 0x12000
102 extern __checkReturn efx_rc_t
105 __in efx_sram_pattern_fn_t func);
107 #endif /* EFSYS_OPT_DIAG */
111 extern __checkReturn efx_rc_t
114 __in const efx_mcdi_transport_t *mtp);
117 siena_mcdi_send_request(
122 __in size_t sdu_len);
124 extern __checkReturn boolean_t
125 siena_mcdi_poll_response(
126 __in efx_nic_t *enp);
129 siena_mcdi_read_response(
131 __out_bcount(length) void *bufferp,
136 siena_mcdi_poll_reboot(
137 __in efx_nic_t *enp);
141 __in efx_nic_t *enp);
143 extern __checkReturn efx_rc_t
144 siena_mcdi_feature_supported(
146 __in efx_mcdi_feature_id_t id,
147 __out boolean_t *supportedp);
149 #endif /* EFSYS_OPT_MCDI */
151 #if EFSYS_OPT_NVRAM || EFSYS_OPT_VPD
153 extern __checkReturn efx_rc_t
154 siena_nvram_partn_lock(
156 __in uint32_t partn);
159 siena_nvram_partn_unlock(
161 __in uint32_t partn);
163 extern __checkReturn efx_rc_t
164 siena_nvram_get_dynamic_cfg(
168 __out siena_mc_dynamic_config_hdr_t **dcfgp,
169 __out size_t *sizep);
171 #endif /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */
177 extern __checkReturn efx_rc_t
179 __in efx_nic_t *enp);
181 #endif /* EFSYS_OPT_DIAG */
183 extern __checkReturn efx_rc_t
184 siena_nvram_get_subtype(
187 __out uint32_t *subtypep);
189 extern __checkReturn efx_rc_t
190 siena_nvram_get_version(
192 __in efx_nvram_type_t type,
193 __out uint32_t *subtypep,
194 __out_ecount(4) uint16_t version[4]);
196 extern __checkReturn efx_rc_t
197 siena_nvram_set_version(
199 __in efx_nvram_type_t type,
200 __in_ecount(4) uint16_t version[4]);
202 extern __checkReturn efx_rc_t
203 siena_nvram_type_to_partn(
205 __in efx_nvram_type_t type,
206 __out uint32_t *partnp);
208 extern __checkReturn efx_rc_t
209 siena_nvram_partn_size(
212 __out size_t *sizep);
214 extern __checkReturn efx_rc_t
215 siena_nvram_partn_rw_start(
218 __out size_t *chunk_sizep);
220 extern __checkReturn efx_rc_t
221 siena_nvram_partn_read(
224 __in unsigned int offset,
225 __out_bcount(size) caddr_t data,
228 extern __checkReturn efx_rc_t
229 siena_nvram_partn_erase(
232 __in unsigned int offset,
235 extern __checkReturn efx_rc_t
236 siena_nvram_partn_write(
239 __in unsigned int offset,
240 __out_bcount(size) caddr_t data,
244 siena_nvram_partn_rw_finish(
246 __in uint32_t partn);
249 #endif /* EFSYS_OPT_NVRAM */
253 extern __checkReturn efx_rc_t
255 __in efx_nic_t *enp);
257 extern __checkReturn efx_rc_t
260 __out size_t *sizep);
262 extern __checkReturn efx_rc_t
265 __out_bcount(size) caddr_t data,
268 extern __checkReturn efx_rc_t
271 __in_bcount(size) caddr_t data,
274 extern __checkReturn efx_rc_t
277 __in_bcount(size) caddr_t data,
280 extern __checkReturn efx_rc_t
283 __in_bcount(size) caddr_t data,
285 __inout efx_vpd_value_t *evvp);
287 extern __checkReturn efx_rc_t
290 __in_bcount(size) caddr_t data,
292 __in efx_vpd_value_t *evvp);
294 extern __checkReturn efx_rc_t
297 __in_bcount(size) caddr_t data,
299 __out efx_vpd_value_t *evvp,
300 __inout unsigned int *contp);
302 extern __checkReturn efx_rc_t
305 __in_bcount(size) caddr_t data,
310 __in efx_nic_t *enp);
312 #endif /* EFSYS_OPT_VPD */
314 typedef struct siena_link_state_s {
315 uint32_t sls_adv_cap_mask;
316 uint32_t sls_lp_cap_mask;
317 unsigned int sls_fcntl;
318 efx_link_mode_t sls_link_mode;
319 #if EFSYS_OPT_LOOPBACK
320 efx_loopback_type_t sls_loopback;
322 boolean_t sls_mac_up;
323 } siena_link_state_t;
328 __in efx_qword_t *eqp,
329 __out efx_link_mode_t *link_modep);
331 extern __checkReturn efx_rc_t
334 __out siena_link_state_t *slsp);
336 extern __checkReturn efx_rc_t
341 extern __checkReturn efx_rc_t
342 siena_phy_reconfigure(
343 __in efx_nic_t *enp);
345 extern __checkReturn efx_rc_t
347 __in efx_nic_t *enp);
349 extern __checkReturn efx_rc_t
352 __out uint32_t *ouip);
354 #if EFSYS_OPT_PHY_STATS
357 siena_phy_decode_stats(
360 __in_opt efsys_mem_t *esmp,
361 __out_opt uint64_t *smaskp,
362 __inout_ecount_opt(EFX_PHY_NSTATS) uint32_t *stat);
364 extern __checkReturn efx_rc_t
365 siena_phy_stats_update(
367 __in efsys_mem_t *esmp,
368 __inout_ecount(EFX_PHY_NSTATS) uint32_t *stat);
370 #endif /* EFSYS_OPT_PHY_STATS */
372 #if EFSYS_OPT_PHY_PROPS
379 __in unsigned int id);
381 #endif /* EFSYS_OPT_NAMES */
383 extern __checkReturn efx_rc_t
386 __in unsigned int id,
388 __out uint32_t *valp);
390 extern __checkReturn efx_rc_t
393 __in unsigned int id,
396 #endif /* EFSYS_OPT_PHY_PROPS */
400 extern __checkReturn efx_rc_t
401 siena_phy_bist_start(
403 __in efx_bist_type_t type);
405 extern __checkReturn efx_rc_t
408 __in efx_bist_type_t type,
409 __out efx_bist_result_t *resultp,
410 __out_opt __drv_when(count > 0, __notnull)
411 uint32_t *value_maskp,
412 __out_ecount_opt(count) __drv_when(count > 0, __notnull)
413 unsigned long *valuesp,
419 __in efx_bist_type_t type);
421 #endif /* EFSYS_OPT_BIST */
423 extern __checkReturn efx_rc_t
426 __out efx_link_mode_t *link_modep);
428 extern __checkReturn efx_rc_t
431 __out boolean_t *mac_upp);
433 extern __checkReturn efx_rc_t
434 siena_mac_reconfigure(
435 __in efx_nic_t *enp);
437 #if EFSYS_OPT_LOOPBACK
439 extern __checkReturn efx_rc_t
440 siena_mac_loopback_set(
442 __in efx_link_mode_t link_mode,
443 __in efx_loopback_type_t loopback_type);
445 #endif /* EFSYS_OPT_LOOPBACK */
447 #if EFSYS_OPT_MAC_STATS
449 extern __checkReturn efx_rc_t
450 siena_mac_stats_update(
452 __in efsys_mem_t *esmp,
453 __inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat,
454 __inout_opt uint32_t *generationp);
456 #endif /* EFSYS_OPT_MAC_STATS */
462 #endif /* _SYS_SIENA_IMPL_H */