2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2009-2016 Solarflare Communications Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are met:
10 * 1. Redistributions of source code must retain the above copyright notice,
11 * this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright notice,
13 * this list of conditions and the following disclaimer in the documentation
14 * and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
18 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
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21 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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23 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
25 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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28 * The views and conclusions contained in the software and documentation are
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30 * policies, either expressed or implied, of the FreeBSD Project.
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
41 __checkReturn efx_rc_t
44 __out efx_link_mode_t *link_modep)
46 efx_port_t *epp = &(enp->en_port);
47 siena_link_state_t sls;
50 if ((rc = siena_phy_get_link(enp, &sls)) != 0)
53 epp->ep_adv_cap_mask = sls.sls_adv_cap_mask;
54 epp->ep_fcntl = sls.sls_fcntl;
56 *link_modep = sls.sls_link_mode;
61 EFSYS_PROBE1(fail1, efx_rc_t, rc);
63 *link_modep = EFX_LINK_UNKNOWN;
68 __checkReturn efx_rc_t
71 __out boolean_t *mac_upp)
73 siena_link_state_t sls;
77 * Because Siena doesn't *require* polling, we can't rely on
78 * siena_mac_poll() being executed to populate epp->ep_mac_up.
80 if ((rc = siena_phy_get_link(enp, &sls)) != 0)
83 *mac_upp = sls.sls_mac_up;
88 EFSYS_PROBE1(fail1, efx_rc_t, rc);
93 __checkReturn efx_rc_t
94 siena_mac_reconfigure(
97 efx_port_t *epp = &(enp->en_port);
98 efx_oword_t multicast_hash[2];
100 uint8_t payload[MAX(MAX(MC_CMD_SET_MAC_IN_LEN,
101 MC_CMD_SET_MAC_OUT_LEN),
102 MAX(MC_CMD_SET_MCAST_HASH_IN_LEN,
103 MC_CMD_SET_MCAST_HASH_OUT_LEN))];
107 (void) memset(payload, 0, sizeof (payload));
108 req.emr_cmd = MC_CMD_SET_MAC;
109 req.emr_in_buf = payload;
110 req.emr_in_length = MC_CMD_SET_MAC_IN_LEN;
111 req.emr_out_buf = payload;
112 req.emr_out_length = MC_CMD_SET_MAC_OUT_LEN;
114 MCDI_IN_SET_DWORD(req, SET_MAC_IN_MTU, epp->ep_mac_pdu);
115 MCDI_IN_SET_DWORD(req, SET_MAC_IN_DRAIN, epp->ep_mac_drain ? 1 : 0);
116 EFX_MAC_ADDR_COPY(MCDI_IN2(req, uint8_t, SET_MAC_IN_ADDR),
118 MCDI_IN_POPULATE_DWORD_2(req, SET_MAC_IN_REJECT,
119 SET_MAC_IN_REJECT_UNCST, !epp->ep_all_unicst,
120 SET_MAC_IN_REJECT_BRDCST, !epp->ep_brdcst);
122 if (epp->ep_fcntl_autoneg)
123 /* efx_fcntl_set() has already set the phy capabilities */
124 fcntl = MC_CMD_FCNTL_AUTO;
125 else if (epp->ep_fcntl & EFX_FCNTL_RESPOND)
126 fcntl = (epp->ep_fcntl & EFX_FCNTL_GENERATE)
128 : MC_CMD_FCNTL_RESPOND;
130 fcntl = MC_CMD_FCNTL_OFF;
132 MCDI_IN_SET_DWORD(req, SET_MAC_IN_FCNTL, fcntl);
134 efx_mcdi_execute(enp, &req);
136 if (req.emr_rc != 0) {
141 /* Push multicast hash */
143 if (epp->ep_all_mulcst) {
144 /* A hash matching all multicast is all 1s */
145 EFX_SET_OWORD(multicast_hash[0]);
146 EFX_SET_OWORD(multicast_hash[1]);
147 } else if (epp->ep_mulcst) {
148 /* Use the hash set by the multicast list */
149 multicast_hash[0] = epp->ep_multicst_hash[0];
150 multicast_hash[1] = epp->ep_multicst_hash[1];
152 /* A hash matching no traffic is simply 0 */
153 EFX_ZERO_OWORD(multicast_hash[0]);
154 EFX_ZERO_OWORD(multicast_hash[1]);
158 * Broadcast packets go through the multicast hash filter.
159 * The IEEE 802.3 CRC32 of the broadcast address is 0xbe2612ff
160 * so we always add bit 0xff to the mask (bit 0x7f in the
163 if (epp->ep_brdcst) {
165 * NOTE: due to constant folding, some of this evaluates
166 * to null expressions, giving E_EXPR_NULL_EFFECT during
167 * lint on Illumos. No good way to fix this without
168 * explicit coding the individual word/bit setting.
169 * So just suppress lint for this one line.
172 EFX_SET_OWORD_BIT(multicast_hash[1], 0x7f);
175 (void) memset(payload, 0, sizeof (payload));
176 req.emr_cmd = MC_CMD_SET_MCAST_HASH;
177 req.emr_in_buf = payload;
178 req.emr_in_length = MC_CMD_SET_MCAST_HASH_IN_LEN;
179 req.emr_out_buf = payload;
180 req.emr_out_length = MC_CMD_SET_MCAST_HASH_OUT_LEN;
182 memcpy(MCDI_IN2(req, uint8_t, SET_MCAST_HASH_IN_HASH0),
183 multicast_hash, sizeof (multicast_hash));
185 efx_mcdi_execute(enp, &req);
187 if (req.emr_rc != 0) {
197 EFSYS_PROBE1(fail1, efx_rc_t, rc);
202 #if EFSYS_OPT_LOOPBACK
204 __checkReturn efx_rc_t
205 siena_mac_loopback_set(
207 __in efx_link_mode_t link_mode,
208 __in efx_loopback_type_t loopback_type)
210 efx_port_t *epp = &(enp->en_port);
211 const efx_phy_ops_t *epop = epp->ep_epop;
212 efx_loopback_type_t old_loopback_type;
213 efx_link_mode_t old_loopback_link_mode;
216 /* The PHY object handles this on Siena */
217 old_loopback_type = epp->ep_loopback_type;
218 old_loopback_link_mode = epp->ep_loopback_link_mode;
219 epp->ep_loopback_type = loopback_type;
220 epp->ep_loopback_link_mode = link_mode;
222 if ((rc = epop->epo_reconfigure(enp)) != 0)
228 EFSYS_PROBE1(fail1, efx_rc_t, rc);
230 epp->ep_loopback_type = old_loopback_type;
231 epp->ep_loopback_link_mode = old_loopback_link_mode;
236 #endif /* EFSYS_OPT_LOOPBACK */
238 #if EFSYS_OPT_MAC_STATS
240 __checkReturn efx_rc_t
241 siena_mac_stats_get_mask(
243 __inout_bcount(mask_size) uint32_t *maskp,
244 __in size_t mask_size)
246 const struct efx_mac_stats_range siena_stats[] = {
247 { EFX_MAC_RX_OCTETS, EFX_MAC_RX_GE_15XX_PKTS },
248 /* EFX_MAC_RX_ERRORS is not supported */
249 { EFX_MAC_RX_FCS_ERRORS, EFX_MAC_TX_EX_DEF_PKTS },
253 _NOTE(ARGUNUSED(enp))
255 if ((rc = efx_mac_stats_mask_add_ranges(maskp, mask_size,
256 siena_stats, EFX_ARRAY_SIZE(siena_stats))) != 0)
262 EFSYS_PROBE1(fail1, efx_rc_t, rc);
267 #define SIENA_MAC_STAT_READ(_esmp, _field, _eqp) \
268 EFSYS_MEM_READQ((_esmp), (_field) * sizeof (efx_qword_t), _eqp)
270 __checkReturn efx_rc_t
271 siena_mac_stats_update(
273 __in efsys_mem_t *esmp,
274 __inout_ecount(EFX_MAC_NSTATS) efsys_stat_t *stat,
275 __inout_opt uint32_t *generationp)
278 efx_qword_t generation_start;
279 efx_qword_t generation_end;
281 _NOTE(ARGUNUSED(enp))
283 /* Read END first so we don't race with the MC */
284 EFSYS_DMA_SYNC_FOR_KERNEL(esmp, 0, EFX_MAC_STATS_SIZE);
285 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_GENERATION_END,
287 EFSYS_MEM_READ_BARRIER();
290 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_PKTS, &value);
291 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_PKTS]), &value);
292 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_CONTROL_PKTS, &value);
293 EFSYS_STAT_SUBR_QWORD(&(stat[EFX_MAC_TX_PKTS]), &value);
295 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_PAUSE_PKTS, &value);
296 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_PAUSE_PKTS]), &value);
298 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_UNICAST_PKTS, &value);
299 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_UNICST_PKTS]), &value);
301 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_MULTICAST_PKTS, &value);
302 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_MULTICST_PKTS]), &value);
304 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_BROADCAST_PKTS, &value);
305 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_BRDCST_PKTS]), &value);
307 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_BYTES, &value);
308 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_OCTETS]), &value);
310 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_LT64_PKTS, &value);
311 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_LE_64_PKTS]), &value);
312 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_64_PKTS, &value);
313 EFSYS_STAT_INCR_QWORD(&(stat[EFX_MAC_TX_LE_64_PKTS]), &value);
315 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_65_TO_127_PKTS, &value);
316 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_65_TO_127_PKTS]), &value);
318 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_128_TO_255_PKTS, &value);
319 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_128_TO_255_PKTS]), &value);
321 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_256_TO_511_PKTS, &value);
322 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_256_TO_511_PKTS]), &value);
324 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_512_TO_1023_PKTS, &value);
325 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_512_TO_1023_PKTS]), &value);
327 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_1024_TO_15XX_PKTS, &value);
328 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_1024_TO_15XX_PKTS]), &value);
330 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_15XX_TO_JUMBO_PKTS, &value);
331 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_GE_15XX_PKTS]), &value);
332 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_GTJUMBO_PKTS, &value);
333 EFSYS_STAT_INCR_QWORD(&(stat[EFX_MAC_TX_GE_15XX_PKTS]), &value);
335 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_BAD_FCS_PKTS, &value);
336 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_ERRORS]), &value);
338 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_SINGLE_COLLISION_PKTS, &value);
339 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_SGL_COL_PKTS]), &value);
341 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_MULTIPLE_COLLISION_PKTS,
343 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_MULT_COL_PKTS]), &value);
345 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_EXCESSIVE_COLLISION_PKTS,
347 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_EX_COL_PKTS]), &value);
349 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_LATE_COLLISION_PKTS, &value);
350 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_LATE_COL_PKTS]), &value);
352 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_DEFERRED_PKTS, &value);
353 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_DEF_PKTS]), &value);
355 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_EXCESSIVE_DEFERRED_PKTS,
357 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_EX_DEF_PKTS]), &value);
360 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_BYTES, &value);
361 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_OCTETS]), &value);
363 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_PKTS, &value);
364 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_PKTS]), &value);
366 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_UNICAST_PKTS, &value);
367 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_UNICST_PKTS]), &value);
369 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_MULTICAST_PKTS, &value);
370 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_MULTICST_PKTS]), &value);
372 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_BROADCAST_PKTS, &value);
373 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_BRDCST_PKTS]), &value);
375 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_PAUSE_PKTS, &value);
376 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_PAUSE_PKTS]), &value);
378 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_UNDERSIZE_PKTS, &value);
379 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_LE_64_PKTS]), &value);
380 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_64_PKTS, &value);
381 EFSYS_STAT_INCR_QWORD(&(stat[EFX_MAC_RX_LE_64_PKTS]), &value);
383 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_65_TO_127_PKTS, &value);
384 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_65_TO_127_PKTS]), &value);
386 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_128_TO_255_PKTS, &value);
387 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_128_TO_255_PKTS]), &value);
389 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_256_TO_511_PKTS, &value);
390 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_256_TO_511_PKTS]), &value);
392 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_512_TO_1023_PKTS, &value);
393 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_512_TO_1023_PKTS]), &value);
395 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_1024_TO_15XX_PKTS, &value);
396 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_1024_TO_15XX_PKTS]), &value);
398 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_15XX_TO_JUMBO_PKTS, &value);
399 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_GE_15XX_PKTS]), &value);
400 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_GTJUMBO_PKTS, &value);
401 EFSYS_STAT_INCR_QWORD(&(stat[EFX_MAC_RX_GE_15XX_PKTS]), &value);
403 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_BAD_FCS_PKTS, &value);
404 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_FCS_ERRORS]), &value);
406 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_OVERFLOW_PKTS, &value);
407 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_DROP_EVENTS]), &value);
409 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_FALSE_CARRIER_PKTS, &value);
410 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_FALSE_CARRIER_ERRORS]), &value);
412 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_SYMBOL_ERROR_PKTS, &value);
413 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_SYMBOL_ERRORS]), &value);
415 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_ALIGN_ERROR_PKTS, &value);
416 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_ALIGN_ERRORS]), &value);
418 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_INTERNAL_ERROR_PKTS, &value);
419 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_INTERNAL_ERRORS]), &value);
421 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_JABBER_PKTS, &value);
422 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_JABBER_PKTS]), &value);
424 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES01_CHAR_ERR, &value);
425 EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE0_CHAR_ERR]),
426 &(value.eq_dword[0]));
427 EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE1_CHAR_ERR]),
428 &(value.eq_dword[1]));
430 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES23_CHAR_ERR, &value);
431 EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE2_CHAR_ERR]),
432 &(value.eq_dword[0]));
433 EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE3_CHAR_ERR]),
434 &(value.eq_dword[1]));
436 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES01_DISP_ERR, &value);
437 EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE0_DISP_ERR]),
438 &(value.eq_dword[0]));
439 EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE1_DISP_ERR]),
440 &(value.eq_dword[1]));
442 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES23_DISP_ERR, &value);
443 EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE2_DISP_ERR]),
444 &(value.eq_dword[0]));
445 EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE3_DISP_ERR]),
446 &(value.eq_dword[1]));
448 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_MATCH_FAULT, &value);
449 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_MATCH_FAULT]), &value);
451 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_NODESC_DROPS, &value);
452 EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_NODESC_DROP_CNT]), &value);
454 EFSYS_DMA_SYNC_FOR_KERNEL(esmp, 0, EFX_MAC_STATS_SIZE);
455 EFSYS_MEM_READ_BARRIER();
456 SIENA_MAC_STAT_READ(esmp, MC_CMD_MAC_GENERATION_START,
459 /* Check that we didn't read the stats in the middle of a DMA */
460 /* Not a good enough check ? */
461 if (memcmp(&generation_start, &generation_end,
462 sizeof (generation_start)))
466 *generationp = EFX_QWORD_FIELD(generation_start, EFX_DWORD_0);
471 #endif /* EFSYS_OPT_MAC_STATS */
473 __checkReturn efx_rc_t
481 #endif /* EFSYS_OPT_SIENA */