sys/dev/sfxge/common/siena_nvram.c

   1 /*-
   2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
   3  *
   4  * Copyright (c) 2009-2016 Solarflare Communications Inc.
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions are met:
   9  *
  10  * 1. Redistributions of source code must retain the above copyright notice,
  11  *    this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright notice,
  13  *    this list of conditions and the following disclaimer in the documentation
  14  *    and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  17  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  18  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  19  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
  20  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  21  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  22  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  23  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  24  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  25  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
  26  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * The views and conclusions contained in the software and documentation are
  29  * those of the authors and should not be interpreted as representing official
  30  * policies, either expressed or implied, of the FreeBSD Project.
  31  */
  32
  33 #include <sys/cdefs.h>
  34 __FBSDID("$FreeBSD$");
  35
  36 #include "efx.h"
  37 #include "efx_impl.h"
  38
  39 #if EFSYS_OPT_SIENA
  40
  41 #if EFSYS_OPT_VPD || EFSYS_OPT_NVRAM
  42
  43         __checkReturn           efx_rc_t
  44 siena_nvram_partn_size(
  45         __in                    efx_nic_t *enp,
  46         __in                    uint32_t partn,
  47         __out                   size_t *sizep)
  48 {
  49         efx_rc_t rc;
  50
  51         if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) {
  52                 rc = ENOTSUP;
  53                 goto fail1;
  54         }
  55
  56         if ((rc = efx_mcdi_nvram_info(enp, partn, sizep,
  57             NULL, NULL, NULL)) != 0) {
  58                 goto fail2;
  59         }
  60
  61         return (0);
  62
  63 fail2:
  64         EFSYS_PROBE(fail2);
  65 fail1:
  66         EFSYS_PROBE1(fail1, efx_rc_t, rc);
  67
  68         return (rc);
  69 }
  70
  71         __checkReturn           efx_rc_t
  72 siena_nvram_partn_lock(
  73         __in                    efx_nic_t *enp,
  74         __in                    uint32_t partn)
  75 {
  76         efx_rc_t rc;
  77
  78         if ((rc = efx_mcdi_nvram_update_start(enp, partn)) != 0) {
  79                 goto fail1;
  80         }
  81
  82         return (0);
  83
  84 fail1:
  85         EFSYS_PROBE1(fail1, efx_rc_t, rc);
  86
  87         return (rc);
  88 }
  89
  90         __checkReturn           efx_rc_t
  91 siena_nvram_partn_read(
  92         __in                    efx_nic_t *enp,
  93         __in                    uint32_t partn,
  94         __in                    unsigned int offset,
  95         __out_bcount(size)      caddr_t data,
  96         __in                    size_t size)
  97 {
  98         size_t chunk;
  99         efx_rc_t rc;
 100
 101         while (size > 0) {
 102                 chunk = MIN(size, SIENA_NVRAM_CHUNK);
 103
 104                 if ((rc = efx_mcdi_nvram_read(enp, partn, offset, data, chunk,
 105                             MC_CMD_NVRAM_READ_IN_V2_DEFAULT)) != 0) {
 106                         goto fail1;
 107                 }
 108
 109                 size -= chunk;
 110                 data += chunk;
 111                 offset += chunk;
 112         }
 113
 114         return (0);
 115
 116 fail1:
 117         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 118
 119         return (rc);
 120 }
 121
 122         __checkReturn           efx_rc_t
 123 siena_nvram_partn_erase(
 124         __in                    efx_nic_t *enp,
 125         __in                    uint32_t partn,
 126         __in                    unsigned int offset,
 127         __in                    size_t size)
 128 {
 129         efx_rc_t rc;
 130
 131         if ((rc = efx_mcdi_nvram_erase(enp, partn, offset, size)) != 0) {
 132                 goto fail1;
 133         }
 134
 135         return (0);
 136
 137 fail1:
 138         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 139
 140         return (rc);
 141 }
 142
 143         __checkReturn           efx_rc_t
 144 siena_nvram_partn_write(
 145         __in                    efx_nic_t *enp,
 146         __in                    uint32_t partn,
 147         __in                    unsigned int offset,
 148         __out_bcount(size)      caddr_t data,
 149         __in                    size_t size)
 150 {
 151         size_t chunk;
 152         efx_rc_t rc;
 153
 154         while (size > 0) {
 155                 chunk = MIN(size, SIENA_NVRAM_CHUNK);
 156
 157                 if ((rc = efx_mcdi_nvram_write(enp, partn, offset,
 158                             data, chunk)) != 0) {
 159                         goto fail1;
 160                 }
 161
 162                 size -= chunk;
 163                 data += chunk;
 164                 offset += chunk;
 165         }
 166
 167         return (0);
 168
 169 fail1:
 170         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 171
 172         return (rc);
 173 }
 174
 175         __checkReturn           efx_rc_t
 176 siena_nvram_partn_unlock(
 177         __in                    efx_nic_t *enp,
 178         __in                    uint32_t partn,
 179         __out_opt               uint32_t *verify_resultp)
 180 {
 181         boolean_t reboot;
 182         efx_rc_t rc;
 183
 184         /*
 185          * Reboot into the new image only for PHYs. The driver has to
 186          * explicitly cope with an MC reboot after a firmware update.
 187          */
 188         reboot = (partn == MC_CMD_NVRAM_TYPE_PHY_PORT0 ||
 189                     partn == MC_CMD_NVRAM_TYPE_PHY_PORT1 ||
 190                     partn == MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO);
 191
 192         rc = efx_mcdi_nvram_update_finish(enp, partn, reboot, verify_resultp);
 193         if (rc != 0)
 194                 goto fail1;
 195
 196         return (0);
 197
 198 fail1:
 199         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 200
 201         return (rc);
 202 }
 203
 204 #endif  /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */
 205
 206 #if EFSYS_OPT_NVRAM
 207
 208 typedef struct siena_parttbl_entry_s {
 209         unsigned int            partn;
 210         unsigned int            port;
 211         efx_nvram_type_t        nvtype;
 212 } siena_parttbl_entry_t;
 213
 214 static siena_parttbl_entry_t siena_parttbl[] = {
 215         {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO,   1, EFX_NVRAM_NULLPHY},
 216         {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO,   2, EFX_NVRAM_NULLPHY},
 217         {MC_CMD_NVRAM_TYPE_MC_FW,               1, EFX_NVRAM_MC_FIRMWARE},
 218         {MC_CMD_NVRAM_TYPE_MC_FW,               2, EFX_NVRAM_MC_FIRMWARE},
 219         {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP,        1, EFX_NVRAM_MC_GOLDEN},
 220         {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP,        2, EFX_NVRAM_MC_GOLDEN},
 221         {MC_CMD_NVRAM_TYPE_EXP_ROM,             1, EFX_NVRAM_BOOTROM},
 222         {MC_CMD_NVRAM_TYPE_EXP_ROM,             2, EFX_NVRAM_BOOTROM},
 223         {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0,   1, EFX_NVRAM_BOOTROM_CFG},
 224         {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1,   2, EFX_NVRAM_BOOTROM_CFG},
 225         {MC_CMD_NVRAM_TYPE_PHY_PORT0,           1, EFX_NVRAM_PHY},
 226         {MC_CMD_NVRAM_TYPE_PHY_PORT1,           2, EFX_NVRAM_PHY},
 227         {MC_CMD_NVRAM_TYPE_FPGA,                1, EFX_NVRAM_FPGA},
 228         {MC_CMD_NVRAM_TYPE_FPGA,                2, EFX_NVRAM_FPGA},
 229         {MC_CMD_NVRAM_TYPE_FPGA_BACKUP,         1, EFX_NVRAM_FPGA_BACKUP},
 230         {MC_CMD_NVRAM_TYPE_FPGA_BACKUP,         2, EFX_NVRAM_FPGA_BACKUP},
 231         {MC_CMD_NVRAM_TYPE_FC_FW,               1, EFX_NVRAM_FCFW},
 232         {MC_CMD_NVRAM_TYPE_FC_FW,               2, EFX_NVRAM_FCFW},
 233         {MC_CMD_NVRAM_TYPE_CPLD,                1, EFX_NVRAM_CPLD},
 234         {MC_CMD_NVRAM_TYPE_CPLD,                2, EFX_NVRAM_CPLD},
 235         {MC_CMD_NVRAM_TYPE_LICENSE,             1, EFX_NVRAM_LICENSE},
 236         {MC_CMD_NVRAM_TYPE_LICENSE,             2, EFX_NVRAM_LICENSE}
 237 };
 238
 239         __checkReturn           efx_rc_t
 240 siena_nvram_type_to_partn(
 241         __in                    efx_nic_t *enp,
 242         __in                    efx_nvram_type_t type,
 243         __out                   uint32_t *partnp)
 244 {
 245         efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
 246         unsigned int i;
 247
 248         EFSYS_ASSERT3U(type, !=, EFX_NVRAM_INVALID);
 249         EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
 250         EFSYS_ASSERT(partnp != NULL);
 251
 252         for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
 253                 siena_parttbl_entry_t *entry = &siena_parttbl[i];
 254
 255                 if (entry->port == emip->emi_port && entry->nvtype == type) {
 256                         *partnp = entry->partn;
 257                         return (0);
 258                 }
 259         }
 260
 261         return (ENOTSUP);
 262 }
 263
 264
 265 #if EFSYS_OPT_DIAG
 266
 267         __checkReturn           efx_rc_t
 268 siena_nvram_test(
 269         __in                    efx_nic_t *enp)
 270 {
 271         efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
 272         siena_parttbl_entry_t *entry;
 273         unsigned int i;
 274         efx_rc_t rc;
 275
 276         /*
 277          * Iterate over the list of supported partition types
 278          * applicable to *this* port
 279          */
 280         for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
 281                 entry = &siena_parttbl[i];
 282
 283                 if (entry->port != emip->emi_port ||
 284                     !(enp->en_u.siena.enu_partn_mask & (1 << entry->partn)))
 285                         continue;
 286
 287                 if ((rc = efx_mcdi_nvram_test(enp, entry->partn)) != 0) {
 288                         goto fail1;
 289                 }
 290         }
 291
 292         return (0);
 293
 294 fail1:
 295         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 296
 297         return (rc);
 298 }
 299
 300 #endif  /* EFSYS_OPT_DIAG */
 301
 302
 303 #define SIENA_DYNAMIC_CFG_SIZE(_nitems)                                 \
 304         (sizeof (siena_mc_dynamic_config_hdr_t) + ((_nitems) *          \
 305         sizeof (((siena_mc_dynamic_config_hdr_t *)NULL)->fw_version[0])))
 306
 307         __checkReturn           efx_rc_t
 308 siena_nvram_get_dynamic_cfg(
 309         __in                    efx_nic_t *enp,
 310         __in                    uint32_t partn,
 311         __in                    boolean_t vpd,
 312         __out                   siena_mc_dynamic_config_hdr_t **dcfgp,
 313         __out                   size_t *sizep)
 314 {
 315         siena_mc_dynamic_config_hdr_t *dcfg = NULL;
 316         size_t size;
 317         uint8_t cksum;
 318         unsigned int vpd_offset;
 319         unsigned int vpd_length;
 320         unsigned int hdr_length;
 321         unsigned int nversions;
 322         unsigned int pos;
 323         unsigned int region;
 324         efx_rc_t rc;
 325
 326         EFSYS_ASSERT(partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 ||
 327                     partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1);
 328
 329         /*
 330          * Allocate sufficient memory for the entire dynamiccfg area, even
 331          * if we're not actually going to read in the VPD.
 332          */
 333         if ((rc = siena_nvram_partn_size(enp, partn, &size)) != 0)
 334                 goto fail1;
 335
 336         EFSYS_KMEM_ALLOC(enp->en_esip, size, dcfg);
 337         if (dcfg == NULL) {
 338                 rc = ENOMEM;
 339                 goto fail2;
 340         }
 341
 342         if ((rc = siena_nvram_partn_read(enp, partn, 0,
 343             (caddr_t)dcfg, SIENA_NVRAM_CHUNK)) != 0)
 344                 goto fail3;
 345
 346         /* Verify the magic */
 347         if (EFX_DWORD_FIELD(dcfg->magic, EFX_DWORD_0)
 348             != SIENA_MC_DYNAMIC_CONFIG_MAGIC)
 349                 goto invalid1;
 350
 351         /* All future versions of the structure must be backwards compatible */
 352         EFX_STATIC_ASSERT(SIENA_MC_DYNAMIC_CONFIG_VERSION == 0);
 353
 354         hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0);
 355         nversions = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0);
 356         vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0);
 357         vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0);
 358
 359         /* Verify the hdr doesn't overflow the partn size */
 360         if (hdr_length > size || vpd_offset > size || vpd_length > size ||
 361             vpd_length + vpd_offset > size)
 362                 goto invalid2;
 363
 364         /* Verify the header has room for all it's versions */
 365         if (hdr_length < SIENA_DYNAMIC_CFG_SIZE(0) ||
 366             hdr_length < SIENA_DYNAMIC_CFG_SIZE(nversions))
 367                 goto invalid3;
 368
 369         /*
 370          * Read the remaining portion of the dcfg, either including
 371          * the whole of VPD (there is no vpd length in this structure,
 372          * so we have to parse each tag), or just the dcfg header itself
 373          */
 374         region = vpd ? vpd_offset + vpd_length : hdr_length;
 375         if (region > SIENA_NVRAM_CHUNK) {
 376                 if ((rc = siena_nvram_partn_read(enp, partn, SIENA_NVRAM_CHUNK,
 377                     (caddr_t)dcfg + SIENA_NVRAM_CHUNK,
 378                     region - SIENA_NVRAM_CHUNK)) != 0)
 379                         goto fail4;
 380         }
 381
 382         /* Verify checksum */
 383         cksum = 0;
 384         for (pos = 0; pos < hdr_length; pos++)
 385                 cksum += ((uint8_t *)dcfg)[pos];
 386         if (cksum != 0)
 387                 goto invalid4;
 388
 389         goto done;
 390
 391 invalid4:
 392         EFSYS_PROBE(invalid4);
 393 invalid3:
 394         EFSYS_PROBE(invalid3);
 395 invalid2:
 396         EFSYS_PROBE(invalid2);
 397 invalid1:
 398         EFSYS_PROBE(invalid1);
 399
 400         /*
 401          * Construct a new "null" dcfg, with an empty version vector,
 402          * and an empty VPD chunk trailing. This has the neat side effect
 403          * of testing the exception paths in the write path.
 404          */
 405         EFX_POPULATE_DWORD_1(dcfg->magic,
 406                             EFX_DWORD_0, SIENA_MC_DYNAMIC_CONFIG_MAGIC);
 407         EFX_POPULATE_WORD_1(dcfg->length, EFX_WORD_0, sizeof (*dcfg));
 408         EFX_POPULATE_BYTE_1(dcfg->version, EFX_BYTE_0,
 409                             SIENA_MC_DYNAMIC_CONFIG_VERSION);
 410         EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset,
 411                             EFX_DWORD_0, sizeof (*dcfg));
 412         EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_length, EFX_DWORD_0, 0);
 413         EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items, EFX_DWORD_0, 0);
 414
 415 done:
 416         *dcfgp = dcfg;
 417         *sizep = size;
 418
 419         return (0);
 420
 421 fail4:
 422         EFSYS_PROBE(fail4);
 423 fail3:
 424         EFSYS_PROBE(fail3);
 425
 426         EFSYS_KMEM_FREE(enp->en_esip, size, dcfg);
 427
 428 fail2:
 429         EFSYS_PROBE(fail2);
 430 fail1:
 431         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 432
 433         return (rc);
 434 }
 435
 436         __checkReturn           efx_rc_t
 437 siena_nvram_get_subtype(
 438         __in                    efx_nic_t *enp,
 439         __in                    uint32_t partn,
 440         __out                   uint32_t *subtypep)
 441 {
 442         efx_mcdi_req_t req;
 443         uint8_t payload[MAX(MC_CMD_GET_BOARD_CFG_IN_LEN,
 444                             MC_CMD_GET_BOARD_CFG_OUT_LENMAX)];
 445         efx_word_t *fw_list;
 446         efx_rc_t rc;
 447
 448         (void) memset(payload, 0, sizeof (payload));
 449         req.emr_cmd = MC_CMD_GET_BOARD_CFG;
 450         req.emr_in_buf = payload;
 451         req.emr_in_length = MC_CMD_GET_BOARD_CFG_IN_LEN;
 452         req.emr_out_buf = payload;
 453         req.emr_out_length = MC_CMD_GET_BOARD_CFG_OUT_LENMAX;
 454
 455         efx_mcdi_execute(enp, &req);
 456
 457         if (req.emr_rc != 0) {
 458                 rc = req.emr_rc;
 459                 goto fail1;
 460         }
 461
 462         if (req.emr_out_length_used < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
 463                 rc = EMSGSIZE;
 464                 goto fail2;
 465         }
 466
 467         if (req.emr_out_length_used <
 468             MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_OFST +
 469             (partn + 1) * sizeof (efx_word_t)) {
 470                 rc = ENOENT;
 471                 goto fail3;
 472         }
 473
 474         fw_list = MCDI_OUT2(req, efx_word_t,
 475                             GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
 476         *subtypep = EFX_WORD_FIELD(fw_list[partn], EFX_WORD_0);
 477
 478         return (0);
 479
 480 fail3:
 481         EFSYS_PROBE(fail3);
 482 fail2:
 483         EFSYS_PROBE(fail2);
 484 fail1:
 485         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 486
 487         return (rc);
 488 }
 489
 490         __checkReturn           efx_rc_t
 491 siena_nvram_partn_get_version(
 492         __in                    efx_nic_t *enp,
 493         __in                    uint32_t partn,
 494         __out                   uint32_t *subtypep,
 495         __out_ecount(4)         uint16_t version[4])
 496 {
 497         siena_mc_dynamic_config_hdr_t *dcfg;
 498         siena_parttbl_entry_t *entry;
 499         uint32_t dcfg_partn;
 500         unsigned int i;
 501         efx_rc_t rc;
 502
 503         if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) {
 504                 rc = ENOTSUP;
 505                 goto fail1;
 506         }
 507
 508         if ((rc = siena_nvram_get_subtype(enp, partn, subtypep)) != 0)
 509                 goto fail2;
 510
 511         /*
 512          * Some partitions are accessible from both ports (for instance BOOTROM)
 513          * Find the highest version reported by all dcfg structures on ports
 514          * that have access to this partition.
 515          */
 516         version[0] = version[1] = version[2] = version[3] = 0;
 517         for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
 518                 siena_mc_fw_version_t *verp;
 519                 unsigned int nitems;
 520                 uint16_t temp[4];
 521                 size_t length;
 522
 523                 entry = &siena_parttbl[i];
 524                 if (entry->partn != partn)
 525                         continue;
 526
 527                 dcfg_partn = (entry->port == 1)
 528                         ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0
 529                         : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1;
 530                 /*
 531                  * Ingore missing partitions on port 2, assuming they're due
 532                  * to running on a single port part.
 533                  */
 534                 if ((1 << dcfg_partn) &  ~enp->en_u.siena.enu_partn_mask) {
 535                         if (entry->port == 2)
 536                                 continue;
 537                 }
 538
 539                 if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn,
 540                     B_FALSE, &dcfg, &length)) != 0)
 541                         goto fail3;
 542
 543                 nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items,
 544                             EFX_DWORD_0);
 545                 if (nitems < entry->partn)
 546                         goto done;
 547
 548                 verp = &dcfg->fw_version[partn];
 549                 temp[0] = EFX_WORD_FIELD(verp->version_w, EFX_WORD_0);
 550                 temp[1] = EFX_WORD_FIELD(verp->version_x, EFX_WORD_0);
 551                 temp[2] = EFX_WORD_FIELD(verp->version_y, EFX_WORD_0);
 552                 temp[3] = EFX_WORD_FIELD(verp->version_z, EFX_WORD_0);
 553                 if (memcmp(version, temp, sizeof (temp)) < 0)
 554                         memcpy(version, temp, sizeof (temp));
 555
 556 done:
 557                 EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
 558         }
 559
 560         return (0);
 561
 562 fail3:
 563         EFSYS_PROBE(fail3);
 564 fail2:
 565         EFSYS_PROBE(fail2);
 566 fail1:
 567         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 568
 569         return (rc);
 570 }
 571
 572         __checkReturn           efx_rc_t
 573 siena_nvram_partn_rw_start(
 574         __in                    efx_nic_t *enp,
 575         __in                    uint32_t partn,
 576         __out                   size_t *chunk_sizep)
 577 {
 578         efx_rc_t rc;
 579
 580         if ((rc = siena_nvram_partn_lock(enp, partn)) != 0)
 581                 goto fail1;
 582
 583         if (chunk_sizep != NULL)
 584                 *chunk_sizep = SIENA_NVRAM_CHUNK;
 585
 586         return (0);
 587
 588 fail1:
 589         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 590
 591         return (rc);
 592 }
 593
 594         __checkReturn           efx_rc_t
 595 siena_nvram_partn_rw_finish(
 596         __in                    efx_nic_t *enp,
 597         __in                    uint32_t partn,
 598         __out_opt               uint32_t *verify_resultp)
 599 {
 600         efx_rc_t rc;
 601
 602         if ((rc = siena_nvram_partn_unlock(enp, partn, verify_resultp)) != 0)
 603                 goto fail1;
 604
 605         return (0);
 606
 607 fail1:
 608         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 609
 610         return (rc);
 611 }
 612
 613         __checkReturn           efx_rc_t
 614 siena_nvram_partn_set_version(
 615         __in                    efx_nic_t *enp,
 616         __in                    uint32_t partn,
 617         __in_ecount(4)          uint16_t version[4])
 618 {
 619         efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
 620         siena_mc_dynamic_config_hdr_t *dcfg = NULL;
 621         siena_mc_fw_version_t *fwverp;
 622         uint32_t dcfg_partn;
 623         size_t dcfg_size;
 624         unsigned int hdr_length;
 625         unsigned int vpd_length;
 626         unsigned int vpd_offset;
 627         unsigned int nitems;
 628         unsigned int required_hdr_length;
 629         unsigned int pos;
 630         uint8_t cksum;
 631         uint32_t subtype;
 632         size_t length;
 633         efx_rc_t rc;
 634
 635         dcfg_partn = (emip->emi_port == 1)
 636                 ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0
 637                 : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1;
 638
 639         if ((rc = siena_nvram_partn_size(enp, dcfg_partn, &dcfg_size)) != 0)
 640                 goto fail1;
 641
 642         if ((rc = siena_nvram_partn_lock(enp, dcfg_partn)) != 0)
 643                 goto fail2;
 644
 645         if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn,
 646             B_TRUE, &dcfg, &length)) != 0)
 647                 goto fail3;
 648
 649         hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0);
 650         nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0);
 651         vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0);
 652         vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0);
 653
 654         /*
 655          * NOTE: This function will blatt any fields trailing the version
 656          * vector, or the VPD chunk.
 657          */
 658         required_hdr_length = SIENA_DYNAMIC_CFG_SIZE(partn + 1);
 659         if (required_hdr_length + vpd_length > length) {
 660                 rc = ENOSPC;
 661                 goto fail4;
 662         }
 663
 664         if (vpd_offset < required_hdr_length) {
 665                 (void) memmove((caddr_t)dcfg + required_hdr_length,
 666                         (caddr_t)dcfg + vpd_offset, vpd_length);
 667                 vpd_offset = required_hdr_length;
 668                 EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset,
 669                                     EFX_DWORD_0, vpd_offset);
 670         }
 671
 672         if (hdr_length < required_hdr_length) {
 673                 (void) memset((caddr_t)dcfg + hdr_length, 0,
 674                         required_hdr_length - hdr_length);
 675                 hdr_length = required_hdr_length;
 676                 EFX_POPULATE_WORD_1(dcfg->length,
 677                                     EFX_WORD_0, hdr_length);
 678         }
 679
 680         /* Get the subtype to insert into the fw_subtype array */
 681         if ((rc = siena_nvram_get_subtype(enp, partn, &subtype)) != 0)
 682                 goto fail5;
 683
 684         /* Fill out the new version */
 685         fwverp = &dcfg->fw_version[partn];
 686         EFX_POPULATE_DWORD_1(fwverp->fw_subtype, EFX_DWORD_0, subtype);
 687         EFX_POPULATE_WORD_1(fwverp->version_w, EFX_WORD_0, version[0]);
 688         EFX_POPULATE_WORD_1(fwverp->version_x, EFX_WORD_0, version[1]);
 689         EFX_POPULATE_WORD_1(fwverp->version_y, EFX_WORD_0, version[2]);
 690         EFX_POPULATE_WORD_1(fwverp->version_z, EFX_WORD_0, version[3]);
 691
 692         /* Update the version count */
 693         if (nitems < partn + 1) {
 694                 nitems = partn + 1;
 695                 EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items,
 696                                     EFX_DWORD_0, nitems);
 697         }
 698
 699         /* Update the checksum */
 700         cksum = 0;
 701         for (pos = 0; pos < hdr_length; pos++)
 702                 cksum += ((uint8_t *)dcfg)[pos];
 703         dcfg->csum.eb_u8[0] -= cksum;
 704
 705         /* Erase and write the new partition */
 706         if ((rc = siena_nvram_partn_erase(enp, dcfg_partn, 0, dcfg_size)) != 0)
 707                 goto fail6;
 708
 709         /* Write out the new structure to nvram */
 710         if ((rc = siena_nvram_partn_write(enp, dcfg_partn, 0,
 711             (caddr_t)dcfg, vpd_offset + vpd_length)) != 0)
 712                 goto fail7;
 713
 714         EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
 715
 716         siena_nvram_partn_unlock(enp, dcfg_partn, NULL);
 717
 718         return (0);
 719
 720 fail7:
 721         EFSYS_PROBE(fail7);
 722 fail6:
 723         EFSYS_PROBE(fail6);
 724 fail5:
 725         EFSYS_PROBE(fail5);
 726 fail4:
 727         EFSYS_PROBE(fail4);
 728
 729         EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
 730 fail3:
 731         EFSYS_PROBE(fail3);
 732 fail2:
 733         EFSYS_PROBE(fail2);
 734 fail1:
 735         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 736
 737         return (rc);
 738 }
 739
 740 #endif  /* EFSYS_OPT_NVRAM */
 741
 742 #endif  /* EFSYS_OPT_SIENA */