sys/dev/sfxge/common/siena_nvram.c

   1 /*-
   2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
   3  *
   4  * Copyright (c) 2009-2016 Solarflare Communications Inc.
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions are met:
   9  *
  10  * 1. Redistributions of source code must retain the above copyright notice,
  11  *    this list of conditions and the following disclaimer.
  12  * 2. Redistributions in binary form must reproduce the above copyright notice,
  13  *    this list of conditions and the following disclaimer in the documentation
  14  *    and/or other materials provided with the distribution.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  17  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  18  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  19  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
  20  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  21  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  22  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  23  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  24  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  25  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
  26  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27  *
  28  * The views and conclusions contained in the software and documentation are
  29  * those of the authors and should not be interpreted as representing official
  30  * policies, either expressed or implied, of the FreeBSD Project.
  31  */
  32
  33 #include <sys/cdefs.h>
  34 __FBSDID("$FreeBSD$");
  35
  36 #include "efx.h"
  37 #include "efx_impl.h"
  38
  39 #if EFSYS_OPT_SIENA
  40
  41 #if EFSYS_OPT_VPD || EFSYS_OPT_NVRAM
  42
  43         __checkReturn           efx_rc_t
  44 siena_nvram_partn_size(
  45         __in                    efx_nic_t *enp,
  46         __in                    uint32_t partn,
  47         __out                   size_t *sizep)
  48 {
  49         efx_rc_t rc;
  50
  51         if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) {
  52                 rc = ENOTSUP;
  53                 goto fail1;
  54         }
  55
  56         if ((rc = efx_mcdi_nvram_info(enp, partn, sizep,
  57             NULL, NULL, NULL)) != 0) {
  58                 goto fail2;
  59         }
  60
  61         return (0);
  62
  63 fail2:
  64         EFSYS_PROBE(fail2);
  65 fail1:
  66         EFSYS_PROBE1(fail1, efx_rc_t, rc);
  67
  68         return (rc);
  69 }
  70
  71         __checkReturn           efx_rc_t
  72 siena_nvram_partn_lock(
  73         __in                    efx_nic_t *enp,
  74         __in                    uint32_t partn)
  75 {
  76         efx_rc_t rc;
  77
  78         if ((rc = efx_mcdi_nvram_update_start(enp, partn)) != 0) {
  79                 goto fail1;
  80         }
  81
  82         return (0);
  83
  84 fail1:
  85         EFSYS_PROBE1(fail1, efx_rc_t, rc);
  86
  87         return (rc);
  88 }
  89
  90         __checkReturn           efx_rc_t
  91 siena_nvram_partn_read(
  92         __in                    efx_nic_t *enp,
  93         __in                    uint32_t partn,
  94         __in                    unsigned int offset,
  95         __out_bcount(size)      caddr_t data,
  96         __in                    size_t size)
  97 {
  98         size_t chunk;
  99         efx_rc_t rc;
 100
 101         while (size > 0) {
 102                 chunk = MIN(size, SIENA_NVRAM_CHUNK);
 103
 104                 if ((rc = efx_mcdi_nvram_read(enp, partn, offset, data, chunk,
 105                             MC_CMD_NVRAM_READ_IN_V2_DEFAULT)) != 0) {
 106                         goto fail1;
 107                 }
 108
 109                 size -= chunk;
 110                 data += chunk;
 111                 offset += chunk;
 112         }
 113
 114         return (0);
 115
 116 fail1:
 117         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 118
 119         return (rc);
 120 }
 121
 122         __checkReturn           efx_rc_t
 123 siena_nvram_partn_erase(
 124         __in                    efx_nic_t *enp,
 125         __in                    uint32_t partn,
 126         __in                    unsigned int offset,
 127         __in                    size_t size)
 128 {
 129         efx_rc_t rc;
 130
 131         if ((rc = efx_mcdi_nvram_erase(enp, partn, offset, size)) != 0) {
 132                 goto fail1;
 133         }
 134
 135         return (0);
 136
 137 fail1:
 138         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 139
 140         return (rc);
 141 }
 142
 143         __checkReturn           efx_rc_t
 144 siena_nvram_partn_write(
 145         __in                    efx_nic_t *enp,
 146         __in                    uint32_t partn,
 147         __in                    unsigned int offset,
 148         __out_bcount(size)      caddr_t data,
 149         __in                    size_t size)
 150 {
 151         size_t chunk;
 152         efx_rc_t rc;
 153
 154         while (size > 0) {
 155                 chunk = MIN(size, SIENA_NVRAM_CHUNK);
 156
 157                 if ((rc = efx_mcdi_nvram_write(enp, partn, offset,
 158                             data, chunk)) != 0) {
 159                         goto fail1;
 160                 }
 161
 162                 size -= chunk;
 163                 data += chunk;
 164                 offset += chunk;
 165         }
 166
 167         return (0);
 168
 169 fail1:
 170         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 171
 172         return (rc);
 173 }
 174
 175         __checkReturn           efx_rc_t
 176 siena_nvram_partn_unlock(
 177         __in                    efx_nic_t *enp,
 178         __in                    uint32_t partn,
 179         __out_opt               uint32_t *verify_resultp)
 180 {
 181         boolean_t reboot;
 182         efx_rc_t rc;
 183
 184         /*
 185          * Reboot into the new image only for PHYs. The driver has to
 186          * explicitly cope with an MC reboot after a firmware update.
 187          */
 188         reboot = (partn == MC_CMD_NVRAM_TYPE_PHY_PORT0 ||
 189                     partn == MC_CMD_NVRAM_TYPE_PHY_PORT1 ||
 190                     partn == MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO);
 191
 192         rc = efx_mcdi_nvram_update_finish(enp, partn, reboot, verify_resultp);
 193         if (rc != 0)
 194                 goto fail1;
 195
 196         return (0);
 197
 198 fail1:
 199         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 200
 201         return (rc);
 202 }
 203
 204 #endif  /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */
 205
 206 #if EFSYS_OPT_NVRAM
 207
 208 typedef struct siena_parttbl_entry_s {
 209         unsigned int            partn;
 210         unsigned int            port;
 211         efx_nvram_type_t        nvtype;
 212 } siena_parttbl_entry_t;
 213
 214 static siena_parttbl_entry_t siena_parttbl[] = {
 215         {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO,   1, EFX_NVRAM_NULLPHY},
 216         {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO,   2, EFX_NVRAM_NULLPHY},
 217         {MC_CMD_NVRAM_TYPE_MC_FW,               1, EFX_NVRAM_MC_FIRMWARE},
 218         {MC_CMD_NVRAM_TYPE_MC_FW,               2, EFX_NVRAM_MC_FIRMWARE},
 219         {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP,        1, EFX_NVRAM_MC_GOLDEN},
 220         {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP,        2, EFX_NVRAM_MC_GOLDEN},
 221         {MC_CMD_NVRAM_TYPE_EXP_ROM,             1, EFX_NVRAM_BOOTROM},
 222         {MC_CMD_NVRAM_TYPE_EXP_ROM,             2, EFX_NVRAM_BOOTROM},
 223         {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0,   1, EFX_NVRAM_BOOTROM_CFG},
 224         {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1,   2, EFX_NVRAM_BOOTROM_CFG},
 225         {MC_CMD_NVRAM_TYPE_PHY_PORT0,           1, EFX_NVRAM_PHY},
 226         {MC_CMD_NVRAM_TYPE_PHY_PORT1,           2, EFX_NVRAM_PHY},
 227         {MC_CMD_NVRAM_TYPE_FPGA,                1, EFX_NVRAM_FPGA},
 228         {MC_CMD_NVRAM_TYPE_FPGA,                2, EFX_NVRAM_FPGA},
 229         {MC_CMD_NVRAM_TYPE_FPGA_BACKUP,         1, EFX_NVRAM_FPGA_BACKUP},
 230         {MC_CMD_NVRAM_TYPE_FPGA_BACKUP,         2, EFX_NVRAM_FPGA_BACKUP},
 231         {MC_CMD_NVRAM_TYPE_FC_FW,               1, EFX_NVRAM_FCFW},
 232         {MC_CMD_NVRAM_TYPE_FC_FW,               2, EFX_NVRAM_FCFW},
 233         {MC_CMD_NVRAM_TYPE_CPLD,                1, EFX_NVRAM_CPLD},
 234         {MC_CMD_NVRAM_TYPE_CPLD,                2, EFX_NVRAM_CPLD},
 235         {MC_CMD_NVRAM_TYPE_LICENSE,             1, EFX_NVRAM_LICENSE},
 236         {MC_CMD_NVRAM_TYPE_LICENSE,             2, EFX_NVRAM_LICENSE}
 237 };
 238
 239         __checkReturn           efx_rc_t
 240 siena_nvram_type_to_partn(
 241         __in                    efx_nic_t *enp,
 242         __in                    efx_nvram_type_t type,
 243         __out                   uint32_t *partnp)
 244 {
 245         efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
 246         unsigned int i;
 247
 248         EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
 249         EFSYS_ASSERT(partnp != NULL);
 250
 251         for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
 252                 siena_parttbl_entry_t *entry = &siena_parttbl[i];
 253
 254                 if (entry->port == emip->emi_port && entry->nvtype == type) {
 255                         *partnp = entry->partn;
 256                         return (0);
 257                 }
 258         }
 259
 260         return (ENOTSUP);
 261 }
 262
 263
 264 #if EFSYS_OPT_DIAG
 265
 266         __checkReturn           efx_rc_t
 267 siena_nvram_test(
 268         __in                    efx_nic_t *enp)
 269 {
 270         efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
 271         siena_parttbl_entry_t *entry;
 272         unsigned int i;
 273         efx_rc_t rc;
 274
 275         /*
 276          * Iterate over the list of supported partition types
 277          * applicable to *this* port
 278          */
 279         for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
 280                 entry = &siena_parttbl[i];
 281
 282                 if (entry->port != emip->emi_port ||
 283                     !(enp->en_u.siena.enu_partn_mask & (1 << entry->partn)))
 284                         continue;
 285
 286                 if ((rc = efx_mcdi_nvram_test(enp, entry->partn)) != 0) {
 287                         goto fail1;
 288                 }
 289         }
 290
 291         return (0);
 292
 293 fail1:
 294         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 295
 296         return (rc);
 297 }
 298
 299 #endif  /* EFSYS_OPT_DIAG */
 300
 301
 302 #define SIENA_DYNAMIC_CFG_SIZE(_nitems)                                 \
 303         (sizeof (siena_mc_dynamic_config_hdr_t) + ((_nitems) *          \
 304         sizeof (((siena_mc_dynamic_config_hdr_t *)NULL)->fw_version[0])))
 305
 306         __checkReturn           efx_rc_t
 307 siena_nvram_get_dynamic_cfg(
 308         __in                    efx_nic_t *enp,
 309         __in                    uint32_t partn,
 310         __in                    boolean_t vpd,
 311         __out                   siena_mc_dynamic_config_hdr_t **dcfgp,
 312         __out                   size_t *sizep)
 313 {
 314         siena_mc_dynamic_config_hdr_t *dcfg = NULL;
 315         size_t size;
 316         uint8_t cksum;
 317         unsigned int vpd_offset;
 318         unsigned int vpd_length;
 319         unsigned int hdr_length;
 320         unsigned int nversions;
 321         unsigned int pos;
 322         unsigned int region;
 323         efx_rc_t rc;
 324
 325         EFSYS_ASSERT(partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 ||
 326                     partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1);
 327
 328         /*
 329          * Allocate sufficient memory for the entire dynamiccfg area, even
 330          * if we're not actually going to read in the VPD.
 331          */
 332         if ((rc = siena_nvram_partn_size(enp, partn, &size)) != 0)
 333                 goto fail1;
 334
 335         EFSYS_KMEM_ALLOC(enp->en_esip, size, dcfg);
 336         if (dcfg == NULL) {
 337                 rc = ENOMEM;
 338                 goto fail2;
 339         }
 340
 341         if ((rc = siena_nvram_partn_read(enp, partn, 0,
 342             (caddr_t)dcfg, SIENA_NVRAM_CHUNK)) != 0)
 343                 goto fail3;
 344
 345         /* Verify the magic */
 346         if (EFX_DWORD_FIELD(dcfg->magic, EFX_DWORD_0)
 347             != SIENA_MC_DYNAMIC_CONFIG_MAGIC)
 348                 goto invalid1;
 349
 350         /* All future versions of the structure must be backwards compatible */
 351         EFX_STATIC_ASSERT(SIENA_MC_DYNAMIC_CONFIG_VERSION == 0);
 352
 353         hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0);
 354         nversions = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0);
 355         vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0);
 356         vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0);
 357
 358         /* Verify the hdr doesn't overflow the partn size */
 359         if (hdr_length > size || vpd_offset > size || vpd_length > size ||
 360             vpd_length + vpd_offset > size)
 361                 goto invalid2;
 362
 363         /* Verify the header has room for all it's versions */
 364         if (hdr_length < SIENA_DYNAMIC_CFG_SIZE(0) ||
 365             hdr_length < SIENA_DYNAMIC_CFG_SIZE(nversions))
 366                 goto invalid3;
 367
 368         /*
 369          * Read the remaining portion of the dcfg, either including
 370          * the whole of VPD (there is no vpd length in this structure,
 371          * so we have to parse each tag), or just the dcfg header itself
 372          */
 373         region = vpd ? vpd_offset + vpd_length : hdr_length;
 374         if (region > SIENA_NVRAM_CHUNK) {
 375                 if ((rc = siena_nvram_partn_read(enp, partn, SIENA_NVRAM_CHUNK,
 376                     (caddr_t)dcfg + SIENA_NVRAM_CHUNK,
 377                     region - SIENA_NVRAM_CHUNK)) != 0)
 378                         goto fail4;
 379         }
 380
 381         /* Verify checksum */
 382         cksum = 0;
 383         for (pos = 0; pos < hdr_length; pos++)
 384                 cksum += ((uint8_t *)dcfg)[pos];
 385         if (cksum != 0)
 386                 goto invalid4;
 387
 388         goto done;
 389
 390 invalid4:
 391         EFSYS_PROBE(invalid4);
 392 invalid3:
 393         EFSYS_PROBE(invalid3);
 394 invalid2:
 395         EFSYS_PROBE(invalid2);
 396 invalid1:
 397         EFSYS_PROBE(invalid1);
 398
 399         /*
 400          * Construct a new "null" dcfg, with an empty version vector,
 401          * and an empty VPD chunk trailing. This has the neat side effect
 402          * of testing the exception paths in the write path.
 403          */
 404         EFX_POPULATE_DWORD_1(dcfg->magic,
 405                             EFX_DWORD_0, SIENA_MC_DYNAMIC_CONFIG_MAGIC);
 406         EFX_POPULATE_WORD_1(dcfg->length, EFX_WORD_0, sizeof (*dcfg));
 407         EFX_POPULATE_BYTE_1(dcfg->version, EFX_BYTE_0,
 408                             SIENA_MC_DYNAMIC_CONFIG_VERSION);
 409         EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset,
 410                             EFX_DWORD_0, sizeof (*dcfg));
 411         EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_length, EFX_DWORD_0, 0);
 412         EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items, EFX_DWORD_0, 0);
 413
 414 done:
 415         *dcfgp = dcfg;
 416         *sizep = size;
 417
 418         return (0);
 419
 420 fail4:
 421         EFSYS_PROBE(fail4);
 422 fail3:
 423         EFSYS_PROBE(fail3);
 424
 425         EFSYS_KMEM_FREE(enp->en_esip, size, dcfg);
 426
 427 fail2:
 428         EFSYS_PROBE(fail2);
 429 fail1:
 430         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 431
 432         return (rc);
 433 }
 434
 435         __checkReturn           efx_rc_t
 436 siena_nvram_get_subtype(
 437         __in                    efx_nic_t *enp,
 438         __in                    uint32_t partn,
 439         __out                   uint32_t *subtypep)
 440 {
 441         efx_mcdi_req_t req;
 442         uint8_t payload[MAX(MC_CMD_GET_BOARD_CFG_IN_LEN,
 443                             MC_CMD_GET_BOARD_CFG_OUT_LENMAX)];
 444         efx_word_t *fw_list;
 445         efx_rc_t rc;
 446
 447         (void) memset(payload, 0, sizeof (payload));
 448         req.emr_cmd = MC_CMD_GET_BOARD_CFG;
 449         req.emr_in_buf = payload;
 450         req.emr_in_length = MC_CMD_GET_BOARD_CFG_IN_LEN;
 451         req.emr_out_buf = payload;
 452         req.emr_out_length = MC_CMD_GET_BOARD_CFG_OUT_LENMAX;
 453
 454         efx_mcdi_execute(enp, &req);
 455
 456         if (req.emr_rc != 0) {
 457                 rc = req.emr_rc;
 458                 goto fail1;
 459         }
 460
 461         if (req.emr_out_length_used < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
 462                 rc = EMSGSIZE;
 463                 goto fail2;
 464         }
 465
 466         if (req.emr_out_length_used <
 467             MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_OFST +
 468             (partn + 1) * sizeof (efx_word_t)) {
 469                 rc = ENOENT;
 470                 goto fail3;
 471         }
 472
 473         fw_list = MCDI_OUT2(req, efx_word_t,
 474                             GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
 475         *subtypep = EFX_WORD_FIELD(fw_list[partn], EFX_WORD_0);
 476
 477         return (0);
 478
 479 fail3:
 480         EFSYS_PROBE(fail3);
 481 fail2:
 482         EFSYS_PROBE(fail2);
 483 fail1:
 484         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 485
 486         return (rc);
 487 }
 488
 489         __checkReturn           efx_rc_t
 490 siena_nvram_partn_get_version(
 491         __in                    efx_nic_t *enp,
 492         __in                    uint32_t partn,
 493         __out                   uint32_t *subtypep,
 494         __out_ecount(4)         uint16_t version[4])
 495 {
 496         siena_mc_dynamic_config_hdr_t *dcfg;
 497         siena_parttbl_entry_t *entry;
 498         uint32_t dcfg_partn;
 499         unsigned int i;
 500         efx_rc_t rc;
 501
 502         if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) {
 503                 rc = ENOTSUP;
 504                 goto fail1;
 505         }
 506
 507         if ((rc = siena_nvram_get_subtype(enp, partn, subtypep)) != 0)
 508                 goto fail2;
 509
 510         /*
 511          * Some partitions are accessible from both ports (for instance BOOTROM)
 512          * Find the highest version reported by all dcfg structures on ports
 513          * that have access to this partition.
 514          */
 515         version[0] = version[1] = version[2] = version[3] = 0;
 516         for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
 517                 siena_mc_fw_version_t *verp;
 518                 unsigned int nitems;
 519                 uint16_t temp[4];
 520                 size_t length;
 521
 522                 entry = &siena_parttbl[i];
 523                 if (entry->partn != partn)
 524                         continue;
 525
 526                 dcfg_partn = (entry->port == 1)
 527                         ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0
 528                         : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1;
 529                 /*
 530                  * Ingore missing partitions on port 2, assuming they're due
 531                  * to running on a single port part.
 532                  */
 533                 if ((1 << dcfg_partn) &  ~enp->en_u.siena.enu_partn_mask) {
 534                         if (entry->port == 2)
 535                                 continue;
 536                 }
 537
 538                 if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn,
 539                     B_FALSE, &dcfg, &length)) != 0)
 540                         goto fail3;
 541
 542                 nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items,
 543                             EFX_DWORD_0);
 544                 if (nitems < entry->partn)
 545                         goto done;
 546
 547                 verp = &dcfg->fw_version[partn];
 548                 temp[0] = EFX_WORD_FIELD(verp->version_w, EFX_WORD_0);
 549                 temp[1] = EFX_WORD_FIELD(verp->version_x, EFX_WORD_0);
 550                 temp[2] = EFX_WORD_FIELD(verp->version_y, EFX_WORD_0);
 551                 temp[3] = EFX_WORD_FIELD(verp->version_z, EFX_WORD_0);
 552                 if (memcmp(version, temp, sizeof (temp)) < 0)
 553                         memcpy(version, temp, sizeof (temp));
 554
 555 done:
 556                 EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
 557         }
 558
 559         return (0);
 560
 561 fail3:
 562         EFSYS_PROBE(fail3);
 563 fail2:
 564         EFSYS_PROBE(fail2);
 565 fail1:
 566         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 567
 568         return (rc);
 569 }
 570
 571         __checkReturn           efx_rc_t
 572 siena_nvram_partn_rw_start(
 573         __in                    efx_nic_t *enp,
 574         __in                    uint32_t partn,
 575         __out                   size_t *chunk_sizep)
 576 {
 577         efx_rc_t rc;
 578
 579         if ((rc = siena_nvram_partn_lock(enp, partn)) != 0)
 580                 goto fail1;
 581
 582         if (chunk_sizep != NULL)
 583                 *chunk_sizep = SIENA_NVRAM_CHUNK;
 584
 585         return (0);
 586
 587 fail1:
 588         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 589
 590         return (rc);
 591 }
 592
 593         __checkReturn           efx_rc_t
 594 siena_nvram_partn_rw_finish(
 595         __in                    efx_nic_t *enp,
 596         __in                    uint32_t partn,
 597         __out_opt               uint32_t *verify_resultp)
 598 {
 599         efx_rc_t rc;
 600
 601         if ((rc = siena_nvram_partn_unlock(enp, partn, verify_resultp)) != 0)
 602                 goto fail1;
 603
 604         return (0);
 605
 606 fail1:
 607         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 608
 609         return (rc);
 610 }
 611
 612         __checkReturn           efx_rc_t
 613 siena_nvram_partn_set_version(
 614         __in                    efx_nic_t *enp,
 615         __in                    uint32_t partn,
 616         __in_ecount(4)          uint16_t version[4])
 617 {
 618         efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
 619         siena_mc_dynamic_config_hdr_t *dcfg = NULL;
 620         siena_mc_fw_version_t *fwverp;
 621         uint32_t dcfg_partn;
 622         size_t dcfg_size;
 623         unsigned int hdr_length;
 624         unsigned int vpd_length;
 625         unsigned int vpd_offset;
 626         unsigned int nitems;
 627         unsigned int required_hdr_length;
 628         unsigned int pos;
 629         uint8_t cksum;
 630         uint32_t subtype;
 631         size_t length;
 632         efx_rc_t rc;
 633
 634         dcfg_partn = (emip->emi_port == 1)
 635                 ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0
 636                 : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1;
 637
 638         if ((rc = siena_nvram_partn_size(enp, dcfg_partn, &dcfg_size)) != 0)
 639                 goto fail1;
 640
 641         if ((rc = siena_nvram_partn_lock(enp, dcfg_partn)) != 0)
 642                 goto fail2;
 643
 644         if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn,
 645             B_TRUE, &dcfg, &length)) != 0)
 646                 goto fail3;
 647
 648         hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0);
 649         nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0);
 650         vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0);
 651         vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0);
 652
 653         /*
 654          * NOTE: This function will blatt any fields trailing the version
 655          * vector, or the VPD chunk.
 656          */
 657         required_hdr_length = SIENA_DYNAMIC_CFG_SIZE(partn + 1);
 658         if (required_hdr_length + vpd_length > length) {
 659                 rc = ENOSPC;
 660                 goto fail4;
 661         }
 662
 663         if (vpd_offset < required_hdr_length) {
 664                 (void) memmove((caddr_t)dcfg + required_hdr_length,
 665                         (caddr_t)dcfg + vpd_offset, vpd_length);
 666                 vpd_offset = required_hdr_length;
 667                 EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset,
 668                                     EFX_DWORD_0, vpd_offset);
 669         }
 670
 671         if (hdr_length < required_hdr_length) {
 672                 (void) memset((caddr_t)dcfg + hdr_length, 0,
 673                         required_hdr_length - hdr_length);
 674                 hdr_length = required_hdr_length;
 675                 EFX_POPULATE_WORD_1(dcfg->length,
 676                                     EFX_WORD_0, hdr_length);
 677         }
 678
 679         /* Get the subtype to insert into the fw_subtype array */
 680         if ((rc = siena_nvram_get_subtype(enp, partn, &subtype)) != 0)
 681                 goto fail5;
 682
 683         /* Fill out the new version */
 684         fwverp = &dcfg->fw_version[partn];
 685         EFX_POPULATE_DWORD_1(fwverp->fw_subtype, EFX_DWORD_0, subtype);
 686         EFX_POPULATE_WORD_1(fwverp->version_w, EFX_WORD_0, version[0]);
 687         EFX_POPULATE_WORD_1(fwverp->version_x, EFX_WORD_0, version[1]);
 688         EFX_POPULATE_WORD_1(fwverp->version_y, EFX_WORD_0, version[2]);
 689         EFX_POPULATE_WORD_1(fwverp->version_z, EFX_WORD_0, version[3]);
 690
 691         /* Update the version count */
 692         if (nitems < partn + 1) {
 693                 nitems = partn + 1;
 694                 EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items,
 695                                     EFX_DWORD_0, nitems);
 696         }
 697
 698         /* Update the checksum */
 699         cksum = 0;
 700         for (pos = 0; pos < hdr_length; pos++)
 701                 cksum += ((uint8_t *)dcfg)[pos];
 702         dcfg->csum.eb_u8[0] -= cksum;
 703
 704         /* Erase and write the new partition */
 705         if ((rc = siena_nvram_partn_erase(enp, dcfg_partn, 0, dcfg_size)) != 0)
 706                 goto fail6;
 707
 708         /* Write out the new structure to nvram */
 709         if ((rc = siena_nvram_partn_write(enp, dcfg_partn, 0,
 710             (caddr_t)dcfg, vpd_offset + vpd_length)) != 0)
 711                 goto fail7;
 712
 713         EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
 714
 715         siena_nvram_partn_unlock(enp, dcfg_partn, NULL);
 716
 717         return (0);
 718
 719 fail7:
 720         EFSYS_PROBE(fail7);
 721 fail6:
 722         EFSYS_PROBE(fail6);
 723 fail5:
 724         EFSYS_PROBE(fail5);
 725 fail4:
 726         EFSYS_PROBE(fail4);
 727
 728         EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
 729 fail3:
 730         EFSYS_PROBE(fail3);
 731 fail2:
 732         EFSYS_PROBE(fail2);
 733 fail1:
 734         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 735
 736         return (rc);
 737 }
 738
 739 #endif  /* EFSYS_OPT_NVRAM */
 740
 741 #endif  /* EFSYS_OPT_SIENA */