2 * Copyright (c) 2010-2015 Solarflare Communications Inc.
5 * This software was developed in part by Philip Paeps under contract for
6 * Solarflare Communications, Inc.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
11 * 1. Redistributions of source code must retain the above copyright notice,
12 * this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright notice,
14 * this list of conditions and the following disclaimer in the documentation
15 * and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
19 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
21 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
22 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
23 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
24 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
26 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
27 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 * The views and conclusions contained in the software and documentation are
30 * those of the authors and should not be interpreted as representing official
31 * policies, either expressed or implied, of the FreeBSD Project.
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
37 #include <sys/param.h>
38 #include <sys/kernel.h>
42 #include <sys/module.h>
43 #include <sys/mutex.h>
45 #include <sys/socket.h>
46 #include <sys/taskqueue.h>
47 #include <sys/sockio.h>
48 #include <sys/sysctl.h>
50 #include <sys/syslog.h>
52 #include <dev/pci/pcireg.h>
53 #include <dev/pci/pcivar.h>
55 #include <net/ethernet.h>
57 #include <net/if_var.h>
58 #include <net/if_media.h>
59 #include <net/if_types.h>
61 #include "common/efx.h"
65 #include "sfxge_ioc.h"
66 #include "sfxge_version.h"
68 #define SFXGE_CAP (IFCAP_VLAN_MTU | IFCAP_VLAN_HWCSUM | \
69 IFCAP_RXCSUM | IFCAP_TXCSUM | \
70 IFCAP_RXCSUM_IPV6 | IFCAP_TXCSUM_IPV6 | \
71 IFCAP_TSO4 | IFCAP_TSO6 | \
73 IFCAP_VLAN_HWTSO | IFCAP_LINKSTATE | IFCAP_HWSTATS)
74 #define SFXGE_CAP_ENABLE SFXGE_CAP
75 #define SFXGE_CAP_FIXED (IFCAP_VLAN_MTU | \
76 IFCAP_JUMBO_MTU | IFCAP_LINKSTATE | IFCAP_HWSTATS)
78 MALLOC_DEFINE(M_SFXGE, "sfxge", "Solarflare 10GigE driver");
81 SYSCTL_NODE(_hw, OID_AUTO, sfxge, CTLFLAG_RD, 0,
82 "SFXGE driver parameters");
84 #define SFXGE_PARAM_RX_RING SFXGE_PARAM(rx_ring)
85 static int sfxge_rx_ring_entries = SFXGE_NDESCS;
86 TUNABLE_INT(SFXGE_PARAM_RX_RING, &sfxge_rx_ring_entries);
87 SYSCTL_INT(_hw_sfxge, OID_AUTO, rx_ring, CTLFLAG_RDTUN,
88 &sfxge_rx_ring_entries, 0,
89 "Maximum number of descriptors in a receive ring");
91 #define SFXGE_PARAM_TX_RING SFXGE_PARAM(tx_ring)
92 static int sfxge_tx_ring_entries = SFXGE_NDESCS;
93 TUNABLE_INT(SFXGE_PARAM_TX_RING, &sfxge_tx_ring_entries);
94 SYSCTL_INT(_hw_sfxge, OID_AUTO, tx_ring, CTLFLAG_RDTUN,
95 &sfxge_tx_ring_entries, 0,
96 "Maximum number of descriptors in a transmit ring");
99 sfxge_reset(void *arg, int npending);
102 sfxge_estimate_rsrc_limits(struct sfxge_softc *sc)
104 efx_drv_limits_t limits;
106 unsigned int evq_max;
107 uint32_t evq_allocated;
108 uint32_t rxq_allocated;
109 uint32_t txq_allocated;
112 * Limit the number of event queues to:
114 * - hardwire maximum RSS channels
115 * - administratively specified maximum RSS channels
117 evq_max = MIN(mp_ncpus, EFX_MAXRSS);
118 if (sc->max_rss_channels > 0)
119 evq_max = MIN(evq_max, sc->max_rss_channels);
121 memset(&limits, 0, sizeof(limits));
123 limits.edl_min_evq_count = 1;
124 limits.edl_max_evq_count = evq_max;
125 limits.edl_min_txq_count = SFXGE_TXQ_NTYPES;
126 limits.edl_max_txq_count = evq_max + SFXGE_TXQ_NTYPES - 1;
127 limits.edl_min_rxq_count = 1;
128 limits.edl_max_rxq_count = evq_max;
130 efx_nic_set_drv_limits(sc->enp, &limits);
132 if ((rc = efx_nic_init(sc->enp)) != 0)
135 rc = efx_nic_get_vi_pool(sc->enp, &evq_allocated, &rxq_allocated,
138 efx_nic_fini(sc->enp);
142 KASSERT(txq_allocated >= SFXGE_TXQ_NTYPES,
143 ("txq_allocated < SFXGE_TXQ_NTYPES"));
145 sc->evq_max = MIN(evq_allocated, evq_max);
146 sc->evq_max = MIN(rxq_allocated, sc->evq_max);
147 sc->evq_max = MIN(txq_allocated - (SFXGE_TXQ_NTYPES - 1),
150 KASSERT(sc->evq_max <= evq_max,
151 ("allocated more than maximum requested"));
154 * NIC is kept initialized in the case of success to be able to
155 * initialize port to find out media types.
161 sfxge_set_drv_limits(struct sfxge_softc *sc)
163 efx_drv_limits_t limits;
165 memset(&limits, 0, sizeof(limits));
167 /* Limits are strict since take into account initial estimation */
168 limits.edl_min_evq_count = limits.edl_max_evq_count =
170 limits.edl_min_txq_count = limits.edl_max_txq_count =
171 sc->intr.n_alloc + SFXGE_TXQ_NTYPES - 1;
172 limits.edl_min_rxq_count = limits.edl_max_rxq_count =
175 return (efx_nic_set_drv_limits(sc->enp, &limits));
179 sfxge_start(struct sfxge_softc *sc)
183 SFXGE_ADAPTER_LOCK_ASSERT_OWNED(sc);
185 if (sc->init_state == SFXGE_STARTED)
188 if (sc->init_state != SFXGE_REGISTERED) {
193 /* Set required resource limits */
194 if ((rc = sfxge_set_drv_limits(sc)) != 0)
197 if ((rc = efx_nic_init(sc->enp)) != 0)
200 /* Start processing interrupts. */
201 if ((rc = sfxge_intr_start(sc)) != 0)
204 /* Start processing events. */
205 if ((rc = sfxge_ev_start(sc)) != 0)
208 /* Fire up the port. */
209 if ((rc = sfxge_port_start(sc)) != 0)
212 /* Start the receiver side. */
213 if ((rc = sfxge_rx_start(sc)) != 0)
216 /* Start the transmitter side. */
217 if ((rc = sfxge_tx_start(sc)) != 0)
220 sc->init_state = SFXGE_STARTED;
222 /* Tell the stack we're running. */
223 sc->ifnet->if_drv_flags |= IFF_DRV_RUNNING;
224 sc->ifnet->if_drv_flags &= ~IFF_DRV_OACTIVE;
241 efx_nic_fini(sc->enp);
244 device_printf(sc->dev, "sfxge_start: %d\n", rc);
250 sfxge_if_init(void *arg)
252 struct sfxge_softc *sc;
254 sc = (struct sfxge_softc *)arg;
256 SFXGE_ADAPTER_LOCK(sc);
257 (void)sfxge_start(sc);
258 SFXGE_ADAPTER_UNLOCK(sc);
262 sfxge_stop(struct sfxge_softc *sc)
264 SFXGE_ADAPTER_LOCK_ASSERT_OWNED(sc);
266 if (sc->init_state != SFXGE_STARTED)
269 sc->init_state = SFXGE_REGISTERED;
271 /* Stop the transmitter. */
274 /* Stop the receiver. */
280 /* Stop processing events. */
283 /* Stop processing interrupts. */
286 efx_nic_fini(sc->enp);
288 sc->ifnet->if_drv_flags &= ~IFF_DRV_RUNNING;
293 sfxge_vpd_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ioc)
295 efx_vpd_value_t value;
298 switch (ioc->u.vpd.op) {
299 case SFXGE_VPD_OP_GET_KEYWORD:
300 value.evv_tag = ioc->u.vpd.tag;
301 value.evv_keyword = ioc->u.vpd.keyword;
302 rc = efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value);
305 ioc->u.vpd.len = MIN(ioc->u.vpd.len, value.evv_length);
306 if (ioc->u.vpd.payload != 0) {
307 rc = copyout(value.evv_value, ioc->u.vpd.payload,
311 case SFXGE_VPD_OP_SET_KEYWORD:
312 if (ioc->u.vpd.len > sizeof(value.evv_value))
314 value.evv_tag = ioc->u.vpd.tag;
315 value.evv_keyword = ioc->u.vpd.keyword;
316 value.evv_length = ioc->u.vpd.len;
317 rc = copyin(ioc->u.vpd.payload, value.evv_value, value.evv_length);
320 rc = efx_vpd_set(sc->enp, sc->vpd_data, sc->vpd_size, &value);
323 rc = efx_vpd_verify(sc->enp, sc->vpd_data, sc->vpd_size);
326 rc = efx_vpd_write(sc->enp, sc->vpd_data, sc->vpd_size);
337 sfxge_private_ioctl(struct sfxge_softc *sc, sfxge_ioc_t *ioc)
341 return (sfxge_mcdi_ioctl(sc, ioc));
342 case SFXGE_NVRAM_IOC:
343 return (sfxge_nvram_ioctl(sc, ioc));
345 return (sfxge_vpd_ioctl(sc, ioc));
353 sfxge_if_ioctl(struct ifnet *ifp, unsigned long command, caddr_t data)
355 struct sfxge_softc *sc;
360 ifr = (struct ifreq *)data;
366 SFXGE_ADAPTER_LOCK(sc);
367 if (ifp->if_flags & IFF_UP) {
368 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
369 if ((ifp->if_flags ^ sc->if_flags) &
370 (IFF_PROMISC | IFF_ALLMULTI)) {
371 sfxge_mac_filter_set(sc);
376 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
378 sc->if_flags = ifp->if_flags;
379 SFXGE_ADAPTER_UNLOCK(sc);
382 if (ifr->ifr_mtu == ifp->if_mtu) {
385 } else if (ifr->ifr_mtu > SFXGE_MAX_MTU) {
387 } else if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
388 ifp->if_mtu = ifr->ifr_mtu;
391 /* Restart required */
392 SFXGE_ADAPTER_LOCK(sc);
394 ifp->if_mtu = ifr->ifr_mtu;
395 error = sfxge_start(sc);
396 SFXGE_ADAPTER_UNLOCK(sc);
398 ifp->if_flags &= ~IFF_UP;
399 ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
406 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
407 sfxge_mac_filter_set(sc);
411 int reqcap = ifr->ifr_reqcap;
414 SFXGE_ADAPTER_LOCK(sc);
416 /* Capabilities to be changed in accordance with request */
417 capchg_mask = ifp->if_capenable ^ reqcap;
420 * The networking core already rejects attempts to
421 * enable capabilities we don't have. We still have
422 * to reject attempts to disable capabilities that we
423 * can't (yet) disable.
425 KASSERT((reqcap & ~ifp->if_capabilities) == 0,
426 ("Unsupported capabilities 0x%x requested 0x%x vs "
428 reqcap & ~ifp->if_capabilities,
429 reqcap , ifp->if_capabilities));
430 if (capchg_mask & SFXGE_CAP_FIXED) {
432 SFXGE_ADAPTER_UNLOCK(sc);
436 /* Check request before any changes */
437 if ((capchg_mask & IFCAP_TSO4) &&
438 (reqcap & (IFCAP_TSO4 | IFCAP_TXCSUM)) == IFCAP_TSO4) {
440 SFXGE_ADAPTER_UNLOCK(sc);
441 if_printf(ifp, "enable txcsum before tso4\n");
444 if ((capchg_mask & IFCAP_TSO6) &&
445 (reqcap & (IFCAP_TSO6 | IFCAP_TXCSUM_IPV6)) == IFCAP_TSO6) {
447 SFXGE_ADAPTER_UNLOCK(sc);
448 if_printf(ifp, "enable txcsum6 before tso6\n");
452 if (reqcap & IFCAP_TXCSUM) {
453 ifp->if_hwassist |= (CSUM_IP | CSUM_TCP | CSUM_UDP);
455 ifp->if_hwassist &= ~(CSUM_IP | CSUM_TCP | CSUM_UDP);
456 if (reqcap & IFCAP_TSO4) {
457 reqcap &= ~IFCAP_TSO4;
459 "tso4 disabled due to -txcsum\n");
462 if (reqcap & IFCAP_TXCSUM_IPV6) {
463 ifp->if_hwassist |= (CSUM_TCP_IPV6 | CSUM_UDP_IPV6);
465 ifp->if_hwassist &= ~(CSUM_TCP_IPV6 | CSUM_UDP_IPV6);
466 if (reqcap & IFCAP_TSO6) {
467 reqcap &= ~IFCAP_TSO6;
469 "tso6 disabled due to -txcsum6\n");
474 * The kernel takes both IFCAP_TSOx and CSUM_TSO into
475 * account before using TSO. So, we do not touch
476 * checksum flags when IFCAP_TSOx is modified.
477 * Note that CSUM_TSO is (CSUM_IP_TSO|CSUM_IP6_TSO),
478 * but both bits are set in IPv4 and IPv6 mbufs.
481 ifp->if_capenable = reqcap;
483 SFXGE_ADAPTER_UNLOCK(sc);
488 error = ifmedia_ioctl(ifp, ifr, &sc->media, command);
491 error = priv_check(curthread, PRIV_DRIVER);
494 error = copyin(ifr->ifr_data, &ioc, sizeof(ioc));
497 error = sfxge_private_ioctl(sc, &ioc);
499 error = copyout(&ioc, ifr->ifr_data, sizeof(ioc));
503 error = ether_ioctl(ifp, command, data);
510 sfxge_ifnet_fini(struct ifnet *ifp)
512 struct sfxge_softc *sc = ifp->if_softc;
514 SFXGE_ADAPTER_LOCK(sc);
516 SFXGE_ADAPTER_UNLOCK(sc);
518 ifmedia_removeall(&sc->media);
524 sfxge_ifnet_init(struct ifnet *ifp, struct sfxge_softc *sc)
526 const efx_nic_cfg_t *encp = efx_nic_cfg_get(sc->enp);
533 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
534 ifp->if_init = sfxge_if_init;
536 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
537 ifp->if_ioctl = sfxge_if_ioctl;
539 ifp->if_capabilities = SFXGE_CAP;
540 ifp->if_capenable = SFXGE_CAP_ENABLE;
543 ifp->if_capabilities |= IFCAP_LRO;
544 ifp->if_capenable |= IFCAP_LRO;
547 if (encp->enc_hw_tx_insert_vlan_enabled) {
548 ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING;
549 ifp->if_capenable |= IFCAP_VLAN_HWTAGGING;
551 ifp->if_hwassist = CSUM_TCP | CSUM_UDP | CSUM_IP | CSUM_TSO |
552 CSUM_TCP_IPV6 | CSUM_UDP_IPV6;
554 ether_ifattach(ifp, encp->enc_mac_addr);
556 ifp->if_transmit = sfxge_if_transmit;
557 ifp->if_qflush = sfxge_if_qflush;
559 ifp->if_get_counter = sfxge_get_counter;
561 DBGPRINT(sc->dev, "ifmedia_init");
562 if ((rc = sfxge_port_ifmedia_init(sc)) != 0)
568 ether_ifdetach(sc->ifnet);
573 sfxge_sram_buf_tbl_alloc(struct sfxge_softc *sc, size_t n, uint32_t *idp)
575 KASSERT(sc->buffer_table_next + n <=
576 efx_nic_cfg_get(sc->enp)->enc_buftbl_limit,
577 ("buffer table full"));
579 *idp = sc->buffer_table_next;
580 sc->buffer_table_next += n;
584 sfxge_bar_init(struct sfxge_softc *sc)
586 efsys_bar_t *esbp = &sc->bar;
588 esbp->esb_rid = PCIR_BAR(EFX_MEM_BAR);
589 if ((esbp->esb_res = bus_alloc_resource_any(sc->dev, SYS_RES_MEMORY,
590 &esbp->esb_rid, RF_ACTIVE)) == NULL) {
591 device_printf(sc->dev, "Cannot allocate BAR region %d\n",
595 esbp->esb_tag = rman_get_bustag(esbp->esb_res);
596 esbp->esb_handle = rman_get_bushandle(esbp->esb_res);
598 SFXGE_BAR_LOCK_INIT(esbp, device_get_nameunit(sc->dev));
604 sfxge_bar_fini(struct sfxge_softc *sc)
606 efsys_bar_t *esbp = &sc->bar;
608 bus_release_resource(sc->dev, SYS_RES_MEMORY, esbp->esb_rid,
610 SFXGE_BAR_LOCK_DESTROY(esbp);
614 sfxge_create(struct sfxge_softc *sc)
619 char rss_param_name[sizeof(SFXGE_PARAM(%d.max_rss_channels))];
623 SFXGE_ADAPTER_LOCK_INIT(sc, device_get_nameunit(sc->dev));
625 sc->max_rss_channels = 0;
626 snprintf(rss_param_name, sizeof(rss_param_name),
627 SFXGE_PARAM(%d.max_rss_channels),
628 (int)device_get_unit(dev));
629 TUNABLE_INT_FETCH(rss_param_name, &sc->max_rss_channels);
631 sc->stats_node = SYSCTL_ADD_NODE(
632 device_get_sysctl_ctx(dev),
633 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
634 OID_AUTO, "stats", CTLFLAG_RD, NULL, "Statistics");
635 if (sc->stats_node == NULL) {
640 TASK_INIT(&sc->task_reset, 0, sfxge_reset, sc);
642 (void) pci_enable_busmaster(dev);
644 /* Initialize DMA mappings. */
645 DBGPRINT(sc->dev, "dma_init...");
646 if ((error = sfxge_dma_init(sc)) != 0)
649 /* Map the device registers. */
650 DBGPRINT(sc->dev, "bar_init...");
651 if ((error = sfxge_bar_init(sc)) != 0)
654 error = efx_family(pci_get_vendor(dev), pci_get_device(dev),
656 KASSERT(error == 0, ("Family should be filtered by sfxge_probe()"));
658 DBGPRINT(sc->dev, "nic_create...");
660 /* Create the common code nic object. */
661 SFXGE_EFSYS_LOCK_INIT(&sc->enp_lock,
662 device_get_nameunit(sc->dev), "nic");
663 if ((error = efx_nic_create(sc->family, (efsys_identifier_t *)sc,
664 &sc->bar, &sc->enp_lock, &enp)) != 0)
668 if (!ISP2(sfxge_rx_ring_entries) ||
669 (sfxge_rx_ring_entries < EFX_RXQ_MINNDESCS) ||
670 (sfxge_rx_ring_entries > EFX_RXQ_MAXNDESCS)) {
671 log(LOG_ERR, "%s=%d must be power of 2 from %u to %u",
672 SFXGE_PARAM_RX_RING, sfxge_rx_ring_entries,
673 EFX_RXQ_MINNDESCS, EFX_RXQ_MAXNDESCS);
675 goto fail_rx_ring_entries;
677 sc->rxq_entries = sfxge_rx_ring_entries;
679 if (!ISP2(sfxge_tx_ring_entries) ||
680 (sfxge_tx_ring_entries < EFX_TXQ_MINNDESCS) ||
681 (sfxge_tx_ring_entries > EFX_TXQ_MAXNDESCS(efx_nic_cfg_get(enp)))) {
682 log(LOG_ERR, "%s=%d must be power of 2 from %u to %u",
683 SFXGE_PARAM_TX_RING, sfxge_tx_ring_entries,
684 EFX_TXQ_MINNDESCS, EFX_TXQ_MAXNDESCS(efx_nic_cfg_get(enp)));
686 goto fail_tx_ring_entries;
688 sc->txq_entries = sfxge_tx_ring_entries;
690 /* Initialize MCDI to talk to the microcontroller. */
691 DBGPRINT(sc->dev, "mcdi_init...");
692 if ((error = sfxge_mcdi_init(sc)) != 0)
695 /* Probe the NIC and build the configuration data area. */
696 DBGPRINT(sc->dev, "nic_probe...");
697 if ((error = efx_nic_probe(enp)) != 0)
700 SYSCTL_ADD_STRING(device_get_sysctl_ctx(dev),
701 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
702 OID_AUTO, "version", CTLFLAG_RD,
703 SFXGE_VERSION_STRING, 0,
706 SYSCTL_ADD_UINT(device_get_sysctl_ctx(dev),
707 SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
708 OID_AUTO, "phy_type", CTLFLAG_RD,
709 NULL, efx_nic_cfg_get(enp)->enc_phy_type,
712 /* Initialize the NVRAM. */
713 DBGPRINT(sc->dev, "nvram_init...");
714 if ((error = efx_nvram_init(enp)) != 0)
717 /* Initialize the VPD. */
718 DBGPRINT(sc->dev, "vpd_init...");
719 if ((error = efx_vpd_init(enp)) != 0)
722 efx_mcdi_new_epoch(enp);
725 DBGPRINT(sc->dev, "nic_reset...");
726 if ((error = efx_nic_reset(enp)) != 0)
729 /* Initialize buffer table allocation. */
730 sc->buffer_table_next = 0;
733 * Guarantee minimum and estimate maximum number of event queues
734 * to take it into account when MSI-X interrupts are allocated.
735 * It initializes NIC and keeps it initialized on success.
737 if ((error = sfxge_estimate_rsrc_limits(sc)) != 0)
740 /* Set up interrupts. */
741 DBGPRINT(sc->dev, "intr_init...");
742 if ((error = sfxge_intr_init(sc)) != 0)
745 /* Initialize event processing state. */
746 DBGPRINT(sc->dev, "ev_init...");
747 if ((error = sfxge_ev_init(sc)) != 0)
750 /* Initialize port state. */
751 DBGPRINT(sc->dev, "port_init...");
752 if ((error = sfxge_port_init(sc)) != 0)
755 /* Initialize receive state. */
756 DBGPRINT(sc->dev, "rx_init...");
757 if ((error = sfxge_rx_init(sc)) != 0)
760 /* Initialize transmit state. */
761 DBGPRINT(sc->dev, "tx_init...");
762 if ((error = sfxge_tx_init(sc)) != 0)
765 sc->init_state = SFXGE_INITIALIZED;
767 DBGPRINT(sc->dev, "success");
783 efx_nic_fini(sc->enp);
792 efx_nic_unprobe(enp);
798 fail_tx_ring_entries:
799 fail_rx_ring_entries:
801 efx_nic_destroy(enp);
802 SFXGE_EFSYS_LOCK_DESTROY(&sc->enp_lock);
806 (void) pci_disable_busmaster(sc->dev);
809 DBGPRINT(sc->dev, "failed %d", error);
811 SFXGE_ADAPTER_LOCK_DESTROY(sc);
816 sfxge_destroy(struct sfxge_softc *sc)
820 /* Clean up transmit state. */
823 /* Clean up receive state. */
826 /* Clean up port state. */
829 /* Clean up event processing state. */
832 /* Clean up interrupts. */
835 /* Tear down common code subsystems. */
836 efx_nic_reset(sc->enp);
837 efx_vpd_fini(sc->enp);
838 efx_nvram_fini(sc->enp);
839 efx_nic_unprobe(sc->enp);
841 /* Tear down MCDI. */
844 /* Destroy common code context. */
847 efx_nic_destroy(enp);
849 /* Free DMA memory. */
852 /* Free mapped BARs. */
855 (void) pci_disable_busmaster(sc->dev);
857 taskqueue_drain(taskqueue_thread, &sc->task_reset);
859 /* Destroy the softc lock. */
860 SFXGE_ADAPTER_LOCK_DESTROY(sc);
864 sfxge_vpd_handler(SYSCTL_HANDLER_ARGS)
866 struct sfxge_softc *sc = arg1;
867 efx_vpd_value_t value;
870 value.evv_tag = arg2 >> 16;
871 value.evv_keyword = arg2 & 0xffff;
872 if ((rc = efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value))
876 return (SYSCTL_OUT(req, value.evv_value, value.evv_length));
880 sfxge_vpd_try_add(struct sfxge_softc *sc, struct sysctl_oid_list *list,
881 efx_vpd_tag_t tag, const char *keyword)
883 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
884 efx_vpd_value_t value;
886 /* Check whether VPD tag/keyword is present */
888 value.evv_keyword = EFX_VPD_KEYWORD(keyword[0], keyword[1]);
889 if (efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value) != 0)
893 ctx, list, OID_AUTO, keyword, CTLTYPE_STRING|CTLFLAG_RD,
894 sc, tag << 16 | EFX_VPD_KEYWORD(keyword[0], keyword[1]),
895 sfxge_vpd_handler, "A", "");
899 sfxge_vpd_init(struct sfxge_softc *sc)
901 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
902 struct sysctl_oid *vpd_node;
903 struct sysctl_oid_list *vpd_list;
905 efx_vpd_value_t value;
908 if ((rc = efx_vpd_size(sc->enp, &sc->vpd_size)) != 0) {
910 * Unpriviledged functions deny VPD access.
911 * Simply skip VPD in this case.
917 sc->vpd_data = malloc(sc->vpd_size, M_SFXGE, M_WAITOK);
918 if ((rc = efx_vpd_read(sc->enp, sc->vpd_data, sc->vpd_size)) != 0)
921 /* Copy ID (product name) into device description, and log it. */
922 value.evv_tag = EFX_VPD_ID;
923 if (efx_vpd_get(sc->enp, sc->vpd_data, sc->vpd_size, &value) == 0) {
924 value.evv_value[value.evv_length] = 0;
925 device_set_desc_copy(sc->dev, value.evv_value);
926 device_printf(sc->dev, "%s\n", value.evv_value);
929 vpd_node = SYSCTL_ADD_NODE(
930 ctx, SYSCTL_CHILDREN(device_get_sysctl_tree(sc->dev)),
931 OID_AUTO, "vpd", CTLFLAG_RD, NULL, "Vital Product Data");
932 vpd_list = SYSCTL_CHILDREN(vpd_node);
934 /* Add sysctls for all expected and any vendor-defined keywords. */
935 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "PN");
936 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "EC");
937 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, "SN");
940 for (keyword[1] = '0'; keyword[1] <= '9'; keyword[1]++)
941 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, keyword);
942 for (keyword[1] = 'A'; keyword[1] <= 'Z'; keyword[1]++)
943 sfxge_vpd_try_add(sc, vpd_list, EFX_VPD_RO, keyword);
949 free(sc->vpd_data, M_SFXGE);
955 sfxge_vpd_fini(struct sfxge_softc *sc)
957 free(sc->vpd_data, M_SFXGE);
961 sfxge_reset(void *arg, int npending)
963 struct sfxge_softc *sc;
969 sc = (struct sfxge_softc *)arg;
971 SFXGE_ADAPTER_LOCK(sc);
973 if (sc->init_state != SFXGE_STARTED)
977 efx_nic_reset(sc->enp);
978 for (attempt = 0; attempt < 3; ++attempt) {
979 if ((rc = sfxge_start(sc)) == 0)
982 device_printf(sc->dev, "start on reset failed (%d)\n", rc);
986 device_printf(sc->dev, "reset failed; interface is now stopped\n");
989 SFXGE_ADAPTER_UNLOCK(sc);
993 sfxge_schedule_reset(struct sfxge_softc *sc)
995 taskqueue_enqueue(taskqueue_thread, &sc->task_reset);
999 sfxge_attach(device_t dev)
1001 struct sfxge_softc *sc;
1005 sc = device_get_softc(dev);
1008 /* Allocate ifnet. */
1009 ifp = if_alloc(IFT_ETHER);
1011 device_printf(dev, "Couldn't allocate ifnet\n");
1017 /* Initialize hardware. */
1018 DBGPRINT(sc->dev, "create nic");
1019 if ((error = sfxge_create(sc)) != 0)
1022 /* Create the ifnet for the port. */
1023 DBGPRINT(sc->dev, "init ifnet");
1024 if ((error = sfxge_ifnet_init(ifp, sc)) != 0)
1027 DBGPRINT(sc->dev, "init vpd");
1028 if ((error = sfxge_vpd_init(sc)) != 0)
1032 * NIC is initialized inside sfxge_create() and kept inialized
1033 * to be able to initialize port to discover media types in
1034 * sfxge_ifnet_init().
1036 efx_nic_fini(sc->enp);
1038 sc->init_state = SFXGE_REGISTERED;
1040 DBGPRINT(sc->dev, "success");
1044 sfxge_ifnet_fini(ifp);
1046 efx_nic_fini(sc->enp);
1053 DBGPRINT(sc->dev, "failed %d", error);
1058 sfxge_detach(device_t dev)
1060 struct sfxge_softc *sc;
1062 sc = device_get_softc(dev);
1066 /* Destroy the ifnet. */
1067 sfxge_ifnet_fini(sc->ifnet);
1069 /* Tear down hardware. */
1076 sfxge_probe(device_t dev)
1078 uint16_t pci_vendor_id;
1079 uint16_t pci_device_id;
1080 efx_family_t family;
1083 pci_vendor_id = pci_get_vendor(dev);
1084 pci_device_id = pci_get_device(dev);
1086 DBGPRINT(dev, "PCI ID %04x:%04x", pci_vendor_id, pci_device_id);
1087 rc = efx_family(pci_vendor_id, pci_device_id, &family);
1089 DBGPRINT(dev, "efx_family fail %d", rc);
1093 if (family == EFX_FAMILY_SIENA) {
1094 device_set_desc(dev, "Solarflare SFC9000 family");
1098 if (family == EFX_FAMILY_HUNTINGTON) {
1099 device_set_desc(dev, "Solarflare SFC9100 family");
1103 DBGPRINT(dev, "impossible controller family %d", family);
1107 static device_method_t sfxge_methods[] = {
1108 DEVMETHOD(device_probe, sfxge_probe),
1109 DEVMETHOD(device_attach, sfxge_attach),
1110 DEVMETHOD(device_detach, sfxge_detach),
1115 static devclass_t sfxge_devclass;
1117 static driver_t sfxge_driver = {
1120 sizeof(struct sfxge_softc)
1123 DRIVER_MODULE(sfxge, pci, sfxge_driver, sfxge_devclass, 0, 0);