2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2010-2016 Solarflare Communications Inc.
7 * This software was developed in part by Philip Paeps under contract for
8 * Solarflare Communications, Inc.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
29 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 * The views and conclusions contained in the software and documentation are
32 * those of the authors and should not be interpreted as representing official
33 * policies, either expressed or implied, of the FreeBSD Project.
36 #include <sys/cdefs.h>
37 __FBSDID("$FreeBSD$");
41 #include <sys/param.h>
43 #include <sys/kernel.h>
44 #include <sys/malloc.h>
45 #include <sys/queue.h>
47 #include <sys/syslog.h>
48 #include <sys/taskqueue.h>
50 #include <machine/bus.h>
51 #include <machine/resource.h>
53 #include <dev/pci/pcireg.h>
54 #include <dev/pci/pcivar.h>
57 #include <net/rss_config.h>
60 #include "common/efx.h"
65 sfxge_intr_line_filter(void *arg)
67 struct sfxge_evq *evq;
68 struct sfxge_softc *sc;
70 struct sfxge_intr *intr;
74 evq = (struct sfxge_evq *)arg;
79 KASSERT(intr != NULL, ("intr == NULL"));
80 KASSERT(intr->type == EFX_INTR_LINE,
81 ("intr->type != EFX_INTR_LINE"));
83 if (intr->state != SFXGE_INTR_STARTED)
84 return (FILTER_STRAY);
86 (void)efx_intr_status_line(enp, &fatal, &qmask);
89 (void) efx_intr_disable(enp);
90 (void) efx_intr_fatal(enp);
91 return (FILTER_HANDLED);
96 return (FILTER_SCHEDULE_THREAD);
99 /* SF bug 15783: If the function is not asserting its IRQ and
100 * we read the queue mask on the cycle before a flag is added
101 * to the mask, this inhibits the function from asserting the
102 * IRQ even though we don't see the flag set. To work around
103 * this, we must re-prime all event queues and report the IRQ
104 * as handled when we see a mask of zero. To allow for shared
105 * IRQs, we don't repeat this if we see a mask of zero twice
108 if (intr->zero_count++ == 0) {
109 if (evq->init_state == SFXGE_EVQ_STARTED) {
110 if (efx_ev_qpending(evq->common, evq->read_ptr))
111 return (FILTER_SCHEDULE_THREAD);
112 efx_ev_qprime(evq->common, evq->read_ptr);
113 return (FILTER_HANDLED);
117 return (FILTER_STRAY);
121 sfxge_intr_line(void *arg)
123 struct sfxge_evq *evq = arg;
125 (void)sfxge_ev_qpoll(evq);
129 sfxge_intr_message(void *arg)
131 struct sfxge_evq *evq;
132 struct sfxge_softc *sc;
134 struct sfxge_intr *intr;
138 evq = (struct sfxge_evq *)arg;
144 KASSERT(intr != NULL, ("intr == NULL"));
145 KASSERT(intr->type == EFX_INTR_MESSAGE,
146 ("intr->type != EFX_INTR_MESSAGE"));
148 if (__predict_false(intr->state != SFXGE_INTR_STARTED))
151 (void)efx_intr_status_message(enp, index, &fatal);
154 (void)efx_intr_disable(enp);
155 (void)efx_intr_fatal(enp);
159 (void)sfxge_ev_qpoll(evq);
163 sfxge_intr_bus_enable(struct sfxge_softc *sc)
165 struct sfxge_intr *intr;
166 struct sfxge_intr_hdl *table;
167 driver_filter_t *filter;
168 driver_intr_t *handler;
175 switch (intr->type) {
176 case EFX_INTR_MESSAGE:
177 filter = NULL; /* not shared */
178 handler = sfxge_intr_message;
182 filter = sfxge_intr_line_filter;
183 handler = sfxge_intr_line;
187 KASSERT(0, ("Invalid interrupt type"));
191 /* Try to add the handlers */
192 for (index = 0; index < intr->n_alloc; index++) {
193 if ((err = bus_setup_intr(sc->dev, table[index].eih_res,
194 INTR_MPSAFE|INTR_TYPE_NET, filter, handler,
195 sc->evq[index], &table[index].eih_tag)) != 0) {
198 if (intr->n_alloc > 1)
199 bus_describe_intr(sc->dev, table[index].eih_res,
200 table[index].eih_tag, "%d", index);
202 bus_bind_intr(sc->dev, table[index].eih_res,
205 bus_bind_intr(sc->dev, table[index].eih_res, index);
212 /* Remove remaining handlers */
214 bus_teardown_intr(sc->dev, table[index].eih_res,
215 table[index].eih_tag);
221 sfxge_intr_bus_disable(struct sfxge_softc *sc)
223 struct sfxge_intr *intr;
224 struct sfxge_intr_hdl *table;
230 /* Remove all handlers */
231 for (i = 0; i < intr->n_alloc; i++)
232 bus_teardown_intr(sc->dev, table[i].eih_res,
237 sfxge_intr_alloc(struct sfxge_softc *sc, int count)
240 struct sfxge_intr_hdl *table;
241 struct sfxge_intr *intr;
242 struct resource *res;
251 table = malloc(count * sizeof(struct sfxge_intr_hdl),
255 for (i = 0; i < count; i++) {
257 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
258 RF_SHAREABLE | RF_ACTIVE);
260 device_printf(dev, "Couldn't allocate interrupts for "
261 "message %d\n", rid);
265 table[i].eih_rid = rid;
266 table[i].eih_res = res;
271 for (i = 0; i < count; i++)
272 bus_release_resource(dev, SYS_RES_IRQ,
273 table[i].eih_rid, table[i].eih_res);
280 sfxge_intr_teardown_msix(struct sfxge_softc *sc)
283 struct resource *resp;
287 resp = sc->intr.msix_res;
289 rid = rman_get_rid(resp);
290 bus_release_resource(dev, SYS_RES_MEMORY, rid, resp);
294 sfxge_intr_setup_msix(struct sfxge_softc *sc)
296 struct sfxge_intr *intr;
297 struct resource *resp;
305 /* Check if MSI-X is available. */
306 count = pci_msix_count(dev);
310 /* Do not try to allocate more than already estimated EVQ maximum */
311 KASSERT(sc->evq_max > 0, ("evq_max is zero"));
312 count = MIN(count, sc->evq_max);
315 resp = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
319 if (pci_alloc_msix(dev, &count) != 0) {
320 bus_release_resource(dev, SYS_RES_MEMORY, rid, resp);
324 /* Allocate interrupt handlers. */
325 if (sfxge_intr_alloc(sc, count) != 0) {
326 bus_release_resource(dev, SYS_RES_MEMORY, rid, resp);
327 pci_release_msi(dev);
331 intr->type = EFX_INTR_MESSAGE;
332 intr->n_alloc = count;
333 intr->msix_res = resp;
339 sfxge_intr_setup_msi(struct sfxge_softc *sc)
341 struct sfxge_intr_hdl *table;
342 struct sfxge_intr *intr;
352 * Check if MSI is available. All messages must be written to
353 * the same address and on x86 this means the IRQs have the
354 * same CPU affinity. So we only ever allocate 1.
356 count = pci_msi_count(dev) ? 1 : 0;
360 if ((error = pci_alloc_msi(dev, &count)) != 0)
363 /* Allocate interrupt handler. */
364 if (sfxge_intr_alloc(sc, count) != 0) {
365 pci_release_msi(dev);
369 intr->type = EFX_INTR_MESSAGE;
370 intr->n_alloc = count;
376 sfxge_intr_setup_fixed(struct sfxge_softc *sc)
378 struct sfxge_intr_hdl *table;
379 struct sfxge_intr *intr;
380 struct resource *res;
388 res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
389 RF_SHAREABLE | RF_ACTIVE);
393 table = malloc(sizeof(struct sfxge_intr_hdl), M_SFXGE, M_WAITOK);
394 table[0].eih_rid = rid;
395 table[0].eih_res = res;
397 intr->type = EFX_INTR_LINE;
404 static const char *const __sfxge_err[] = {
406 "SRAM out-of-bounds",
407 "Buffer ID out-of-bounds",
408 "Internal memory parity",
409 "Receive buffer ownership",
410 "Transmit buffer ownership",
411 "Receive descriptor ownership",
412 "Transmit descriptor ownership",
413 "Event queue ownership",
414 "Event queue FIFO overflow",
420 sfxge_err(efsys_identifier_t *arg, unsigned int code, uint32_t dword0,
423 struct sfxge_softc *sc = (struct sfxge_softc *)arg;
424 device_t dev = sc->dev;
426 log(LOG_WARNING, "[%s%d] FATAL ERROR: %s (0x%08x%08x)",
427 device_get_name(dev), device_get_unit(dev),
428 __sfxge_err[code], dword1, dword0);
432 sfxge_intr_stop(struct sfxge_softc *sc)
434 struct sfxge_intr *intr;
438 KASSERT(intr->state == SFXGE_INTR_STARTED,
439 ("Interrupts not started"));
441 intr->state = SFXGE_INTR_INITIALIZED;
443 /* Disable interrupts at the NIC */
444 efx_intr_disable(sc->enp);
446 /* Disable interrupts at the bus */
447 sfxge_intr_bus_disable(sc);
449 /* Tear down common code interrupt bits. */
450 efx_intr_fini(sc->enp);
454 sfxge_intr_start(struct sfxge_softc *sc)
456 struct sfxge_intr *intr;
461 esmp = &intr->status;
463 KASSERT(intr->state == SFXGE_INTR_INITIALIZED,
464 ("Interrupts not initialized"));
466 /* Zero the memory. */
467 (void)memset(esmp->esm_base, 0, EFX_INTR_SIZE);
469 /* Initialize common code interrupt bits. */
470 (void)efx_intr_init(sc->enp, intr->type, esmp);
472 /* Enable interrupts at the bus */
473 if ((rc = sfxge_intr_bus_enable(sc)) != 0)
476 intr->state = SFXGE_INTR_STARTED;
478 /* Enable interrupts at the NIC */
479 efx_intr_enable(sc->enp);
484 /* Tear down common code interrupt bits. */
485 efx_intr_fini(sc->enp);
487 intr->state = SFXGE_INTR_INITIALIZED;
493 sfxge_intr_fini(struct sfxge_softc *sc)
495 struct sfxge_intr_hdl *table;
496 struct sfxge_intr *intr;
503 esmp = &intr->status;
506 KASSERT(intr->state == SFXGE_INTR_INITIALIZED,
507 ("intr->state != SFXGE_INTR_INITIALIZED"));
509 /* Free DMA memory. */
510 sfxge_dma_free(esmp);
512 /* Free interrupt handles. */
513 for (i = 0; i < intr->n_alloc; i++)
514 bus_release_resource(dev, SYS_RES_IRQ,
515 table[i].eih_rid, table[i].eih_res);
517 if (table[0].eih_rid != 0)
518 pci_release_msi(dev);
520 if (intr->msix_res != NULL)
521 sfxge_intr_teardown_msix(sc);
523 /* Free the handle table */
524 free(table, M_SFXGE);
528 /* Clear the interrupt type */
529 intr->type = EFX_INTR_INVALID;
531 intr->state = SFXGE_INTR_UNINITIALIZED;
535 sfxge_intr_init(struct sfxge_softc *sc)
538 struct sfxge_intr *intr;
544 esmp = &intr->status;
546 KASSERT(intr->state == SFXGE_INTR_UNINITIALIZED,
547 ("Interrupts already initialized"));
549 /* Try to setup MSI-X or MSI interrupts if available. */
550 if ((rc = sfxge_intr_setup_msix(sc)) == 0)
551 device_printf(dev, "Using MSI-X interrupts\n");
552 else if ((rc = sfxge_intr_setup_msi(sc)) == 0)
553 device_printf(dev, "Using MSI interrupts\n");
554 else if ((rc = sfxge_intr_setup_fixed(sc)) == 0) {
555 device_printf(dev, "Using fixed interrupts\n");
557 device_printf(dev, "Couldn't setup interrupts\n");
561 /* Set up DMA for interrupts. */
562 if ((rc = sfxge_dma_alloc(sc, EFX_INTR_SIZE, esmp)) != 0)
565 intr->state = SFXGE_INTR_INITIALIZED;