2 * Copyright (c) 2010-2016 Solarflare Communications Inc.
5 * This software was developed in part by Philip Paeps under contract for
6 * Solarflare Communications, Inc.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
11 * 1. Redistributions of source code must retain the above copyright notice,
12 * this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright notice,
14 * this list of conditions and the following disclaimer in the documentation
15 * and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
19 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
21 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
22 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
23 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
24 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
26 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
27 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 * The views and conclusions contained in the software and documentation are
30 * those of the authors and should not be interpreted as representing official
31 * policies, either expressed or implied, of the FreeBSD Project.
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
37 #include <sys/types.h>
38 #include <sys/limits.h>
39 #include <net/ethernet.h>
40 #include <net/if_dl.h>
42 #include "common/efx.h"
46 #define SFXGE_PARAM_STATS_UPDATE_PERIOD_MS \
47 SFXGE_PARAM(stats_update_period_ms)
48 static int sfxge_stats_update_period_ms = SFXGE_STATS_UPDATE_PERIOD_MS;
49 TUNABLE_INT(SFXGE_PARAM_STATS_UPDATE_PERIOD_MS,
50 &sfxge_stats_update_period_ms);
51 SYSCTL_INT(_hw_sfxge, OID_AUTO, stats_update_period_ms, CTLFLAG_RDTUN,
52 &sfxge_stats_update_period_ms, 0,
53 "netstat interface statistics update period in milliseconds");
55 static int sfxge_phy_cap_mask(struct sfxge_softc *, int, uint32_t *);
58 sfxge_mac_stat_update(struct sfxge_softc *sc)
60 struct sfxge_port *port = &sc->port;
61 efsys_mem_t *esmp = &(port->mac_stats.dma_buf);
63 unsigned int min_ticks;
67 SFXGE_PORT_LOCK_ASSERT_OWNED(port);
69 if (__predict_false(port->init_state != SFXGE_PORT_STARTED)) {
74 min_ticks = (unsigned int)hz * port->stats_update_period_ms / 1000;
77 if ((unsigned int)(now - port->mac_stats.update_time) < min_ticks) {
82 port->mac_stats.update_time = now;
84 /* If we're unlucky enough to read statistics wduring the DMA, wait
85 * up to 10ms for it to finish (typically takes <500us) */
86 for (count = 0; count < 100; ++count) {
87 EFSYS_PROBE1(wait, unsigned int, count);
89 /* Try to update the cached counters */
90 if ((rc = efx_mac_stats_update(sc->enp, esmp,
91 port->mac_stats.decode_buf, NULL)) != EAGAIN)
103 sfxge_get_counter(struct ifnet *ifp, ift_counter c)
105 struct sfxge_softc *sc = ifp->if_softc;
109 SFXGE_PORT_LOCK(&sc->port);
111 /* Ignore error and use old values */
112 (void)sfxge_mac_stat_update(sc);
114 mac_stats = (uint64_t *)sc->port.mac_stats.decode_buf;
117 case IFCOUNTER_IPACKETS:
118 val = mac_stats[EFX_MAC_RX_PKTS];
120 case IFCOUNTER_IERRORS:
121 val = mac_stats[EFX_MAC_RX_ERRORS];
123 case IFCOUNTER_OPACKETS:
124 val = mac_stats[EFX_MAC_TX_PKTS];
126 case IFCOUNTER_OERRORS:
127 val = mac_stats[EFX_MAC_TX_ERRORS];
129 case IFCOUNTER_COLLISIONS:
130 val = mac_stats[EFX_MAC_TX_SGL_COL_PKTS] +
131 mac_stats[EFX_MAC_TX_MULT_COL_PKTS] +
132 mac_stats[EFX_MAC_TX_EX_COL_PKTS] +
133 mac_stats[EFX_MAC_TX_LATE_COL_PKTS];
135 case IFCOUNTER_IBYTES:
136 val = mac_stats[EFX_MAC_RX_OCTETS];
138 case IFCOUNTER_OBYTES:
139 val = mac_stats[EFX_MAC_TX_OCTETS];
141 case IFCOUNTER_OMCASTS:
142 val = mac_stats[EFX_MAC_TX_MULTICST_PKTS] +
143 mac_stats[EFX_MAC_TX_BRDCST_PKTS];
145 case IFCOUNTER_OQDROPS:
146 SFXGE_PORT_UNLOCK(&sc->port);
147 return (sfxge_tx_get_drops(sc));
148 case IFCOUNTER_IMCASTS:
149 /* if_imcasts is maintained in net/if_ethersubr.c */
150 case IFCOUNTER_IQDROPS:
151 /* if_iqdrops is maintained in net/if_ethersubr.c */
152 case IFCOUNTER_NOPROTO:
153 /* if_noproto is maintained in net/if_ethersubr.c */
155 SFXGE_PORT_UNLOCK(&sc->port);
156 return (if_get_counter_default(ifp, c));
159 SFXGE_PORT_UNLOCK(&sc->port);
165 sfxge_mac_stat_handler(SYSCTL_HANDLER_ARGS)
167 struct sfxge_softc *sc = arg1;
168 unsigned int id = arg2;
172 SFXGE_PORT_LOCK(&sc->port);
173 if ((rc = sfxge_mac_stat_update(sc)) == 0)
174 val = ((uint64_t *)sc->port.mac_stats.decode_buf)[id];
175 SFXGE_PORT_UNLOCK(&sc->port);
178 rc = SYSCTL_OUT(req, &val, sizeof(val));
183 sfxge_mac_stat_init(struct sfxge_softc *sc)
185 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
186 struct sysctl_oid_list *stat_list;
190 stat_list = SYSCTL_CHILDREN(sc->stats_node);
192 /* Initialise the named stats */
193 for (id = 0; id < EFX_MAC_NSTATS; id++) {
194 name = efx_mac_stat_name(sc->enp, id);
197 OID_AUTO, name, CTLTYPE_U64|CTLFLAG_RD,
198 sc, id, sfxge_mac_stat_handler, "Q",
203 #ifdef SFXGE_HAVE_PAUSE_MEDIAOPTS
206 sfxge_port_wanted_fc(struct sfxge_softc *sc)
208 struct ifmedia_entry *ifm = sc->media.ifm_cur;
210 if (ifm->ifm_media == (IFM_ETHER | IFM_AUTO))
211 return (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE);
212 return (((ifm->ifm_media & IFM_ETH_RXPAUSE) ? EFX_FCNTL_RESPOND : 0) |
213 ((ifm->ifm_media & IFM_ETH_TXPAUSE) ? EFX_FCNTL_GENERATE : 0));
217 sfxge_port_link_fc_ifm(struct sfxge_softc *sc)
219 unsigned int wanted_fc, link_fc;
221 efx_mac_fcntl_get(sc->enp, &wanted_fc, &link_fc);
222 return ((link_fc & EFX_FCNTL_RESPOND) ? IFM_ETH_RXPAUSE : 0) |
223 ((link_fc & EFX_FCNTL_GENERATE) ? IFM_ETH_TXPAUSE : 0);
226 #else /* !SFXGE_HAVE_PAUSE_MEDIAOPTS */
229 sfxge_port_wanted_fc(struct sfxge_softc *sc)
231 return (sc->port.wanted_fc);
235 sfxge_port_link_fc_ifm(struct sfxge_softc *sc)
241 sfxge_port_wanted_fc_handler(SYSCTL_HANDLER_ARGS)
243 struct sfxge_softc *sc;
244 struct sfxge_port *port;
251 if (req->newptr != NULL) {
252 if ((error = SYSCTL_IN(req, &fcntl, sizeof(fcntl))) != 0)
255 SFXGE_PORT_LOCK(port);
257 if (port->wanted_fc != fcntl) {
258 if (port->init_state == SFXGE_PORT_STARTED)
259 error = efx_mac_fcntl_set(sc->enp,
263 port->wanted_fc = fcntl;
266 SFXGE_PORT_UNLOCK(port);
268 SFXGE_PORT_LOCK(port);
269 fcntl = port->wanted_fc;
270 SFXGE_PORT_UNLOCK(port);
272 error = SYSCTL_OUT(req, &fcntl, sizeof(fcntl));
279 sfxge_port_link_fc_handler(SYSCTL_HANDLER_ARGS)
281 struct sfxge_softc *sc;
282 struct sfxge_port *port;
283 unsigned int wanted_fc, link_fc;
288 SFXGE_PORT_LOCK(port);
289 if (__predict_true(port->init_state == SFXGE_PORT_STARTED) &&
291 efx_mac_fcntl_get(sc->enp, &wanted_fc, &link_fc);
294 SFXGE_PORT_UNLOCK(port);
296 return (SYSCTL_OUT(req, &link_fc, sizeof(link_fc)));
299 #endif /* SFXGE_HAVE_PAUSE_MEDIAOPTS */
301 static const uint64_t sfxge_link_baudrate[EFX_LINK_NMODES] = {
302 [EFX_LINK_10HDX] = IF_Mbps(10),
303 [EFX_LINK_10FDX] = IF_Mbps(10),
304 [EFX_LINK_100HDX] = IF_Mbps(100),
305 [EFX_LINK_100FDX] = IF_Mbps(100),
306 [EFX_LINK_1000HDX] = IF_Gbps(1),
307 [EFX_LINK_1000FDX] = IF_Gbps(1),
308 [EFX_LINK_10000FDX] = IF_Gbps(10),
309 [EFX_LINK_40000FDX] = IF_Gbps(40),
313 sfxge_mac_link_update(struct sfxge_softc *sc, efx_link_mode_t mode)
315 struct sfxge_port *port;
320 if (port->link_mode == mode)
323 port->link_mode = mode;
325 /* Push link state update to the OS */
326 link_state = (SFXGE_LINK_UP(sc) ? LINK_STATE_UP : LINK_STATE_DOWN);
327 sc->ifnet->if_baudrate = sfxge_link_baudrate[port->link_mode];
328 if_link_state_change(sc->ifnet, link_state);
332 sfxge_mac_poll_work(void *arg, int npending)
334 struct sfxge_softc *sc;
336 struct sfxge_port *port;
337 efx_link_mode_t mode;
339 sc = (struct sfxge_softc *)arg;
343 SFXGE_PORT_LOCK(port);
345 if (__predict_false(port->init_state != SFXGE_PORT_STARTED))
348 /* This may sleep waiting for MCDI completion */
349 (void)efx_port_poll(enp, &mode);
350 sfxge_mac_link_update(sc, mode);
353 SFXGE_PORT_UNLOCK(port);
357 sfxge_mac_multicast_list_set(struct sfxge_softc *sc)
359 struct ifnet *ifp = sc->ifnet;
360 struct sfxge_port *port = &sc->port;
361 uint8_t *mcast_addr = port->mcast_addrs;
362 struct ifmultiaddr *ifma;
363 struct sockaddr_dl *sa;
366 mtx_assert(&port->lock, MA_OWNED);
368 port->mcast_count = 0;
370 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
371 if (ifma->ifma_addr->sa_family == AF_LINK) {
372 if (port->mcast_count == EFX_MAC_MULTICAST_LIST_MAX) {
373 device_printf(sc->dev,
374 "Too many multicast addresses\n");
379 sa = (struct sockaddr_dl *)ifma->ifma_addr;
380 memcpy(mcast_addr, LLADDR(sa), EFX_MAC_ADDR_LEN);
381 mcast_addr += EFX_MAC_ADDR_LEN;
385 if_maddr_runlock(ifp);
388 rc = efx_mac_multicast_list_set(sc->enp, port->mcast_addrs,
391 device_printf(sc->dev,
392 "Cannot set multicast address list\n");
399 sfxge_mac_filter_set_locked(struct sfxge_softc *sc)
401 struct ifnet *ifp = sc->ifnet;
402 struct sfxge_port *port = &sc->port;
403 boolean_t all_mulcst;
406 mtx_assert(&port->lock, MA_OWNED);
408 all_mulcst = !!(ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI));
410 rc = sfxge_mac_multicast_list_set(sc);
411 /* Fallback to all multicast if cannot set multicast list */
415 rc = efx_mac_filter_set(sc->enp, !!(ifp->if_flags & IFF_PROMISC),
416 (port->mcast_count > 0), all_mulcst, B_TRUE);
422 sfxge_mac_filter_set(struct sfxge_softc *sc)
424 struct sfxge_port *port = &sc->port;
427 SFXGE_PORT_LOCK(port);
429 * The function may be called without softc_lock held in the
430 * case of SIOCADDMULTI and SIOCDELMULTI ioctls. ioctl handler
431 * checks IFF_DRV_RUNNING flag which implies port started, but
432 * it is not guaranteed to remain. softc_lock shared lock can't
433 * be held in the case of these ioctls processing, since it
434 * results in failure where kernel complains that non-sleepable
435 * lock is held in sleeping thread. Both problems are repeatable
436 * on LAG with LACP proto bring up.
438 if (__predict_true(port->init_state == SFXGE_PORT_STARTED))
439 rc = sfxge_mac_filter_set_locked(sc);
442 SFXGE_PORT_UNLOCK(port);
447 sfxge_port_stop(struct sfxge_softc *sc)
449 struct sfxge_port *port;
455 SFXGE_PORT_LOCK(port);
457 KASSERT(port->init_state == SFXGE_PORT_STARTED,
458 ("port not started"));
460 port->init_state = SFXGE_PORT_INITIALIZED;
462 port->mac_stats.update_time = 0;
464 /* This may call MCDI */
465 (void)efx_mac_drain(enp, B_TRUE);
467 (void)efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf, 0, B_FALSE);
469 port->link_mode = EFX_LINK_UNKNOWN;
471 /* Destroy the common code port object. */
474 efx_filter_fini(enp);
476 SFXGE_PORT_UNLOCK(port);
480 sfxge_port_start(struct sfxge_softc *sc)
482 uint8_t mac_addr[ETHER_ADDR_LEN];
483 struct ifnet *ifp = sc->ifnet;
484 struct sfxge_port *port;
488 uint32_t phy_cap_mask;
493 SFXGE_PORT_LOCK(port);
495 KASSERT(port->init_state == SFXGE_PORT_INITIALIZED,
496 ("port not initialized"));
498 /* Initialise the required filtering */
499 if ((rc = efx_filter_init(enp)) != 0)
500 goto fail_filter_init;
502 /* Initialize the port object in the common code. */
503 if ((rc = efx_port_init(sc->enp)) != 0)
507 pdu = EFX_MAC_PDU(ifp->if_mtu);
508 if ((rc = efx_mac_pdu_set(enp, pdu)) != 0)
511 if ((rc = efx_mac_fcntl_set(enp, sfxge_port_wanted_fc(sc), B_TRUE))
515 /* Set the unicast address */
517 bcopy(LLADDR((struct sockaddr_dl *)ifp->if_addr->ifa_addr),
518 mac_addr, sizeof(mac_addr));
519 if_addr_runlock(ifp);
520 if ((rc = efx_mac_addr_set(enp, mac_addr)) != 0)
523 sfxge_mac_filter_set_locked(sc);
525 /* Update MAC stats by DMA every period */
526 if ((rc = efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf,
527 port->stats_update_period_ms,
531 if ((rc = efx_mac_drain(enp, B_FALSE)) != 0)
534 if ((rc = sfxge_phy_cap_mask(sc, sc->media.ifm_cur->ifm_media,
535 &phy_cap_mask)) != 0)
538 if ((rc = efx_phy_adv_cap_set(sc->enp, phy_cap_mask)) != 0)
541 port->init_state = SFXGE_PORT_STARTED;
543 /* Single poll in case there were missing initial events */
544 SFXGE_PORT_UNLOCK(port);
545 sfxge_mac_poll_work(sc, 0);
551 (void)efx_mac_drain(enp, B_TRUE);
553 (void)efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf, 0, B_FALSE);
561 efx_filter_fini(enp);
563 SFXGE_PORT_UNLOCK(port);
569 sfxge_phy_stat_update(struct sfxge_softc *sc)
571 struct sfxge_port *port = &sc->port;
572 efsys_mem_t *esmp = &port->phy_stats.dma_buf;
577 SFXGE_PORT_LOCK_ASSERT_OWNED(port);
579 if (__predict_false(port->init_state != SFXGE_PORT_STARTED)) {
585 if ((unsigned int)(now - port->phy_stats.update_time) < (unsigned int)hz) {
590 port->phy_stats.update_time = now;
592 /* If we're unlucky enough to read statistics wduring the DMA, wait
593 * up to 10ms for it to finish (typically takes <500us) */
594 for (count = 0; count < 100; ++count) {
595 EFSYS_PROBE1(wait, unsigned int, count);
597 /* Synchronize the DMA memory for reading */
598 bus_dmamap_sync(esmp->esm_tag, esmp->esm_map,
599 BUS_DMASYNC_POSTREAD);
601 /* Try to update the cached counters */
602 if ((rc = efx_phy_stats_update(sc->enp, esmp,
603 port->phy_stats.decode_buf)) != EAGAIN)
615 sfxge_phy_stat_handler(SYSCTL_HANDLER_ARGS)
617 struct sfxge_softc *sc = arg1;
618 unsigned int id = arg2;
622 SFXGE_PORT_LOCK(&sc->port);
623 if ((rc = sfxge_phy_stat_update(sc)) == 0)
624 val = ((uint32_t *)sc->port.phy_stats.decode_buf)[id];
625 SFXGE_PORT_UNLOCK(&sc->port);
628 rc = SYSCTL_OUT(req, &val, sizeof(val));
633 sfxge_phy_stat_init(struct sfxge_softc *sc)
635 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
636 struct sysctl_oid_list *stat_list;
639 uint64_t stat_mask = efx_nic_cfg_get(sc->enp)->enc_phy_stat_mask;
641 stat_list = SYSCTL_CHILDREN(sc->stats_node);
643 /* Initialise the named stats */
644 for (id = 0; id < EFX_PHY_NSTATS; id++) {
645 if (!(stat_mask & ((uint64_t)1 << id)))
647 name = efx_phy_stat_name(sc->enp, id);
650 OID_AUTO, name, CTLTYPE_UINT|CTLFLAG_RD,
651 sc, id, sfxge_phy_stat_handler,
652 id == EFX_PHY_STAT_OUI ? "IX" : "IU",
658 sfxge_port_fini(struct sfxge_softc *sc)
660 struct sfxge_port *port;
664 esmp = &port->mac_stats.dma_buf;
666 KASSERT(port->init_state == SFXGE_PORT_INITIALIZED,
667 ("Port not initialized"));
669 port->init_state = SFXGE_PORT_UNINITIALIZED;
671 port->link_mode = EFX_LINK_UNKNOWN;
673 /* Finish with PHY DMA memory */
674 sfxge_dma_free(&port->phy_stats.dma_buf);
675 free(port->phy_stats.decode_buf, M_SFXGE);
677 sfxge_dma_free(esmp);
678 free(port->mac_stats.decode_buf, M_SFXGE);
680 SFXGE_PORT_LOCK_DESTROY(port);
686 sfxge_port_stats_update_period_ms(struct sfxge_softc *sc)
688 int period_ms = sfxge_stats_update_period_ms;
691 device_printf(sc->dev,
692 "treat negative stats update period %d as 0 (disable)\n",
695 } else if (period_ms > UINT16_MAX) {
696 device_printf(sc->dev,
697 "treat too big stats update period %d as %u\n",
698 period_ms, UINT16_MAX);
699 period_ms = UINT16_MAX;
706 sfxge_port_init(struct sfxge_softc *sc)
708 struct sfxge_port *port;
709 struct sysctl_ctx_list *sysctl_ctx;
710 struct sysctl_oid *sysctl_tree;
711 efsys_mem_t *mac_stats_buf, *phy_stats_buf;
715 mac_stats_buf = &port->mac_stats.dma_buf;
716 phy_stats_buf = &port->phy_stats.dma_buf;
718 KASSERT(port->init_state == SFXGE_PORT_UNINITIALIZED,
719 ("Port already initialized"));
723 SFXGE_PORT_LOCK_INIT(port, device_get_nameunit(sc->dev));
725 DBGPRINT(sc->dev, "alloc PHY stats");
726 port->phy_stats.decode_buf = malloc(EFX_PHY_NSTATS * sizeof(uint32_t),
727 M_SFXGE, M_WAITOK | M_ZERO);
728 if ((rc = sfxge_dma_alloc(sc, EFX_PHY_STATS_SIZE, phy_stats_buf)) != 0)
730 sfxge_phy_stat_init(sc);
732 DBGPRINT(sc->dev, "init sysctl");
733 sysctl_ctx = device_get_sysctl_ctx(sc->dev);
734 sysctl_tree = device_get_sysctl_tree(sc->dev);
736 #ifndef SFXGE_HAVE_PAUSE_MEDIAOPTS
737 /* If flow control cannot be configured or reported through
738 * ifmedia, provide sysctls for it. */
739 port->wanted_fc = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
740 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO,
741 "wanted_fc", CTLTYPE_UINT|CTLFLAG_RW, sc, 0,
742 sfxge_port_wanted_fc_handler, "IU", "wanted flow control mode");
743 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO,
744 "link_fc", CTLTYPE_UINT|CTLFLAG_RD, sc, 0,
745 sfxge_port_link_fc_handler, "IU", "link flow control mode");
748 DBGPRINT(sc->dev, "alloc MAC stats");
749 port->mac_stats.decode_buf = malloc(EFX_MAC_NSTATS * sizeof(uint64_t),
750 M_SFXGE, M_WAITOK | M_ZERO);
751 if ((rc = sfxge_dma_alloc(sc, EFX_MAC_STATS_SIZE, mac_stats_buf)) != 0)
753 port->stats_update_period_ms = sfxge_port_stats_update_period_ms(sc);
754 sfxge_mac_stat_init(sc);
756 port->init_state = SFXGE_PORT_INITIALIZED;
758 DBGPRINT(sc->dev, "success");
762 free(port->mac_stats.decode_buf, M_SFXGE);
763 sfxge_dma_free(phy_stats_buf);
765 free(port->phy_stats.decode_buf, M_SFXGE);
766 SFXGE_PORT_LOCK_DESTROY(port);
768 DBGPRINT(sc->dev, "failed %d", rc);
772 static const int sfxge_link_mode[EFX_PHY_MEDIA_NTYPES][EFX_LINK_NMODES] = {
773 [EFX_PHY_MEDIA_CX4] = {
774 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_CX4,
776 [EFX_PHY_MEDIA_KX4] = {
777 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_KX4,
779 [EFX_PHY_MEDIA_XFP] = {
780 /* Don't know the module type, but assume SR for now. */
781 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR,
783 [EFX_PHY_MEDIA_QSFP_PLUS] = {
784 /* Don't know the module type, but assume SR for now. */
785 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR,
786 [EFX_LINK_40000FDX] = IFM_ETHER | IFM_FDX | IFM_40G_CR4,
788 [EFX_PHY_MEDIA_SFP_PLUS] = {
789 /* Don't know the module type, but assume SX/SR for now. */
790 [EFX_LINK_1000FDX] = IFM_ETHER | IFM_FDX | IFM_1000_SX,
791 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR,
793 [EFX_PHY_MEDIA_BASE_T] = {
794 [EFX_LINK_10HDX] = IFM_ETHER | IFM_HDX | IFM_10_T,
795 [EFX_LINK_10FDX] = IFM_ETHER | IFM_FDX | IFM_10_T,
796 [EFX_LINK_100HDX] = IFM_ETHER | IFM_HDX | IFM_100_TX,
797 [EFX_LINK_100FDX] = IFM_ETHER | IFM_FDX | IFM_100_TX,
798 [EFX_LINK_1000HDX] = IFM_ETHER | IFM_HDX | IFM_1000_T,
799 [EFX_LINK_1000FDX] = IFM_ETHER | IFM_FDX | IFM_1000_T,
800 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_T,
805 sfxge_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
807 struct sfxge_softc *sc;
808 efx_phy_media_type_t medium_type;
809 efx_link_mode_t mode;
812 SFXGE_ADAPTER_LOCK(sc);
814 ifmr->ifm_status = IFM_AVALID;
815 ifmr->ifm_active = IFM_ETHER;
817 if (SFXGE_RUNNING(sc) && SFXGE_LINK_UP(sc)) {
818 ifmr->ifm_status |= IFM_ACTIVE;
820 efx_phy_media_type_get(sc->enp, &medium_type);
821 mode = sc->port.link_mode;
822 ifmr->ifm_active |= sfxge_link_mode[medium_type][mode];
823 ifmr->ifm_active |= sfxge_port_link_fc_ifm(sc);
826 SFXGE_ADAPTER_UNLOCK(sc);
829 static efx_phy_cap_type_t
830 sfxge_link_mode_to_phy_cap(efx_link_mode_t mode)
834 return (EFX_PHY_CAP_10HDX);
836 return (EFX_PHY_CAP_10FDX);
837 case EFX_LINK_100HDX:
838 return (EFX_PHY_CAP_100HDX);
839 case EFX_LINK_100FDX:
840 return (EFX_PHY_CAP_100FDX);
841 case EFX_LINK_1000HDX:
842 return (EFX_PHY_CAP_1000HDX);
843 case EFX_LINK_1000FDX:
844 return (EFX_PHY_CAP_1000FDX);
845 case EFX_LINK_10000FDX:
846 return (EFX_PHY_CAP_10000FDX);
847 case EFX_LINK_40000FDX:
848 return (EFX_PHY_CAP_40000FDX);
850 EFSYS_ASSERT(B_FALSE);
851 return (EFX_PHY_CAP_INVALID);
856 sfxge_phy_cap_mask(struct sfxge_softc *sc, int ifmedia, uint32_t *phy_cap_mask)
858 /* Get global options (duplex), type and subtype bits */
859 int ifmedia_masked = ifmedia & (IFM_GMASK | IFM_NMASK | IFM_TMASK);
860 efx_phy_media_type_t medium_type;
861 boolean_t mode_found = B_FALSE;
862 uint32_t cap_mask, mode_cap_mask;
863 efx_link_mode_t mode;
864 efx_phy_cap_type_t phy_cap;
866 efx_phy_media_type_get(sc->enp, &medium_type);
867 if (medium_type >= nitems(sfxge_link_mode)) {
868 if_printf(sc->ifnet, "unexpected media type %d\n", medium_type);
872 efx_phy_adv_cap_get(sc->enp, EFX_PHY_CAP_PERM, &cap_mask);
874 for (mode = EFX_LINK_10HDX; mode < EFX_LINK_NMODES; mode++) {
875 if (ifmedia_masked == sfxge_link_mode[medium_type][mode]) {
883 * If media is not in the table, it must be IFM_AUTO.
885 KASSERT((cap_mask & (1 << EFX_PHY_CAP_AN)) &&
886 ifmedia_masked == (IFM_ETHER | IFM_AUTO),
887 ("%s: no mode for media %#x", __func__, ifmedia));
888 *phy_cap_mask = (cap_mask & ~(1 << EFX_PHY_CAP_ASYM));
892 phy_cap = sfxge_link_mode_to_phy_cap(mode);
893 if (phy_cap == EFX_PHY_CAP_INVALID) {
895 "cannot map link mode %d to phy capability\n",
900 mode_cap_mask = (1 << phy_cap);
901 mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_AN);
902 #ifdef SFXGE_HAVE_PAUSE_MEDIAOPTS
903 if (ifmedia & IFM_ETH_RXPAUSE)
904 mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_PAUSE);
905 if (!(ifmedia & IFM_ETH_TXPAUSE))
906 mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_ASYM);
908 mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_PAUSE);
911 *phy_cap_mask = mode_cap_mask;
916 sfxge_media_change(struct ifnet *ifp)
918 struct sfxge_softc *sc;
919 struct ifmedia_entry *ifm;
921 uint32_t phy_cap_mask;
924 ifm = sc->media.ifm_cur;
926 SFXGE_ADAPTER_LOCK(sc);
928 if (!SFXGE_RUNNING(sc)) {
933 rc = efx_mac_fcntl_set(sc->enp, sfxge_port_wanted_fc(sc), B_TRUE);
937 if ((rc = sfxge_phy_cap_mask(sc, ifm->ifm_media, &phy_cap_mask)) != 0)
940 rc = efx_phy_adv_cap_set(sc->enp, phy_cap_mask);
942 SFXGE_ADAPTER_UNLOCK(sc);
947 int sfxge_port_ifmedia_init(struct sfxge_softc *sc)
949 efx_phy_media_type_t medium_type;
950 uint32_t cap_mask, mode_cap_mask;
951 efx_link_mode_t mode;
952 efx_phy_cap_type_t phy_cap;
953 int mode_ifm, best_mode_ifm = 0;
957 * We need port state to initialise the ifmedia list.
958 * It requires initialized NIC what is already done in
959 * sfxge_create() when resources are estimated.
961 if ((rc = efx_filter_init(sc->enp)) != 0)
963 if ((rc = efx_port_init(sc->enp)) != 0)
967 * Register ifconfig callbacks for querying and setting the
968 * link mode and link status.
970 ifmedia_init(&sc->media, IFM_IMASK, sfxge_media_change,
974 * Map firmware medium type and capabilities to ifmedia types.
975 * ifmedia does not distinguish between forcing the link mode
976 * and disabling auto-negotiation. 1000BASE-T and 10GBASE-T
977 * require AN even if only one link mode is enabled, and for
978 * 100BASE-TX it is useful even if the link mode is forced.
979 * Therefore we never disable auto-negotiation.
981 * Also enable and advertise flow control by default.
984 efx_phy_media_type_get(sc->enp, &medium_type);
985 efx_phy_adv_cap_get(sc->enp, EFX_PHY_CAP_PERM, &cap_mask);
987 for (mode = EFX_LINK_10HDX; mode < EFX_LINK_NMODES; mode++) {
988 phy_cap = sfxge_link_mode_to_phy_cap(mode);
989 if (phy_cap == EFX_PHY_CAP_INVALID)
992 mode_cap_mask = (1 << phy_cap);
993 mode_ifm = sfxge_link_mode[medium_type][mode];
995 if ((cap_mask & mode_cap_mask) && mode_ifm) {
996 /* No flow-control */
997 ifmedia_add(&sc->media, mode_ifm, 0, NULL);
999 #ifdef SFXGE_HAVE_PAUSE_MEDIAOPTS
1000 /* Respond-only. If using AN, we implicitly
1001 * offer symmetric as well, but that doesn't
1002 * mean we *have* to generate pause frames.
1004 mode_ifm |= IFM_ETH_RXPAUSE;
1005 ifmedia_add(&sc->media, mode_ifm, 0, NULL);
1008 mode_ifm |= IFM_ETH_TXPAUSE;
1009 ifmedia_add(&sc->media, mode_ifm, 0, NULL);
1012 /* Link modes are numbered in order of speed,
1013 * so assume the last one available is the best.
1015 best_mode_ifm = mode_ifm;
1019 if (cap_mask & (1 << EFX_PHY_CAP_AN)) {
1020 /* Add autoselect mode. */
1021 mode_ifm = IFM_ETHER | IFM_AUTO;
1022 ifmedia_add(&sc->media, mode_ifm, 0, NULL);
1023 best_mode_ifm = mode_ifm;
1026 if (best_mode_ifm != 0)
1027 ifmedia_set(&sc->media, best_mode_ifm);
1029 /* Now discard port state until interface is started. */
1030 efx_port_fini(sc->enp);
1032 efx_filter_fini(sc->enp);