2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright (c) 2010-2016 Solarflare Communications Inc.
7 * This software was developed in part by Philip Paeps under contract for
8 * Solarflare Communications, Inc.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
29 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 * The views and conclusions contained in the software and documentation are
32 * those of the authors and should not be interpreted as representing official
33 * policies, either expressed or implied, of the FreeBSD Project.
36 #include <sys/cdefs.h>
37 __FBSDID("$FreeBSD$");
39 #include <sys/types.h>
40 #include <sys/limits.h>
41 #include <net/ethernet.h>
42 #include <net/if_dl.h>
44 #include "common/efx.h"
48 #define SFXGE_PARAM_STATS_UPDATE_PERIOD_MS \
49 SFXGE_PARAM(stats_update_period_ms)
50 static int sfxge_stats_update_period_ms = SFXGE_STATS_UPDATE_PERIOD_MS;
51 TUNABLE_INT(SFXGE_PARAM_STATS_UPDATE_PERIOD_MS,
52 &sfxge_stats_update_period_ms);
53 SYSCTL_INT(_hw_sfxge, OID_AUTO, stats_update_period_ms, CTLFLAG_RDTUN,
54 &sfxge_stats_update_period_ms, 0,
55 "netstat interface statistics update period in milliseconds");
57 static int sfxge_phy_cap_mask(struct sfxge_softc *, int, uint32_t *);
60 sfxge_mac_stat_update(struct sfxge_softc *sc)
62 struct sfxge_port *port = &sc->port;
63 efsys_mem_t *esmp = &(port->mac_stats.dma_buf);
65 unsigned int min_ticks;
69 SFXGE_PORT_LOCK_ASSERT_OWNED(port);
71 if (__predict_false(port->init_state != SFXGE_PORT_STARTED)) {
76 min_ticks = (unsigned int)hz * port->stats_update_period_ms / 1000;
79 if ((unsigned int)(now - port->mac_stats.update_time) < min_ticks) {
84 port->mac_stats.update_time = now;
86 /* If we're unlucky enough to read statistics wduring the DMA, wait
87 * up to 10ms for it to finish (typically takes <500us) */
88 for (count = 0; count < 100; ++count) {
89 EFSYS_PROBE1(wait, unsigned int, count);
91 /* Try to update the cached counters */
92 if ((rc = efx_mac_stats_update(sc->enp, esmp,
93 port->mac_stats.decode_buf, NULL)) != EAGAIN)
105 sfxge_get_counter(struct ifnet *ifp, ift_counter c)
107 struct sfxge_softc *sc = ifp->if_softc;
111 SFXGE_PORT_LOCK(&sc->port);
113 /* Ignore error and use old values */
114 (void)sfxge_mac_stat_update(sc);
116 mac_stats = (uint64_t *)sc->port.mac_stats.decode_buf;
119 case IFCOUNTER_IPACKETS:
120 val = mac_stats[EFX_MAC_RX_PKTS];
122 case IFCOUNTER_IERRORS:
123 val = mac_stats[EFX_MAC_RX_ERRORS];
125 case IFCOUNTER_OPACKETS:
126 val = mac_stats[EFX_MAC_TX_PKTS];
128 case IFCOUNTER_OERRORS:
129 val = mac_stats[EFX_MAC_TX_ERRORS];
131 case IFCOUNTER_COLLISIONS:
132 val = mac_stats[EFX_MAC_TX_SGL_COL_PKTS] +
133 mac_stats[EFX_MAC_TX_MULT_COL_PKTS] +
134 mac_stats[EFX_MAC_TX_EX_COL_PKTS] +
135 mac_stats[EFX_MAC_TX_LATE_COL_PKTS];
137 case IFCOUNTER_IBYTES:
138 val = mac_stats[EFX_MAC_RX_OCTETS];
140 case IFCOUNTER_OBYTES:
141 val = mac_stats[EFX_MAC_TX_OCTETS];
143 case IFCOUNTER_OMCASTS:
144 val = mac_stats[EFX_MAC_TX_MULTICST_PKTS] +
145 mac_stats[EFX_MAC_TX_BRDCST_PKTS];
147 case IFCOUNTER_OQDROPS:
148 SFXGE_PORT_UNLOCK(&sc->port);
149 return (sfxge_tx_get_drops(sc));
150 case IFCOUNTER_IMCASTS:
151 /* if_imcasts is maintained in net/if_ethersubr.c */
152 case IFCOUNTER_IQDROPS:
153 /* if_iqdrops is maintained in net/if_ethersubr.c */
154 case IFCOUNTER_NOPROTO:
155 /* if_noproto is maintained in net/if_ethersubr.c */
157 SFXGE_PORT_UNLOCK(&sc->port);
158 return (if_get_counter_default(ifp, c));
161 SFXGE_PORT_UNLOCK(&sc->port);
167 sfxge_mac_stat_handler(SYSCTL_HANDLER_ARGS)
169 struct sfxge_softc *sc = arg1;
170 unsigned int id = arg2;
174 SFXGE_PORT_LOCK(&sc->port);
175 if ((rc = sfxge_mac_stat_update(sc)) == 0)
176 val = ((uint64_t *)sc->port.mac_stats.decode_buf)[id];
177 SFXGE_PORT_UNLOCK(&sc->port);
180 rc = SYSCTL_OUT(req, &val, sizeof(val));
185 sfxge_mac_stat_init(struct sfxge_softc *sc)
187 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
188 struct sysctl_oid_list *stat_list;
192 stat_list = SYSCTL_CHILDREN(sc->stats_node);
194 /* Initialise the named stats */
195 for (id = 0; id < EFX_MAC_NSTATS; id++) {
196 name = efx_mac_stat_name(sc->enp, id);
199 OID_AUTO, name, CTLTYPE_U64|CTLFLAG_RD,
200 sc, id, sfxge_mac_stat_handler, "Q",
205 #ifdef SFXGE_HAVE_PAUSE_MEDIAOPTS
208 sfxge_port_wanted_fc(struct sfxge_softc *sc)
210 struct ifmedia_entry *ifm = sc->media.ifm_cur;
212 if (ifm->ifm_media == (IFM_ETHER | IFM_AUTO))
213 return (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE);
214 return (((ifm->ifm_media & IFM_ETH_RXPAUSE) ? EFX_FCNTL_RESPOND : 0) |
215 ((ifm->ifm_media & IFM_ETH_TXPAUSE) ? EFX_FCNTL_GENERATE : 0));
219 sfxge_port_link_fc_ifm(struct sfxge_softc *sc)
221 unsigned int wanted_fc, link_fc;
223 efx_mac_fcntl_get(sc->enp, &wanted_fc, &link_fc);
224 return ((link_fc & EFX_FCNTL_RESPOND) ? IFM_ETH_RXPAUSE : 0) |
225 ((link_fc & EFX_FCNTL_GENERATE) ? IFM_ETH_TXPAUSE : 0);
228 #else /* !SFXGE_HAVE_PAUSE_MEDIAOPTS */
231 sfxge_port_wanted_fc(struct sfxge_softc *sc)
233 return (sc->port.wanted_fc);
237 sfxge_port_link_fc_ifm(struct sfxge_softc *sc)
243 sfxge_port_wanted_fc_handler(SYSCTL_HANDLER_ARGS)
245 struct sfxge_softc *sc;
246 struct sfxge_port *port;
253 if (req->newptr != NULL) {
254 if ((error = SYSCTL_IN(req, &fcntl, sizeof(fcntl))) != 0)
257 SFXGE_PORT_LOCK(port);
259 if (port->wanted_fc != fcntl) {
260 if (port->init_state == SFXGE_PORT_STARTED)
261 error = efx_mac_fcntl_set(sc->enp,
265 port->wanted_fc = fcntl;
268 SFXGE_PORT_UNLOCK(port);
270 SFXGE_PORT_LOCK(port);
271 fcntl = port->wanted_fc;
272 SFXGE_PORT_UNLOCK(port);
274 error = SYSCTL_OUT(req, &fcntl, sizeof(fcntl));
281 sfxge_port_link_fc_handler(SYSCTL_HANDLER_ARGS)
283 struct sfxge_softc *sc;
284 struct sfxge_port *port;
285 unsigned int wanted_fc, link_fc;
290 SFXGE_PORT_LOCK(port);
291 if (__predict_true(port->init_state == SFXGE_PORT_STARTED) &&
293 efx_mac_fcntl_get(sc->enp, &wanted_fc, &link_fc);
296 SFXGE_PORT_UNLOCK(port);
298 return (SYSCTL_OUT(req, &link_fc, sizeof(link_fc)));
301 #endif /* SFXGE_HAVE_PAUSE_MEDIAOPTS */
303 static const uint64_t sfxge_link_baudrate[EFX_LINK_NMODES] = {
304 [EFX_LINK_10HDX] = IF_Mbps(10),
305 [EFX_LINK_10FDX] = IF_Mbps(10),
306 [EFX_LINK_100HDX] = IF_Mbps(100),
307 [EFX_LINK_100FDX] = IF_Mbps(100),
308 [EFX_LINK_1000HDX] = IF_Gbps(1),
309 [EFX_LINK_1000FDX] = IF_Gbps(1),
310 [EFX_LINK_10000FDX] = IF_Gbps(10),
311 [EFX_LINK_25000FDX] = IF_Gbps(25),
312 [EFX_LINK_40000FDX] = IF_Gbps(40),
313 [EFX_LINK_50000FDX] = IF_Gbps(50),
314 [EFX_LINK_100000FDX] = IF_Gbps(100),
318 sfxge_mac_link_update(struct sfxge_softc *sc, efx_link_mode_t mode)
320 struct sfxge_port *port;
325 if (port->link_mode == mode)
328 port->link_mode = mode;
330 /* Push link state update to the OS */
331 link_state = (SFXGE_LINK_UP(sc) ? LINK_STATE_UP : LINK_STATE_DOWN);
332 sc->ifnet->if_baudrate = sfxge_link_baudrate[port->link_mode];
333 if_link_state_change(sc->ifnet, link_state);
337 sfxge_mac_poll_work(void *arg, int npending)
339 struct sfxge_softc *sc;
341 struct sfxge_port *port;
342 efx_link_mode_t mode;
344 sc = (struct sfxge_softc *)arg;
348 SFXGE_PORT_LOCK(port);
350 if (__predict_false(port->init_state != SFXGE_PORT_STARTED))
353 /* This may sleep waiting for MCDI completion */
354 (void)efx_port_poll(enp, &mode);
355 sfxge_mac_link_update(sc, mode);
358 SFXGE_PORT_UNLOCK(port);
362 sfxge_copy_maddr(void *arg, struct sockaddr_dl *sdl, u_int cnt)
364 uint8_t *mcast_addr = arg;
366 if (cnt == EFX_MAC_MULTICAST_LIST_MAX)
369 memcpy(mcast_addr + (cnt * EFX_MAC_ADDR_LEN), LLADDR(sdl),
376 sfxge_mac_multicast_list_set(struct sfxge_softc *sc)
378 struct ifnet *ifp = sc->ifnet;
379 struct sfxge_port *port = &sc->port;
382 mtx_assert(&port->lock, MA_OWNED);
384 port->mcast_count = if_foreach_llmaddr(ifp, sfxge_copy_maddr,
386 if (port->mcast_count == EFX_MAC_MULTICAST_LIST_MAX) {
387 device_printf(sc->dev, "Too many multicast addresses\n");
392 rc = efx_mac_multicast_list_set(sc->enp, port->mcast_addrs,
395 device_printf(sc->dev,
396 "Cannot set multicast address list\n");
403 sfxge_mac_filter_set_locked(struct sfxge_softc *sc)
405 struct ifnet *ifp = sc->ifnet;
406 struct sfxge_port *port = &sc->port;
407 boolean_t all_mulcst;
410 mtx_assert(&port->lock, MA_OWNED);
412 all_mulcst = !!(ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI));
414 rc = sfxge_mac_multicast_list_set(sc);
415 /* Fallback to all multicast if cannot set multicast list */
419 rc = efx_mac_filter_set(sc->enp, !!(ifp->if_flags & IFF_PROMISC),
420 (port->mcast_count > 0), all_mulcst, B_TRUE);
426 sfxge_mac_filter_set(struct sfxge_softc *sc)
428 struct sfxge_port *port = &sc->port;
431 SFXGE_PORT_LOCK(port);
433 * The function may be called without softc_lock held in the
434 * case of SIOCADDMULTI and SIOCDELMULTI ioctls. ioctl handler
435 * checks IFF_DRV_RUNNING flag which implies port started, but
436 * it is not guaranteed to remain. softc_lock shared lock can't
437 * be held in the case of these ioctls processing, since it
438 * results in failure where kernel complains that non-sleepable
439 * lock is held in sleeping thread. Both problems are repeatable
440 * on LAG with LACP proto bring up.
442 if (__predict_true(port->init_state == SFXGE_PORT_STARTED))
443 rc = sfxge_mac_filter_set_locked(sc);
446 SFXGE_PORT_UNLOCK(port);
451 sfxge_port_stop(struct sfxge_softc *sc)
453 struct sfxge_port *port;
459 SFXGE_PORT_LOCK(port);
461 KASSERT(port->init_state == SFXGE_PORT_STARTED,
462 ("port not started"));
464 port->init_state = SFXGE_PORT_INITIALIZED;
466 port->mac_stats.update_time = 0;
468 /* This may call MCDI */
469 (void)efx_mac_drain(enp, B_TRUE);
471 (void)efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf, 0, B_FALSE);
473 port->link_mode = EFX_LINK_UNKNOWN;
475 /* Destroy the common code port object. */
478 efx_filter_fini(enp);
480 SFXGE_PORT_UNLOCK(port);
484 sfxge_port_start(struct sfxge_softc *sc)
486 uint8_t mac_addr[ETHER_ADDR_LEN];
487 struct epoch_tracker et;
488 struct ifnet *ifp = sc->ifnet;
489 struct sfxge_port *port;
493 uint32_t phy_cap_mask;
498 SFXGE_PORT_LOCK(port);
500 KASSERT(port->init_state == SFXGE_PORT_INITIALIZED,
501 ("port not initialized"));
503 /* Initialise the required filtering */
504 if ((rc = efx_filter_init(enp)) != 0)
505 goto fail_filter_init;
507 /* Initialize the port object in the common code. */
508 if ((rc = efx_port_init(sc->enp)) != 0)
512 pdu = EFX_MAC_PDU(ifp->if_mtu);
513 if ((rc = efx_mac_pdu_set(enp, pdu)) != 0)
516 if ((rc = efx_mac_fcntl_set(enp, sfxge_port_wanted_fc(sc), B_TRUE))
520 /* Set the unicast address */
522 bcopy(LLADDR((struct sockaddr_dl *)ifp->if_addr->ifa_addr),
523 mac_addr, sizeof(mac_addr));
525 if ((rc = efx_mac_addr_set(enp, mac_addr)) != 0)
528 sfxge_mac_filter_set_locked(sc);
530 /* Update MAC stats by DMA every period */
531 if ((rc = efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf,
532 port->stats_update_period_ms,
536 if ((rc = efx_mac_drain(enp, B_FALSE)) != 0)
539 if ((rc = sfxge_phy_cap_mask(sc, sc->media.ifm_cur->ifm_media,
540 &phy_cap_mask)) != 0)
543 if ((rc = efx_phy_adv_cap_set(sc->enp, phy_cap_mask)) != 0)
546 port->init_state = SFXGE_PORT_STARTED;
548 /* Single poll in case there were missing initial events */
549 SFXGE_PORT_UNLOCK(port);
550 sfxge_mac_poll_work(sc, 0);
556 (void)efx_mac_drain(enp, B_TRUE);
558 (void)efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf, 0, B_FALSE);
566 efx_filter_fini(enp);
568 SFXGE_PORT_UNLOCK(port);
574 sfxge_phy_stat_update(struct sfxge_softc *sc)
576 struct sfxge_port *port = &sc->port;
577 efsys_mem_t *esmp = &port->phy_stats.dma_buf;
582 SFXGE_PORT_LOCK_ASSERT_OWNED(port);
584 if (__predict_false(port->init_state != SFXGE_PORT_STARTED)) {
590 if ((unsigned int)(now - port->phy_stats.update_time) < (unsigned int)hz) {
595 port->phy_stats.update_time = now;
597 /* If we're unlucky enough to read statistics wduring the DMA, wait
598 * up to 10ms for it to finish (typically takes <500us) */
599 for (count = 0; count < 100; ++count) {
600 EFSYS_PROBE1(wait, unsigned int, count);
602 /* Synchronize the DMA memory for reading */
603 bus_dmamap_sync(esmp->esm_tag, esmp->esm_map,
604 BUS_DMASYNC_POSTREAD);
606 /* Try to update the cached counters */
607 if ((rc = efx_phy_stats_update(sc->enp, esmp,
608 port->phy_stats.decode_buf)) != EAGAIN)
620 sfxge_phy_stat_handler(SYSCTL_HANDLER_ARGS)
622 struct sfxge_softc *sc = arg1;
623 unsigned int id = arg2;
627 SFXGE_PORT_LOCK(&sc->port);
628 if ((rc = sfxge_phy_stat_update(sc)) == 0)
629 val = ((uint32_t *)sc->port.phy_stats.decode_buf)[id];
630 SFXGE_PORT_UNLOCK(&sc->port);
633 rc = SYSCTL_OUT(req, &val, sizeof(val));
638 sfxge_phy_stat_init(struct sfxge_softc *sc)
640 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
641 struct sysctl_oid_list *stat_list;
644 uint64_t stat_mask = efx_nic_cfg_get(sc->enp)->enc_phy_stat_mask;
646 stat_list = SYSCTL_CHILDREN(sc->stats_node);
648 /* Initialise the named stats */
649 for (id = 0; id < EFX_PHY_NSTATS; id++) {
650 if (!(stat_mask & ((uint64_t)1 << id)))
652 name = efx_phy_stat_name(sc->enp, id);
655 OID_AUTO, name, CTLTYPE_UINT|CTLFLAG_RD,
656 sc, id, sfxge_phy_stat_handler,
657 id == EFX_PHY_STAT_OUI ? "IX" : "IU",
663 sfxge_port_fini(struct sfxge_softc *sc)
665 struct sfxge_port *port;
669 esmp = &port->mac_stats.dma_buf;
671 KASSERT(port->init_state == SFXGE_PORT_INITIALIZED,
672 ("Port not initialized"));
674 port->init_state = SFXGE_PORT_UNINITIALIZED;
676 port->link_mode = EFX_LINK_UNKNOWN;
678 /* Finish with PHY DMA memory */
679 sfxge_dma_free(&port->phy_stats.dma_buf);
680 free(port->phy_stats.decode_buf, M_SFXGE);
682 sfxge_dma_free(esmp);
683 free(port->mac_stats.decode_buf, M_SFXGE);
685 SFXGE_PORT_LOCK_DESTROY(port);
691 sfxge_port_stats_update_period_ms(struct sfxge_softc *sc)
693 int period_ms = sfxge_stats_update_period_ms;
696 device_printf(sc->dev,
697 "treat negative stats update period %d as 0 (disable)\n",
700 } else if (period_ms > UINT16_MAX) {
701 device_printf(sc->dev,
702 "treat too big stats update period %d as %u\n",
703 period_ms, UINT16_MAX);
704 period_ms = UINT16_MAX;
711 sfxge_port_stats_update_period_ms_handler(SYSCTL_HANDLER_ARGS)
713 struct sfxge_softc *sc;
714 struct sfxge_port *port;
715 unsigned int period_ms;
721 if (req->newptr != NULL) {
722 error = SYSCTL_IN(req, &period_ms, sizeof(period_ms));
726 if (period_ms > UINT16_MAX)
729 SFXGE_PORT_LOCK(port);
731 if (port->stats_update_period_ms != period_ms) {
732 if (port->init_state == SFXGE_PORT_STARTED)
733 error = efx_mac_stats_periodic(sc->enp,
734 &port->mac_stats.dma_buf,
737 port->stats_update_period_ms = period_ms;
740 SFXGE_PORT_UNLOCK(port);
742 SFXGE_PORT_LOCK(port);
743 period_ms = port->stats_update_period_ms;
744 SFXGE_PORT_UNLOCK(port);
746 error = SYSCTL_OUT(req, &period_ms, sizeof(period_ms));
753 sfxge_port_init(struct sfxge_softc *sc)
755 struct sfxge_port *port;
756 struct sysctl_ctx_list *sysctl_ctx;
757 struct sysctl_oid *sysctl_tree;
758 efsys_mem_t *mac_stats_buf, *phy_stats_buf;
760 size_t mac_stats_size;
764 mac_stats_buf = &port->mac_stats.dma_buf;
765 phy_stats_buf = &port->phy_stats.dma_buf;
767 KASSERT(port->init_state == SFXGE_PORT_UNINITIALIZED,
768 ("Port already initialized"));
772 SFXGE_PORT_LOCK_INIT(port, device_get_nameunit(sc->dev));
774 DBGPRINT(sc->dev, "alloc PHY stats");
775 port->phy_stats.decode_buf = malloc(EFX_PHY_NSTATS * sizeof(uint32_t),
776 M_SFXGE, M_WAITOK | M_ZERO);
777 if ((rc = sfxge_dma_alloc(sc, EFX_PHY_STATS_SIZE, phy_stats_buf)) != 0)
779 sfxge_phy_stat_init(sc);
781 DBGPRINT(sc->dev, "init sysctl");
782 sysctl_ctx = device_get_sysctl_ctx(sc->dev);
783 sysctl_tree = device_get_sysctl_tree(sc->dev);
785 #ifndef SFXGE_HAVE_PAUSE_MEDIAOPTS
786 /* If flow control cannot be configured or reported through
787 * ifmedia, provide sysctls for it. */
788 port->wanted_fc = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
789 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO,
790 "wanted_fc", CTLTYPE_UINT|CTLFLAG_RW, sc, 0,
791 sfxge_port_wanted_fc_handler, "IU", "wanted flow control mode");
792 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO,
793 "link_fc", CTLTYPE_UINT|CTLFLAG_RD, sc, 0,
794 sfxge_port_link_fc_handler, "IU", "link flow control mode");
797 DBGPRINT(sc->dev, "alloc MAC stats");
798 port->mac_stats.decode_buf = malloc(EFX_MAC_NSTATS * sizeof(uint64_t),
799 M_SFXGE, M_WAITOK | M_ZERO);
800 mac_nstats = efx_nic_cfg_get(sc->enp)->enc_mac_stats_nstats;
801 mac_stats_size = EFX_P2ROUNDUP(size_t, mac_nstats * sizeof(uint64_t),
803 if ((rc = sfxge_dma_alloc(sc, mac_stats_size, mac_stats_buf)) != 0)
805 port->stats_update_period_ms = sfxge_port_stats_update_period_ms(sc);
806 sfxge_mac_stat_init(sc);
808 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO,
809 "stats_update_period_ms", CTLTYPE_UINT|CTLFLAG_RW, sc, 0,
810 sfxge_port_stats_update_period_ms_handler, "IU",
811 "interface statistics refresh period");
813 port->init_state = SFXGE_PORT_INITIALIZED;
815 DBGPRINT(sc->dev, "success");
819 free(port->mac_stats.decode_buf, M_SFXGE);
820 sfxge_dma_free(phy_stats_buf);
822 free(port->phy_stats.decode_buf, M_SFXGE);
823 SFXGE_PORT_LOCK_DESTROY(port);
825 DBGPRINT(sc->dev, "failed %d", rc);
829 static const int sfxge_link_mode[EFX_PHY_MEDIA_NTYPES][EFX_LINK_NMODES] = {
830 [EFX_PHY_MEDIA_CX4] = {
831 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_CX4,
833 [EFX_PHY_MEDIA_KX4] = {
834 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_KX4,
836 [EFX_PHY_MEDIA_XFP] = {
837 /* Don't know the module type, but assume SR for now. */
838 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR,
840 [EFX_PHY_MEDIA_QSFP_PLUS] = {
841 /* Don't know the module type, but assume SR for now. */
842 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR,
843 [EFX_LINK_25000FDX] = IFM_ETHER | IFM_FDX | IFM_25G_SR,
844 [EFX_LINK_40000FDX] = IFM_ETHER | IFM_FDX | IFM_40G_CR4,
845 [EFX_LINK_50000FDX] = IFM_ETHER | IFM_FDX | IFM_50G_SR,
846 [EFX_LINK_100000FDX] = IFM_ETHER | IFM_FDX | IFM_100G_SR2,
848 [EFX_PHY_MEDIA_SFP_PLUS] = {
849 /* Don't know the module type, but assume SX/SR for now. */
850 [EFX_LINK_1000FDX] = IFM_ETHER | IFM_FDX | IFM_1000_SX,
851 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR,
852 [EFX_LINK_25000FDX] = IFM_ETHER | IFM_FDX | IFM_25G_SR,
854 [EFX_PHY_MEDIA_BASE_T] = {
855 [EFX_LINK_10HDX] = IFM_ETHER | IFM_HDX | IFM_10_T,
856 [EFX_LINK_10FDX] = IFM_ETHER | IFM_FDX | IFM_10_T,
857 [EFX_LINK_100HDX] = IFM_ETHER | IFM_HDX | IFM_100_TX,
858 [EFX_LINK_100FDX] = IFM_ETHER | IFM_FDX | IFM_100_TX,
859 [EFX_LINK_1000HDX] = IFM_ETHER | IFM_HDX | IFM_1000_T,
860 [EFX_LINK_1000FDX] = IFM_ETHER | IFM_FDX | IFM_1000_T,
861 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_T,
866 sfxge_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
868 struct sfxge_softc *sc;
869 efx_phy_media_type_t medium_type;
870 efx_link_mode_t mode;
873 SFXGE_ADAPTER_LOCK(sc);
875 ifmr->ifm_status = IFM_AVALID;
876 ifmr->ifm_active = IFM_ETHER;
878 if (SFXGE_RUNNING(sc) && SFXGE_LINK_UP(sc)) {
879 ifmr->ifm_status |= IFM_ACTIVE;
881 efx_phy_media_type_get(sc->enp, &medium_type);
882 mode = sc->port.link_mode;
883 ifmr->ifm_active |= sfxge_link_mode[medium_type][mode];
884 ifmr->ifm_active |= sfxge_port_link_fc_ifm(sc);
887 SFXGE_ADAPTER_UNLOCK(sc);
890 static efx_phy_cap_type_t
891 sfxge_link_mode_to_phy_cap(efx_link_mode_t mode)
895 return (EFX_PHY_CAP_10HDX);
897 return (EFX_PHY_CAP_10FDX);
898 case EFX_LINK_100HDX:
899 return (EFX_PHY_CAP_100HDX);
900 case EFX_LINK_100FDX:
901 return (EFX_PHY_CAP_100FDX);
902 case EFX_LINK_1000HDX:
903 return (EFX_PHY_CAP_1000HDX);
904 case EFX_LINK_1000FDX:
905 return (EFX_PHY_CAP_1000FDX);
906 case EFX_LINK_10000FDX:
907 return (EFX_PHY_CAP_10000FDX);
908 case EFX_LINK_25000FDX:
909 return (EFX_PHY_CAP_25000FDX);
910 case EFX_LINK_40000FDX:
911 return (EFX_PHY_CAP_40000FDX);
912 case EFX_LINK_50000FDX:
913 return (EFX_PHY_CAP_50000FDX);
914 case EFX_LINK_100000FDX:
915 return (EFX_PHY_CAP_100000FDX);
917 return (EFX_PHY_CAP_INVALID);
922 sfxge_phy_cap_mask(struct sfxge_softc *sc, int ifmedia, uint32_t *phy_cap_mask)
924 /* Get global options (duplex), type and subtype bits */
925 int ifmedia_masked = ifmedia & (IFM_GMASK | IFM_NMASK | IFM_TMASK);
926 efx_phy_media_type_t medium_type;
927 boolean_t mode_found = B_FALSE;
928 uint32_t cap_mask, mode_cap_mask;
929 efx_link_mode_t mode;
930 efx_phy_cap_type_t phy_cap;
932 efx_phy_media_type_get(sc->enp, &medium_type);
933 if (medium_type >= nitems(sfxge_link_mode)) {
934 if_printf(sc->ifnet, "unexpected media type %d\n", medium_type);
938 efx_phy_adv_cap_get(sc->enp, EFX_PHY_CAP_PERM, &cap_mask);
940 for (mode = EFX_LINK_10HDX; mode < EFX_LINK_NMODES; mode++) {
941 if (ifmedia_masked == sfxge_link_mode[medium_type][mode]) {
949 * If media is not in the table, it must be IFM_AUTO.
951 KASSERT((cap_mask & (1 << EFX_PHY_CAP_AN)) &&
952 ifmedia_masked == (IFM_ETHER | IFM_AUTO),
953 ("%s: no mode for media %#x", __func__, ifmedia));
954 *phy_cap_mask = (cap_mask & ~(1 << EFX_PHY_CAP_ASYM));
958 phy_cap = sfxge_link_mode_to_phy_cap(mode);
959 if (phy_cap == EFX_PHY_CAP_INVALID) {
961 "cannot map link mode %d to phy capability\n",
966 mode_cap_mask = (1 << phy_cap);
967 mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_AN);
968 #ifdef SFXGE_HAVE_PAUSE_MEDIAOPTS
969 if (ifmedia & IFM_ETH_RXPAUSE)
970 mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_PAUSE);
971 if (!(ifmedia & IFM_ETH_TXPAUSE))
972 mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_ASYM);
974 mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_PAUSE);
977 *phy_cap_mask = mode_cap_mask;
982 sfxge_media_change(struct ifnet *ifp)
984 struct sfxge_softc *sc;
985 struct ifmedia_entry *ifm;
987 uint32_t phy_cap_mask;
990 ifm = sc->media.ifm_cur;
992 SFXGE_ADAPTER_LOCK(sc);
994 if (!SFXGE_RUNNING(sc)) {
999 rc = efx_mac_fcntl_set(sc->enp, sfxge_port_wanted_fc(sc), B_TRUE);
1003 if ((rc = sfxge_phy_cap_mask(sc, ifm->ifm_media, &phy_cap_mask)) != 0)
1006 rc = efx_phy_adv_cap_set(sc->enp, phy_cap_mask);
1008 SFXGE_ADAPTER_UNLOCK(sc);
1013 int sfxge_port_ifmedia_init(struct sfxge_softc *sc)
1015 efx_phy_media_type_t medium_type;
1016 uint32_t cap_mask, mode_cap_mask;
1017 efx_link_mode_t mode;
1018 efx_phy_cap_type_t phy_cap;
1019 int mode_ifm, best_mode_ifm = 0;
1023 * We need port state to initialise the ifmedia list.
1024 * It requires initialized NIC what is already done in
1025 * sfxge_create() when resources are estimated.
1027 if ((rc = efx_filter_init(sc->enp)) != 0)
1029 if ((rc = efx_port_init(sc->enp)) != 0)
1033 * Register ifconfig callbacks for querying and setting the
1034 * link mode and link status.
1036 ifmedia_init(&sc->media, IFM_IMASK, sfxge_media_change,
1037 sfxge_media_status);
1040 * Map firmware medium type and capabilities to ifmedia types.
1041 * ifmedia does not distinguish between forcing the link mode
1042 * and disabling auto-negotiation. 1000BASE-T and 10GBASE-T
1043 * require AN even if only one link mode is enabled, and for
1044 * 100BASE-TX it is useful even if the link mode is forced.
1045 * Therefore we never disable auto-negotiation.
1047 * Also enable and advertise flow control by default.
1050 efx_phy_media_type_get(sc->enp, &medium_type);
1051 efx_phy_adv_cap_get(sc->enp, EFX_PHY_CAP_PERM, &cap_mask);
1053 for (mode = EFX_LINK_10HDX; mode < EFX_LINK_NMODES; mode++) {
1054 phy_cap = sfxge_link_mode_to_phy_cap(mode);
1055 if (phy_cap == EFX_PHY_CAP_INVALID)
1058 mode_cap_mask = (1 << phy_cap);
1059 mode_ifm = sfxge_link_mode[medium_type][mode];
1061 if ((cap_mask & mode_cap_mask) && mode_ifm) {
1062 /* No flow-control */
1063 ifmedia_add(&sc->media, mode_ifm, 0, NULL);
1065 #ifdef SFXGE_HAVE_PAUSE_MEDIAOPTS
1066 /* Respond-only. If using AN, we implicitly
1067 * offer symmetric as well, but that doesn't
1068 * mean we *have* to generate pause frames.
1070 mode_ifm |= IFM_ETH_RXPAUSE;
1071 ifmedia_add(&sc->media, mode_ifm, 0, NULL);
1074 mode_ifm |= IFM_ETH_TXPAUSE;
1075 ifmedia_add(&sc->media, mode_ifm, 0, NULL);
1078 /* Link modes are numbered in order of speed,
1079 * so assume the last one available is the best.
1081 best_mode_ifm = mode_ifm;
1085 if (cap_mask & (1 << EFX_PHY_CAP_AN)) {
1086 /* Add autoselect mode. */
1087 mode_ifm = IFM_ETHER | IFM_AUTO;
1088 ifmedia_add(&sc->media, mode_ifm, 0, NULL);
1089 best_mode_ifm = mode_ifm;
1092 if (best_mode_ifm != 0)
1093 ifmedia_set(&sc->media, best_mode_ifm);
1095 /* Now discard port state until interface is started. */
1096 efx_port_fini(sc->enp);
1098 efx_filter_fini(sc->enp);