2 * Copyright (c) 2010-2016 Solarflare Communications Inc.
5 * This software was developed in part by Philip Paeps under contract for
6 * Solarflare Communications, Inc.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions are met:
11 * 1. Redistributions of source code must retain the above copyright notice,
12 * this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright notice,
14 * this list of conditions and the following disclaimer in the documentation
15 * and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
18 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
19 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
21 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
22 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
23 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
24 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
25 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
26 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
27 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29 * The views and conclusions contained in the software and documentation are
30 * those of the authors and should not be interpreted as representing official
31 * policies, either expressed or implied, of the FreeBSD Project.
34 #include <sys/cdefs.h>
35 __FBSDID("$FreeBSD$");
37 #include <sys/types.h>
38 #include <sys/limits.h>
39 #include <net/ethernet.h>
40 #include <net/if_dl.h>
42 #include "common/efx.h"
46 static int sfxge_phy_cap_mask(struct sfxge_softc *, int, uint32_t *);
49 sfxge_mac_stat_update(struct sfxge_softc *sc)
51 struct sfxge_port *port = &sc->port;
52 efsys_mem_t *esmp = &(port->mac_stats.dma_buf);
57 SFXGE_PORT_LOCK_ASSERT_OWNED(port);
59 if (__predict_false(port->init_state != SFXGE_PORT_STARTED)) {
65 if ((unsigned int)(now - port->mac_stats.update_time) < (unsigned int)hz) {
70 port->mac_stats.update_time = now;
72 /* If we're unlucky enough to read statistics wduring the DMA, wait
73 * up to 10ms for it to finish (typically takes <500us) */
74 for (count = 0; count < 100; ++count) {
75 EFSYS_PROBE1(wait, unsigned int, count);
77 /* Try to update the cached counters */
78 if ((rc = efx_mac_stats_update(sc->enp, esmp,
79 port->mac_stats.decode_buf, NULL)) != EAGAIN)
91 sfxge_get_counter(struct ifnet *ifp, ift_counter c)
93 struct sfxge_softc *sc = ifp->if_softc;
97 SFXGE_PORT_LOCK(&sc->port);
99 /* Ignore error and use old values */
100 (void)sfxge_mac_stat_update(sc);
102 mac_stats = (uint64_t *)sc->port.mac_stats.decode_buf;
105 case IFCOUNTER_IPACKETS:
106 val = mac_stats[EFX_MAC_RX_PKTS];
108 case IFCOUNTER_IERRORS:
109 val = mac_stats[EFX_MAC_RX_ERRORS];
111 case IFCOUNTER_OPACKETS:
112 val = mac_stats[EFX_MAC_TX_PKTS];
114 case IFCOUNTER_OERRORS:
115 val = mac_stats[EFX_MAC_TX_ERRORS];
117 case IFCOUNTER_COLLISIONS:
118 val = mac_stats[EFX_MAC_TX_SGL_COL_PKTS] +
119 mac_stats[EFX_MAC_TX_MULT_COL_PKTS] +
120 mac_stats[EFX_MAC_TX_EX_COL_PKTS] +
121 mac_stats[EFX_MAC_TX_LATE_COL_PKTS];
123 case IFCOUNTER_IBYTES:
124 val = mac_stats[EFX_MAC_RX_OCTETS];
126 case IFCOUNTER_OBYTES:
127 val = mac_stats[EFX_MAC_TX_OCTETS];
129 case IFCOUNTER_OMCASTS:
130 val = mac_stats[EFX_MAC_TX_MULTICST_PKTS] +
131 mac_stats[EFX_MAC_TX_BRDCST_PKTS];
133 case IFCOUNTER_OQDROPS:
134 SFXGE_PORT_UNLOCK(&sc->port);
135 return (sfxge_tx_get_drops(sc));
136 case IFCOUNTER_IMCASTS:
137 /* if_imcasts is maintained in net/if_ethersubr.c */
138 case IFCOUNTER_IQDROPS:
139 /* if_iqdrops is maintained in net/if_ethersubr.c */
140 case IFCOUNTER_NOPROTO:
141 /* if_noproto is maintained in net/if_ethersubr.c */
143 SFXGE_PORT_UNLOCK(&sc->port);
144 return (if_get_counter_default(ifp, c));
147 SFXGE_PORT_UNLOCK(&sc->port);
153 sfxge_mac_stat_handler(SYSCTL_HANDLER_ARGS)
155 struct sfxge_softc *sc = arg1;
156 unsigned int id = arg2;
160 SFXGE_PORT_LOCK(&sc->port);
161 if ((rc = sfxge_mac_stat_update(sc)) == 0)
162 val = ((uint64_t *)sc->port.mac_stats.decode_buf)[id];
163 SFXGE_PORT_UNLOCK(&sc->port);
166 rc = SYSCTL_OUT(req, &val, sizeof(val));
171 sfxge_mac_stat_init(struct sfxge_softc *sc)
173 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
174 struct sysctl_oid_list *stat_list;
178 stat_list = SYSCTL_CHILDREN(sc->stats_node);
180 /* Initialise the named stats */
181 for (id = 0; id < EFX_MAC_NSTATS; id++) {
182 name = efx_mac_stat_name(sc->enp, id);
185 OID_AUTO, name, CTLTYPE_U64|CTLFLAG_RD,
186 sc, id, sfxge_mac_stat_handler, "Q",
191 #ifdef SFXGE_HAVE_PAUSE_MEDIAOPTS
194 sfxge_port_wanted_fc(struct sfxge_softc *sc)
196 struct ifmedia_entry *ifm = sc->media.ifm_cur;
198 if (ifm->ifm_media == (IFM_ETHER | IFM_AUTO))
199 return (EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE);
200 return (((ifm->ifm_media & IFM_ETH_RXPAUSE) ? EFX_FCNTL_RESPOND : 0) |
201 ((ifm->ifm_media & IFM_ETH_TXPAUSE) ? EFX_FCNTL_GENERATE : 0));
205 sfxge_port_link_fc_ifm(struct sfxge_softc *sc)
207 unsigned int wanted_fc, link_fc;
209 efx_mac_fcntl_get(sc->enp, &wanted_fc, &link_fc);
210 return ((link_fc & EFX_FCNTL_RESPOND) ? IFM_ETH_RXPAUSE : 0) |
211 ((link_fc & EFX_FCNTL_GENERATE) ? IFM_ETH_TXPAUSE : 0);
214 #else /* !SFXGE_HAVE_PAUSE_MEDIAOPTS */
217 sfxge_port_wanted_fc(struct sfxge_softc *sc)
219 return (sc->port.wanted_fc);
223 sfxge_port_link_fc_ifm(struct sfxge_softc *sc)
229 sfxge_port_wanted_fc_handler(SYSCTL_HANDLER_ARGS)
231 struct sfxge_softc *sc;
232 struct sfxge_port *port;
239 if (req->newptr != NULL) {
240 if ((error = SYSCTL_IN(req, &fcntl, sizeof(fcntl))) != 0)
243 SFXGE_PORT_LOCK(port);
245 if (port->wanted_fc != fcntl) {
246 if (port->init_state == SFXGE_PORT_STARTED)
247 error = efx_mac_fcntl_set(sc->enp,
251 port->wanted_fc = fcntl;
254 SFXGE_PORT_UNLOCK(port);
256 SFXGE_PORT_LOCK(port);
257 fcntl = port->wanted_fc;
258 SFXGE_PORT_UNLOCK(port);
260 error = SYSCTL_OUT(req, &fcntl, sizeof(fcntl));
267 sfxge_port_link_fc_handler(SYSCTL_HANDLER_ARGS)
269 struct sfxge_softc *sc;
270 struct sfxge_port *port;
271 unsigned int wanted_fc, link_fc;
276 SFXGE_PORT_LOCK(port);
277 if (__predict_true(port->init_state == SFXGE_PORT_STARTED) &&
279 efx_mac_fcntl_get(sc->enp, &wanted_fc, &link_fc);
282 SFXGE_PORT_UNLOCK(port);
284 return (SYSCTL_OUT(req, &link_fc, sizeof(link_fc)));
287 #endif /* SFXGE_HAVE_PAUSE_MEDIAOPTS */
289 static const uint64_t sfxge_link_baudrate[EFX_LINK_NMODES] = {
290 [EFX_LINK_10HDX] = IF_Mbps(10),
291 [EFX_LINK_10FDX] = IF_Mbps(10),
292 [EFX_LINK_100HDX] = IF_Mbps(100),
293 [EFX_LINK_100FDX] = IF_Mbps(100),
294 [EFX_LINK_1000HDX] = IF_Gbps(1),
295 [EFX_LINK_1000FDX] = IF_Gbps(1),
296 [EFX_LINK_10000FDX] = IF_Gbps(10),
297 [EFX_LINK_40000FDX] = IF_Gbps(40),
301 sfxge_mac_link_update(struct sfxge_softc *sc, efx_link_mode_t mode)
303 struct sfxge_port *port;
308 if (port->link_mode == mode)
311 port->link_mode = mode;
313 /* Push link state update to the OS */
314 link_state = (port->link_mode != EFX_LINK_DOWN ?
315 LINK_STATE_UP : LINK_STATE_DOWN);
316 sc->ifnet->if_baudrate = sfxge_link_baudrate[port->link_mode];
317 if_link_state_change(sc->ifnet, link_state);
321 sfxge_mac_poll_work(void *arg, int npending)
323 struct sfxge_softc *sc;
325 struct sfxge_port *port;
326 efx_link_mode_t mode;
328 sc = (struct sfxge_softc *)arg;
332 SFXGE_PORT_LOCK(port);
334 if (__predict_false(port->init_state != SFXGE_PORT_STARTED))
337 /* This may sleep waiting for MCDI completion */
338 (void)efx_port_poll(enp, &mode);
339 sfxge_mac_link_update(sc, mode);
342 SFXGE_PORT_UNLOCK(port);
346 sfxge_mac_multicast_list_set(struct sfxge_softc *sc)
348 struct ifnet *ifp = sc->ifnet;
349 struct sfxge_port *port = &sc->port;
350 uint8_t *mcast_addr = port->mcast_addrs;
351 struct ifmultiaddr *ifma;
352 struct sockaddr_dl *sa;
355 mtx_assert(&port->lock, MA_OWNED);
357 port->mcast_count = 0;
359 TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
360 if (ifma->ifma_addr->sa_family == AF_LINK) {
361 if (port->mcast_count == EFX_MAC_MULTICAST_LIST_MAX) {
362 device_printf(sc->dev,
363 "Too many multicast addresses\n");
368 sa = (struct sockaddr_dl *)ifma->ifma_addr;
369 memcpy(mcast_addr, LLADDR(sa), EFX_MAC_ADDR_LEN);
370 mcast_addr += EFX_MAC_ADDR_LEN;
374 if_maddr_runlock(ifp);
377 rc = efx_mac_multicast_list_set(sc->enp, port->mcast_addrs,
380 device_printf(sc->dev,
381 "Cannot set multicast address list\n");
388 sfxge_mac_filter_set_locked(struct sfxge_softc *sc)
390 struct ifnet *ifp = sc->ifnet;
391 struct sfxge_port *port = &sc->port;
392 boolean_t all_mulcst;
395 mtx_assert(&port->lock, MA_OWNED);
397 all_mulcst = !!(ifp->if_flags & (IFF_PROMISC | IFF_ALLMULTI));
399 rc = sfxge_mac_multicast_list_set(sc);
400 /* Fallback to all multicast if cannot set multicast list */
404 rc = efx_mac_filter_set(sc->enp, !!(ifp->if_flags & IFF_PROMISC),
405 (port->mcast_count > 0), all_mulcst, B_TRUE);
411 sfxge_mac_filter_set(struct sfxge_softc *sc)
413 struct sfxge_port *port = &sc->port;
416 SFXGE_PORT_LOCK(port);
418 * The function may be called without softc_lock held in the
419 * case of SIOCADDMULTI and SIOCDELMULTI ioctls. ioctl handler
420 * checks IFF_DRV_RUNNING flag which implies port started, but
421 * it is not guaranteed to remain. softc_lock shared lock can't
422 * be held in the case of these ioctls processing, since it
423 * results in failure where kernel complains that non-sleepable
424 * lock is held in sleeping thread. Both problems are repeatable
425 * on LAG with LACP proto bring up.
427 if (__predict_true(port->init_state == SFXGE_PORT_STARTED))
428 rc = sfxge_mac_filter_set_locked(sc);
431 SFXGE_PORT_UNLOCK(port);
436 sfxge_port_stop(struct sfxge_softc *sc)
438 struct sfxge_port *port;
444 SFXGE_PORT_LOCK(port);
446 KASSERT(port->init_state == SFXGE_PORT_STARTED,
447 ("port not started"));
449 port->init_state = SFXGE_PORT_INITIALIZED;
451 port->mac_stats.update_time = 0;
453 /* This may call MCDI */
454 (void)efx_mac_drain(enp, B_TRUE);
456 (void)efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf, 0, B_FALSE);
458 port->link_mode = EFX_LINK_UNKNOWN;
460 /* Destroy the common code port object. */
463 efx_filter_fini(enp);
465 SFXGE_PORT_UNLOCK(port);
469 sfxge_port_start(struct sfxge_softc *sc)
471 uint8_t mac_addr[ETHER_ADDR_LEN];
472 struct ifnet *ifp = sc->ifnet;
473 struct sfxge_port *port;
477 uint32_t phy_cap_mask;
482 SFXGE_PORT_LOCK(port);
484 KASSERT(port->init_state == SFXGE_PORT_INITIALIZED,
485 ("port not initialized"));
487 /* Initialise the required filtering */
488 if ((rc = efx_filter_init(enp)) != 0)
489 goto fail_filter_init;
491 /* Initialize the port object in the common code. */
492 if ((rc = efx_port_init(sc->enp)) != 0)
496 pdu = EFX_MAC_PDU(ifp->if_mtu);
497 if ((rc = efx_mac_pdu_set(enp, pdu)) != 0)
500 if ((rc = efx_mac_fcntl_set(enp, sfxge_port_wanted_fc(sc), B_TRUE))
504 /* Set the unicast address */
506 bcopy(LLADDR((struct sockaddr_dl *)ifp->if_addr->ifa_addr),
507 mac_addr, sizeof(mac_addr));
508 if_addr_runlock(ifp);
509 if ((rc = efx_mac_addr_set(enp, mac_addr)) != 0)
512 sfxge_mac_filter_set_locked(sc);
514 /* Update MAC stats by DMA every second */
515 if ((rc = efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf,
516 1000, B_FALSE)) != 0)
519 if ((rc = efx_mac_drain(enp, B_FALSE)) != 0)
522 if ((rc = sfxge_phy_cap_mask(sc, sc->media.ifm_cur->ifm_media,
523 &phy_cap_mask)) != 0)
526 if ((rc = efx_phy_adv_cap_set(sc->enp, phy_cap_mask)) != 0)
529 port->init_state = SFXGE_PORT_STARTED;
531 /* Single poll in case there were missing initial events */
532 SFXGE_PORT_UNLOCK(port);
533 sfxge_mac_poll_work(sc, 0);
539 (void)efx_mac_drain(enp, B_TRUE);
541 (void)efx_mac_stats_periodic(enp, &port->mac_stats.dma_buf, 0, B_FALSE);
549 efx_filter_fini(enp);
551 SFXGE_PORT_UNLOCK(port);
557 sfxge_phy_stat_update(struct sfxge_softc *sc)
559 struct sfxge_port *port = &sc->port;
560 efsys_mem_t *esmp = &port->phy_stats.dma_buf;
565 SFXGE_PORT_LOCK_ASSERT_OWNED(port);
567 if (__predict_false(port->init_state != SFXGE_PORT_STARTED)) {
573 if ((unsigned int)(now - port->phy_stats.update_time) < (unsigned int)hz) {
578 port->phy_stats.update_time = now;
580 /* If we're unlucky enough to read statistics wduring the DMA, wait
581 * up to 10ms for it to finish (typically takes <500us) */
582 for (count = 0; count < 100; ++count) {
583 EFSYS_PROBE1(wait, unsigned int, count);
585 /* Synchronize the DMA memory for reading */
586 bus_dmamap_sync(esmp->esm_tag, esmp->esm_map,
587 BUS_DMASYNC_POSTREAD);
589 /* Try to update the cached counters */
590 if ((rc = efx_phy_stats_update(sc->enp, esmp,
591 port->phy_stats.decode_buf)) != EAGAIN)
603 sfxge_phy_stat_handler(SYSCTL_HANDLER_ARGS)
605 struct sfxge_softc *sc = arg1;
606 unsigned int id = arg2;
610 SFXGE_PORT_LOCK(&sc->port);
611 if ((rc = sfxge_phy_stat_update(sc)) == 0)
612 val = ((uint32_t *)sc->port.phy_stats.decode_buf)[id];
613 SFXGE_PORT_UNLOCK(&sc->port);
616 rc = SYSCTL_OUT(req, &val, sizeof(val));
621 sfxge_phy_stat_init(struct sfxge_softc *sc)
623 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
624 struct sysctl_oid_list *stat_list;
627 uint64_t stat_mask = efx_nic_cfg_get(sc->enp)->enc_phy_stat_mask;
629 stat_list = SYSCTL_CHILDREN(sc->stats_node);
631 /* Initialise the named stats */
632 for (id = 0; id < EFX_PHY_NSTATS; id++) {
633 if (!(stat_mask & ((uint64_t)1 << id)))
635 name = efx_phy_stat_name(sc->enp, id);
638 OID_AUTO, name, CTLTYPE_UINT|CTLFLAG_RD,
639 sc, id, sfxge_phy_stat_handler,
640 id == EFX_PHY_STAT_OUI ? "IX" : "IU",
646 sfxge_port_fini(struct sfxge_softc *sc)
648 struct sfxge_port *port;
652 esmp = &port->mac_stats.dma_buf;
654 KASSERT(port->init_state == SFXGE_PORT_INITIALIZED,
655 ("Port not initialized"));
657 port->init_state = SFXGE_PORT_UNINITIALIZED;
659 port->link_mode = EFX_LINK_UNKNOWN;
661 /* Finish with PHY DMA memory */
662 sfxge_dma_free(&port->phy_stats.dma_buf);
663 free(port->phy_stats.decode_buf, M_SFXGE);
665 sfxge_dma_free(esmp);
666 free(port->mac_stats.decode_buf, M_SFXGE);
668 SFXGE_PORT_LOCK_DESTROY(port);
674 sfxge_port_init(struct sfxge_softc *sc)
676 struct sfxge_port *port;
677 struct sysctl_ctx_list *sysctl_ctx;
678 struct sysctl_oid *sysctl_tree;
679 efsys_mem_t *mac_stats_buf, *phy_stats_buf;
683 mac_stats_buf = &port->mac_stats.dma_buf;
684 phy_stats_buf = &port->phy_stats.dma_buf;
686 KASSERT(port->init_state == SFXGE_PORT_UNINITIALIZED,
687 ("Port already initialized"));
691 SFXGE_PORT_LOCK_INIT(port, device_get_nameunit(sc->dev));
693 DBGPRINT(sc->dev, "alloc PHY stats");
694 port->phy_stats.decode_buf = malloc(EFX_PHY_NSTATS * sizeof(uint32_t),
695 M_SFXGE, M_WAITOK | M_ZERO);
696 if ((rc = sfxge_dma_alloc(sc, EFX_PHY_STATS_SIZE, phy_stats_buf)) != 0)
698 sfxge_phy_stat_init(sc);
700 DBGPRINT(sc->dev, "init sysctl");
701 sysctl_ctx = device_get_sysctl_ctx(sc->dev);
702 sysctl_tree = device_get_sysctl_tree(sc->dev);
704 #ifndef SFXGE_HAVE_PAUSE_MEDIAOPTS
705 /* If flow control cannot be configured or reported through
706 * ifmedia, provide sysctls for it. */
707 port->wanted_fc = EFX_FCNTL_RESPOND | EFX_FCNTL_GENERATE;
708 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO,
709 "wanted_fc", CTLTYPE_UINT|CTLFLAG_RW, sc, 0,
710 sfxge_port_wanted_fc_handler, "IU", "wanted flow control mode");
711 SYSCTL_ADD_PROC(sysctl_ctx, SYSCTL_CHILDREN(sysctl_tree), OID_AUTO,
712 "link_fc", CTLTYPE_UINT|CTLFLAG_RD, sc, 0,
713 sfxge_port_link_fc_handler, "IU", "link flow control mode");
716 DBGPRINT(sc->dev, "alloc MAC stats");
717 port->mac_stats.decode_buf = malloc(EFX_MAC_NSTATS * sizeof(uint64_t),
718 M_SFXGE, M_WAITOK | M_ZERO);
719 if ((rc = sfxge_dma_alloc(sc, EFX_MAC_STATS_SIZE, mac_stats_buf)) != 0)
721 sfxge_mac_stat_init(sc);
723 port->init_state = SFXGE_PORT_INITIALIZED;
725 DBGPRINT(sc->dev, "success");
729 free(port->mac_stats.decode_buf, M_SFXGE);
730 sfxge_dma_free(phy_stats_buf);
732 free(port->phy_stats.decode_buf, M_SFXGE);
733 SFXGE_PORT_LOCK_DESTROY(port);
735 DBGPRINT(sc->dev, "failed %d", rc);
739 static const int sfxge_link_mode[EFX_PHY_MEDIA_NTYPES][EFX_LINK_NMODES] = {
740 [EFX_PHY_MEDIA_CX4] = {
741 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_CX4,
743 [EFX_PHY_MEDIA_KX4] = {
744 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_KX4,
746 [EFX_PHY_MEDIA_XFP] = {
747 /* Don't know the module type, but assume SR for now. */
748 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR,
750 [EFX_PHY_MEDIA_QSFP_PLUS] = {
751 /* Don't know the module type, but assume SR for now. */
752 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR,
753 [EFX_LINK_40000FDX] = IFM_ETHER | IFM_FDX | IFM_40G_CR4,
755 [EFX_PHY_MEDIA_SFP_PLUS] = {
756 /* Don't know the module type, but assume SX/SR for now. */
757 [EFX_LINK_1000FDX] = IFM_ETHER | IFM_FDX | IFM_1000_SX,
758 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_SR,
760 [EFX_PHY_MEDIA_BASE_T] = {
761 [EFX_LINK_10HDX] = IFM_ETHER | IFM_HDX | IFM_10_T,
762 [EFX_LINK_10FDX] = IFM_ETHER | IFM_FDX | IFM_10_T,
763 [EFX_LINK_100HDX] = IFM_ETHER | IFM_HDX | IFM_100_TX,
764 [EFX_LINK_100FDX] = IFM_ETHER | IFM_FDX | IFM_100_TX,
765 [EFX_LINK_1000HDX] = IFM_ETHER | IFM_HDX | IFM_1000_T,
766 [EFX_LINK_1000FDX] = IFM_ETHER | IFM_FDX | IFM_1000_T,
767 [EFX_LINK_10000FDX] = IFM_ETHER | IFM_FDX | IFM_10G_T,
772 sfxge_media_status(struct ifnet *ifp, struct ifmediareq *ifmr)
774 struct sfxge_softc *sc;
775 efx_phy_media_type_t medium_type;
776 efx_link_mode_t mode;
779 SFXGE_ADAPTER_LOCK(sc);
781 ifmr->ifm_status = IFM_AVALID;
782 ifmr->ifm_active = IFM_ETHER;
784 if (SFXGE_RUNNING(sc) && SFXGE_LINK_UP(sc)) {
785 ifmr->ifm_status |= IFM_ACTIVE;
787 efx_phy_media_type_get(sc->enp, &medium_type);
788 mode = sc->port.link_mode;
789 ifmr->ifm_active |= sfxge_link_mode[medium_type][mode];
790 ifmr->ifm_active |= sfxge_port_link_fc_ifm(sc);
793 SFXGE_ADAPTER_UNLOCK(sc);
796 static efx_phy_cap_type_t
797 sfxge_link_mode_to_phy_cap(efx_link_mode_t mode)
801 return (EFX_PHY_CAP_10HDX);
803 return (EFX_PHY_CAP_10FDX);
804 case EFX_LINK_100HDX:
805 return (EFX_PHY_CAP_100HDX);
806 case EFX_LINK_100FDX:
807 return (EFX_PHY_CAP_100FDX);
808 case EFX_LINK_1000HDX:
809 return (EFX_PHY_CAP_1000HDX);
810 case EFX_LINK_1000FDX:
811 return (EFX_PHY_CAP_1000FDX);
812 case EFX_LINK_10000FDX:
813 return (EFX_PHY_CAP_10000FDX);
814 case EFX_LINK_40000FDX:
815 return (EFX_PHY_CAP_40000FDX);
817 EFSYS_ASSERT(B_FALSE);
818 return (EFX_PHY_CAP_INVALID);
823 sfxge_phy_cap_mask(struct sfxge_softc *sc, int ifmedia, uint32_t *phy_cap_mask)
825 /* Get global options (duplex), type and subtype bits */
826 int ifmedia_masked = ifmedia & (IFM_GMASK | IFM_NMASK | IFM_TMASK);
827 efx_phy_media_type_t medium_type;
828 boolean_t mode_found = B_FALSE;
829 uint32_t cap_mask, mode_cap_mask;
830 efx_link_mode_t mode;
831 efx_phy_cap_type_t phy_cap;
833 efx_phy_media_type_get(sc->enp, &medium_type);
834 if (medium_type >= nitems(sfxge_link_mode)) {
835 if_printf(sc->ifnet, "unexpected media type %d\n", medium_type);
839 efx_phy_adv_cap_get(sc->enp, EFX_PHY_CAP_PERM, &cap_mask);
841 for (mode = EFX_LINK_10HDX; mode < EFX_LINK_NMODES; mode++) {
842 if (ifmedia_masked == sfxge_link_mode[medium_type][mode]) {
850 * If media is not in the table, it must be IFM_AUTO.
852 KASSERT((cap_mask & (1 << EFX_PHY_CAP_AN)) &&
853 ifmedia_masked == (IFM_ETHER | IFM_AUTO),
854 ("%s: no mode for media %#x", __func__, ifmedia));
855 *phy_cap_mask = (cap_mask & ~(1 << EFX_PHY_CAP_ASYM));
859 phy_cap = sfxge_link_mode_to_phy_cap(mode);
860 if (phy_cap == EFX_PHY_CAP_INVALID) {
862 "cannot map link mode %d to phy capability\n",
867 mode_cap_mask = (1 << phy_cap);
868 mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_AN);
869 #ifdef SFXGE_HAVE_PAUSE_MEDIAOPTS
870 if (ifmedia & IFM_ETH_RXPAUSE)
871 mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_PAUSE);
872 if (!(ifmedia & IFM_ETH_TXPAUSE))
873 mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_ASYM);
875 mode_cap_mask |= cap_mask & (1 << EFX_PHY_CAP_PAUSE);
878 *phy_cap_mask = mode_cap_mask;
883 sfxge_media_change(struct ifnet *ifp)
885 struct sfxge_softc *sc;
886 struct ifmedia_entry *ifm;
888 uint32_t phy_cap_mask;
891 ifm = sc->media.ifm_cur;
893 SFXGE_ADAPTER_LOCK(sc);
895 if (!SFXGE_RUNNING(sc)) {
900 rc = efx_mac_fcntl_set(sc->enp, sfxge_port_wanted_fc(sc), B_TRUE);
904 if ((rc = sfxge_phy_cap_mask(sc, ifm->ifm_media, &phy_cap_mask)) != 0)
907 rc = efx_phy_adv_cap_set(sc->enp, phy_cap_mask);
909 SFXGE_ADAPTER_UNLOCK(sc);
914 int sfxge_port_ifmedia_init(struct sfxge_softc *sc)
916 efx_phy_media_type_t medium_type;
917 uint32_t cap_mask, mode_cap_mask;
918 efx_link_mode_t mode;
919 efx_phy_cap_type_t phy_cap;
920 int mode_ifm, best_mode_ifm = 0;
924 * We need port state to initialise the ifmedia list.
925 * It requires initialized NIC what is already done in
926 * sfxge_create() when resources are estimated.
928 if ((rc = efx_filter_init(sc->enp)) != 0)
930 if ((rc = efx_port_init(sc->enp)) != 0)
934 * Register ifconfig callbacks for querying and setting the
935 * link mode and link status.
937 ifmedia_init(&sc->media, IFM_IMASK, sfxge_media_change,
941 * Map firmware medium type and capabilities to ifmedia types.
942 * ifmedia does not distinguish between forcing the link mode
943 * and disabling auto-negotiation. 1000BASE-T and 10GBASE-T
944 * require AN even if only one link mode is enabled, and for
945 * 100BASE-TX it is useful even if the link mode is forced.
946 * Therefore we never disable auto-negotiation.
948 * Also enable and advertise flow control by default.
951 efx_phy_media_type_get(sc->enp, &medium_type);
952 efx_phy_adv_cap_get(sc->enp, EFX_PHY_CAP_PERM, &cap_mask);
954 for (mode = EFX_LINK_10HDX; mode < EFX_LINK_NMODES; mode++) {
955 phy_cap = sfxge_link_mode_to_phy_cap(mode);
956 if (phy_cap == EFX_PHY_CAP_INVALID)
959 mode_cap_mask = (1 << phy_cap);
960 mode_ifm = sfxge_link_mode[medium_type][mode];
962 if ((cap_mask & mode_cap_mask) && mode_ifm) {
963 /* No flow-control */
964 ifmedia_add(&sc->media, mode_ifm, 0, NULL);
966 #ifdef SFXGE_HAVE_PAUSE_MEDIAOPTS
967 /* Respond-only. If using AN, we implicitly
968 * offer symmetric as well, but that doesn't
969 * mean we *have* to generate pause frames.
971 mode_ifm |= IFM_ETH_RXPAUSE;
972 ifmedia_add(&sc->media, mode_ifm, 0, NULL);
975 mode_ifm |= IFM_ETH_TXPAUSE;
976 ifmedia_add(&sc->media, mode_ifm, 0, NULL);
979 /* Link modes are numbered in order of speed,
980 * so assume the last one available is the best.
982 best_mode_ifm = mode_ifm;
986 if (cap_mask & (1 << EFX_PHY_CAP_AN)) {
987 /* Add autoselect mode. */
988 mode_ifm = IFM_ETHER | IFM_AUTO;
989 ifmedia_add(&sc->media, mode_ifm, 0, NULL);
990 best_mode_ifm = mode_ifm;
993 if (best_mode_ifm != 0)
994 ifmedia_set(&sc->media, best_mode_ifm);
996 /* Now discard port state until interface is started. */
997 efx_port_fini(sc->enp);
999 efx_filter_fini(sc->enp);