2 * Copyright (c) 2010-2011 Solarflare Communications, Inc.
5 * This software was developed in part by Philip Paeps under contract for
6 * Solarflare Communications, Inc.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 /* Theory of operation:
32 * Tx queues allocation and mapping
34 * One Tx queue with enabled checksum offload is allocated per Rx channel
35 * (event queue). Also 2 Tx queues (one without checksum offload and one
36 * with IP checksum offload only) are allocated and bound to event queue 0.
37 * sfxge_txq_type is used as Tx queue label.
39 * So, event queue plus label mapping to Tx queue index is:
40 * if event queue index is 0, TxQ-index = TxQ-label * [0..SFXGE_TXQ_NTYPES)
41 * else TxQ-index = SFXGE_TXQ_NTYPES + EvQ-index - 1
42 * See sfxge_get_txq_by_label() sfxge_ev.c
45 #include <sys/cdefs.h>
46 __FBSDID("$FreeBSD$");
48 #include <sys/types.h>
51 #include <sys/socket.h>
52 #include <sys/sysctl.h>
55 #include <net/ethernet.h>
57 #include <net/if_vlan_var.h>
59 #include <netinet/in.h>
60 #include <netinet/ip.h>
61 #include <netinet/ip6.h>
62 #include <netinet/tcp.h>
64 #include "common/efx.h"
69 /* Set the block level to ensure there is space to generate a
70 * large number of descriptors for TSO. With minimum MSS and
71 * maximum mbuf length we might need more than a ring-ful of
72 * descriptors, but this should not happen in practice except
73 * due to deliberate attack. In that case we will truncate
74 * the output at a packet boundary. Allow for a reasonable
77 #define SFXGE_TSO_MAX_DESC ((65535 / 512) * 2 + SFXGE_TX_MAPPING_MAX_SEG - 1)
78 #define SFXGE_TXQ_BLOCK_LEVEL (SFXGE_NDESCS - SFXGE_TSO_MAX_DESC)
80 /* Forward declarations. */
81 static inline void sfxge_tx_qdpl_service(struct sfxge_txq *txq);
82 static void sfxge_tx_qlist_post(struct sfxge_txq *txq);
83 static void sfxge_tx_qunblock(struct sfxge_txq *txq);
84 static int sfxge_tx_queue_tso(struct sfxge_txq *txq, struct mbuf *mbuf,
85 const bus_dma_segment_t *dma_seg, int n_dma_seg);
88 sfxge_tx_qcomplete(struct sfxge_txq *txq)
90 struct sfxge_softc *sc;
91 struct sfxge_evq *evq;
92 unsigned int completed;
95 evq = sc->evq[txq->evq_index];
97 mtx_assert(&evq->lock, MA_OWNED);
99 completed = txq->completed;
100 while (completed != txq->pending) {
101 struct sfxge_tx_mapping *stmp;
104 id = completed++ & (SFXGE_NDESCS - 1);
106 stmp = &txq->stmp[id];
107 if (stmp->flags & TX_BUF_UNMAP) {
108 bus_dmamap_unload(txq->packet_dma_tag, stmp->map);
109 if (stmp->flags & TX_BUF_MBUF) {
110 struct mbuf *m = stmp->u.mbuf;
115 free(stmp->u.heap_buf, M_SFXGE);
120 txq->completed = completed;
122 /* Check whether we need to unblock the queue. */
127 level = txq->added - txq->completed;
128 if (level <= SFXGE_TXQ_UNBLOCK_LEVEL)
129 sfxge_tx_qunblock(txq);
136 * Reorder the put list and append it to the get list.
139 sfxge_tx_qdpl_swizzle(struct sfxge_txq *txq)
141 struct sfxge_tx_dpl *stdp;
142 struct mbuf *mbuf, *get_next, **get_tailp;
143 volatile uintptr_t *putp;
147 mtx_assert(&txq->lock, MA_OWNED);
151 /* Acquire the put list. */
152 putp = &stdp->std_put;
153 put = atomic_readandclear_ptr(putp);
159 /* Reverse the put list. */
160 get_tailp = &mbuf->m_nextpkt;
165 struct mbuf *put_next;
167 put_next = mbuf->m_nextpkt;
168 mbuf->m_nextpkt = get_next;
173 } while (mbuf != NULL);
175 /* Append the reversed put list to the get list. */
176 KASSERT(*get_tailp == NULL, ("*get_tailp != NULL"));
177 *stdp->std_getp = get_next;
178 stdp->std_getp = get_tailp;
179 stdp->std_count += count;
182 #endif /* SFXGE_HAVE_MQ */
185 sfxge_tx_qreap(struct sfxge_txq *txq)
187 mtx_assert(SFXGE_TXQ_LOCK(txq), MA_OWNED);
189 txq->reaped = txq->completed;
193 sfxge_tx_qlist_post(struct sfxge_txq *txq)
195 unsigned int old_added;
199 mtx_assert(SFXGE_TXQ_LOCK(txq), MA_OWNED);
201 KASSERT(txq->n_pend_desc != 0, ("txq->n_pend_desc == 0"));
202 KASSERT(txq->n_pend_desc <= SFXGE_TSO_MAX_DESC,
203 ("txq->n_pend_desc too large"));
204 KASSERT(!txq->blocked, ("txq->blocked"));
206 old_added = txq->added;
208 /* Post the fragment list. */
209 rc = efx_tx_qpost(txq->common, txq->pend_desc, txq->n_pend_desc,
210 txq->reaped, &txq->added);
211 KASSERT(rc == 0, ("efx_tx_qpost() failed"));
213 /* If efx_tx_qpost() had to refragment, our information about
214 * buffers to free may be associated with the wrong
217 KASSERT(txq->added - old_added == txq->n_pend_desc,
218 ("efx_tx_qpost() refragmented descriptors"));
220 level = txq->added - txq->reaped;
221 KASSERT(level <= SFXGE_NDESCS, ("overfilled TX queue"));
223 /* Clear the fragment list. */
224 txq->n_pend_desc = 0;
226 /* Have we reached the block level? */
227 if (level < SFXGE_TXQ_BLOCK_LEVEL)
230 /* Reap, and check again */
232 level = txq->added - txq->reaped;
233 if (level < SFXGE_TXQ_BLOCK_LEVEL)
239 * Avoid a race with completion interrupt handling that could leave
244 level = txq->added - txq->reaped;
245 if (level < SFXGE_TXQ_BLOCK_LEVEL) {
251 static int sfxge_tx_queue_mbuf(struct sfxge_txq *txq, struct mbuf *mbuf)
253 bus_dmamap_t *used_map;
255 bus_dma_segment_t dma_seg[SFXGE_TX_MAPPING_MAX_SEG];
257 struct sfxge_tx_mapping *stmp;
263 KASSERT(!txq->blocked, ("txq->blocked"));
265 if (mbuf->m_pkthdr.csum_flags & CSUM_TSO)
266 prefetch_read_many(mbuf->m_data);
268 if (txq->init_state != SFXGE_TXQ_STARTED) {
273 /* Load the packet for DMA. */
274 id = txq->added & (SFXGE_NDESCS - 1);
275 stmp = &txq->stmp[id];
276 rc = bus_dmamap_load_mbuf_sg(txq->packet_dma_tag, stmp->map,
277 mbuf, dma_seg, &n_dma_seg, 0);
280 struct mbuf *new_mbuf = m_collapse(mbuf, M_NOWAIT,
281 SFXGE_TX_MAPPING_MAX_SEG);
282 if (new_mbuf == NULL)
286 rc = bus_dmamap_load_mbuf_sg(txq->packet_dma_tag,
288 dma_seg, &n_dma_seg, 0);
293 /* Make the packet visible to the hardware. */
294 bus_dmamap_sync(txq->packet_dma_tag, stmp->map, BUS_DMASYNC_PREWRITE);
296 used_map = &stmp->map;
298 if (mbuf->m_pkthdr.csum_flags & CSUM_TSO) {
299 rc = sfxge_tx_queue_tso(txq, mbuf, dma_seg, n_dma_seg);
302 stmp = &txq->stmp[rc];
304 /* Add the mapping to the fragment list, and set flags
309 desc = &txq->pend_desc[i];
310 desc->eb_addr = dma_seg[i].ds_addr;
311 desc->eb_size = dma_seg[i].ds_len;
312 if (i == n_dma_seg - 1) {
320 if (__predict_false(stmp ==
321 &txq->stmp[SFXGE_NDESCS - 1]))
322 stmp = &txq->stmp[0];
326 txq->n_pend_desc = n_dma_seg;
330 * If the mapping required more than one descriptor
331 * then we need to associate the DMA map with the last
332 * descriptor, not the first.
334 if (used_map != &stmp->map) {
336 stmp->map = *used_map;
341 stmp->flags = TX_BUF_UNMAP | TX_BUF_MBUF;
343 /* Post the fragment list. */
344 sfxge_tx_qlist_post(txq);
349 bus_dmamap_unload(txq->packet_dma_tag, *used_map);
351 /* Drop the packet on the floor. */
361 * Drain the deferred packet list into the transmit queue.
364 sfxge_tx_qdpl_drain(struct sfxge_txq *txq)
366 struct sfxge_softc *sc;
367 struct sfxge_tx_dpl *stdp;
368 struct mbuf *mbuf, *next;
373 mtx_assert(&txq->lock, MA_OWNED);
379 prefetch_read_many(sc->enp);
380 prefetch_read_many(txq->common);
382 mbuf = stdp->std_get;
383 count = stdp->std_count;
386 KASSERT(mbuf != NULL, ("mbuf == NULL"));
388 next = mbuf->m_nextpkt;
389 mbuf->m_nextpkt = NULL;
391 ETHER_BPF_MTAP(sc->ifnet, mbuf); /* packet capture */
394 prefetch_read_many(next);
396 rc = sfxge_tx_queue_mbuf(txq, mbuf);
405 /* Push the fragments to the hardware in batches. */
406 if (txq->added - pushed >= SFXGE_TX_BATCH) {
407 efx_tx_qpush(txq->common, txq->added);
413 KASSERT(mbuf == NULL, ("mbuf != NULL"));
414 stdp->std_get = NULL;
416 stdp->std_getp = &stdp->std_get;
418 stdp->std_get = mbuf;
419 stdp->std_count = count;
422 if (txq->added != pushed)
423 efx_tx_qpush(txq->common, txq->added);
425 KASSERT(txq->blocked || stdp->std_count == 0,
426 ("queue unblocked but count is non-zero"));
429 #define SFXGE_TX_QDPL_PENDING(_txq) \
430 ((_txq)->dpl.std_put != 0)
433 * Service the deferred packet list.
435 * NOTE: drops the txq mutex!
438 sfxge_tx_qdpl_service(struct sfxge_txq *txq)
440 mtx_assert(&txq->lock, MA_OWNED);
443 if (SFXGE_TX_QDPL_PENDING(txq))
444 sfxge_tx_qdpl_swizzle(txq);
447 sfxge_tx_qdpl_drain(txq);
449 mtx_unlock(&txq->lock);
450 } while (SFXGE_TX_QDPL_PENDING(txq) &&
451 mtx_trylock(&txq->lock));
455 * Put a packet on the deferred packet list.
457 * If we are called with the txq lock held, we put the packet on the "get
458 * list", otherwise we atomically push it on the "put list". The swizzle
459 * function takes care of ordering.
461 * The length of the put list is bounded by SFXGE_TX_MAX_DEFFERED. We
462 * overload the csum_data field in the mbuf to keep track of this length
463 * because there is no cheap alternative to avoid races.
466 sfxge_tx_qdpl_put(struct sfxge_txq *txq, struct mbuf *mbuf, int locked)
468 struct sfxge_tx_dpl *stdp;
472 KASSERT(mbuf->m_nextpkt == NULL, ("mbuf->m_nextpkt != NULL"));
475 mtx_assert(&txq->lock, MA_OWNED);
477 sfxge_tx_qdpl_swizzle(txq);
479 if (stdp->std_count >= SFXGE_TX_DPL_GET_PKT_LIMIT_DEFAULT)
482 *(stdp->std_getp) = mbuf;
483 stdp->std_getp = &mbuf->m_nextpkt;
486 volatile uintptr_t *putp;
491 putp = &stdp->std_put;
492 new = (uintptr_t)mbuf;
497 struct mbuf *mp = (struct mbuf *)old;
498 old_len = mp->m_pkthdr.csum_data;
501 if (old_len >= SFXGE_TX_DPL_PUT_PKT_LIMIT_DEFAULT)
503 mbuf->m_pkthdr.csum_data = old_len + 1;
504 mbuf->m_nextpkt = (void *)old;
505 } while (atomic_cmpset_ptr(putp, old, new) == 0);
512 * Called from if_transmit - will try to grab the txq lock and enqueue to the
513 * put list if it succeeds, otherwise will push onto the defer list.
516 sfxge_tx_packet_add(struct sfxge_txq *txq, struct mbuf *m)
521 if (!SFXGE_LINK_UP(txq->sc)) {
527 * Try to grab the txq lock. If we are able to get the lock,
528 * the packet will be appended to the "get list" of the deferred
529 * packet list. Otherwise, it will be pushed on the "put list".
531 locked = mtx_trylock(&txq->lock);
533 if (sfxge_tx_qdpl_put(txq, m, locked) != 0) {
535 mtx_unlock(&txq->lock);
541 * Try to grab the lock again.
543 * If we are able to get the lock, we need to process the deferred
544 * packet list. If we are not able to get the lock, another thread
545 * is processing the list.
548 locked = mtx_trylock(&txq->lock);
551 /* Try to service the list. */
552 sfxge_tx_qdpl_service(txq);
553 /* Lock has been dropped. */
560 atomic_add_long(&txq->early_drops, 1);
566 sfxge_tx_qdpl_flush(struct sfxge_txq *txq)
568 struct sfxge_tx_dpl *stdp = &txq->dpl;
569 struct mbuf *mbuf, *next;
571 mtx_lock(&txq->lock);
573 sfxge_tx_qdpl_swizzle(txq);
574 for (mbuf = stdp->std_get; mbuf != NULL; mbuf = next) {
575 next = mbuf->m_nextpkt;
578 stdp->std_get = NULL;
580 stdp->std_getp = &stdp->std_get;
582 mtx_unlock(&txq->lock);
586 sfxge_if_qflush(struct ifnet *ifp)
588 struct sfxge_softc *sc;
593 for (i = 0; i < SFXGE_TX_SCALE(sc); i++)
594 sfxge_tx_qdpl_flush(sc->txq[i]);
598 * TX start -- called by the stack.
601 sfxge_if_transmit(struct ifnet *ifp, struct mbuf *m)
603 struct sfxge_softc *sc;
604 struct sfxge_txq *txq;
607 sc = (struct sfxge_softc *)ifp->if_softc;
609 KASSERT(ifp->if_flags & IFF_UP, ("interface not up"));
611 /* Pick the desired transmit queue. */
612 if (m->m_pkthdr.csum_flags & (CSUM_DELAY_DATA | CSUM_TSO)) {
615 if (m->m_flags & M_FLOWID) {
616 uint32_t hash = m->m_pkthdr.flowid;
618 index = sc->rx_indir_table[hash % SFXGE_RX_SCALE_MAX];
620 txq = sc->txq[SFXGE_TXQ_IP_TCP_UDP_CKSUM + index];
621 } else if (m->m_pkthdr.csum_flags & CSUM_DELAY_IP) {
622 txq = sc->txq[SFXGE_TXQ_IP_CKSUM];
624 txq = sc->txq[SFXGE_TXQ_NON_CKSUM];
627 rc = sfxge_tx_packet_add(txq, m);
632 #else /* !SFXGE_HAVE_MQ */
634 static void sfxge_if_start_locked(struct ifnet *ifp)
636 struct sfxge_softc *sc = ifp->if_softc;
637 struct sfxge_txq *txq;
639 unsigned int pushed[SFXGE_TXQ_NTYPES];
640 unsigned int q_index;
642 if ((ifp->if_drv_flags & (IFF_DRV_RUNNING|IFF_DRV_OACTIVE)) !=
646 if (!sc->port.link_up)
649 for (q_index = 0; q_index < SFXGE_TXQ_NTYPES; q_index++) {
650 txq = sc->txq[q_index];
651 pushed[q_index] = txq->added;
654 while (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) {
655 IFQ_DRV_DEQUEUE(&ifp->if_snd, mbuf);
659 ETHER_BPF_MTAP(ifp, mbuf); /* packet capture */
661 /* Pick the desired transmit queue. */
662 if (mbuf->m_pkthdr.csum_flags & (CSUM_DELAY_DATA | CSUM_TSO))
663 q_index = SFXGE_TXQ_IP_TCP_UDP_CKSUM;
664 else if (mbuf->m_pkthdr.csum_flags & CSUM_DELAY_IP)
665 q_index = SFXGE_TXQ_IP_CKSUM;
667 q_index = SFXGE_TXQ_NON_CKSUM;
668 txq = sc->txq[q_index];
670 if (sfxge_tx_queue_mbuf(txq, mbuf) != 0)
674 ifp->if_drv_flags |= IFF_DRV_OACTIVE;
678 /* Push the fragments to the hardware in batches. */
679 if (txq->added - pushed[q_index] >= SFXGE_TX_BATCH) {
680 efx_tx_qpush(txq->common, txq->added);
681 pushed[q_index] = txq->added;
685 for (q_index = 0; q_index < SFXGE_TXQ_NTYPES; q_index++) {
686 txq = sc->txq[q_index];
687 if (txq->added != pushed[q_index])
688 efx_tx_qpush(txq->common, txq->added);
692 void sfxge_if_start(struct ifnet *ifp)
694 struct sfxge_softc *sc = ifp->if_softc;
696 mtx_lock(&sc->tx_lock);
697 sfxge_if_start_locked(ifp);
698 mtx_unlock(&sc->tx_lock);
702 sfxge_tx_qdpl_service(struct sfxge_txq *txq)
704 struct sfxge_softc *sc = txq->sc;
705 struct ifnet *ifp = sc->ifnet;
707 mtx_assert(&sc->tx_lock, MA_OWNED);
708 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
709 sfxge_if_start_locked(ifp);
710 mtx_unlock(&sc->tx_lock);
713 #endif /* SFXGE_HAVE_MQ */
716 * Software "TSO". Not quite as good as doing it in hardware, but
717 * still faster than segmenting in the stack.
720 struct sfxge_tso_state {
721 /* Output position */
722 unsigned out_len; /* Remaining length in current segment */
723 unsigned seqnum; /* Current sequence number */
724 unsigned packet_space; /* Remaining space in current packet */
727 unsigned dma_seg_i; /* Current DMA segment number */
728 uint64_t dma_addr; /* DMA address of current position */
729 unsigned in_len; /* Remaining length in current mbuf */
731 const struct mbuf *mbuf; /* Input mbuf (head of chain) */
732 u_short protocol; /* Network protocol (after VLAN decap) */
733 ssize_t nh_off; /* Offset of network header */
734 ssize_t tcph_off; /* Offset of TCP header */
735 unsigned header_len; /* Number of bytes of header */
736 int full_packet_size; /* Number of bytes to put in each outgoing
740 static inline const struct ip *tso_iph(const struct sfxge_tso_state *tso)
742 KASSERT(tso->protocol == htons(ETHERTYPE_IP),
743 ("tso_iph() in non-IPv4 state"));
744 return (const struct ip *)(tso->mbuf->m_data + tso->nh_off);
746 static inline const struct ip6_hdr *tso_ip6h(const struct sfxge_tso_state *tso)
748 KASSERT(tso->protocol == htons(ETHERTYPE_IPV6),
749 ("tso_ip6h() in non-IPv6 state"));
750 return (const struct ip6_hdr *)(tso->mbuf->m_data + tso->nh_off);
752 static inline const struct tcphdr *tso_tcph(const struct sfxge_tso_state *tso)
754 return (const struct tcphdr *)(tso->mbuf->m_data + tso->tcph_off);
757 /* Size of preallocated TSO header buffers. Larger blocks must be
758 * allocated from the heap.
760 #define TSOH_STD_SIZE 128
762 /* At most half the descriptors in the queue at any time will refer to
763 * a TSO header buffer, since they must always be followed by a
764 * payload descriptor referring to an mbuf.
766 #define TSOH_COUNT (SFXGE_NDESCS / 2u)
767 #define TSOH_PER_PAGE (PAGE_SIZE / TSOH_STD_SIZE)
768 #define TSOH_PAGE_COUNT ((TSOH_COUNT + TSOH_PER_PAGE - 1) / TSOH_PER_PAGE)
770 static int tso_init(struct sfxge_txq *txq)
772 struct sfxge_softc *sc = txq->sc;
775 /* Allocate TSO header buffers */
776 txq->tsoh_buffer = malloc(TSOH_PAGE_COUNT * sizeof(txq->tsoh_buffer[0]),
779 for (i = 0; i < TSOH_PAGE_COUNT; i++) {
780 rc = sfxge_dma_alloc(sc, PAGE_SIZE, &txq->tsoh_buffer[i]);
789 sfxge_dma_free(&txq->tsoh_buffer[i]);
790 free(txq->tsoh_buffer, M_SFXGE);
791 txq->tsoh_buffer = NULL;
795 static void tso_fini(struct sfxge_txq *txq)
799 if (txq->tsoh_buffer) {
800 for (i = 0; i < TSOH_PAGE_COUNT; i++)
801 sfxge_dma_free(&txq->tsoh_buffer[i]);
802 free(txq->tsoh_buffer, M_SFXGE);
806 static void tso_start(struct sfxge_tso_state *tso, struct mbuf *mbuf)
808 struct ether_header *eh = mtod(mbuf, struct ether_header *);
812 /* Find network protocol and header */
813 tso->protocol = eh->ether_type;
814 if (tso->protocol == htons(ETHERTYPE_VLAN)) {
815 struct ether_vlan_header *veh =
816 mtod(mbuf, struct ether_vlan_header *);
817 tso->protocol = veh->evl_proto;
818 tso->nh_off = sizeof(*veh);
820 tso->nh_off = sizeof(*eh);
823 /* Find TCP header */
824 if (tso->protocol == htons(ETHERTYPE_IP)) {
825 KASSERT(tso_iph(tso)->ip_p == IPPROTO_TCP,
826 ("TSO required on non-TCP packet"));
827 tso->tcph_off = tso->nh_off + 4 * tso_iph(tso)->ip_hl;
829 KASSERT(tso->protocol == htons(ETHERTYPE_IPV6),
830 ("TSO required on non-IP packet"));
831 KASSERT(tso_ip6h(tso)->ip6_nxt == IPPROTO_TCP,
832 ("TSO required on non-TCP packet"));
833 tso->tcph_off = tso->nh_off + sizeof(struct ip6_hdr);
836 /* We assume all headers are linear in the head mbuf */
837 tso->header_len = tso->tcph_off + 4 * tso_tcph(tso)->th_off;
838 KASSERT(tso->header_len <= mbuf->m_len, ("packet headers fragmented"));
839 tso->full_packet_size = tso->header_len + mbuf->m_pkthdr.tso_segsz;
841 tso->seqnum = ntohl(tso_tcph(tso)->th_seq);
843 /* These flags must not be duplicated */
844 KASSERT(!(tso_tcph(tso)->th_flags & (TH_URG | TH_SYN | TH_RST)),
845 ("incompatible TCP flag on TSO packet"));
847 tso->out_len = mbuf->m_pkthdr.len - tso->header_len;
851 * tso_fill_packet_with_fragment - form descriptors for the current fragment
853 * Form descriptors for the current fragment, until we reach the end
854 * of fragment or end-of-packet. Return 0 on success, 1 if not enough
857 static void tso_fill_packet_with_fragment(struct sfxge_txq *txq,
858 struct sfxge_tso_state *tso)
863 if (tso->in_len == 0 || tso->packet_space == 0)
866 KASSERT(tso->in_len > 0, ("TSO input length went negative"));
867 KASSERT(tso->packet_space > 0, ("TSO packet space went negative"));
869 n = min(tso->in_len, tso->packet_space);
871 tso->packet_space -= n;
875 desc = &txq->pend_desc[txq->n_pend_desc++];
876 desc->eb_addr = tso->dma_addr;
878 desc->eb_eop = tso->out_len == 0 || tso->packet_space == 0;
883 /* Callback from bus_dmamap_load() for long TSO headers. */
884 static void tso_map_long_header(void *dma_addr_ret,
885 bus_dma_segment_t *segs, int nseg,
888 *(uint64_t *)dma_addr_ret = ((__predict_true(error == 0) &&
889 __predict_true(nseg == 1)) ?
894 * tso_start_new_packet - generate a new header and prepare for the new packet
896 * Generate a new header and prepare for the new packet. Return 0 on
897 * success, or an error code if failed to alloc header.
899 static int tso_start_new_packet(struct sfxge_txq *txq,
900 struct sfxge_tso_state *tso,
903 struct sfxge_tx_mapping *stmp = &txq->stmp[id];
904 struct tcphdr *tsoh_th;
912 /* Allocate a DMA-mapped header buffer. */
913 if (__predict_true(tso->header_len <= TSOH_STD_SIZE)) {
914 unsigned int page_index = (id / 2) / TSOH_PER_PAGE;
915 unsigned int buf_index = (id / 2) % TSOH_PER_PAGE;
917 header = (txq->tsoh_buffer[page_index].esm_base +
918 buf_index * TSOH_STD_SIZE);
919 dma_addr = (txq->tsoh_buffer[page_index].esm_addr +
920 buf_index * TSOH_STD_SIZE);
921 map = txq->tsoh_buffer[page_index].esm_map;
925 /* We cannot use bus_dmamem_alloc() as that may sleep */
926 header = malloc(tso->header_len, M_SFXGE, M_NOWAIT);
927 if (__predict_false(!header))
929 rc = bus_dmamap_load(txq->packet_dma_tag, stmp->map,
930 header, tso->header_len,
931 tso_map_long_header, &dma_addr,
933 if (__predict_false(dma_addr == 0)) {
935 /* Succeeded but got >1 segment */
936 bus_dmamap_unload(txq->packet_dma_tag,
940 free(header, M_SFXGE);
945 txq->tso_long_headers++;
946 stmp->u.heap_buf = header;
947 stmp->flags = TX_BUF_UNMAP;
950 tsoh_th = (struct tcphdr *)(header + tso->tcph_off);
952 /* Copy and update the headers. */
953 memcpy(header, tso->mbuf->m_data, tso->header_len);
955 tsoh_th->th_seq = htonl(tso->seqnum);
956 tso->seqnum += tso->mbuf->m_pkthdr.tso_segsz;
957 if (tso->out_len > tso->mbuf->m_pkthdr.tso_segsz) {
958 /* This packet will not finish the TSO burst. */
959 ip_length = tso->full_packet_size - tso->nh_off;
960 tsoh_th->th_flags &= ~(TH_FIN | TH_PUSH);
962 /* This packet will be the last in the TSO burst. */
963 ip_length = tso->header_len - tso->nh_off + tso->out_len;
966 if (tso->protocol == htons(ETHERTYPE_IP)) {
967 struct ip *tsoh_iph = (struct ip *)(header + tso->nh_off);
968 tsoh_iph->ip_len = htons(ip_length);
969 /* XXX We should increment ip_id, but FreeBSD doesn't
970 * currently allocate extra IDs for multiple segments.
973 struct ip6_hdr *tsoh_iph =
974 (struct ip6_hdr *)(header + tso->nh_off);
975 tsoh_iph->ip6_plen = htons(ip_length - sizeof(*tsoh_iph));
978 /* Make the header visible to the hardware. */
979 bus_dmamap_sync(txq->packet_dma_tag, map, BUS_DMASYNC_PREWRITE);
981 tso->packet_space = tso->mbuf->m_pkthdr.tso_segsz;
984 /* Form a descriptor for this header. */
985 desc = &txq->pend_desc[txq->n_pend_desc++];
986 desc->eb_addr = dma_addr;
987 desc->eb_size = tso->header_len;
994 sfxge_tx_queue_tso(struct sfxge_txq *txq, struct mbuf *mbuf,
995 const bus_dma_segment_t *dma_seg, int n_dma_seg)
997 struct sfxge_tso_state tso;
998 unsigned int id, next_id;
1000 tso_start(&tso, mbuf);
1002 /* Grab the first payload fragment. */
1003 if (dma_seg->ds_len == tso.header_len) {
1005 KASSERT(n_dma_seg, ("no payload found in TSO packet"));
1007 tso.in_len = dma_seg->ds_len;
1008 tso.dma_addr = dma_seg->ds_addr;
1010 tso.in_len = dma_seg->ds_len - tso.header_len;
1011 tso.dma_addr = dma_seg->ds_addr + tso.header_len;
1014 id = txq->added & (SFXGE_NDESCS - 1);
1015 if (__predict_false(tso_start_new_packet(txq, &tso, id)))
1019 id = (id + 1) & (SFXGE_NDESCS - 1);
1020 tso_fill_packet_with_fragment(txq, &tso);
1022 /* Move onto the next fragment? */
1023 if (tso.in_len == 0) {
1028 tso.in_len = dma_seg->ds_len;
1029 tso.dma_addr = dma_seg->ds_addr;
1032 /* End of packet? */
1033 if (tso.packet_space == 0) {
1034 /* If the queue is now full due to tiny MSS,
1035 * or we can't create another header, discard
1036 * the remainder of the input mbuf but do not
1037 * roll back the work we have done.
1039 if (txq->n_pend_desc >
1040 SFXGE_TSO_MAX_DESC - (1 + SFXGE_TX_MAPPING_MAX_SEG))
1042 next_id = (id + 1) & (SFXGE_NDESCS - 1);
1043 if (__predict_false(tso_start_new_packet(txq, &tso,
1055 sfxge_tx_qunblock(struct sfxge_txq *txq)
1057 struct sfxge_softc *sc;
1058 struct sfxge_evq *evq;
1061 evq = sc->evq[txq->evq_index];
1063 mtx_assert(&evq->lock, MA_OWNED);
1065 if (txq->init_state != SFXGE_TXQ_STARTED)
1068 mtx_lock(SFXGE_TXQ_LOCK(txq));
1073 level = txq->added - txq->completed;
1074 if (level <= SFXGE_TXQ_UNBLOCK_LEVEL)
1078 sfxge_tx_qdpl_service(txq);
1079 /* note: lock has been dropped */
1083 sfxge_tx_qflush_done(struct sfxge_txq *txq)
1086 txq->flush_state = SFXGE_FLUSH_DONE;
1090 sfxge_tx_qstop(struct sfxge_softc *sc, unsigned int index)
1092 struct sfxge_txq *txq;
1093 struct sfxge_evq *evq;
1096 txq = sc->txq[index];
1097 evq = sc->evq[txq->evq_index];
1099 mtx_lock(SFXGE_TXQ_LOCK(txq));
1101 KASSERT(txq->init_state == SFXGE_TXQ_STARTED,
1102 ("txq->init_state != SFXGE_TXQ_STARTED"));
1104 txq->init_state = SFXGE_TXQ_INITIALIZED;
1105 txq->flush_state = SFXGE_FLUSH_PENDING;
1107 /* Flush the transmit queue. */
1108 efx_tx_qflush(txq->common);
1110 mtx_unlock(SFXGE_TXQ_LOCK(txq));
1114 /* Spin for 100ms. */
1117 if (txq->flush_state != SFXGE_FLUSH_PENDING)
1119 } while (++count < 20);
1121 mtx_lock(&evq->lock);
1122 mtx_lock(SFXGE_TXQ_LOCK(txq));
1124 KASSERT(txq->flush_state != SFXGE_FLUSH_FAILED,
1125 ("txq->flush_state == SFXGE_FLUSH_FAILED"));
1127 txq->flush_state = SFXGE_FLUSH_DONE;
1130 txq->pending = txq->added;
1132 sfxge_tx_qcomplete(txq);
1133 KASSERT(txq->completed == txq->added,
1134 ("txq->completed != txq->added"));
1136 sfxge_tx_qreap(txq);
1137 KASSERT(txq->reaped == txq->completed,
1138 ("txq->reaped != txq->completed"));
1145 /* Destroy the common code transmit queue. */
1146 efx_tx_qdestroy(txq->common);
1149 efx_sram_buf_tbl_clear(sc->enp, txq->buf_base_id,
1150 EFX_TXQ_NBUFS(SFXGE_NDESCS));
1152 mtx_unlock(&evq->lock);
1153 mtx_unlock(SFXGE_TXQ_LOCK(txq));
1157 sfxge_tx_qstart(struct sfxge_softc *sc, unsigned int index)
1159 struct sfxge_txq *txq;
1162 struct sfxge_evq *evq;
1165 txq = sc->txq[index];
1167 evq = sc->evq[txq->evq_index];
1169 KASSERT(txq->init_state == SFXGE_TXQ_INITIALIZED,
1170 ("txq->init_state != SFXGE_TXQ_INITIALIZED"));
1171 KASSERT(evq->init_state == SFXGE_EVQ_STARTED,
1172 ("evq->init_state != SFXGE_EVQ_STARTED"));
1174 /* Program the buffer table. */
1175 if ((rc = efx_sram_buf_tbl_set(sc->enp, txq->buf_base_id, esmp,
1176 EFX_TXQ_NBUFS(SFXGE_NDESCS))) != 0)
1179 /* Determine the kind of queue we are creating. */
1180 switch (txq->type) {
1181 case SFXGE_TXQ_NON_CKSUM:
1184 case SFXGE_TXQ_IP_CKSUM:
1185 flags = EFX_CKSUM_IPV4;
1187 case SFXGE_TXQ_IP_TCP_UDP_CKSUM:
1188 flags = EFX_CKSUM_IPV4 | EFX_CKSUM_TCPUDP;
1191 KASSERT(0, ("Impossible TX queue"));
1196 /* Create the common code transmit queue. */
1197 if ((rc = efx_tx_qcreate(sc->enp, index, txq->type, esmp,
1198 SFXGE_NDESCS, txq->buf_base_id, flags, evq->common,
1199 &txq->common)) != 0)
1202 mtx_lock(SFXGE_TXQ_LOCK(txq));
1204 /* Enable the transmit queue. */
1205 efx_tx_qenable(txq->common);
1207 txq->init_state = SFXGE_TXQ_STARTED;
1209 mtx_unlock(SFXGE_TXQ_LOCK(txq));
1214 efx_sram_buf_tbl_clear(sc->enp, txq->buf_base_id,
1215 EFX_TXQ_NBUFS(SFXGE_NDESCS));
1220 sfxge_tx_stop(struct sfxge_softc *sc)
1222 const efx_nic_cfg_t *encp;
1225 index = SFXGE_TX_SCALE(sc);
1226 while (--index >= 0)
1227 sfxge_tx_qstop(sc, SFXGE_TXQ_IP_TCP_UDP_CKSUM + index);
1229 sfxge_tx_qstop(sc, SFXGE_TXQ_IP_CKSUM);
1231 encp = efx_nic_cfg_get(sc->enp);
1232 sfxge_tx_qstop(sc, SFXGE_TXQ_NON_CKSUM);
1234 /* Tear down the transmit module */
1235 efx_tx_fini(sc->enp);
1239 sfxge_tx_start(struct sfxge_softc *sc)
1244 /* Initialize the common code transmit module. */
1245 if ((rc = efx_tx_init(sc->enp)) != 0)
1248 if ((rc = sfxge_tx_qstart(sc, SFXGE_TXQ_NON_CKSUM)) != 0)
1251 if ((rc = sfxge_tx_qstart(sc, SFXGE_TXQ_IP_CKSUM)) != 0)
1254 for (index = 0; index < SFXGE_TX_SCALE(sc); index++) {
1255 if ((rc = sfxge_tx_qstart(sc, SFXGE_TXQ_IP_TCP_UDP_CKSUM +
1263 while (--index >= 0)
1264 sfxge_tx_qstop(sc, SFXGE_TXQ_IP_TCP_UDP_CKSUM + index);
1266 sfxge_tx_qstop(sc, SFXGE_TXQ_IP_CKSUM);
1269 sfxge_tx_qstop(sc, SFXGE_TXQ_NON_CKSUM);
1272 efx_tx_fini(sc->enp);
1278 * Destroy a transmit queue.
1281 sfxge_tx_qfini(struct sfxge_softc *sc, unsigned int index)
1283 struct sfxge_txq *txq;
1284 unsigned int nmaps = SFXGE_NDESCS;
1286 txq = sc->txq[index];
1288 KASSERT(txq->init_state == SFXGE_TXQ_INITIALIZED,
1289 ("txq->init_state != SFXGE_TXQ_INITIALIZED"));
1291 if (txq->type == SFXGE_TXQ_IP_TCP_UDP_CKSUM)
1294 /* Free the context arrays. */
1295 free(txq->pend_desc, M_SFXGE);
1297 bus_dmamap_destroy(txq->packet_dma_tag, txq->stmp[nmaps].map);
1298 free(txq->stmp, M_SFXGE);
1300 /* Release DMA memory mapping. */
1301 sfxge_dma_free(&txq->mem);
1303 sc->txq[index] = NULL;
1305 #ifdef SFXGE_HAVE_MQ
1306 mtx_destroy(&txq->lock);
1313 sfxge_tx_qinit(struct sfxge_softc *sc, unsigned int txq_index,
1314 enum sfxge_txq_type type, unsigned int evq_index)
1316 struct sfxge_txq *txq;
1317 struct sfxge_evq *evq;
1318 #ifdef SFXGE_HAVE_MQ
1319 struct sfxge_tx_dpl *stdp;
1325 txq = malloc(sizeof(struct sfxge_txq), M_SFXGE, M_ZERO | M_WAITOK);
1328 sc->txq[txq_index] = txq;
1331 evq = sc->evq[evq_index];
1333 /* Allocate and zero DMA space for the descriptor ring. */
1334 if ((rc = sfxge_dma_alloc(sc, EFX_TXQ_SIZE(SFXGE_NDESCS), esmp)) != 0)
1336 (void)memset(esmp->esm_base, 0, EFX_TXQ_SIZE(SFXGE_NDESCS));
1338 /* Allocate buffer table entries. */
1339 sfxge_sram_buf_tbl_alloc(sc, EFX_TXQ_NBUFS(SFXGE_NDESCS),
1342 /* Create a DMA tag for packet mappings. */
1343 if (bus_dma_tag_create(sc->parent_dma_tag, 1, 0x1000,
1344 MIN(0x3FFFFFFFFFFFUL, BUS_SPACE_MAXADDR), BUS_SPACE_MAXADDR, NULL,
1345 NULL, 0x11000, SFXGE_TX_MAPPING_MAX_SEG, 0x1000, 0, NULL, NULL,
1346 &txq->packet_dma_tag) != 0) {
1347 device_printf(sc->dev, "Couldn't allocate txq DMA tag\n");
1352 /* Allocate pending descriptor array for batching writes. */
1353 txq->pend_desc = malloc(sizeof(efx_buffer_t) * SFXGE_NDESCS,
1354 M_SFXGE, M_ZERO | M_WAITOK);
1356 /* Allocate and initialise mbuf DMA mapping array. */
1357 txq->stmp = malloc(sizeof(struct sfxge_tx_mapping) * SFXGE_NDESCS,
1358 M_SFXGE, M_ZERO | M_WAITOK);
1359 for (nmaps = 0; nmaps < SFXGE_NDESCS; nmaps++) {
1360 rc = bus_dmamap_create(txq->packet_dma_tag, 0,
1361 &txq->stmp[nmaps].map);
1366 if (type == SFXGE_TXQ_IP_TCP_UDP_CKSUM &&
1367 (rc = tso_init(txq)) != 0)
1370 #ifdef SFXGE_HAVE_MQ
1371 /* Initialize the deferred packet list. */
1373 stdp->std_getp = &stdp->std_get;
1375 mtx_init(&txq->lock, "txq", NULL, MTX_DEF);
1379 txq->evq_index = evq_index;
1380 txq->txq_index = txq_index;
1381 txq->init_state = SFXGE_TXQ_INITIALIZED;
1386 free(txq->pend_desc, M_SFXGE);
1389 bus_dmamap_destroy(txq->packet_dma_tag, txq->stmp[nmaps].map);
1390 free(txq->stmp, M_SFXGE);
1391 bus_dma_tag_destroy(txq->packet_dma_tag);
1394 sfxge_dma_free(esmp);
1399 static const struct {
1402 } sfxge_tx_stats[] = {
1403 #define SFXGE_TX_STAT(name, member) \
1404 { #name, offsetof(struct sfxge_txq, member) }
1405 SFXGE_TX_STAT(tso_bursts, tso_bursts),
1406 SFXGE_TX_STAT(tso_packets, tso_packets),
1407 SFXGE_TX_STAT(tso_long_headers, tso_long_headers),
1408 SFXGE_TX_STAT(tx_collapses, collapses),
1409 SFXGE_TX_STAT(tx_drops, drops),
1410 SFXGE_TX_STAT(tx_early_drops, early_drops),
1414 sfxge_tx_stat_handler(SYSCTL_HANDLER_ARGS)
1416 struct sfxge_softc *sc = arg1;
1417 unsigned int id = arg2;
1421 /* Sum across all TX queues */
1424 index < SFXGE_TXQ_IP_TCP_UDP_CKSUM + SFXGE_TX_SCALE(sc);
1426 sum += *(unsigned long *)((caddr_t)sc->txq[index] +
1427 sfxge_tx_stats[id].offset);
1429 return SYSCTL_OUT(req, &sum, sizeof(sum));
1433 sfxge_tx_stat_init(struct sfxge_softc *sc)
1435 struct sysctl_ctx_list *ctx = device_get_sysctl_ctx(sc->dev);
1436 struct sysctl_oid_list *stat_list;
1439 stat_list = SYSCTL_CHILDREN(sc->stats_node);
1442 id < sizeof(sfxge_tx_stats) / sizeof(sfxge_tx_stats[0]);
1446 OID_AUTO, sfxge_tx_stats[id].name,
1447 CTLTYPE_ULONG|CTLFLAG_RD,
1448 sc, id, sfxge_tx_stat_handler, "LU",
1454 sfxge_tx_fini(struct sfxge_softc *sc)
1458 index = SFXGE_TX_SCALE(sc);
1459 while (--index >= 0)
1460 sfxge_tx_qfini(sc, SFXGE_TXQ_IP_TCP_UDP_CKSUM + index);
1462 sfxge_tx_qfini(sc, SFXGE_TXQ_IP_CKSUM);
1463 sfxge_tx_qfini(sc, SFXGE_TXQ_NON_CKSUM);
1468 sfxge_tx_init(struct sfxge_softc *sc)
1470 struct sfxge_intr *intr;
1476 KASSERT(intr->state == SFXGE_INTR_INITIALIZED,
1477 ("intr->state != SFXGE_INTR_INITIALIZED"));
1479 /* Initialize the transmit queues */
1480 if ((rc = sfxge_tx_qinit(sc, SFXGE_TXQ_NON_CKSUM,
1481 SFXGE_TXQ_NON_CKSUM, 0)) != 0)
1484 if ((rc = sfxge_tx_qinit(sc, SFXGE_TXQ_IP_CKSUM,
1485 SFXGE_TXQ_IP_CKSUM, 0)) != 0)
1488 for (index = 0; index < SFXGE_TX_SCALE(sc); index++) {
1489 if ((rc = sfxge_tx_qinit(sc, SFXGE_TXQ_IP_TCP_UDP_CKSUM + index,
1490 SFXGE_TXQ_IP_TCP_UDP_CKSUM, index)) != 0)
1494 sfxge_tx_stat_init(sc);
1499 sfxge_tx_qfini(sc, SFXGE_TXQ_IP_CKSUM);
1501 while (--index >= 0)
1502 sfxge_tx_qfini(sc, SFXGE_TXQ_IP_TCP_UDP_CKSUM + index);
1505 sfxge_tx_qfini(sc, SFXGE_TXQ_NON_CKSUM);