2 * Copyright (c) 1991 The Regents of the University of California.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 4. Neither the name of the University nor the names of its contributors
14 * may be used to endorse or promote products derived from this software
15 * without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 * from: @(#)com.c 7.5 (Berkeley) 5/16/91
30 * from: i386/isa sio.c,v 1.234
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
36 #include "opt_comconsole.h"
37 #include "opt_compat.h"
43 * Serial driver, based on 386BSD-0.1 com driver.
44 * Mostly rewritten to use pseudo-DMA.
45 * Works for National Semiconductor NS8250-NS16550AF UARTs.
46 * COM driver, based on HP dca driver.
48 * Changes for PC-Card integration:
49 * - Added PC-Card driver table and handlers
51 #include <sys/param.h>
52 #include <sys/systm.h>
55 #include <sys/fcntl.h>
56 #include <sys/interrupt.h>
58 #include <sys/kernel.h>
59 #include <sys/limits.h>
61 #include <sys/malloc.h>
62 #include <sys/module.h>
63 #include <sys/mutex.h>
65 #include <sys/reboot.h>
66 #include <sys/serial.h>
67 #include <sys/sysctl.h>
68 #include <sys/syslog.h>
70 #include <machine/bus_pio.h>
71 #include <machine/bus.h>
73 #include <sys/timepps.h>
77 #include <isa/isavar.h>
79 #include <machine/resource.h>
81 #include <dev/sio/sioreg.h>
82 #include <dev/sio/siovar.h>
85 #include <dev/ic/esp.h>
87 #include <dev/ic/ns16550.h>
89 #define LOTS_OF_EVENTS 64 /* helps separate urgent events from input */
91 #define CALLOUT_MASK 0x80
92 #define CONTROL_MASK 0x60
93 #define CONTROL_INIT_STATE 0x20
94 #define CONTROL_LOCK_STATE 0x40
95 #define DEV_TO_UNIT(dev) (MINOR_TO_UNIT(minor(dev)))
96 #define MINOR_TO_UNIT(mynor) ((((mynor) & ~0xffffU) >> (8 + 3)) \
98 #define UNIT_TO_MINOR(unit) ((((unit) & ~0x1fU) << (8 + 3)) \
102 /* checks in flags for multiport and which is multiport "master chip"
105 #define COM_ISMULTIPORT(flags) ((flags) & 0x01)
106 #define COM_MPMASTER(flags) (((flags) >> 8) & 0x0ff)
107 #define COM_NOTAST4(flags) ((flags) & 0x04)
109 #define COM_ISMULTIPORT(flags) (0)
110 #endif /* COM_MULTIPORT */
112 #define COM_C_IIR_TXRDYBUG 0x80000
113 #define COM_CONSOLE(flags) ((flags) & 0x10)
114 #define COM_DEBUGGER(flags) ((flags) & 0x80)
115 #define COM_FIFOSIZE(flags) (((flags) & 0xff000000) >> 24)
116 #define COM_FORCECONSOLE(flags) ((flags) & 0x20)
117 #define COM_IIR_TXRDYBUG(flags) ((flags) & COM_C_IIR_TXRDYBUG)
118 #define COM_LLCONSOLE(flags) ((flags) & 0x40)
119 #define COM_LOSESOUTINTS(flags) ((flags) & 0x08)
120 #define COM_NOFIFO(flags) ((flags) & 0x02)
121 #define COM_NOPROBE(flags) ((flags) & 0x40000)
122 #define COM_NOSCR(flags) ((flags) & 0x100000)
123 #define COM_PPSCTS(flags) ((flags) & 0x10000)
124 #define COM_ST16650A(flags) ((flags) & 0x20000)
125 #define COM_TI16754(flags) ((flags) & 0x200000)
127 #define sio_getreg(com, off) \
128 (bus_space_read_1((com)->bst, (com)->bsh, (off)))
129 #define sio_setreg(com, off, value) \
130 (bus_space_write_1((com)->bst, (com)->bsh, (off), (value)))
134 * (CS_BUSY | CS_TTGO) and (CS_BUSY | CS_TTGO | CS_ODEVREADY) must be higher
135 * than the other bits so that they can be tested as a group without masking
138 * The following com and tty flags correspond closely:
139 * CS_BUSY = TS_BUSY (maintained by comstart(), siopoll() and
141 * CS_TTGO = ~TS_TTSTOP (maintained by comparam() and comstart())
142 * CS_CTS_OFLOW = CCTS_OFLOW (maintained by comparam())
143 * CS_RTS_IFLOW = CRTS_IFLOW (maintained by comparam())
144 * TS_FLUSH is not used.
145 * XXX I think TIOCSETA doesn't clear TS_TTSTOP when it clears IXON.
146 * XXX CS_*FLOW should be CF_*FLOW in com->flags (control flags not state).
148 #define CS_BUSY 0x80 /* output in progress */
149 #define CS_TTGO 0x40 /* output not stopped by XOFF */
150 #define CS_ODEVREADY 0x20 /* external device h/w ready (CTS) */
151 #define CS_CHECKMSR 1 /* check of MSR scheduled */
152 #define CS_CTS_OFLOW 2 /* use CTS output flow control */
153 #define CS_ODONE 4 /* output completed */
154 #define CS_RTS_IFLOW 8 /* use RTS input flow control */
155 #define CSE_BUSYCHECK 1 /* siobusycheck() scheduled */
157 static char const * const error_desc[] = {
160 #define CE_INTERRUPT_BUF_OVERFLOW 1
161 "interrupt-level buffer overflow",
162 #define CE_TTY_BUF_OVERFLOW 2
163 "tty-level buffer overflow",
167 #define CE_RECORD(com, errnum) (++(com)->delta_error_counts[errnum])
169 /* types. XXX - should be elsewhere */
170 typedef u_int Port_t; /* hardware port */
171 typedef u_char bool_t; /* boolean */
173 /* queue of linear buffers */
175 u_char *l_head; /* next char to process */
176 u_char *l_tail; /* one past the last char to process */
177 struct lbq *l_next; /* next in queue */
178 bool_t l_queued; /* nonzero if queued */
181 /* com device structure */
183 u_char state; /* miscellaneous flag bits */
184 bool_t active_out; /* nonzero if the callout device is open */
185 u_char cfcr_image; /* copy of value written to CFCR */
187 bool_t esp; /* is this unit a hayes esp board? */
189 u_char extra_state; /* more flag bits, separate for order trick */
190 u_char fifo_image; /* copy of value written to FIFO */
191 bool_t hasfifo; /* nonzero for 16550 UARTs */
192 bool_t loses_outints; /* nonzero if device loses output interrupts */
193 u_char mcr_image; /* copy of value written to MCR */
195 bool_t multiport; /* is this unit part of a multiport device? */
196 #endif /* COM_MULTIPORT */
197 bool_t no_irq; /* nonzero if irq is not attached */
198 bool_t gone; /* hardware disappeared */
199 bool_t poll; /* nonzero if polling is required */
200 bool_t poll_output; /* nonzero if polling for output is required */
201 bool_t st16650a; /* nonzero if Startech 16650A compatible */
202 int unit; /* unit number */
203 u_int flags; /* copy of device flags */
205 u_int wopeners; /* # processes waiting for DCD in open() */
208 * The high level of the driver never reads status registers directly
209 * because there would be too many side effects to handle conveniently.
210 * Instead, it reads copies of the registers stored here by the
213 u_char last_modem_status; /* last MSR read by intr handler */
214 u_char prev_modem_status; /* last MSR handled by high level */
216 u_char *ibuf; /* start of input buffer */
217 u_char *ibufend; /* end of input buffer */
218 u_char *ibufold; /* old input buffer, to be freed */
219 u_char *ihighwater; /* threshold in input buffer */
220 u_char *iptr; /* next free spot in input buffer */
221 int ibufsize; /* size of ibuf (not include error bytes) */
222 int ierroff; /* offset of error bytes in ibuf */
224 struct lbq obufq; /* head of queue of output buffers */
225 struct lbq obufs[2]; /* output buffers */
228 bus_space_handle_t bsh;
230 Port_t data_port; /* i/o ports */
236 Port_t modem_ctl_port;
237 Port_t line_status_port;
238 Port_t modem_status_port;
240 struct tty *tp; /* cross reference */
243 struct timeval timestamp;
244 struct pps_state pps;
246 #ifdef ALT_BREAK_TO_DEBUGGER
250 u_long bytes_in; /* statistics */
252 u_int delta_error_counts[CE_NTYPES];
253 u_long error_counts[CE_NTYPES];
257 struct resource *irqres;
258 struct resource *ioportres;
261 struct cdev *devs[6];
264 * Data area for output buffers. Someday we should build the output
265 * buffer queue without copying data.
272 static int espattach(struct com_s *com, Port_t esp_port);
275 static void combreak(struct tty *tp, int sig);
276 static timeout_t siobusycheck;
277 static u_int siodivisor(u_long rclk, speed_t speed);
278 static void comhardclose(struct com_s *com);
279 static void sioinput(struct com_s *com);
280 static void siointr1(struct com_s *com);
281 static void siointr(void *arg);
282 static int commodem(struct tty *tp, int sigon, int sigoff);
283 static int comparam(struct tty *tp, struct termios *t);
284 static void siopoll(void *);
285 static void siosettimeout(void);
286 static int siosetwater(struct com_s *com, speed_t speed);
287 static void comstart(struct tty *tp);
288 static void comstop(struct tty *tp, int rw);
289 static timeout_t comwakeup;
291 char sio_driver_name[] = "sio";
292 static struct mtx sio_lock;
293 static int sio_inited;
295 /* table and macro for fast conversion from a unit number to its com struct */
296 devclass_t sio_devclass;
297 #define com_addr(unit) ((struct com_s *) \
298 devclass_get_softc(sio_devclass, unit)) /* XXX */
300 static d_open_t sioopen;
301 static d_close_t sioclose;
302 static d_read_t sioread;
303 static d_write_t siowrite;
304 static d_ioctl_t sioioctl;
306 static struct cdevsw sio_cdevsw = {
307 .d_version = D_VERSION,
313 .d_name = sio_driver_name,
314 .d_flags = D_TTY | D_NEEDGIANT,
317 static d_open_t siocopen;
318 static d_close_t siocclose;
319 static d_read_t siocrdwr;
320 static d_ioctl_t siocioctl;
322 static struct cdevsw sioc_cdevsw = {
323 .d_version = D_VERSION,
325 .d_close = siocclose,
328 .d_ioctl = siocioctl,
329 .d_name = sio_driver_name,
330 .d_flags = D_TTY | D_NEEDGIANT,
334 static volatile speed_t comdefaultrate = CONSPEED;
335 static u_long comdefaultrclk = DEFAULT_RCLK;
336 SYSCTL_ULONG(_machdep, OID_AUTO, conrclk, CTLFLAG_RW, &comdefaultrclk, 0, "");
337 static speed_t gdbdefaultrate = GDBSPEED;
338 SYSCTL_UINT(_machdep, OID_AUTO, gdbspeed, CTLFLAG_RW,
339 &gdbdefaultrate, GDBSPEED, "");
340 static u_int com_events; /* input chars + weighted output completions */
341 static Port_t siocniobase;
342 static int siocnunit = -1;
343 static void *sio_slow_ih;
344 static void *sio_fast_ih;
345 static int sio_timeout;
346 static int sio_timeouts_until_log;
347 static struct callout_handle sio_timeout_handle
348 = CALLOUT_HANDLE_INITIALIZER(&sio_timeout_handle);
349 static int sio_numunits;
352 static Port_t siogdbiobase = 0;
356 /* XXX configure this properly. */
357 /* XXX quite broken for new-bus. */
358 static Port_t likely_com_ports[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, };
359 static Port_t likely_esp_ports[] = { 0x140, 0x180, 0x280, 0 };
363 * handle sysctl read/write requests for console speed
365 * In addition to setting comdefaultrate for I/O through /dev/console,
366 * also set the initial and lock values for the /dev/ttyXX device
367 * if there is one associated with the console. Finally, if the /dev/tty
368 * device has already been open, change the speed on the open running port
373 sysctl_machdep_comdefaultrate(SYSCTL_HANDLER_ARGS)
380 newspeed = comdefaultrate;
382 error = sysctl_handle_opaque(oidp, &newspeed, sizeof newspeed, req);
383 if (error || !req->newptr)
386 comdefaultrate = newspeed;
388 if (comconsole < 0) /* serial console not selected? */
391 com = com_addr(comconsole);
400 * set the initial and lock rates for /dev/ttydXX and /dev/cuaXX
401 * (note, the lock rates really are boolean -- if non-zero, disallow
404 tp->t_init_in.c_ispeed = tp->t_init_in.c_ospeed =
405 tp->t_lock_in.c_ispeed = tp->t_lock_in.c_ospeed =
406 tp->t_init_out.c_ispeed = tp->t_init_out.c_ospeed =
407 tp->t_lock_out.c_ispeed = tp->t_lock_out.c_ospeed = comdefaultrate;
410 * if we're open, change the running rate too
412 if (tp->t_state & TS_ISOPEN) {
413 tp->t_termios.c_ispeed =
414 tp->t_termios.c_ospeed = comdefaultrate;
416 error = comparam(tp, &tp->t_termios);
422 SYSCTL_PROC(_machdep, OID_AUTO, conspeed, CTLTYPE_INT | CTLFLAG_RW,
423 0, 0, sysctl_machdep_comdefaultrate, "I", "");
424 /* TUNABLE_INT("machdep.conspeed", &comdefaultrate); */
426 #define SET_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) | (bit))
427 #define CLR_FLAG(dev, bit) device_set_flags(dev, device_get_flags(dev) & ~(bit))
430 * Unload the driver and clear the table.
431 * XXX this is mostly wrong.
433 * This is usually called when the card is ejected, but
434 * can be caused by a kldunload of a controller driver.
435 * The idea is to reset the driver's view of the device
436 * and ensure that any driver entry points such as
437 * read and write do not hang.
446 com = (struct com_s *) device_get_softc(dev);
448 device_printf(dev, "NULL com in siounload\n");
454 for (i = 0 ; i < 6; i++)
455 destroy_dev(com->devs[i]);
457 bus_teardown_intr(dev, com->irqres, com->cookie);
458 bus_release_resource(dev, SYS_RES_IRQ, 0, com->irqres);
461 bus_release_resource(dev, SYS_RES_IOPORT, com->ioportrid,
463 if (com->tp && (com->tp->t_state & TS_ISOPEN)) {
464 device_printf(dev, "still open, forcing close\n");
465 ttyld_close(com->tp, 0);
468 if (com->ibuf != NULL)
469 free(com->ibuf, M_DEVBUF);
470 device_set_softc(dev, NULL);
477 sioprobe(dev, xrid, rclk, noprobe)
484 static bool_t already_init;
493 intrmask_t irqmap[4];
498 u_int flags = device_get_flags(dev);
500 struct resource *port;
503 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
504 0, ~0, IO_COMSIZE, RF_ACTIVE);
508 com = malloc(sizeof(*com), M_DEVBUF, M_NOWAIT | M_ZERO);
510 bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
513 device_set_softc(dev, com);
514 com->bst = rman_get_bustag(port);
515 com->bsh = rman_get_bushandle(port);
520 while (sio_inited != 2)
521 if (atomic_cmpset_int(&sio_inited, 0, 1)) {
522 mtx_init(&sio_lock, sio_driver_name, NULL,
524 MTX_SPIN | MTX_QUIET : MTX_SPIN);
525 atomic_store_rel_int(&sio_inited, 2);
530 * XXX this is broken - when we are first called, there are no
531 * previously configured IO ports. We could hard code
532 * 0x3f8, 0x2f8, 0x3e8, 0x2e8 etc but that's probably worse.
533 * This code has been doing nothing since the conversion since
534 * "count" is zero the first time around.
538 * Turn off MCR_IENABLE for all likely serial ports. An unused
539 * port with its MCR_IENABLE gate open will inhibit interrupts
540 * from any used port that shares the interrupt vector.
541 * XXX the gate enable is elsewhere for some multiports.
544 int count, i, xioport;
546 devclass_get_devices(sio_devclass, &devs, &count);
547 for (i = 0; i < count; i++) {
549 if (device_is_enabled(xdev) &&
550 bus_get_resource(xdev, SYS_RES_IOPORT, 0, &xioport,
552 outb(xioport + com_mcr, 0);
559 if (COM_LLCONSOLE(flags)) {
560 printf("sio%d: reserved for low-level i/o\n",
561 device_get_unit(dev));
562 bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
563 device_set_softc(dev, NULL);
569 * If the device is on a multiport card and has an AST/4
570 * compatible interrupt control register, initialize this
571 * register and prepare to leave MCR_IENABLE clear in the mcr.
572 * Otherwise, prepare to set MCR_IENABLE in the mcr.
573 * Point idev to the device struct giving the correct id_irq.
574 * This is the struct for the master device if there is one.
577 mcr_image = MCR_IENABLE;
579 if (COM_ISMULTIPORT(flags)) {
583 idev = devclass_get_device(sio_devclass, COM_MPMASTER(flags));
585 printf("sio%d: master device %d not configured\n",
586 device_get_unit(dev), COM_MPMASTER(flags));
589 if (!COM_NOTAST4(flags)) {
590 if (bus_get_resource(idev, SYS_RES_IOPORT, 0, &io,
593 if (bus_get_resource(idev, SYS_RES_IRQ, 0,
595 outb(xiobase + com_scr, 0x80);
597 outb(xiobase + com_scr, 0);
602 #endif /* COM_MULTIPORT */
603 if (bus_get_resource(idev, SYS_RES_IRQ, 0, NULL, NULL) != 0)
606 bzero(failures, sizeof failures);
607 iobase = rman_get_start(port);
610 * We don't want to get actual interrupts, just masked ones.
611 * Interrupts from this line should already be masked in the ICU,
612 * but mask them in the processor as well in case there are some
613 * (misconfigured) shared interrupts.
615 mtx_lock_spin(&sio_lock);
619 * For the TI16754 chips, set prescaler to 1 (4 is often the
620 * default after-reset value) as otherwise it's impossible to
621 * get highest baudrates.
623 if (COM_TI16754(flags)) {
626 cfcr = sio_getreg(com, com_cfcr);
627 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE);
628 efr = sio_getreg(com, com_efr);
629 /* Unlock extended features to turn off prescaler. */
630 sio_setreg(com, com_efr, efr | EFR_EFE);
632 sio_setreg(com, com_cfcr, (cfcr != CFCR_EFR_ENABLE) ? cfcr : 0);
633 /* Turn off prescaler. */
634 sio_setreg(com, com_mcr,
635 sio_getreg(com, com_mcr) & ~MCR_PRESCALE);
636 sio_setreg(com, com_cfcr, CFCR_EFR_ENABLE);
637 sio_setreg(com, com_efr, efr);
638 sio_setreg(com, com_cfcr, cfcr);
642 * Initialize the speed and the word size and wait long enough to
643 * drain the maximum of 16 bytes of junk in device output queues.
644 * The speed is undefined after a master reset and must be set
645 * before relying on anything related to output. There may be
646 * junk after a (very fast) soft reboot and (apparently) after
648 * XXX what about the UART bug avoided by waiting in comparam()?
649 * We don't want to to wait long enough to drain at 2 bps.
651 if (iobase == siocniobase)
652 DELAY((16 + 1) * 1000000 / (comdefaultrate / 10));
654 sio_setreg(com, com_cfcr, CFCR_DLAB | CFCR_8BITS);
655 divisor = siodivisor(rclk, SIO_TEST_SPEED);
656 sio_setreg(com, com_dlbl, divisor & 0xff);
657 sio_setreg(com, com_dlbh, divisor >> 8);
658 sio_setreg(com, com_cfcr, CFCR_8BITS);
659 DELAY((16 + 1) * 1000000 / (SIO_TEST_SPEED / 10));
663 * Enable the interrupt gate and disable device interupts. This
664 * should leave the device driving the interrupt line low and
665 * guarantee an edge trigger if an interrupt can be generated.
668 sio_setreg(com, com_mcr, mcr_image);
669 sio_setreg(com, com_ier, 0);
670 DELAY(1000); /* XXX */
671 irqmap[0] = isa_irq_pending();
674 * Attempt to set loopback mode so that we can send a null byte
675 * without annoying any external device.
678 sio_setreg(com, com_mcr, mcr_image | MCR_LOOPBACK);
681 * Attempt to generate an output interrupt. On 8250's, setting
682 * IER_ETXRDY generates an interrupt independent of the current
683 * setting and independent of whether the THR is empty. On 16450's,
684 * setting IER_ETXRDY generates an interrupt independent of the
685 * current setting. On 16550A's, setting IER_ETXRDY only
686 * generates an interrupt when IER_ETXRDY is not already set.
688 sio_setreg(com, com_ier, IER_ETXRDY);
691 * On some 16x50 incompatibles, setting IER_ETXRDY doesn't generate
692 * an interrupt. They'd better generate one for actually doing
693 * output. Loopback may be broken on the same incompatibles but
694 * it's unlikely to do more than allow the null byte out.
696 sio_setreg(com, com_data, 0);
697 if (iobase == siocniobase)
698 DELAY((1 + 2) * 1000000 / (comdefaultrate / 10));
700 DELAY((1 + 2) * 1000000 / (SIO_TEST_SPEED / 10));
703 * Turn off loopback mode so that the interrupt gate works again
704 * (MCR_IENABLE was hidden). This should leave the device driving
705 * an interrupt line high. It doesn't matter if the interrupt
706 * line oscillates while we are not looking at it, since interrupts
710 sio_setreg(com, com_mcr, mcr_image);
713 * It seems my Xircom CBEM56G Cardbus modem wants to be reset
714 * to 8 bits *again*, or else probe test 0 will fail.
715 * gwk@sgi.com, 4/19/2001
717 sio_setreg(com, com_cfcr, CFCR_8BITS);
720 * Some PCMCIA cards (Palido 321s, DC-1S, ...) have the "TXRDY bug",
721 * so we probe for a buggy IIR_TXRDY implementation even in the
722 * noprobe case. We don't probe for it in the !noprobe case because
723 * noprobe is always set for PCMCIA cards and the problem is not
724 * known to affect any other cards.
727 /* Read IIR a few times. */
728 for (fn = 0; fn < 2; fn ++) {
730 failures[6] = sio_getreg(com, com_iir);
733 /* IIR_TXRDY should be clear. Is it? */
735 if (failures[6] & IIR_TXRDY) {
737 * No. We seem to have the bug. Does our fix for
740 sio_setreg(com, com_ier, 0);
741 if (sio_getreg(com, com_iir) & IIR_NOPEND) {
742 /* Yes. We discovered the TXRDY bug! */
743 SET_FLAG(dev, COM_C_IIR_TXRDYBUG);
745 /* No. Just fail. XXX */
747 sio_setreg(com, com_mcr, 0);
751 CLR_FLAG(dev, COM_C_IIR_TXRDYBUG);
753 sio_setreg(com, com_ier, 0);
754 sio_setreg(com, com_cfcr, CFCR_8BITS);
755 mtx_unlock_spin(&sio_lock);
756 bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
757 if (iobase == siocniobase)
760 device_set_softc(dev, NULL);
768 * o the CFCR, IER and MCR in UART hold the values written to them
769 * (the values happen to be all distinct - this is good for
770 * avoiding false positive tests from bus echoes).
771 * o an output interrupt is generated and its vector is correct.
772 * o the interrupt goes away when the IIR in the UART is read.
775 failures[0] = sio_getreg(com, com_cfcr) - CFCR_8BITS;
776 failures[1] = sio_getreg(com, com_ier) - IER_ETXRDY;
777 failures[2] = sio_getreg(com, com_mcr) - mcr_image;
778 DELAY(10000); /* Some internal modems need this time */
779 irqmap[1] = isa_irq_pending();
780 failures[4] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_TXRDY;
781 DELAY(1000); /* XXX */
782 irqmap[2] = isa_irq_pending();
783 failures[6] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND;
786 * Turn off all device interrupts and check that they go off properly.
787 * Leave MCR_IENABLE alone. For ports without a master port, it gates
788 * the OUT2 output of the UART to
789 * the ICU input. Closing the gate would give a floating ICU input
790 * (unless there is another device driving it) and spurious interrupts.
791 * (On the system that this was first tested on, the input floats high
792 * and gives a (masked) interrupt as soon as the gate is closed.)
794 sio_setreg(com, com_ier, 0);
795 sio_setreg(com, com_cfcr, CFCR_8BITS); /* dummy to avoid bus echo */
796 failures[7] = sio_getreg(com, com_ier);
797 DELAY(1000); /* XXX */
798 irqmap[3] = isa_irq_pending();
799 failures[9] = (sio_getreg(com, com_iir) & IIR_IMASK) - IIR_NOPEND;
801 mtx_unlock_spin(&sio_lock);
803 irqs = irqmap[1] & ~irqmap[0];
804 if (bus_get_resource(idev, SYS_RES_IRQ, 0, &xirq, NULL) == 0 &&
805 ((1 << xirq) & irqs) == 0) {
807 "sio%d: configured irq %ld not in bitmap of probed irqs %#x\n",
808 device_get_unit(dev), xirq, irqs);
810 "sio%d: port may not be enabled\n",
811 device_get_unit(dev));
814 printf("sio%d: irq maps: %#x %#x %#x %#x\n",
815 device_get_unit(dev),
816 irqmap[0], irqmap[1], irqmap[2], irqmap[3]);
819 for (fn = 0; fn < sizeof failures; ++fn)
821 sio_setreg(com, com_mcr, 0);
824 printf("sio%d: probe failed test(s):",
825 device_get_unit(dev));
826 for (fn = 0; fn < sizeof failures; ++fn)
833 bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
834 if (iobase == siocniobase)
837 device_set_softc(dev, NULL);
845 espattach(com, esp_port)
853 * Check the ESP-specific I/O port to see if we're an ESP
854 * card. If not, return failure immediately.
856 if ((inb(esp_port) & 0xf3) == 0) {
857 printf(" port 0x%x is not an ESP board?\n", esp_port);
862 * We've got something that claims to be a Hayes ESP card.
866 /* Get the dip-switch configuration */
867 outb(esp_port + ESP_CMD1, ESP_GETDIPS);
868 dips = inb(esp_port + ESP_STATUS1);
871 * Bits 0,1 of dips say which COM port we are.
873 if (rman_get_start(com->ioportres) == likely_com_ports[dips & 0x03])
876 printf(" esp_port has com %d\n", dips & 0x03);
881 * Check for ESP version 2.0 or later: bits 4,5,6 = 010.
883 outb(esp_port + ESP_CMD1, ESP_GETTEST);
884 val = inb(esp_port + ESP_STATUS1); /* clear reg 1 */
885 val = inb(esp_port + ESP_STATUS2);
886 if ((val & 0x70) < 0x20) {
887 printf("-old (%o)", val & 0x70);
892 * Check for ability to emulate 16550: bit 7 == 1
894 if ((dips & 0x80) == 0) {
900 * Okay, we seem to be a Hayes ESP card. Whee.
903 com->esp_port = esp_port;
909 sioattach(dev, xrid, rclk)
923 struct resource *port;
928 port = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid,
929 0, ~0, IO_COMSIZE, RF_ACTIVE);
933 iobase = rman_get_start(port);
934 unit = device_get_unit(dev);
935 com = device_get_softc(dev);
936 flags = device_get_flags(dev);
938 if (unit >= sio_numunits)
939 sio_numunits = unit + 1;
941 * sioprobe() has initialized the device registers as follows:
942 * o cfcr = CFCR_8BITS.
943 * It is most important that CFCR_DLAB is off, so that the
944 * data port is not hidden when we enable interrupts.
946 * Interrupts are only enabled when the line is open.
947 * o mcr = MCR_IENABLE, or 0 if the port has AST/4 compatible
948 * interrupt control register or the config specifies no irq.
949 * Keeping MCR_DTR and MCR_RTS off might stop the external
950 * device from sending before we are ready.
952 bzero(com, sizeof *com);
954 com->ioportres = port;
955 com->ioportrid = rid;
956 com->bst = rman_get_bustag(port);
957 com->bsh = rman_get_bushandle(port);
958 com->cfcr_image = CFCR_8BITS;
959 com->loses_outints = COM_LOSESOUTINTS(flags) != 0;
960 com->no_irq = bus_get_resource(dev, SYS_RES_IRQ, 0, NULL, NULL) != 0;
961 com->tx_fifo_size = 1;
962 com->obufs[0].l_head = com->obuf1;
963 com->obufs[1].l_head = com->obuf2;
965 com->data_port = iobase + com_data;
966 com->int_ctl_port = iobase + com_ier;
967 com->int_id_port = iobase + com_iir;
968 com->modem_ctl_port = iobase + com_mcr;
969 com->mcr_image = inb(com->modem_ctl_port);
970 com->line_status_port = iobase + com_lsr;
971 com->modem_status_port = iobase + com_msr;
973 tp = com->tp = ttyalloc();
974 tp->t_oproc = comstart;
975 tp->t_param = comparam;
976 tp->t_stop = comstop;
977 tp->t_modem = commodem;
978 tp->t_break = combreak;
986 * We don't use all the flags from <sys/ttydefaults.h> since they
987 * are only relevant for logins. It's important to have echo off
988 * initially so that the line doesn't start blathering before the
989 * echo flag can be turned off.
991 tp->t_init_in.c_iflag = 0;
992 tp->t_init_in.c_oflag = 0;
993 tp->t_init_in.c_cflag = TTYDEF_CFLAG;
994 tp->t_init_in.c_lflag = 0;
995 if (unit == comconsole) {
996 tp->t_init_in.c_iflag = TTYDEF_IFLAG;
997 tp->t_init_in.c_oflag = TTYDEF_OFLAG;
998 tp->t_init_in.c_cflag = TTYDEF_CFLAG | CLOCAL;
999 tp->t_init_in.c_lflag = TTYDEF_LFLAG;
1000 tp->t_lock_out.c_cflag = tp->t_lock_in.c_cflag = CLOCAL;
1001 tp->t_lock_out.c_ispeed = tp->t_lock_out.c_ospeed =
1002 tp->t_lock_in.c_ispeed = tp->t_lock_in.c_ospeed =
1003 tp->t_init_in.c_ispeed = tp->t_init_in.c_ospeed = comdefaultrate;
1005 tp->t_init_in.c_ispeed = tp->t_init_in.c_ospeed = TTYDEF_SPEED;
1006 if (siosetwater(com, tp->t_init_in.c_ispeed) != 0) {
1007 mtx_unlock_spin(&sio_lock);
1009 * Leave i/o resources allocated if this is a `cn'-level
1010 * console, so that other devices can't snarf them.
1012 if (iobase != siocniobase)
1013 bus_release_resource(dev, SYS_RES_IOPORT, rid, port);
1016 mtx_unlock_spin(&sio_lock);
1017 termioschars(&tp->t_init_in);
1018 tp->t_init_out = tp->t_init_in;
1020 /* attempt to determine UART type */
1021 printf("sio%d: type", unit);
1024 if (!COM_ISMULTIPORT(flags) &&
1025 !COM_IIR_TXRDYBUG(flags) && !COM_NOSCR(flags)) {
1030 scr = sio_getreg(com, com_scr);
1031 sio_setreg(com, com_scr, 0xa5);
1032 scr1 = sio_getreg(com, com_scr);
1033 sio_setreg(com, com_scr, 0x5a);
1034 scr2 = sio_getreg(com, com_scr);
1035 sio_setreg(com, com_scr, scr);
1036 if (scr1 != 0xa5 || scr2 != 0x5a) {
1037 printf(" 8250 or not responding");
1038 goto determined_type;
1041 sio_setreg(com, com_fifo, FIFO_ENABLE | FIFO_RX_HIGH);
1043 switch (inb(com->int_id_port) & IIR_FIFO_MASK) {
1054 if (COM_NOFIFO(flags)) {
1055 printf(" 16550A fifo disabled");
1058 com->hasfifo = TRUE;
1059 if (COM_ST16650A(flags)) {
1060 printf(" ST16650A");
1061 com->st16650a = TRUE;
1062 com->tx_fifo_size = 32;
1065 if (COM_TI16754(flags)) {
1067 com->tx_fifo_size = 64;
1072 for (espp = likely_esp_ports; *espp != 0; espp++)
1073 if (espattach(com, *espp)) {
1074 com->tx_fifo_size = 1024;
1080 com->tx_fifo_size = COM_FIFOSIZE(flags);
1081 if (com->tx_fifo_size == 0)
1082 com->tx_fifo_size = 16;
1084 printf(" lookalike with %u bytes FIFO",
1091 * Set 16550 compatibility mode.
1092 * We don't use the ESP_MODE_SCALE bit to increase the
1093 * fifo trigger levels because we can't handle large
1095 * XXX flow control should be set in comparam(), not here.
1097 outb(com->esp_port + ESP_CMD1, ESP_SETMODE);
1098 outb(com->esp_port + ESP_CMD2, ESP_MODE_RTS | ESP_MODE_FIFO);
1100 /* Set RTS/CTS flow control. */
1101 outb(com->esp_port + ESP_CMD1, ESP_SETFLOWTYPE);
1102 outb(com->esp_port + ESP_CMD2, ESP_FLOW_RTS);
1103 outb(com->esp_port + ESP_CMD2, ESP_FLOW_CTS);
1105 /* Set flow-control levels. */
1106 outb(com->esp_port + ESP_CMD1, ESP_SETRXFLOW);
1107 outb(com->esp_port + ESP_CMD2, HIBYTE(768));
1108 outb(com->esp_port + ESP_CMD2, LOBYTE(768));
1109 outb(com->esp_port + ESP_CMD2, HIBYTE(512));
1110 outb(com->esp_port + ESP_CMD2, LOBYTE(512));
1112 #endif /* COM_ESP */
1113 sio_setreg(com, com_fifo, 0);
1116 #ifdef COM_MULTIPORT
1117 if (COM_ISMULTIPORT(flags)) {
1120 com->multiport = TRUE;
1121 printf(" (multiport");
1122 if (unit == COM_MPMASTER(flags))
1125 masterdev = devclass_get_device(sio_devclass,
1126 COM_MPMASTER(flags));
1127 com->no_irq = (masterdev == NULL || bus_get_resource(masterdev,
1128 SYS_RES_IRQ, 0, NULL, NULL) != 0);
1130 #endif /* COM_MULTIPORT */
1131 if (unit == comconsole)
1132 printf(", console");
1133 if (COM_IIR_TXRDYBUG(flags))
1134 printf(" with a buggy IIR_TXRDY implementation");
1137 if (sio_fast_ih == NULL) {
1138 swi_add(&tty_ithd, "sio", siopoll, NULL, SWI_TTY, 0,
1140 swi_add(&clk_ithd, "sio", siopoll, NULL, SWI_CLOCK, 0,
1143 minorbase = UNIT_TO_MINOR(unit);
1144 com->devs[0] = make_dev(&sio_cdevsw, minorbase,
1145 UID_ROOT, GID_WHEEL, 0600, "ttyd%r", unit);
1146 com->devs[1] = make_dev(&sioc_cdevsw, minorbase | CONTROL_INIT_STATE,
1147 UID_ROOT, GID_WHEEL, 0600, "ttyid%r", unit);
1148 com->devs[2] = make_dev(&sioc_cdevsw, minorbase | CONTROL_LOCK_STATE,
1149 UID_ROOT, GID_WHEEL, 0600, "ttyld%r", unit);
1150 com->devs[3] = make_dev(&sio_cdevsw, minorbase | CALLOUT_MASK,
1151 UID_UUCP, GID_DIALER, 0660, "cuaa%r", unit);
1152 com->devs[4] = make_dev(&sioc_cdevsw,
1153 minorbase | CALLOUT_MASK | CONTROL_INIT_STATE,
1154 UID_UUCP, GID_DIALER, 0660, "cuaia%r", unit);
1155 com->devs[5] = make_dev(&sioc_cdevsw,
1156 minorbase | CALLOUT_MASK | CONTROL_LOCK_STATE,
1157 UID_UUCP, GID_DIALER, 0660, "cuala%r", unit);
1158 for (rid = 0; rid < 6; rid++) {
1159 com->devs[rid]->si_drv1 = com;
1160 com->devs[rid]->si_tty = tp;
1163 com->pps.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR;
1165 if (COM_PPSCTS(flags))
1166 com->pps_bit = MSR_CTS;
1168 com->pps_bit = MSR_DCD;
1169 pps_init(&com->pps);
1172 com->irqres = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
1174 ret = BUS_SETUP_INTR(device_get_parent(dev), dev, com->irqres,
1175 INTR_TYPE_TTY | INTR_FAST,
1176 siointr, com, &com->cookie);
1178 ret = BUS_SETUP_INTR(device_get_parent(dev), dev,
1179 com->irqres, INTR_TYPE_TTY,
1180 siointr, com, &com->cookie);
1182 device_printf(dev, "unable to activate interrupt in fast mode - using normal mode\n");
1185 device_printf(dev, "could not activate interrupt\n");
1186 #if defined(KDB) && (defined(BREAK_TO_DEBUGGER) || \
1187 defined(ALT_BREAK_TO_DEBUGGER))
1189 * Enable interrupts for early break-to-debugger support
1192 if (ret == 0 && unit == comconsole)
1193 outb(siocniobase + com_ier, IER_ERXRDY | IER_ERLS |
1202 siocopen(dev, flag, mode, td)
1219 sioopen(dev, flag, mode, td)
1233 unit = MINOR_TO_UNIT(mynor);
1239 tp = dev->si_tty = com->tp;
1242 * We jump to this label after all non-interrupted sleeps to pick
1243 * up any changes of the device state.
1246 error = ttydtrwaitsleep(tp);
1249 if (tp->t_state & TS_ISOPEN) {
1251 * The device is open, so everything has been initialized.
1254 if (mynor & CALLOUT_MASK) {
1255 if (!com->active_out) {
1260 if (com->active_out) {
1261 if (flag & O_NONBLOCK) {
1265 error = tsleep(&com->active_out,
1266 TTIPRI | PCATCH, "siobi", 0);
1267 if (com_addr(unit) == NULL)
1269 if (error != 0 || com->gone)
1274 if (tp->t_state & TS_XCLUDE &&
1281 * The device isn't open, so there are no conflicts.
1282 * Initialize it. Initialization is done twice in many
1283 * cases: to preempt sleeping callin opens if we are
1284 * callout, and to complete a callin open after DCD rises.
1287 tp->t_termios = mynor & CALLOUT_MASK
1288 ? tp->t_init_out : tp->t_init_in;
1289 (void)commodem(tp, SER_DTR | SER_RTS, 0);
1290 com->poll = com->no_irq;
1291 com->poll_output = com->loses_outints;
1293 error = comparam(tp, &tp->t_termios);
1298 * XXX we should goto open_top if comparam() slept.
1303 * (Re)enable and drain fifos.
1305 * Certain SMC chips cause problems if the fifos
1306 * are enabled while input is ready. Turn off the
1307 * fifo if necessary to clear the input. We test
1308 * the input ready bit after enabling the fifos
1309 * since we've already enabled them in comparam()
1310 * and to handle races between enabling and fresh
1313 for (i = 0; i < 500; i++) {
1314 sio_setreg(com, com_fifo,
1315 FIFO_RCV_RST | FIFO_XMT_RST
1318 * XXX the delays are for superstitious
1319 * historical reasons. It must be less than
1320 * the character time at the maximum
1321 * supported speed (87 usec at 115200 bps
1322 * 8N1). Otherwise we might loop endlessly
1323 * if data is streaming in. We used to use
1324 * delays of 100. That usually worked
1325 * because DELAY(100) used to usually delay
1326 * for about 85 usec instead of 100.
1329 if (!(inb(com->line_status_port) & LSR_RXRDY))
1331 sio_setreg(com, com_fifo, 0);
1333 (void) inb(com->data_port);
1341 mtx_lock_spin(&sio_lock);
1342 (void) inb(com->line_status_port);
1343 (void) inb(com->data_port);
1344 com->prev_modem_status = com->last_modem_status
1345 = inb(com->modem_status_port);
1346 outb(com->int_ctl_port,
1347 IER_ERXRDY | IER_ERLS | IER_EMSC
1348 | (COM_IIR_TXRDYBUG(com->flags) ? 0 : IER_ETXRDY));
1349 mtx_unlock_spin(&sio_lock);
1351 * Handle initial DCD. Callout devices get a fake initial
1352 * DCD (trapdoor DCD). If we are callout, then any sleeping
1353 * callin opens get woken up and resume sleeping on "siobi"
1354 * instead of "siodcd".
1357 * XXX `mynor & CALLOUT_MASK' should be
1358 * `tp->t_cflag & (SOFT_CARRIER | TRAPDOOR_CARRIER) where
1359 * TRAPDOOR_CARRIER is the default initial state for callout
1360 * devices and SOFT_CARRIER is like CLOCAL except it hides
1363 if (com->prev_modem_status & MSR_DCD || mynor & CALLOUT_MASK)
1367 * Wait for DCD if necessary.
1369 if (!(tp->t_state & TS_CARR_ON) && !(mynor & CALLOUT_MASK)
1370 && !(tp->t_cflag & CLOCAL) && !(flag & O_NONBLOCK)) {
1372 error = tsleep(TSA_CARR_ON(tp), TTIPRI | PCATCH, "siodcd", 0);
1373 if (com_addr(unit) == NULL)
1376 if (error != 0 || com->gone)
1380 error = ttyld_open(tp, dev);
1382 if (tp->t_state & TS_ISOPEN && mynor & CALLOUT_MASK)
1383 com->active_out = TRUE;
1387 if (!(tp->t_state & TS_ISOPEN) && com->wopeners == 0)
1393 siocclose(dev, flag, mode, td)
1404 sioclose(dev, flag, mode, td)
1419 ttyld_close(tp, flag);
1426 printf("sio%d: gone\n", com->unit);
1428 if (com->ibuf != NULL)
1429 free(com->ibuf, M_DEVBUF);
1430 bzero(tp, sizeof *tp);
1445 com->poll_output = FALSE;
1446 com->do_timestamp = FALSE;
1447 com->pps.ppsparam.mode = 0;
1448 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
1451 #if defined(KDB) && (defined(BREAK_TO_DEBUGGER) || \
1452 defined(ALT_BREAK_TO_DEBUGGER))
1454 * Leave interrupts enabled and don't clear DTR if this is the
1455 * console. This allows us to detect break-to-debugger events
1456 * while the console device is closed.
1458 if (com->unit != comconsole)
1461 sio_setreg(com, com_ier, 0);
1462 if (tp->t_cflag & HUPCL
1464 * XXX we will miss any carrier drop between here and the
1465 * next open. Perhaps we should watch DCD even when the
1466 * port is closed; it is not sufficient to check it at
1467 * the next open because it might go up and down while
1468 * we're not watching.
1470 || (!com->active_out
1471 && !(com->prev_modem_status & MSR_DCD)
1472 && !(tp->t_init_in.c_cflag & CLOCAL))
1473 || !(tp->t_state & TS_ISOPEN)) {
1474 (void)commodem(tp, 0, SER_DTR);
1475 ttydtrwaitstart(tp);
1480 * Disable fifos so that they are off after controlled
1481 * reboots. Some BIOSes fail to detect 16550s when the
1482 * fifos are enabled.
1484 sio_setreg(com, com_fifo, 0);
1486 com->active_out = FALSE;
1487 wakeup(&com->active_out);
1488 wakeup(TSA_CARR_ON(tp)); /* restart any wopeners */
1493 siocrdwr(dev, uio, flag)
1503 sioread(dev, uio, flag)
1511 if (com == NULL || com->gone)
1513 return (ttyld_read(com->tp, uio, flag));
1517 siowrite(dev, uio, flag)
1528 unit = MINOR_TO_UNIT(mynor);
1530 if (com == NULL || com->gone)
1533 * (XXX) We disallow virtual consoles if the physical console is
1534 * a serial port. This is in case there is a display attached that
1535 * is not the console. In that situation we don't need/want the X
1536 * server taking over the console.
1538 if (constty != NULL && unit == comconsole)
1540 return (ttyld_write(com->tp, uio, flag));
1550 com = (struct com_s *)chan;
1553 * Clear TS_BUSY if low-level output is complete.
1554 * spl locking is sufficient because siointr1() does not set CS_BUSY.
1555 * If siointr1() clears CS_BUSY after we look at it, then we'll get
1556 * called again. Reading the line status port outside of siointr1()
1557 * is safe because CS_BUSY is clear so there are no output interrupts
1561 if (com->state & CS_BUSY)
1562 com->extra_state &= ~CSE_BUSYCHECK; /* False alarm. */
1563 else if ((inb(com->line_status_port) & (LSR_TSRE | LSR_TXRDY))
1564 == (LSR_TSRE | LSR_TXRDY)) {
1565 com->tp->t_state &= ~TS_BUSY;
1567 com->extra_state &= ~CSE_BUSYCHECK;
1569 timeout(siobusycheck, com, hz / 100);
1574 siodivisor(rclk, speed)
1584 #if UINT_MAX > (ULONG_MAX - 1) / 8
1585 if (speed > (ULONG_MAX - 1) / 8)
1588 divisor = (rclk / (8UL * speed) + 1) / 2;
1589 if (divisor == 0 || divisor >= 65536)
1591 actual_speed = rclk / (16UL * divisor);
1593 /* 10 times error in percent: */
1594 error = ((actual_speed - (long)speed) * 2000 / (long)speed + 1) / 2;
1596 /* 3.0% maximum error tolerance: */
1597 if (error < -30 || error > 30)
1604 * Call this function with the sio_lock mutex held. It will return with the
1619 if (!(tp->t_state & TS_ISOPEN) || !(tp->t_cflag & CREAD)) {
1620 com_events -= (com->iptr - com->ibuf);
1621 com->iptr = com->ibuf;
1624 if (tp->t_state & TS_CAN_BYPASS_L_RINT) {
1626 * Avoid the grotesquely inefficient lineswitch routine
1627 * (ttyinput) in "raw" mode. It usually takes about 450
1628 * instructions (that's without canonical processing or echo!).
1629 * slinput is reasonably fast (usually 40 instructions plus
1634 * This may look odd, but it is using save-and-enable
1635 * semantics instead of the save-and-disable semantics
1636 * that are used everywhere else.
1638 mtx_unlock_spin(&sio_lock);
1639 incc = com->iptr - buf;
1640 if (tp->t_rawq.c_cc + incc > tp->t_ihiwat
1641 && (com->state & CS_RTS_IFLOW
1642 || tp->t_iflag & IXOFF)
1643 && !(tp->t_state & TS_TBLOCK))
1645 com->delta_error_counts[CE_TTY_BUF_OVERFLOW]
1646 += b_to_q((char *)buf, incc, &tp->t_rawq);
1650 tp->t_rawcc += incc;
1652 if (tp->t_state & TS_TTSTOP
1653 && (tp->t_iflag & IXANY
1654 || tp->t_cc[VSTART] == tp->t_cc[VSTOP])) {
1655 tp->t_state &= ~TS_TTSTOP;
1656 tp->t_lflag &= ~FLUSHO;
1659 mtx_lock_spin(&sio_lock);
1660 } while (buf < com->iptr);
1664 * This may look odd, but it is using save-and-enable
1665 * semantics instead of the save-and-disable semantics
1666 * that are used everywhere else.
1668 mtx_unlock_spin(&sio_lock);
1669 line_status = buf[com->ierroff];
1672 & (LSR_BI | LSR_FE | LSR_OE | LSR_PE)) {
1673 if (line_status & LSR_BI)
1674 recv_data |= TTY_BI;
1675 if (line_status & LSR_FE)
1676 recv_data |= TTY_FE;
1677 if (line_status & LSR_OE)
1678 recv_data |= TTY_OE;
1679 if (line_status & LSR_PE)
1680 recv_data |= TTY_PE;
1682 ttyld_rint(tp, recv_data);
1683 mtx_lock_spin(&sio_lock);
1684 } while (buf < com->iptr);
1686 com_events -= (com->iptr - com->ibuf);
1687 com->iptr = com->ibuf;
1690 * There is now room for another low-level buffer full of input,
1691 * so enable RTS if it is now disabled and there is room in the
1692 * high-level buffer.
1694 if ((com->state & CS_RTS_IFLOW) && !(com->mcr_image & MCR_RTS) &&
1695 !(tp->t_state & TS_TBLOCK))
1696 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
1705 #ifndef COM_MULTIPORT
1706 com = (struct com_s *)arg;
1708 mtx_lock_spin(&sio_lock);
1710 mtx_unlock_spin(&sio_lock);
1711 #else /* COM_MULTIPORT */
1712 bool_t possibly_more_intrs;
1716 * Loop until there is no activity on any port. This is necessary
1717 * to get an interrupt edge more than to avoid another interrupt.
1718 * If the IRQ signal is just an OR of the IRQ signals from several
1719 * devices, then the edge from one may be lost because another is
1722 mtx_lock_spin(&sio_lock);
1724 possibly_more_intrs = FALSE;
1725 for (unit = 0; unit < sio_numunits; ++unit) {
1726 com = com_addr(unit);
1729 * would it work here, or be counter-productive?
1733 && (inb(com->int_id_port) & IIR_IMASK)
1736 possibly_more_intrs = TRUE;
1738 /* XXX COM_UNLOCK(); */
1740 } while (possibly_more_intrs);
1741 mtx_unlock_spin(&sio_lock);
1742 #endif /* COM_MULTIPORT */
1745 static struct timespec siots[8];
1747 static int volatile siotsunit = -1;
1750 sysctl_siots(SYSCTL_HANDLER_ARGS)
1757 for (i = 1, tso = siotso; i < tso; i++) {
1758 delta = (long long)(siots[i].tv_sec - siots[i - 1].tv_sec) *
1760 (siots[i].tv_nsec - siots[i - 1].tv_nsec);
1761 len = sprintf(buf, "%lld\n", delta);
1762 if (delta >= 110000)
1763 len += sprintf(buf + len - 1, ": *** %ld.%09ld\n",
1764 (long)siots[i].tv_sec, siots[i].tv_nsec) - 1;
1766 buf[len - 1] = '\0';
1767 error = SYSCTL_OUT(req, buf, len);
1775 SYSCTL_PROC(_machdep, OID_AUTO, siots, CTLTYPE_STRING | CTLFLAG_RD,
1776 0, 0, sysctl_siots, "A", "sio timestamps");
1785 u_char modem_status;
1789 if (COM_IIR_TXRDYBUG(com->flags)) {
1790 int_ctl = inb(com->int_ctl_port);
1791 int_ctl_new = int_ctl;
1797 while (!com->gone) {
1798 if (com->pps.ppsparam.mode & PPS_CAPTUREBOTH) {
1799 modem_status = inb(com->modem_status_port);
1800 if ((modem_status ^ com->last_modem_status) &
1802 pps_capture(&com->pps);
1803 pps_event(&com->pps,
1804 (modem_status & com->pps_bit) ?
1805 PPS_CAPTUREASSERT : PPS_CAPTURECLEAR);
1808 line_status = inb(com->line_status_port);
1810 /* input event? (check first to help avoid overruns) */
1811 while (line_status & LSR_RCV_MASK) {
1812 /* break/unnattached error bits or real input? */
1813 if (!(line_status & LSR_RXRDY))
1816 recv_data = inb(com->data_port);
1818 #ifdef ALT_BREAK_TO_DEBUGGER
1819 if (com->unit == comconsole &&
1820 kdb_alt_break(recv_data, &com->alt_brk_state) != 0)
1821 kdb_enter("Break sequence on console");
1822 #endif /* ALT_BREAK_TO_DEBUGGER */
1824 if (line_status & (LSR_BI | LSR_FE | LSR_PE)) {
1826 * Don't store BI if IGNBRK or FE/PE if IGNPAR.
1827 * Otherwise, push the work to a higher level
1828 * (to handle PARMRK) if we're bypassing.
1829 * Otherwise, convert BI/FE and PE+INPCK to 0.
1831 * This makes bypassing work right in the
1832 * usual "raw" case (IGNBRK set, and IGNPAR
1835 * Note: BI together with FE/PE means just BI.
1837 if (line_status & LSR_BI) {
1838 #if defined(KDB) && defined(BREAK_TO_DEBUGGER)
1839 if (com->unit == comconsole) {
1840 kdb_enter("Line break on console");
1845 || com->tp->t_iflag & IGNBRK)
1849 || com->tp->t_iflag & IGNPAR)
1852 if (com->tp->t_state & TS_CAN_BYPASS_L_RINT
1853 && (line_status & (LSR_BI | LSR_FE)
1854 || com->tp->t_iflag & INPCK))
1858 if (com->tp != NULL &&
1859 com->tp->t_hotchar != 0 && recv_data == com->tp->t_hotchar)
1860 swi_sched(sio_fast_ih, 0);
1862 if (ioptr >= com->ibufend)
1863 CE_RECORD(com, CE_INTERRUPT_BUF_OVERFLOW);
1865 if (com->do_timestamp)
1866 microtime(&com->timestamp);
1868 swi_sched(sio_slow_ih, SWI_DELAY);
1869 #if 0 /* for testing input latency vs efficiency */
1870 if (com->iptr - com->ibuf == 8)
1871 swi_sched(sio_fast_ih, 0);
1873 ioptr[0] = recv_data;
1874 ioptr[com->ierroff] = line_status;
1875 com->iptr = ++ioptr;
1876 if (ioptr == com->ihighwater
1877 && com->state & CS_RTS_IFLOW)
1878 outb(com->modem_ctl_port,
1879 com->mcr_image &= ~MCR_RTS);
1880 if (line_status & LSR_OE)
1881 CE_RECORD(com, CE_OVERRUN);
1884 if (line_status & LSR_TXRDY
1885 && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY))
1889 * "& 0x7F" is to avoid the gcc-1.40 generating a slow
1890 * jump from the top of the loop to here
1892 line_status = inb(com->line_status_port) & 0x7F;
1895 /* modem status change? (always check before doing output) */
1896 modem_status = inb(com->modem_status_port);
1897 if (modem_status != com->last_modem_status) {
1899 * Schedule high level to handle DCD changes. Note
1900 * that we don't use the delta bits anywhere. Some
1901 * UARTs mess them up, and it's easy to remember the
1902 * previous bits and calculate the delta.
1904 com->last_modem_status = modem_status;
1905 if (!(com->state & CS_CHECKMSR)) {
1906 com_events += LOTS_OF_EVENTS;
1907 com->state |= CS_CHECKMSR;
1908 swi_sched(sio_fast_ih, 0);
1911 /* handle CTS change immediately for crisp flow ctl */
1912 if (com->state & CS_CTS_OFLOW) {
1913 if (modem_status & MSR_CTS)
1914 com->state |= CS_ODEVREADY;
1916 com->state &= ~CS_ODEVREADY;
1921 /* output queued and everything ready? */
1922 if (line_status & LSR_TXRDY
1923 && com->state >= (CS_BUSY | CS_TTGO | CS_ODEVREADY)) {
1924 ioptr = com->obufq.l_head;
1925 if (com->tx_fifo_size > 1 && com->unit != siotsunit) {
1928 ocount = com->obufq.l_tail - ioptr;
1929 if (ocount > com->tx_fifo_size)
1930 ocount = com->tx_fifo_size;
1931 com->bytes_out += ocount;
1933 outb(com->data_port, *ioptr++);
1934 while (--ocount != 0);
1936 outb(com->data_port, *ioptr++);
1938 if (com->unit == siotsunit
1939 && siotso < sizeof siots / sizeof siots[0])
1940 nanouptime(&siots[siotso++]);
1942 com->obufq.l_head = ioptr;
1943 if (COM_IIR_TXRDYBUG(com->flags))
1944 int_ctl_new = int_ctl | IER_ETXRDY;
1945 if (ioptr >= com->obufq.l_tail) {
1948 qp = com->obufq.l_next;
1949 qp->l_queued = FALSE;
1952 com->obufq.l_head = qp->l_head;
1953 com->obufq.l_tail = qp->l_tail;
1954 com->obufq.l_next = qp;
1956 /* output just completed */
1957 if (COM_IIR_TXRDYBUG(com->flags))
1958 int_ctl_new = int_ctl
1960 com->state &= ~CS_BUSY;
1962 if (!(com->state & CS_ODONE)) {
1963 com_events += LOTS_OF_EVENTS;
1964 com->state |= CS_ODONE;
1965 /* handle at high level ASAP */
1966 swi_sched(sio_fast_ih, 0);
1969 if (COM_IIR_TXRDYBUG(com->flags)
1970 && int_ctl != int_ctl_new)
1971 outb(com->int_ctl_port, int_ctl_new);
1975 #ifndef COM_MULTIPORT
1976 if ((inb(com->int_id_port) & IIR_IMASK) == IIR_NOPEND)
1977 #endif /* COM_MULTIPORT */
1983 siocioctl(dev, cmd, data, flag, td)
1998 if (com == NULL || com->gone)
2002 switch (mynor & CONTROL_MASK) {
2003 case CONTROL_INIT_STATE:
2004 ct = mynor & CALLOUT_MASK ? &tp->t_init_out : &tp->t_init_in;
2006 case CONTROL_LOCK_STATE:
2007 ct = mynor & CALLOUT_MASK ? &tp->t_lock_out : &tp->t_lock_in;
2010 return (ENODEV); /* /dev/nodev */
2017 *ct = *(struct termios *)data;
2020 *(struct termios *)data = *ct;
2023 *(int *)data = TTYDISC;
2026 bzero(data, sizeof(struct winsize));
2034 sioioctl(dev, cmd, data, flag, td)
2046 #ifndef BURN_BRIDGES
2047 #if defined(COMPAT_43)
2049 struct termios term;
2055 if (com == NULL || com->gone)
2058 #ifndef BURN_BRIDGES
2059 #if defined(COMPAT_43)
2060 term = tp->t_termios;
2062 error = ttsetcompat(tp, &cmd, data, &term);
2066 data = (caddr_t)&term;
2069 if (cmd == TIOCSETA || cmd == TIOCSETAW || cmd == TIOCSETAF) {
2071 struct termios *dt = (struct termios *)data;
2072 struct termios *lt = mynor & CALLOUT_MASK
2073 ? &tp->t_lock_out : &tp->t_lock_in;
2075 dt->c_iflag = (tp->t_iflag & lt->c_iflag)
2076 | (dt->c_iflag & ~lt->c_iflag);
2077 dt->c_oflag = (tp->t_oflag & lt->c_oflag)
2078 | (dt->c_oflag & ~lt->c_oflag);
2079 dt->c_cflag = (tp->t_cflag & lt->c_cflag)
2080 | (dt->c_cflag & ~lt->c_cflag);
2081 dt->c_lflag = (tp->t_lflag & lt->c_lflag)
2082 | (dt->c_lflag & ~lt->c_lflag);
2083 for (cc = 0; cc < NCCS; ++cc)
2084 if (lt->c_cc[cc] != 0)
2085 dt->c_cc[cc] = tp->t_cc[cc];
2086 if (lt->c_ispeed != 0)
2087 dt->c_ispeed = tp->t_ispeed;
2088 if (lt->c_ospeed != 0)
2089 dt->c_ospeed = tp->t_ospeed;
2091 error = ttyioctl(dev, cmd, data, flag, td);
2093 if (error != ENOTTY)
2098 com->do_timestamp = TRUE;
2099 *(struct timeval *)data = com->timestamp;
2103 error = pps_ioctl(cmd, data, &com->pps);
2104 if (error == ENODEV)
2112 /* software interrupt handler for SWI_TTY */
2114 siopoll(void *dummy)
2118 if (com_events == 0)
2121 for (unit = 0; unit < sio_numunits; ++unit) {
2126 com = com_addr(unit);
2130 if (tp == NULL || com->gone) {
2132 * Discard any events related to never-opened or
2133 * going-away devices.
2135 mtx_lock_spin(&sio_lock);
2136 incc = com->iptr - com->ibuf;
2137 com->iptr = com->ibuf;
2138 if (com->state & CS_CHECKMSR) {
2139 incc += LOTS_OF_EVENTS;
2140 com->state &= ~CS_CHECKMSR;
2143 mtx_unlock_spin(&sio_lock);
2146 if (com->iptr != com->ibuf) {
2147 mtx_lock_spin(&sio_lock);
2149 mtx_unlock_spin(&sio_lock);
2151 if (com->state & CS_CHECKMSR) {
2152 u_char delta_modem_status;
2154 mtx_lock_spin(&sio_lock);
2155 delta_modem_status = com->last_modem_status
2156 ^ com->prev_modem_status;
2157 com->prev_modem_status = com->last_modem_status;
2158 com_events -= LOTS_OF_EVENTS;
2159 com->state &= ~CS_CHECKMSR;
2160 mtx_unlock_spin(&sio_lock);
2161 if (delta_modem_status & MSR_DCD)
2163 com->prev_modem_status & MSR_DCD);
2165 if (com->state & CS_ODONE) {
2166 mtx_lock_spin(&sio_lock);
2167 com_events -= LOTS_OF_EVENTS;
2168 com->state &= ~CS_ODONE;
2169 mtx_unlock_spin(&sio_lock);
2170 if (!(com->state & CS_BUSY)
2171 && !(com->extra_state & CSE_BUSYCHECK)) {
2172 timeout(siobusycheck, com, hz / 100);
2173 com->extra_state |= CSE_BUSYCHECK;
2177 if (com_events == 0)
2180 if (com_events >= LOTS_OF_EVENTS)
2194 sio_setreg(com, com_cfcr, com->cfcr_image |= CFCR_SBREAK);
2196 sio_setreg(com, com_cfcr, com->cfcr_image &= ~CFCR_SBREAK);
2210 u_char efr_flowbits;
2217 /* check requested parameters */
2218 if (t->c_ispeed != (t->c_ospeed != 0 ? t->c_ospeed : tp->t_ospeed))
2220 divisor = siodivisor(com->rclk, t->c_ispeed);
2224 /* parameters are OK, convert them to the com struct and the device */
2226 if (t->c_ospeed == 0)
2227 (void)commodem(tp, 0, SER_DTR); /* hang up line */
2229 (void)commodem(tp, SER_DTR, 0);
2231 switch (cflag & CSIZE) {
2245 if (cflag & PARENB) {
2247 if (!(cflag & PARODD))
2255 * Use a fifo trigger level low enough so that the input
2256 * latency from the fifo is less than about 16 msec and
2257 * the total latency is less than about 30 msec. These
2258 * latencies are reasonable for humans. Serial comms
2259 * protocols shouldn't expect anything better since modem
2260 * latencies are larger.
2262 * The fifo trigger level cannot be set at RX_HIGH for high
2263 * speed connections without further work on reducing
2264 * interrupt disablement times in other parts of the system,
2265 * without producing silo overflow errors.
2267 com->fifo_image = com->unit == siotsunit ? 0
2268 : t->c_ispeed <= 4800
2269 ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH;
2272 * The Hayes ESP card needs the fifo DMA mode bit set
2273 * in compatibility mode. If not, it will interrupt
2274 * for each character received.
2277 com->fifo_image |= FIFO_DMA_MODE;
2279 sio_setreg(com, com_fifo, com->fifo_image);
2283 * This returns with interrupts disabled so that we can complete
2284 * the speed change atomically. Keeping interrupts disabled is
2285 * especially important while com_data is hidden.
2287 (void) siosetwater(com, t->c_ispeed);
2289 sio_setreg(com, com_cfcr, cfcr | CFCR_DLAB);
2291 * Only set the divisor registers if they would change, since on
2292 * some 16550 incompatibles (UMC8669F), setting them while input
2293 * is arriving loses sync until data stops arriving.
2295 dlbl = divisor & 0xFF;
2296 if (sio_getreg(com, com_dlbl) != dlbl)
2297 sio_setreg(com, com_dlbl, dlbl);
2298 dlbh = divisor >> 8;
2299 if (sio_getreg(com, com_dlbh) != dlbh)
2300 sio_setreg(com, com_dlbh, dlbh);
2304 if (cflag & CRTS_IFLOW) {
2305 com->state |= CS_RTS_IFLOW;
2306 efr_flowbits |= EFR_AUTORTS;
2308 * If CS_RTS_IFLOW just changed from off to on, the change
2309 * needs to be propagated to MCR_RTS. This isn't urgent,
2310 * so do it later by calling comstart() instead of repeating
2311 * a lot of code from comstart() here.
2313 } else if (com->state & CS_RTS_IFLOW) {
2314 com->state &= ~CS_RTS_IFLOW;
2316 * CS_RTS_IFLOW just changed from on to off. Force MCR_RTS
2317 * on here, since comstart() won't do it later.
2319 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2323 * Set up state to handle output flow control.
2324 * XXX - worth handling MDMBUF (DCD) flow control at the lowest level?
2325 * Now has 10+ msec latency, while CTS flow has 50- usec latency.
2327 com->state |= CS_ODEVREADY;
2328 com->state &= ~CS_CTS_OFLOW;
2329 if (cflag & CCTS_OFLOW) {
2330 com->state |= CS_CTS_OFLOW;
2331 efr_flowbits |= EFR_AUTOCTS;
2332 if (!(com->last_modem_status & MSR_CTS))
2333 com->state &= ~CS_ODEVREADY;
2336 if (com->st16650a) {
2337 sio_setreg(com, com_lcr, LCR_EFR_ENABLE);
2338 sio_setreg(com, com_efr,
2339 (sio_getreg(com, com_efr)
2340 & ~(EFR_AUTOCTS | EFR_AUTORTS)) | efr_flowbits);
2342 sio_setreg(com, com_cfcr, com->cfcr_image = cfcr);
2344 /* XXX shouldn't call functions while intrs are disabled. */
2347 mtx_unlock_spin(&sio_lock);
2350 if (com->ibufold != NULL) {
2351 free(com->ibufold, M_DEVBUF);
2352 com->ibufold = NULL;
2358 * This function must be called with the sio_lock mutex released and will
2359 * return with it obtained.
2362 siosetwater(com, speed)
2372 * Make the buffer size large enough to handle a softtty interrupt
2373 * latency of about 2 ticks without loss of throughput or data
2374 * (about 3 ticks if input flow control is not used or not honoured,
2375 * but a bit less for CS5-CS7 modes).
2377 cp4ticks = speed / 10 / hz * 4;
2378 for (ibufsize = 128; ibufsize < cp4ticks;)
2380 if (ibufsize == com->ibufsize) {
2381 mtx_lock_spin(&sio_lock);
2386 * Allocate input buffer. The extra factor of 2 in the size is
2387 * to allow for an error byte for each input byte.
2389 ibuf = malloc(2 * ibufsize, M_DEVBUF, M_NOWAIT);
2391 mtx_lock_spin(&sio_lock);
2395 /* Initialize non-critical variables. */
2396 com->ibufold = com->ibuf;
2397 com->ibufsize = ibufsize;
2400 tp->t_ififosize = 2 * ibufsize;
2401 tp->t_ispeedwat = (speed_t)-1;
2402 tp->t_ospeedwat = (speed_t)-1;
2406 * Read current input buffer, if any. Continue with interrupts
2409 mtx_lock_spin(&sio_lock);
2410 if (com->iptr != com->ibuf)
2414 * Initialize critical variables, including input buffer watermarks.
2415 * The external device is asked to stop sending when the buffer
2416 * exactly reaches high water, or when the high level requests it.
2417 * The high level is notified immediately (rather than at a later
2418 * clock tick) when this watermark is reached.
2419 * The buffer size is chosen so the watermark should almost never
2421 * The low watermark is invisibly 0 since the buffer is always
2422 * emptied all at once.
2424 com->iptr = com->ibuf = ibuf;
2425 com->ibufend = ibuf + ibufsize;
2426 com->ierroff = ibufsize;
2427 com->ihighwater = ibuf + 3 * ibufsize / 4;
2442 mtx_lock_spin(&sio_lock);
2443 if (tp->t_state & TS_TTSTOP)
2444 com->state &= ~CS_TTGO;
2446 com->state |= CS_TTGO;
2447 if (tp->t_state & TS_TBLOCK) {
2448 if (com->mcr_image & MCR_RTS && com->state & CS_RTS_IFLOW)
2449 outb(com->modem_ctl_port, com->mcr_image &= ~MCR_RTS);
2451 if (!(com->mcr_image & MCR_RTS) && com->iptr < com->ihighwater
2452 && com->state & CS_RTS_IFLOW)
2453 outb(com->modem_ctl_port, com->mcr_image |= MCR_RTS);
2455 mtx_unlock_spin(&sio_lock);
2456 if (tp->t_state & (TS_TIMEOUT | TS_TTSTOP)) {
2461 if (tp->t_outq.c_cc != 0) {
2465 if (!com->obufs[0].l_queued) {
2466 com->obufs[0].l_tail
2467 = com->obuf1 + q_to_b(&tp->t_outq, com->obuf1,
2469 com->obufs[0].l_next = NULL;
2470 com->obufs[0].l_queued = TRUE;
2471 mtx_lock_spin(&sio_lock);
2472 if (com->state & CS_BUSY) {
2473 qp = com->obufq.l_next;
2474 while ((next = qp->l_next) != NULL)
2476 qp->l_next = &com->obufs[0];
2478 com->obufq.l_head = com->obufs[0].l_head;
2479 com->obufq.l_tail = com->obufs[0].l_tail;
2480 com->obufq.l_next = &com->obufs[0];
2481 com->state |= CS_BUSY;
2483 mtx_unlock_spin(&sio_lock);
2485 if (tp->t_outq.c_cc != 0 && !com->obufs[1].l_queued) {
2486 com->obufs[1].l_tail
2487 = com->obuf2 + q_to_b(&tp->t_outq, com->obuf2,
2489 com->obufs[1].l_next = NULL;
2490 com->obufs[1].l_queued = TRUE;
2491 mtx_lock_spin(&sio_lock);
2492 if (com->state & CS_BUSY) {
2493 qp = com->obufq.l_next;
2494 while ((next = qp->l_next) != NULL)
2496 qp->l_next = &com->obufs[1];
2498 com->obufq.l_head = com->obufs[1].l_head;
2499 com->obufq.l_tail = com->obufs[1].l_tail;
2500 com->obufq.l_next = &com->obufs[1];
2501 com->state |= CS_BUSY;
2503 mtx_unlock_spin(&sio_lock);
2505 tp->t_state |= TS_BUSY;
2507 mtx_lock_spin(&sio_lock);
2508 if (com->state >= (CS_BUSY | CS_TTGO))
2509 siointr1(com); /* fake interrupt to start output */
2510 mtx_unlock_spin(&sio_lock);
2523 if (com == NULL || com->gone)
2525 mtx_lock_spin(&sio_lock);
2529 /* XXX avoid h/w bug. */
2532 sio_setreg(com, com_fifo,
2533 FIFO_XMT_RST | com->fifo_image);
2534 com->obufs[0].l_queued = FALSE;
2535 com->obufs[1].l_queued = FALSE;
2536 if (com->state & CS_ODONE)
2537 com_events -= LOTS_OF_EVENTS;
2538 com->state &= ~(CS_ODONE | CS_BUSY);
2539 com->tp->t_state &= ~TS_BUSY;
2544 /* XXX avoid h/w bug. */
2547 sio_setreg(com, com_fifo,
2548 FIFO_RCV_RST | com->fifo_image);
2549 com_events -= (com->iptr - com->ibuf);
2550 com->iptr = com->ibuf;
2552 mtx_unlock_spin(&sio_lock);
2557 commodem(tp, sigon, sigoff)
2562 int bitand, bitor, msr;
2567 if (sigon != 0 || sigoff != 0) {
2569 if (sigoff & SER_DTR)
2571 if (sigoff & SER_RTS)
2573 if (sigon & SER_DTR)
2575 if (sigon & SER_RTS)
2578 mtx_lock_spin(&sio_lock);
2579 com->mcr_image &= bitand;
2580 com->mcr_image |= bitor;
2581 outb(com->modem_ctl_port, com->mcr_image);
2582 mtx_unlock_spin(&sio_lock);
2586 if (com->mcr_image & MCR_DTR)
2588 if (com->mcr_image & MCR_RTS)
2590 msr = com->prev_modem_status;
2599 if (msr & (MSR_RI | MSR_TERI))
2613 * Set our timeout period to 1 second if no polled devices are open.
2614 * Otherwise set it to max(1/200, 1/hz).
2615 * Enable timeouts iff some device is open.
2617 untimeout(comwakeup, (void *)NULL, sio_timeout_handle);
2620 for (unit = 0; unit < sio_numunits; ++unit) {
2621 com = com_addr(unit);
2622 if (com != NULL && com->tp != NULL
2623 && com->tp->t_state & TS_ISOPEN && !com->gone) {
2625 if (com->poll || com->poll_output) {
2626 sio_timeout = hz > 200 ? hz / 200 : 1;
2632 sio_timeouts_until_log = hz / sio_timeout;
2633 sio_timeout_handle = timeout(comwakeup, (void *)NULL,
2636 /* Flush error messages, if any. */
2637 sio_timeouts_until_log = 1;
2638 comwakeup((void *)NULL);
2639 untimeout(comwakeup, (void *)NULL, sio_timeout_handle);
2650 sio_timeout_handle = timeout(comwakeup, (void *)NULL, sio_timeout);
2653 * Recover from lost output interrupts.
2654 * Poll any lines that don't use interrupts.
2656 for (unit = 0; unit < sio_numunits; ++unit) {
2657 com = com_addr(unit);
2658 if (com != NULL && !com->gone
2659 && (com->state >= (CS_BUSY | CS_TTGO) || com->poll)) {
2660 mtx_lock_spin(&sio_lock);
2662 mtx_unlock_spin(&sio_lock);
2667 * Check for and log errors, but not too often.
2669 if (--sio_timeouts_until_log > 0)
2671 sio_timeouts_until_log = hz / sio_timeout;
2672 for (unit = 0; unit < sio_numunits; ++unit) {
2675 com = com_addr(unit);
2680 for (errnum = 0; errnum < CE_NTYPES; ++errnum) {
2684 mtx_lock_spin(&sio_lock);
2685 delta = com->delta_error_counts[errnum];
2686 com->delta_error_counts[errnum] = 0;
2687 mtx_unlock_spin(&sio_lock);
2690 total = com->error_counts[errnum] += delta;
2691 log(LOG_ERR, "sio%d: %u more %s%s (total %lu)\n",
2692 unit, delta, error_desc[errnum],
2693 delta == 1 ? "" : "s", total);
2699 * Following are all routines needed for SIO to act as console
2710 * This is a function in order to not replicate "ttyd%d" more
2711 * places than absolutely necessary.
2714 siocnset(struct consdev *cd, int unit)
2718 sprintf(cd->cn_name, "ttyd%d", unit);
2721 static speed_t siocngetspeed(Port_t, u_long rclk);
2722 static void siocnclose(struct siocnstate *sp, Port_t iobase);
2723 static void siocnopen(struct siocnstate *sp, Port_t iobase, int speed);
2724 static void siocntxwait(Port_t iobase);
2726 static cn_probe_t siocnprobe;
2727 static cn_init_t siocninit;
2728 static cn_term_t siocnterm;
2729 static cn_checkc_t siocncheckc;
2730 static cn_getc_t siocngetc;
2731 static cn_putc_t siocnputc;
2733 CONS_DRIVER(sio, siocnprobe, siocninit, siocnterm, siocngetc, siocncheckc,
2743 * Wait for any pending transmission to finish. Required to avoid
2744 * the UART lockup bug when the speed is changed, and for normal
2748 while ((inb(iobase + com_lsr) & (LSR_TSRE | LSR_TXRDY))
2749 != (LSR_TSRE | LSR_TXRDY) && --timo != 0)
2754 * Read the serial port specified and try to figure out what speed
2755 * it's currently running at. We're assuming the serial port has
2756 * been initialized and is basicly idle. This routine is only intended
2757 * to be run at system startup.
2759 * If the value read from the serial port doesn't make sense, return 0.
2763 siocngetspeed(iobase, rclk)
2772 cfcr = inb(iobase + com_cfcr);
2773 outb(iobase + com_cfcr, CFCR_DLAB | cfcr);
2775 dlbl = inb(iobase + com_dlbl);
2776 dlbh = inb(iobase + com_dlbh);
2778 outb(iobase + com_cfcr, cfcr);
2780 divisor = dlbh << 8 | dlbl;
2782 /* XXX there should be more sanity checking. */
2785 return (rclk / (16UL * divisor));
2789 siocnopen(sp, iobase, speed)
2790 struct siocnstate *sp;
2799 * Save all the device control registers except the fifo register
2800 * and set our default ones (cs8 -parenb speed=comdefaultrate).
2801 * We can't save the fifo register since it is read-only.
2803 sp->ier = inb(iobase + com_ier);
2804 outb(iobase + com_ier, 0); /* spltty() doesn't stop siointr() */
2805 siocntxwait(iobase);
2806 sp->cfcr = inb(iobase + com_cfcr);
2807 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS);
2808 sp->dlbl = inb(iobase + com_dlbl);
2809 sp->dlbh = inb(iobase + com_dlbh);
2811 * Only set the divisor registers if they would change, since on
2812 * some 16550 incompatibles (Startech), setting them clears the
2813 * data input register. This also reduces the effects of the
2816 divisor = siodivisor(comdefaultrclk, speed);
2817 dlbl = divisor & 0xFF;
2818 if (sp->dlbl != dlbl)
2819 outb(iobase + com_dlbl, dlbl);
2820 dlbh = divisor >> 8;
2821 if (sp->dlbh != dlbh)
2822 outb(iobase + com_dlbh, dlbh);
2823 outb(iobase + com_cfcr, CFCR_8BITS);
2824 sp->mcr = inb(iobase + com_mcr);
2826 * We don't want interrupts, but must be careful not to "disable"
2827 * them by clearing the MCR_IENABLE bit, since that might cause
2828 * an interrupt by floating the IRQ line.
2830 outb(iobase + com_mcr, (sp->mcr & MCR_IENABLE) | MCR_DTR | MCR_RTS);
2834 siocnclose(sp, iobase)
2835 struct siocnstate *sp;
2839 * Restore the device control registers.
2841 siocntxwait(iobase);
2842 outb(iobase + com_cfcr, CFCR_DLAB | CFCR_8BITS);
2843 if (sp->dlbl != inb(iobase + com_dlbl))
2844 outb(iobase + com_dlbl, sp->dlbl);
2845 if (sp->dlbh != inb(iobase + com_dlbh))
2846 outb(iobase + com_dlbh, sp->dlbh);
2847 outb(iobase + com_cfcr, sp->cfcr);
2849 * XXX damp oscillations of MCR_DTR and MCR_RTS by not restoring them.
2851 outb(iobase + com_mcr, sp->mcr | MCR_DTR | MCR_RTS);
2852 outb(iobase + com_ier, sp->ier);
2863 struct siocnstate sp;
2866 * Find our first enabled console, if any. If it is a high-level
2867 * console device, then initialize it and return successfully.
2868 * If it is a low-level console device, then initialize it and
2869 * return unsuccessfully. It must be initialized in both cases
2870 * for early use by console drivers and debuggers. Initializing
2871 * the hardware is not necessary in all cases, since the i/o
2872 * routines initialize it on the fly, but it is necessary if
2873 * input might arrive while the hardware is switched back to an
2874 * uninitialized state. We can't handle multiple console devices
2875 * yet because our low-level routines don't take a device arg.
2876 * We trust the user to set the console flags properly so that we
2877 * don't need to probe.
2879 cp->cn_pri = CN_DEAD;
2881 for (unit = 0; unit < 16; unit++) { /* XXX need to know how many */
2884 if (resource_disabled("sio", unit))
2886 if (resource_int_value("sio", unit, "flags", &flags))
2888 if (COM_CONSOLE(flags) || COM_DEBUGGER(flags)) {
2892 if (resource_int_value("sio", unit, "port", &port))
2896 if (boothowto & RB_SERIAL) {
2898 siocngetspeed(iobase, comdefaultrclk);
2900 comdefaultrate = boot_speed;
2904 * Initialize the divisor latch. We can't rely on
2905 * siocnopen() to do this the first time, since it
2906 * avoids writing to the latch if the latch appears
2907 * to have the correct value. Also, if we didn't
2908 * just read the speed from the hardware, then we
2909 * need to set the speed in hardware so that
2910 * switching it later is null.
2912 cfcr = inb(iobase + com_cfcr);
2913 outb(iobase + com_cfcr, CFCR_DLAB | cfcr);
2914 divisor = siodivisor(comdefaultrclk, comdefaultrate);
2915 outb(iobase + com_dlbl, divisor & 0xff);
2916 outb(iobase + com_dlbh, divisor >> 8);
2917 outb(iobase + com_cfcr, cfcr);
2919 siocnopen(&sp, iobase, comdefaultrate);
2922 if (COM_CONSOLE(flags) && !COM_LLCONSOLE(flags)) {
2924 cp->cn_pri = COM_FORCECONSOLE(flags)
2925 || boothowto & RB_SERIAL
2926 ? CN_REMOTE : CN_NORMAL;
2927 siocniobase = iobase;
2931 if (COM_DEBUGGER(flags))
2932 siogdbiobase = iobase;
2942 comconsole = cp->cn_unit;
2953 siocncheckc(struct consdev *cd)
2958 struct siocnstate sp;
2961 if (cd != NULL && cd->cn_unit == siocnunit) {
2962 iobase = siocniobase;
2963 speed = comdefaultrate;
2966 iobase = siogdbiobase;
2967 speed = gdbdefaultrate;
2973 siocnopen(&sp, iobase, speed);
2974 if (inb(iobase + com_lsr) & LSR_RXRDY)
2975 c = inb(iobase + com_data);
2978 siocnclose(&sp, iobase);
2984 siocngetc(struct consdev *cd)
2989 struct siocnstate sp;
2992 if (cd != NULL && cd->cn_unit == siocnunit) {
2993 iobase = siocniobase;
2994 speed = comdefaultrate;
2997 iobase = siogdbiobase;
2998 speed = gdbdefaultrate;
3004 siocnopen(&sp, iobase, speed);
3005 while (!(inb(iobase + com_lsr) & LSR_RXRDY))
3007 c = inb(iobase + com_data);
3008 siocnclose(&sp, iobase);
3014 siocnputc(struct consdev *cd, int c)
3018 struct siocnstate sp;
3022 if (cd != NULL && cd->cn_unit == siocnunit) {
3023 iobase = siocniobase;
3024 speed = comdefaultrate;
3027 iobase = siogdbiobase;
3028 speed = gdbdefaultrate;
3035 if (sio_inited == 2 && !mtx_owned(&sio_lock)) {
3036 mtx_lock_spin(&sio_lock);
3039 siocnopen(&sp, iobase, speed);
3040 siocntxwait(iobase);
3041 outb(iobase + com_data, c);
3042 siocnclose(&sp, iobase);
3044 mtx_unlock_spin(&sio_lock);
3049 * Remote gdb(1) support.
3054 #include <gdb/gdb.h>
3056 static gdb_probe_f siogdbprobe;
3057 static gdb_init_f siogdbinit;
3058 static gdb_term_f siogdbterm;
3059 static gdb_getc_f siogdbgetc;
3060 static gdb_checkc_f siogdbcheckc;
3061 static gdb_putc_f siogdbputc;
3063 GDB_DBGPORT(sio, siogdbprobe, siogdbinit, siogdbterm, siogdbcheckc,
3064 siogdbgetc, siogdbputc);
3069 return ((siogdbiobase != 0) ? 0 : -1);
3091 return (siocncheckc(NULL));
3097 return (siocngetc(NULL));