sys/dev/smartpqi/smartpqi_main.c

   1 /*-
   2  * Copyright 2016-2021 Microchip Technology, Inc. and/or its subsidiaries.
   3  *
   4  * Redistribution and use in source and binary forms, with or without
   5  * modification, are permitted provided that the following conditions
   6  * are met:
   7  * 1. Redistributions of source code must retain the above copyright
   8  *    notice, this list of conditions and the following disclaimer.
   9  * 2. Redistributions in binary form must reproduce the above copyright
  10  *    notice, this list of conditions and the following disclaimer in the
  11  *    documentation and/or other materials provided with the distribution.
  12  *
  13  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  14  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  15  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  16  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  17  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  18  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  19  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  20  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  21  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  22  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  23  * SUCH DAMAGE.
  24  */
  25
  26 /* $FreeBSD$ */
  27
  28 /*
  29  * Driver for the Microsemi Smart storage controllers
  30  */
  31
  32 #include "smartpqi_includes.h"
  33 #include "smartpqi_prototypes.h"
  34
  35 CTASSERT(BSD_SUCCESS == PQI_STATUS_SUCCESS);
  36
  37 /*
  38  * Supported devices
  39  */
  40 struct pqi_ident
  41 {
  42         u_int16_t               vendor;
  43         u_int16_t               device;
  44         u_int16_t               subvendor;
  45         u_int16_t               subdevice;
  46         int                     hwif;
  47         char                    *desc;
  48 } pqi_identifiers[] = {
  49         /* (MSCC PM8205 8x12G based) */
  50         {0x9005, 0x028f, 0x103c, 0x600,  PQI_HWIF_SRCV, "P408i-p SR Gen10"},
  51         {0x9005, 0x028f, 0x103c, 0x601,  PQI_HWIF_SRCV, "P408e-p SR Gen10"},
  52         {0x9005, 0x028f, 0x103c, 0x602,  PQI_HWIF_SRCV, "P408i-a SR Gen10"},
  53         {0x9005, 0x028f, 0x103c, 0x603,  PQI_HWIF_SRCV, "P408i-c SR Gen10"},
  54         {0x9005, 0x028f, 0x1028, 0x1FE0, PQI_HWIF_SRCV, "SmartRAID 3162-8i/eDell"},
  55         {0x9005, 0x028f, 0x9005, 0x608,  PQI_HWIF_SRCV, "SmartRAID 3162-8i/e"},
  56         {0x9005, 0x028f, 0x103c, 0x609,  PQI_HWIF_SRCV, "P408i-sb SR G10"},
  57
  58         /* (MSCC PM8225 8x12G based) */
  59         {0x9005, 0x028f, 0x103c, 0x650,  PQI_HWIF_SRCV, "E208i-p SR Gen10"},
  60         {0x9005, 0x028f, 0x103c, 0x651,  PQI_HWIF_SRCV, "E208e-p SR Gen10"},
  61         {0x9005, 0x028f, 0x103c, 0x652,  PQI_HWIF_SRCV, "E208i-c SR Gen10"},
  62         {0x9005, 0x028f, 0x103c, 0x654,  PQI_HWIF_SRCV, "E208i-a SR Gen10"},
  63         {0x9005, 0x028f, 0x103c, 0x655,  PQI_HWIF_SRCV, "P408e-m SR Gen10"},
  64
  65         /* (MSCC PM8221 8x12G based) */
  66         {0x9005, 0x028f, 0x103c, 0x700,  PQI_HWIF_SRCV, "P204i-c SR Gen10"},
  67         {0x9005, 0x028f, 0x103c, 0x701,  PQI_HWIF_SRCV, "P204i-b SR Gen10"},
  68         {0x9005, 0x028f, 0x193d, 0x1104, PQI_HWIF_SRCV, "UN RAID P2404-Mf-4i-2GB"},
  69         {0x9005, 0x028f, 0x193d, 0x1106, PQI_HWIF_SRCV, "UN RAID P2404-Mf-4i-1GB"},
  70         {0x9005, 0x028f, 0x193d, 0x1108, PQI_HWIF_SRCV, "UN RAID P4408-Ma-8i-2GB"},
  71
  72
  73         /* (MSCC PM8204 8x12G based) */
  74         {0x9005, 0x028f, 0x9005, 0x800,  PQI_HWIF_SRCV, "SmartRAID 3154-8i"},
  75         {0x9005, 0x028f, 0x9005, 0x801,  PQI_HWIF_SRCV, "SmartRAID 3152-8i"},
  76         {0x9005, 0x028f, 0x9005, 0x802,  PQI_HWIF_SRCV, "SmartRAID 3151-4i"},
  77         {0x9005, 0x028f, 0x9005, 0x803,  PQI_HWIF_SRCV, "SmartRAID 3101-4i"},
  78         {0x9005, 0x028f, 0x9005, 0x804,  PQI_HWIF_SRCV, "SmartRAID 3154-8e"},
  79         {0x9005, 0x028f, 0x9005, 0x805,  PQI_HWIF_SRCV, "SmartRAID 3102-8i"},
  80         {0x9005, 0x028f, 0x9005, 0x806,  PQI_HWIF_SRCV, "SmartRAID 3100"},
  81         {0x9005, 0x028f, 0x9005, 0x807,  PQI_HWIF_SRCV, "SmartRAID 3162-8i"},
  82         {0x9005, 0x028f, 0x152d, 0x8a22, PQI_HWIF_SRCV, "QS-8204-8i"},
  83         {0x9005, 0x028f, 0x193d, 0xf460, PQI_HWIF_SRCV, "UN RAID P460-M4"},
  84         {0x9005, 0x028f, 0x193d, 0xf461, PQI_HWIF_SRCV, "UN RAID P460-B4"},
  85         {0x9005, 0x028f, 0x1bd4, 0x004b, PQI_HWIF_SRCV, "INSPUR PM8204-2GB"},
  86         {0x9005, 0x028f, 0x1bd4, 0x004c, PQI_HWIF_SRCV, "INSPUR PM8204-4GB"},
  87         {0x9005, 0x028f, 0x193d, 0x1105, PQI_HWIF_SRCV, "UN RAID P4408-Mf-8i-2GB"},
  88         {0x9005, 0x028f, 0x193d, 0x1107, PQI_HWIF_SRCV, "UN RAID P4408-Mf-8i-4GB"},
  89         {0x9005, 0x028f, 0x1d8d, 0x800,  PQI_HWIF_SRCV, "Fiberhome SmartRAID AIS-8204-8i"},
  90         {0x9005, 0x028f, 0x9005, 0x0808, PQI_HWIF_SRCV, "SmartRAID 3101E-4i"},
  91         {0x9005, 0x028f, 0x9005, 0x0809, PQI_HWIF_SRCV, "SmartRAID 3102E-8i"},
  92         {0x9005, 0x028f, 0x9005, 0x080a, PQI_HWIF_SRCV, "SmartRAID 3152-8i/N"},
  93
  94         /* (MSCC PM8222 8x12G based) */
  95         {0x9005, 0x028f, 0x9005, 0x900,  PQI_HWIF_SRCV, "SmartHBA 2100-8i"},
  96         {0x9005, 0x028f, 0x9005, 0x901,  PQI_HWIF_SRCV, "SmartHBA 2100-4i"},
  97         {0x9005, 0x028f, 0x9005, 0x902,  PQI_HWIF_SRCV, "HBA 1100-8i"},
  98         {0x9005, 0x028f, 0x9005, 0x903,  PQI_HWIF_SRCV, "HBA 1100-4i"},
  99         {0x9005, 0x028f, 0x9005, 0x904,  PQI_HWIF_SRCV, "SmartHBA 2100-8e"},
 100         {0x9005, 0x028f, 0x9005, 0x905,  PQI_HWIF_SRCV, "HBA 1100-8e"},
 101         {0x9005, 0x028f, 0x9005, 0x906,  PQI_HWIF_SRCV, "SmartHBA 2100-4i4e"},
 102         {0x9005, 0x028f, 0x9005, 0x907,  PQI_HWIF_SRCV, "HBA 1100"},
 103         {0x9005, 0x028f, 0x9005, 0x908,  PQI_HWIF_SRCV, "SmartHBA 2100"},
 104         {0x9005, 0x028f, 0x9005, 0x90a,  PQI_HWIF_SRCV, "SmartHBA 2100A-8i"},
 105         {0x9005, 0x028f, 0x193d, 0x8460, PQI_HWIF_SRCV, "UN HBA H460-M1"},
 106         {0x9005, 0x028f, 0x193d, 0x8461, PQI_HWIF_SRCV, "UN HBA H460-B1"},
 107         {0x9005, 0x028f, 0x193d, 0xc460, PQI_HWIF_SRCV, "UN RAID P460-M2"},
 108         {0x9005, 0x028f, 0x193d, 0xc461, PQI_HWIF_SRCV, "UN RAID P460-B2"},
 109         {0x9005, 0x028f, 0x1bd4, 0x004a, PQI_HWIF_SRCV, "INSPUR PM8222-SHBA"},
 110         {0x9005, 0x028f, 0x13fe, 0x8312, PQI_HWIF_SRCV, "MIC-8312BridgeB"},
 111         {0x9005, 0x028f, 0x1bd4, 0x004f, PQI_HWIF_SRCV, "INSPUR PM8222-HBA"},
 112         {0x9005, 0x028f, 0x1d8d, 0x908,  PQI_HWIF_SRCV, "Fiberhome SmartHBA AIS-8222-8i"},
 113
 114         /* (SRCx MSCC FVB 24x12G based) */
 115         {0x9005, 0x028f, 0x103c, 0x1001, PQI_HWIF_SRCV, "MSCC FVB"},
 116
 117         /* (MSCC PM8241 24x12G based) */
 118
 119         /* (MSCC PM8242 24x12G based) */
 120         {0x9005, 0x028f, 0x152d, 0x8a37, PQI_HWIF_SRCV, "QS-8242-24i"},
 121         {0x9005, 0x028f, 0x9005, 0x1300, PQI_HWIF_SRCV, "HBA 1100-8i8e"},
 122         {0x9005, 0x028f, 0x9005, 0x1301, PQI_HWIF_SRCV, "HBA 1100-24i"},
 123         {0x9005, 0x028f, 0x9005, 0x1302, PQI_HWIF_SRCV, "SmartHBA 2100-8i8e"},
 124         {0x9005, 0x028f, 0x9005, 0x1303, PQI_HWIF_SRCV, "SmartHBA 2100-24i"},
 125         {0x9005, 0x028f, 0x105b, 0x1321, PQI_HWIF_SRCV, "8242-24i"},
 126         {0x9005, 0x028f, 0x1bd4, 0x0045, PQI_HWIF_SRCV, "INSPUR SMART-HBA 8242-24i"},
 127
 128         /* (MSCC PM8236 16x12G based) */
 129         {0x9005, 0x028f, 0x152d, 0x8a24, PQI_HWIF_SRCV, "QS-8236-16i"},
 130         {0x9005, 0x028f, 0x9005, 0x1380, PQI_HWIF_SRCV, "SmartRAID 3154-16i"},
 131         {0x9005, 0x028f, 0x1bd4, 0x0046, PQI_HWIF_SRCV, "INSPUR RAID 8236-16i"},
 132         {0x9005, 0x028f, 0x1d8d, 0x806,  PQI_HWIF_SRCV, "Fiberhome SmartRAID AIS-8236-16i"},
 133
 134         /* (MSCC PM8237 24x12G based) */
 135         {0x9005, 0x028f, 0x103c, 0x1100, PQI_HWIF_SRCV, "P816i-a SR Gen10"},
 136         {0x9005, 0x028f, 0x103c, 0x1101, PQI_HWIF_SRCV, "P416ie-m SR G10"},
 137
 138         /* (MSCC PM8238 16x12G based) */
 139         {0x9005, 0x028f, 0x152d, 0x8a23, PQI_HWIF_SRCV, "QS-8238-16i"},
 140         {0x9005, 0x028f, 0x9005, 0x1280, PQI_HWIF_SRCV, "HBA 1100-16i"},
 141         {0x9005, 0x028f, 0x9005, 0x1281, PQI_HWIF_SRCV, "HBA 1100-16e"},
 142         {0x9005, 0x028f, 0x105b, 0x1211, PQI_HWIF_SRCV, "8238-16i"},
 143         {0x9005, 0x028f, 0x1bd4, 0x0048, PQI_HWIF_SRCV, "INSPUR SMART-HBA 8238-16i"},
 144         {0x9005, 0x028f, 0x9005, 0x1282, PQI_HWIF_SRCV, "SmartHBA 2100-16i"},
 145         {0x9005, 0x028f, 0x1d8d, 0x916,  PQI_HWIF_SRCV, "Fiberhome SmartHBA AIS-8238-16i"},
 146         {0x9005, 0x028f, 0x1458, 0x1000, PQI_HWIF_SRCV, "GIGABYTE SmartHBA CLN1832"},
 147
 148         /* (MSCC PM8240 24x12G based) */
 149         {0x9005, 0x028f, 0x152d, 0x8a36, PQI_HWIF_SRCV, "QS-8240-24i"},
 150         {0x9005, 0x028f, 0x9005, 0x1200, PQI_HWIF_SRCV, "SmartRAID 3154-24i"},
 151         {0x9005, 0x028f, 0x9005, 0x1201, PQI_HWIF_SRCV, "SmartRAID 3154-8i16e"},
 152         {0x9005, 0x028f, 0x9005, 0x1202, PQI_HWIF_SRCV, "SmartRAID 3154-8i8e"},
 153         {0x9005, 0x028f, 0x1bd4, 0x0047, PQI_HWIF_SRCV, "INSPUR RAID 8240-24i"},
 154
 155         /* Huawei ID's */
 156         {0x9005, 0x028f, 0x19e5, 0xd227, PQI_HWIF_SRCV, "SR465C-M 4G"},
 157         {0x9005, 0x028f, 0x19e5, 0xd22a, PQI_HWIF_SRCV, "SR765-M"},
 158         {0x9005, 0x028f, 0x19e5, 0xd228, PQI_HWIF_SRCV, "SR455C-M 2G"},
 159         {0x9005, 0x028f, 0x19e5, 0xd22c, PQI_HWIF_SRCV, "SR455C-M 4G"},
 160         {0x9005, 0x028f, 0x19e5, 0xd229, PQI_HWIF_SRCV, "SR155-M"},
 161         {0x9005, 0x028f, 0x19e5, 0xd22b, PQI_HWIF_SRCV, "SR455C-ME 4G"},
 162
 163         {0, 0, 0, 0, 0, 0}
 164 };
 165
 166 struct pqi_ident
 167 pqi_family_identifiers[] = {
 168         {0x9005, 0x028f, 0, 0, PQI_HWIF_SRCV, "Smart Array Storage Controller"},
 169         {0, 0, 0, 0, 0, 0}
 170 };
 171
 172 /*
 173  * Function to identify the installed adapter.
 174  */
 175 static struct
 176 pqi_ident *pqi_find_ident(device_t dev)
 177 {
 178         struct pqi_ident *m;
 179         u_int16_t vendid, devid, sub_vendid, sub_devid;
 180
 181         vendid = pci_get_vendor(dev);
 182         devid = pci_get_device(dev);
 183         sub_vendid = pci_get_subvendor(dev);
 184         sub_devid = pci_get_subdevice(dev);
 185
 186         for (m = pqi_identifiers; m->vendor != 0; m++) {
 187                 if ((m->vendor == vendid) && (m->device == devid) &&
 188                         (m->subvendor == sub_vendid) &&
 189                         (m->subdevice == sub_devid)) {
 190                         return (m);
 191                 }
 192         }
 193
 194         for (m = pqi_family_identifiers; m->vendor != 0; m++) {
 195                 if ((m->vendor == vendid) && (m->device == devid)) {
 196                         return (m);
 197                 }
 198         }
 199
 200         return (NULL);
 201 }
 202
 203 /*
 204  * Determine whether this is one of our supported adapters.
 205  */
 206 static int
 207 smartpqi_probe(device_t dev)
 208 {
 209         struct pqi_ident *id;
 210
 211         if ((id = pqi_find_ident(dev)) != NULL) {
 212                 device_set_desc(dev, id->desc);
 213                 return(BUS_PROBE_VENDOR);
 214         }
 215
 216         return(ENXIO);
 217 }
 218
 219 /*
 220  * Store Bus/Device/Function in softs
 221  */
 222 void
 223 pqisrc_save_controller_info(struct pqisrc_softstate *softs)
 224 {
 225         device_t dev = softs->os_specific.pqi_dev;
 226
 227         softs->bus_id = (uint32_t)pci_get_bus(dev);
 228         softs->device_id = (uint32_t)pci_get_device(dev);
 229         softs->func_id = (uint32_t)pci_get_function(dev);
 230 }
 231
 232
 233 /*
 234  * Allocate resources for our device, set up the bus interface.
 235  * Initialize the PQI related functionality, scan devices, register sim to
 236  * upper layer, create management interface device node etc.
 237  */
 238 static int
 239 smartpqi_attach(device_t dev)
 240 {
 241         struct pqisrc_softstate *softs = NULL;
 242         struct pqi_ident *id = NULL;
 243         int error = BSD_SUCCESS;
 244         u_int32_t command = 0, i = 0;
 245         int card_index = device_get_unit(dev);
 246         rcb_t *rcbp = NULL;
 247
 248         /*
 249          * Initialise softc.
 250          */
 251         softs = device_get_softc(dev);
 252
 253         if (!softs) {
 254                 printf("Could not get softc\n");
 255                 error = EINVAL;
 256                 goto out;
 257         }
 258         memset(softs, 0, sizeof(*softs));
 259         softs->os_specific.pqi_dev = dev;
 260
 261         DBG_FUNC("IN\n");
 262
 263         /* assume failure is 'not configured' */
 264         error = ENXIO;
 265
 266         /*
 267          * Verify that the adapter is correctly set up in PCI space.
 268          */
 269         pci_enable_busmaster(softs->os_specific.pqi_dev);
 270         command = pci_read_config(softs->os_specific.pqi_dev, PCIR_COMMAND, 2);
 271         if ((command & PCIM_CMD_MEMEN) == 0) {
 272                 DBG_ERR("memory window not available command = %d\n", command);
 273                 error = ENXIO;
 274                 goto out;
 275         }
 276
 277         /*
 278          * Detect the hardware interface version, set up the bus interface
 279          * indirection.
 280          */
 281         id = pqi_find_ident(dev);
 282         if (!id) {
 283                 DBG_ERR("NULL return value from pqi_find_ident\n");
 284                 goto out;
 285         }
 286
 287         softs->os_specific.pqi_hwif = id->hwif;
 288
 289         switch(softs->os_specific.pqi_hwif) {
 290                 case PQI_HWIF_SRCV:
 291                         DBG_INFO("set hardware up for PMC SRCv for %p\n", softs);
 292                         break;
 293                 default:
 294                         softs->os_specific.pqi_hwif = PQI_HWIF_UNKNOWN;
 295                         DBG_ERR("unknown hardware type\n");
 296                         error = ENXIO;
 297                         goto out;
 298         }
 299
 300         pqisrc_save_controller_info(softs);
 301
 302         /*
 303          * Allocate the PCI register window.
 304          */
 305         softs->os_specific.pqi_regs_rid0 = PCIR_BAR(0);
 306         if ((softs->os_specific.pqi_regs_res0 =
 307                 bus_alloc_resource_any(softs->os_specific.pqi_dev, SYS_RES_MEMORY,
 308                 &softs->os_specific.pqi_regs_rid0, RF_ACTIVE)) == NULL) {
 309                 DBG_ERR("couldn't allocate register window 0\n");
 310                 /* assume failure is 'out of memory' */
 311                 error = ENOMEM;
 312                 goto out;
 313         }
 314
 315         bus_get_resource_start(softs->os_specific.pqi_dev, SYS_RES_MEMORY,
 316                 softs->os_specific.pqi_regs_rid0);
 317
 318         softs->pci_mem_handle.pqi_btag = rman_get_bustag(softs->os_specific.pqi_regs_res0);
 319         softs->pci_mem_handle.pqi_bhandle = rman_get_bushandle(softs->os_specific.pqi_regs_res0);
 320         /* softs->pci_mem_base_vaddr = (uintptr_t)rman_get_virtual(softs->os_specific.pqi_regs_res0); */
 321         softs->pci_mem_base_vaddr = (char *)rman_get_virtual(softs->os_specific.pqi_regs_res0);
 322
 323         /*
 324          * Allocate the parent bus DMA tag appropriate for our PCI interface.
 325          *
 326          * Note that some of these controllers are 64-bit capable.
 327          */
 328         if (bus_dma_tag_create(bus_get_dma_tag(dev),    /* parent */
 329                                 PAGE_SIZE, 0,           /* algnmnt, boundary */
 330                                 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
 331                                 BUS_SPACE_MAXADDR,      /* highaddr */
 332                                 NULL, NULL,             /* filter, filterarg */
 333                                 BUS_SPACE_MAXSIZE_32BIT,        /* maxsize */
 334                                 BUS_SPACE_UNRESTRICTED, /* nsegments */
 335                                 BUS_SPACE_MAXSIZE_32BIT,        /* maxsegsize */
 336                                 0,                      /* flags */
 337                                 NULL, NULL,             /* No locking needed */
 338                                 &softs->os_specific.pqi_parent_dmat)) {
 339                 DBG_ERR("can't allocate parent DMA tag\n");
 340                 /* assume failure is 'out of memory' */
 341                 error = ENOMEM;
 342                 goto dma_out;
 343         }
 344
 345         softs->os_specific.sim_registered = FALSE;
 346         softs->os_name = "FreeBSD ";
 347
 348         /* Initialize the PQI library */
 349         error = pqisrc_init(softs);
 350         if (error != PQI_STATUS_SUCCESS) {
 351                 DBG_ERR("Failed to initialize pqi lib error = %d\n", error);
 352                 error = ENXIO;
 353                 goto out;
 354         }
 355         else {
 356                 error = BSD_SUCCESS;
 357         }
 358
 359     mtx_init(&softs->os_specific.cam_lock, "cam_lock", NULL, MTX_DEF);
 360     softs->os_specific.mtx_init = TRUE;
 361     mtx_init(&softs->os_specific.map_lock, "map_lock", NULL, MTX_DEF);
 362
 363     callout_init(&softs->os_specific.wellness_periodic, 1);
 364     callout_init(&softs->os_specific.heartbeat_timeout_id, 1);
 365
 366     /*
 367      * Create DMA tag for mapping buffers into controller-addressable space.
 368      */
 369     if (bus_dma_tag_create(softs->os_specific.pqi_parent_dmat,/* parent */
 370                                 PAGE_SIZE, 0,           /* algnmnt, boundary */
 371                                 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
 372                                 BUS_SPACE_MAXADDR,      /* highaddr */
 373                                 NULL, NULL,             /* filter, filterarg */
 374                                 (bus_size_t)softs->pqi_cap.max_sg_elem*PAGE_SIZE,/* maxsize */
 375                                 softs->pqi_cap.max_sg_elem,     /* nsegments */
 376                                 BUS_SPACE_MAXSIZE_32BIT,        /* maxsegsize */
 377                                 BUS_DMA_ALLOCNOW,               /* flags */
 378                                 busdma_lock_mutex,              /* lockfunc */
 379                                 &softs->os_specific.map_lock,   /* lockfuncarg*/
 380                                 &softs->os_specific.pqi_buffer_dmat)) {
 381                 DBG_ERR("can't allocate buffer DMA tag for pqi_buffer_dmat\n");
 382                 return (ENOMEM);
 383         }
 384
 385         rcbp = &softs->rcb[1];
 386         for( i = 1;  i <= softs->pqi_cap.max_outstanding_io; i++, rcbp++ ) {
 387                 if ((error = bus_dmamap_create(softs->os_specific.pqi_buffer_dmat, 0, &rcbp->cm_datamap)) != 0) {
 388                         DBG_ERR("Cant create datamap for buf @"
 389                         "rcbp = %p maxio = %d error = %d\n",
 390                         rcbp, softs->pqi_cap.max_outstanding_io, error);
 391                         goto dma_out;
 392                 }
 393         }
 394
 395         os_start_heartbeat_timer((void *)softs); /* Start the heart-beat timer */
 396         callout_reset(&softs->os_specific.wellness_periodic, 120 * hz,
 397                         os_wellness_periodic, softs);
 398
 399         error = pqisrc_scan_devices(softs);
 400         if (error != PQI_STATUS_SUCCESS) {
 401                 DBG_ERR("Failed to scan lib error = %d\n", error);
 402                 error = ENXIO;
 403                 goto out;
 404         }
 405
 406         error = register_sim(softs, card_index);
 407         if (error) {
 408                 DBG_ERR("Failed to register sim index = %d error = %d\n",
 409                         card_index, error);
 410                 goto out;
 411         }
 412
 413         smartpqi_target_rescan(softs);
 414
 415         TASK_INIT(&softs->os_specific.event_task, 0, pqisrc_event_worker,softs);
 416
 417         error = create_char_dev(softs, card_index);
 418         if (error) {
 419                 DBG_ERR("Failed to register character device index=%d r=%d\n",
 420                         card_index, error);
 421                 goto out;
 422         }
 423         goto out;
 424
 425 dma_out:
 426         if (softs->os_specific.pqi_regs_res0 != NULL)
 427                 bus_release_resource(softs->os_specific.pqi_dev, SYS_RES_MEMORY,
 428                         softs->os_specific.pqi_regs_rid0,
 429                         softs->os_specific.pqi_regs_res0);
 430 out:
 431         DBG_FUNC("OUT error = %d\n", error);
 432         return(error);
 433 }
 434
 435 /*
 436  * Deallocate resources for our device.
 437  */
 438 static int
 439 smartpqi_detach(device_t dev)
 440 {
 441         struct pqisrc_softstate *softs = device_get_softc(dev);
 442         int rval = BSD_SUCCESS;
 443
 444         DBG_FUNC("IN\n");
 445
 446         if (softs == NULL)
 447                 return ENXIO;
 448
 449         /* kill the periodic event */
 450         callout_drain(&softs->os_specific.wellness_periodic);
 451         /* Kill the heart beat event */
 452         callout_drain(&softs->os_specific.heartbeat_timeout_id);
 453
 454         if (!pqisrc_ctrl_offline(softs)) {
 455                 rval = pqisrc_flush_cache(softs, PQISRC_NONE_CACHE_FLUSH_ONLY);
 456                 if (rval != PQI_STATUS_SUCCESS) {
 457                         DBG_ERR("Unable to flush adapter cache! rval = %d\n", rval);
 458                         rval = EIO;
 459                 }
 460         }
 461
 462         destroy_char_dev(softs);
 463         pqisrc_uninit(softs);
 464         deregister_sim(softs);
 465         pci_release_msi(dev);
 466
 467         DBG_FUNC("OUT\n");
 468
 469         return rval;
 470 }
 471
 472 /*
 473  * Bring the controller to a quiescent state, ready for system suspend.
 474  */
 475 static int
 476 smartpqi_suspend(device_t dev)
 477 {
 478         struct pqisrc_softstate *softs = device_get_softc(dev);
 479
 480         DBG_FUNC("IN\n");
 481
 482         if (softs == NULL)
 483                 return ENXIO;
 484
 485         DBG_INFO("Suspending the device %p\n", softs);
 486         softs->os_specific.pqi_state |= SMART_STATE_SUSPEND;
 487
 488         DBG_FUNC("OUT\n");
 489
 490         return BSD_SUCCESS;
 491 }
 492
 493 /*
 494  * Bring the controller back to a state ready for operation.
 495  */
 496 static int
 497 smartpqi_resume(device_t dev)
 498 {
 499         struct pqisrc_softstate *softs = device_get_softc(dev);
 500
 501         DBG_FUNC("IN\n");
 502
 503         if (softs == NULL)
 504                 return ENXIO;
 505
 506         softs->os_specific.pqi_state &= ~SMART_STATE_SUSPEND;
 507
 508         DBG_FUNC("OUT\n");
 509
 510         return BSD_SUCCESS;
 511 }
 512
 513 /*
 514  * Do whatever is needed during a system shutdown.
 515  */
 516 static int
 517 smartpqi_shutdown(device_t dev)
 518 {
 519         struct pqisrc_softstate *softs = device_get_softc(dev);
 520         int bsd_status = BSD_SUCCESS;
 521         int pqi_status;
 522
 523         DBG_FUNC("IN\n");
 524
 525         if (softs == NULL)
 526                 return ENXIO;
 527
 528         if (pqisrc_ctrl_offline(softs))
 529                 return BSD_SUCCESS;
 530
 531         pqi_status = pqisrc_flush_cache(softs, PQISRC_SHUTDOWN);
 532         if (pqi_status != PQI_STATUS_SUCCESS) {
 533                 DBG_ERR("Unable to flush adapter cache! rval = %d\n", pqi_status);
 534                 bsd_status = EIO;
 535         }
 536
 537         DBG_FUNC("OUT\n");
 538
 539         return bsd_status;
 540 }
 541
 542 /*
 543  * PCI bus interface.
 544  */
 545 static device_method_t pqi_methods[] = {
 546         /* Device interface */
 547         DEVMETHOD(device_probe,         smartpqi_probe),
 548         DEVMETHOD(device_attach,        smartpqi_attach),
 549         DEVMETHOD(device_detach,        smartpqi_detach),
 550         DEVMETHOD(device_suspend,       smartpqi_suspend),
 551         DEVMETHOD(device_resume,        smartpqi_resume),
 552         DEVMETHOD(device_shutdown,      smartpqi_shutdown),
 553         { 0, 0 }
 554 };
 555
 556 static devclass_t  pqi_devclass;
 557
 558 static driver_t smartpqi_pci_driver = {
 559         "smartpqi",
 560         pqi_methods,
 561         sizeof(struct pqisrc_softstate)
 562 };
 563
 564 DRIVER_MODULE(smartpqi, pci, smartpqi_pci_driver, pqi_devclass, 0, 0);
 565 MODULE_DEPEND(smartpqi, pci, 1, 1, 1);