sys/dev/smartpqi/smartpqi_main.c

   1 /*-
   2  * Copyright (c) 2018 Microsemi Corporation.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  */
  26
  27 /* $FreeBSD$ */
  28
  29 /*
  30  * Driver for the Microsemi Smart storage controllers
  31  */
  32
  33 #include "smartpqi_includes.h"
  34 #include "smartpqi_prototypes.h"
  35
  36 /*
  37  * Supported devices
  38  */
  39 struct pqi_ident
  40 {
  41         u_int16_t               vendor;
  42         u_int16_t               device;
  43         u_int16_t               subvendor;
  44         u_int16_t               subdevice;
  45         int                     hwif;
  46         char                    *desc;
  47 } pqi_identifiers[] = {
  48         /* (MSCC PM8205 8x12G based) */
  49         {0x9005, 0x028f, 0x103c, 0x600, PQI_HWIF_SRCV, "P408i-p SR Gen10"},
  50         {0x9005, 0x028f, 0x103c, 0x601, PQI_HWIF_SRCV, "P408e-p SR Gen10"},
  51         {0x9005, 0x028f, 0x103c, 0x602, PQI_HWIF_SRCV, "P408i-a SR Gen10"},
  52         {0x9005, 0x028f, 0x103c, 0x603, PQI_HWIF_SRCV, "P408i-c SR Gen10"},
  53         {0x9005, 0x028f, 0x1028, 0x1FE0, PQI_HWIF_SRCV, "SmartRAID 3162-8i/eDell"},
  54         {0x9005, 0x028f, 0x9005, 0x608, PQI_HWIF_SRCV, "SmartRAID 3162-8i/e"},
  55         {0x9005, 0x028f, 0x103c, 0x609, PQI_HWIF_SRCV, "P408i-sb SR G10"},
  56
  57         /* (MSCC PM8225 8x12G based) */
  58         {0x9005, 0x028f, 0x103c, 0x650, PQI_HWIF_SRCV, "E208i-p SR Gen10"},
  59         {0x9005, 0x028f, 0x103c, 0x651, PQI_HWIF_SRCV, "E208e-p SR Gen10"},
  60         {0x9005, 0x028f, 0x103c, 0x652, PQI_HWIF_SRCV, "E208i-c SR Gen10"},
  61         {0x9005, 0x028f, 0x103c, 0x654, PQI_HWIF_SRCV, "E208i-a SR Gen10"},
  62         {0x9005, 0x028f, 0x103c, 0x655, PQI_HWIF_SRCV, "P408e-m SR Gen10"},
  63
  64         /* (MSCC PM8221 8x12G based) */
  65         {0x9005, 0x028f, 0x103c, 0x700, PQI_HWIF_SRCV, "P204i-c SR Gen10"},
  66         {0x9005, 0x028f, 0x103c, 0x701, PQI_HWIF_SRCV, "P204i-b SR Gen10"},
  67
  68         /* (MSCC PM8204 8x12G based) */
  69         {0x9005, 0x028f, 0x9005, 0x800, PQI_HWIF_SRCV, "SmartRAID 3154-8i"},
  70         {0x9005, 0x028f, 0x9005, 0x801, PQI_HWIF_SRCV, "SmartRAID 3152-8i"},
  71         {0x9005, 0x028f, 0x9005, 0x802, PQI_HWIF_SRCV, "SmartRAID 3151-4i"},
  72         {0x9005, 0x028f, 0x9005, 0x803, PQI_HWIF_SRCV, "SmartRAID 3101-4i"},
  73         {0x9005, 0x028f, 0x9005, 0x804, PQI_HWIF_SRCV, "SmartRAID 3154-8e"},
  74         {0x9005, 0x028f, 0x9005, 0x805, PQI_HWIF_SRCV, "SmartRAID 3102-8i"},
  75         {0x9005, 0x028f, 0x9005, 0x806, PQI_HWIF_SRCV, "SmartRAID 3100"},
  76         {0x9005, 0x028f, 0x9005, 0x807, PQI_HWIF_SRCV, "SmartRAID 3162-8i"},
  77         {0x9005, 0x028f, 0x152d, 0x8a22, PQI_HWIF_SRCV, "QS-8204-8i"},
  78         {0x9005, 0x028f, 0x193d, 0xf460, PQI_HWIF_SRCV, "UN RAID P460-M4"},
  79         {0x9005, 0x028f, 0x193d, 0xf461, PQI_HWIF_SRCV, "UN RAID P460-B4"},
  80         {0x9005, 0x028f, 0x1bd4, 0x004b, PQI_HWIF_SRCV, "INSPUR RAID PM8204-2GB"},
  81         {0x9005, 0x028f, 0x1bd4, 0x004c, PQI_HWIF_SRCV, "INSPUR RAID PM8204-4GB"},
  82
  83         /* (MSCC PM8222 8x12G based) */
  84         {0x9005, 0x028f, 0x9005, 0x900, PQI_HWIF_SRCV, "SmartHBA 2100-8i"},
  85         {0x9005, 0x028f, 0x9005, 0x901, PQI_HWIF_SRCV, "SmartHBA 2100-4i"},
  86         {0x9005, 0x028f, 0x9005, 0x902, PQI_HWIF_SRCV, "HBA 1100-8i"},
  87         {0x9005, 0x028f, 0x9005, 0x903, PQI_HWIF_SRCV, "HBA 1100-4i"},
  88         {0x9005, 0x028f, 0x9005, 0x904, PQI_HWIF_SRCV, "SmartHBA 2100-8e"},
  89         {0x9005, 0x028f, 0x9005, 0x905, PQI_HWIF_SRCV, "HBA 1100-8e"},
  90         {0x9005, 0x028f, 0x9005, 0x906, PQI_HWIF_SRCV, "SmartHBA 2100-4i4e"},
  91         {0x9005, 0x028f, 0x9005, 0x907, PQI_HWIF_SRCV, "HBA 1100"},
  92         {0x9005, 0x028f, 0x9005, 0x908, PQI_HWIF_SRCV, "SmartHBA 2100"},
  93         {0x9005, 0x028f, 0x9005, 0x90a, PQI_HWIF_SRCV, "SmartHBA 2100A-8i"},
  94         {0x9005, 0x028f, 0x193d, 0x8460, PQI_HWIF_SRCV, "UN HBA H460-M1"},
  95         {0x9005, 0x028f, 0x193d, 0x8461, PQI_HWIF_SRCV, "UN HBA H460-B1"},
  96         {0x9005, 0x028f, 0x1bd4, 0x004a, PQI_HWIF_SRCV, "INSPUR SMART-HBA PM8222-SHBA"},
  97         {0x9005, 0x028f, 0x13fe, 0x8312, PQI_HWIF_SRCV, "MIC-8312BridgeB"},
  98
  99         /* (SRCx MSCC FVB 24x12G based) */
 100         {0x9005, 0x028f, 0x103c, 0x1001, PQI_HWIF_SRCV, "MSCC FVB"},
 101
 102         /* (MSCC PM8241 24x12G based) */
 103
 104         /* (MSCC PM8242 24x12G based) */
 105         {0x9005, 0x028f, 0x152d, 0x8a37, PQI_HWIF_SRCV, "QS-8242-24i"},
 106         {0x9005, 0x028f, 0x9005, 0x1300, PQI_HWIF_SRCV, "HBA 1100-8i8e"},
 107         {0x9005, 0x028f, 0x9005, 0x1301, PQI_HWIF_SRCV, "HBA 1100-24i"},
 108         {0x9005, 0x028f, 0x9005, 0x1302, PQI_HWIF_SRCV, "SmartHBA 2100-8i8e"},
 109         {0x9005, 0x028f, 0x9005, 0x1303, PQI_HWIF_SRCV, "SmartHBA 2100-24i"},
 110         {0x9005, 0x028f, 0x105b, 0x1321, PQI_HWIF_SRCV, "8242-24i"},
 111         {0x9005, 0x028f, 0x1bd4, 0x0045, PQI_HWIF_SRCV, "INSPUR SMART-HBA 8242-24i"},
 112
 113         /* (MSCC PM8236 16x12G based) */
 114         {0x9005, 0x028f, 0x152d, 0x8a24, PQI_HWIF_SRCV, "QS-8236-16i"},
 115         {0x9005, 0x028f, 0x9005, 0x1380, PQI_HWIF_SRCV, "SmartRAID 3154-16i"},
 116         {0x9005, 0x028f, 0x1bd4, 0x0046, PQI_HWIF_SRCV, "INSPUR RAID 8236-16i"},
 117
 118         /* (MSCC PM8237 24x12G based) */
 119         {0x9005, 0x028f, 0x103c, 0x1100, PQI_HWIF_SRCV, "P816i-a SR Gen10"},
 120         {0x9005, 0x028f, 0x103c, 0x1101, PQI_HWIF_SRCV, "P416ie-m SR G10"},
 121
 122         /* (MSCC PM8238 16x12G based) */
 123         {0x9005, 0x028f, 0x152d, 0x8a23, PQI_HWIF_SRCV, "QS-8238-16i"},
 124         {0x9005, 0x028f, 0x9005, 0x1280, PQI_HWIF_SRCV, "HBA 1100-16i"},
 125         {0x9005, 0x028f, 0x9005, 0x1281, PQI_HWIF_SRCV, "HBA 1100-16e"},
 126         {0x9005, 0x028f, 0x105b, 0x1211, PQI_HWIF_SRCV, "8238-16i"},
 127         {0x9005, 0x028f, 0x1bd4, 0x0048, PQI_HWIF_SRCV, "INSPUR SMART-HBA 8238-16i"},
 128         {0x9005, 0x028f, 0x9005, 0x1282, PQI_HWIF_SRCV, "SmartHBA 2100-16i"},
 129
 130         /* (MSCC PM8240 24x12G based) */
 131         {0x9005, 0x028f, 0x152d, 0x8a36, PQI_HWIF_SRCV, "QS-8240-24i"},
 132         {0x9005, 0x028f, 0x9005, 0x1200, PQI_HWIF_SRCV, "SmartRAID 3154-24i"},
 133         {0x9005, 0x028f, 0x9005, 0x1201, PQI_HWIF_SRCV, "SmartRAID 3154-8i16e"},
 134         {0x9005, 0x028f, 0x9005, 0x1202, PQI_HWIF_SRCV, "SmartRAID 3154-8i8e"},
 135         {0x9005, 0x028f, 0x1bd4, 0x0047, PQI_HWIF_SRCV, "INSPUR RAID 8240-24i"},
 136
 137         {0, 0, 0, 0, 0, 0}
 138 };
 139
 140 struct pqi_ident
 141 pqi_family_identifiers[] = {
 142         {0x9005, 0x028f, 0, 0, PQI_HWIF_SRCV, "Smart Array Storage Controller"},
 143         {0, 0, 0, 0, 0, 0}
 144 };
 145
 146 /*
 147  * Function to identify the installed adapter.
 148  */
 149 static struct pqi_ident *
 150 pqi_find_ident(device_t dev)
 151 {
 152         struct pqi_ident *m;
 153         u_int16_t vendid, devid, sub_vendid, sub_devid;
 154
 155         vendid = pci_get_vendor(dev);
 156         devid = pci_get_device(dev);
 157         sub_vendid = pci_get_subvendor(dev);
 158         sub_devid = pci_get_subdevice(dev);
 159
 160         for (m = pqi_identifiers; m->vendor != 0; m++) {
 161                 if ((m->vendor == vendid) && (m->device == devid) &&
 162                         (m->subvendor == sub_vendid) &&
 163                         (m->subdevice == sub_devid)) {
 164                         return (m);
 165                 }
 166         }
 167
 168         for (m = pqi_family_identifiers; m->vendor != 0; m++) {
 169                 if ((m->vendor == vendid) && (m->device == devid)) {
 170                         return (m);
 171                 }
 172         }
 173
 174         return (NULL);
 175 }
 176
 177 /*
 178  * Determine whether this is one of our supported adapters.
 179  */
 180 static int
 181 smartpqi_probe(device_t dev)
 182 {
 183         struct pqi_ident *id;
 184
 185         if ((id = pqi_find_ident(dev)) != NULL) {
 186                 device_set_desc(dev, id->desc);
 187                 return(BUS_PROBE_VENDOR);
 188         }
 189
 190         return(ENXIO);
 191 }
 192
 193 /*
 194  * Store Bus/Device/Function in softs
 195  */
 196 void pqisrc_save_controller_info(struct pqisrc_softstate *softs)
 197 {
 198         device_t dev = softs->os_specific.pqi_dev;
 199
 200         softs->bus_id = (uint32_t)pci_get_bus(dev);
 201         softs->device_id = (uint32_t)pci_get_device(dev);
 202         softs->func_id = (uint32_t)pci_get_function(dev);
 203 }
 204
 205
 206 /*
 207  * Allocate resources for our device, set up the bus interface.
 208  * Initialize the PQI related functionality, scan devices, register sim to
 209  * upper layer, create management interface device node etc.
 210  */
 211 static int
 212 smartpqi_attach(device_t dev)
 213 {
 214         struct pqisrc_softstate *softs = NULL;
 215         struct pqi_ident *id = NULL;
 216         int error = 0;
 217         u_int32_t command = 0, i = 0;
 218         int card_index = device_get_unit(dev);
 219         rcb_t *rcbp = NULL;
 220
 221         /*
 222          * Initialise softc.
 223          */
 224         softs = device_get_softc(dev);
 225
 226         if (!softs) {
 227                 printf("Could not get softc\n");
 228                 error = EINVAL;
 229                 goto out;
 230         }
 231         memset(softs, 0, sizeof(*softs));
 232         softs->os_specific.pqi_dev = dev;
 233
 234         DBG_FUNC("IN\n");
 235
 236         /* assume failure is 'not configured' */
 237         error = ENXIO;
 238
 239         /*
 240          * Verify that the adapter is correctly set up in PCI space.
 241          */
 242         pci_enable_busmaster(softs->os_specific.pqi_dev);
 243         command = pci_read_config(softs->os_specific.pqi_dev, PCIR_COMMAND, 2);
 244         if ((command & PCIM_CMD_MEMEN) == 0) {
 245                 DBG_ERR("memory window not available command = %d\n", command);
 246                 error = ENXIO;
 247                 goto out;
 248         }
 249
 250         /*
 251          * Detect the hardware interface version, set up the bus interface
 252          * indirection.
 253          */
 254         id = pqi_find_ident(dev);
 255         softs->os_specific.pqi_hwif = id->hwif;
 256
 257         switch(softs->os_specific.pqi_hwif) {
 258                 case PQI_HWIF_SRCV:
 259                         DBG_INFO("set hardware up for PMC SRCv for %p", softs);
 260                         break;
 261                 default:
 262                         softs->os_specific.pqi_hwif = PQI_HWIF_UNKNOWN;
 263                         DBG_ERR("unknown hardware type\n");
 264                         error = ENXIO;
 265                         goto out;
 266         }
 267
 268         pqisrc_save_controller_info(softs);
 269
 270         /*
 271          * Allocate the PCI register window.
 272          */
 273         softs->os_specific.pqi_regs_rid0 = PCIR_BAR(0);
 274         if ((softs->os_specific.pqi_regs_res0 =
 275                 bus_alloc_resource_any(softs->os_specific.pqi_dev, SYS_RES_MEMORY,
 276                 &softs->os_specific.pqi_regs_rid0, RF_ACTIVE)) == NULL) {
 277                 DBG_ERR("couldn't allocate register window 0\n");
 278                 /* assume failure is 'out of memory' */
 279                 error = ENOMEM;
 280                 goto out;
 281         }
 282
 283         bus_get_resource_start(softs->os_specific.pqi_dev, SYS_RES_MEMORY,
 284                 softs->os_specific.pqi_regs_rid0);
 285
 286         softs->pci_mem_handle.pqi_btag = rman_get_bustag(softs->os_specific.pqi_regs_res0);
 287         softs->pci_mem_handle.pqi_bhandle = rman_get_bushandle(softs->os_specific.pqi_regs_res0);
 288         /* softs->pci_mem_base_vaddr = (uintptr_t)rman_get_virtual(softs->os_specific.pqi_regs_res0); */
 289         softs->pci_mem_base_vaddr = (char *)rman_get_virtual(softs->os_specific.pqi_regs_res0);
 290
 291         /*
 292          * Allocate the parent bus DMA tag appropriate for our PCI interface.
 293          *
 294          * Note that some of these controllers are 64-bit capable.
 295          */
 296         if (bus_dma_tag_create(bus_get_dma_tag(dev),    /* parent */
 297                                 PAGE_SIZE, 0,           /* algnmnt, boundary */
 298                                 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
 299                                 BUS_SPACE_MAXADDR,      /* highaddr */
 300                                 NULL, NULL,             /* filter, filterarg */
 301                                 BUS_SPACE_MAXSIZE_32BIT,        /* maxsize */
 302                                 BUS_SPACE_UNRESTRICTED, /* nsegments */
 303                                 BUS_SPACE_MAXSIZE_32BIT,        /* maxsegsize */
 304                                 0,                      /* flags */
 305                                 NULL, NULL,             /* No locking needed */
 306                                 &softs->os_specific.pqi_parent_dmat)) {
 307                 DBG_ERR("can't allocate parent DMA tag\n");
 308                 /* assume failure is 'out of memory' */
 309                 error = ENOMEM;
 310                 goto dma_out;
 311         }
 312
 313         softs->os_specific.sim_registered = FALSE;
 314         softs->os_name = "FreeBSD ";
 315
 316         /* Initialize the PQI library */
 317         error = pqisrc_init(softs);
 318         if (error) {
 319                 DBG_ERR("Failed to initialize pqi lib error = %d\n", error);
 320                 error = PQI_STATUS_FAILURE;
 321                 goto out;
 322         }
 323
 324         mtx_init(&softs->os_specific.cam_lock, "cam_lock", NULL, MTX_DEF);
 325         softs->os_specific.mtx_init = TRUE;
 326         mtx_init(&softs->os_specific.map_lock, "map_lock", NULL, MTX_DEF);
 327
 328         /*
 329          * Create DMA tag for mapping buffers into controller-addressable space.
 330          */
 331         if (bus_dma_tag_create(softs->os_specific.pqi_parent_dmat,/* parent */
 332                                 1, 0,                   /* algnmnt, boundary */
 333                                 BUS_SPACE_MAXADDR_32BIT,/* lowaddr */
 334                                 BUS_SPACE_MAXADDR,      /* highaddr */
 335                                 NULL, NULL,             /* filter, filterarg */
 336                                 softs->pqi_cap.max_sg_elem*PAGE_SIZE,/*maxsize*/
 337                                 softs->pqi_cap.max_sg_elem,     /* nsegments */
 338                                 BUS_SPACE_MAXSIZE_32BIT,        /* maxsegsize */
 339                                 BUS_DMA_ALLOCNOW,               /* flags */
 340                                 busdma_lock_mutex,              /* lockfunc */
 341                                 &softs->os_specific.map_lock,   /* lockfuncarg*/
 342                                 &softs->os_specific.pqi_buffer_dmat)) {
 343                 DBG_ERR("can't allocate buffer DMA tag for pqi_buffer_dmat\n");
 344                 return (ENOMEM);
 345         }
 346
 347         rcbp = &softs->rcb[1];
 348         for( i = 1;  i <= softs->pqi_cap.max_outstanding_io; i++, rcbp++ ) {
 349                 if ((error = bus_dmamap_create(softs->os_specific.pqi_buffer_dmat, 0, &rcbp->cm_datamap)) != 0) {
 350                         DBG_ERR("Cant create datamap for buf @"
 351                         "rcbp = %p maxio = %d error = %d\n",
 352                         rcbp, softs->pqi_cap.max_outstanding_io, error);
 353                         goto dma_out;
 354                 }
 355         }
 356
 357         os_start_heartbeat_timer((void *)softs); /* Start the heart-beat timer */
 358         softs->os_specific.wellness_periodic = timeout( os_wellness_periodic,
 359                                                         softs, 120*hz);
 360         /* Register our shutdown handler. */
 361         softs->os_specific.eh = EVENTHANDLER_REGISTER(shutdown_final,
 362                                 smartpqi_shutdown, softs, SHUTDOWN_PRI_DEFAULT);
 363
 364         error = pqisrc_scan_devices(softs);
 365         if (error) {
 366                 DBG_ERR("Failed to scan lib error = %d\n", error);
 367                 error = PQI_STATUS_FAILURE;
 368                 goto out;
 369         }
 370
 371         error = register_sim(softs, card_index);
 372         if (error) {
 373                 DBG_ERR("Failed to register sim index = %d error = %d\n",
 374                         card_index, error);
 375                 goto out;
 376         }
 377
 378         smartpqi_target_rescan(softs);
 379
 380         TASK_INIT(&softs->os_specific.event_task, 0, pqisrc_event_worker,softs);
 381
 382         error = create_char_dev(softs, card_index);
 383         if (error) {
 384                 DBG_ERR("Failed to register character device index=%d r=%d\n",
 385                         card_index, error);
 386                 goto out;
 387         }
 388         goto out;
 389
 390 dma_out:
 391         if (softs->os_specific.pqi_regs_res0 != NULL)
 392                 bus_release_resource(softs->os_specific.pqi_dev, SYS_RES_MEMORY,
 393                         softs->os_specific.pqi_regs_rid0,
 394                         softs->os_specific.pqi_regs_res0);
 395 out:
 396         DBG_FUNC("OUT error = %d\n", error);
 397         return(error);
 398 }
 399
 400 /*
 401  * Deallocate resources for our device.
 402  */
 403 static int
 404 smartpqi_detach(device_t dev)
 405 {
 406         struct pqisrc_softstate *softs = NULL;
 407         softs = device_get_softc(dev);
 408         DBG_FUNC("IN\n");
 409
 410         EVENTHANDLER_DEREGISTER(shutdown_final, softs->os_specific.eh);
 411
 412         /* kill the periodic event */
 413         untimeout(os_wellness_periodic, softs,
 414                         softs->os_specific.wellness_periodic);
 415         /* Kill the heart beat event */
 416         untimeout(os_start_heartbeat_timer, softs,
 417                         softs->os_specific.heartbeat_timeout_id);
 418
 419         smartpqi_shutdown(softs);
 420         destroy_char_dev(softs);
 421         pqisrc_uninit(softs);
 422         deregister_sim(softs);
 423         pci_release_msi(dev);
 424
 425         DBG_FUNC("OUT\n");
 426         return 0;
 427 }
 428
 429 /*
 430  * Bring the controller to a quiescent state, ready for system suspend.
 431  */
 432 static int
 433 smartpqi_suspend(device_t dev)
 434 {
 435         struct pqisrc_softstate *softs;
 436         softs = device_get_softc(dev);
 437         DBG_FUNC("IN\n");
 438
 439         DBG_INFO("Suspending the device %p\n", softs);
 440         softs->os_specific.pqi_state |= SMART_STATE_SUSPEND;
 441
 442         DBG_FUNC("OUT\n");
 443         return(0);
 444 }
 445
 446 /*
 447  * Bring the controller back to a state ready for operation.
 448  */
 449 static int
 450 smartpqi_resume(device_t dev)
 451 {
 452         struct pqisrc_softstate *softs;
 453         softs = device_get_softc(dev);
 454         DBG_FUNC("IN\n");
 455
 456         softs->os_specific.pqi_state &= ~SMART_STATE_SUSPEND;
 457
 458         DBG_FUNC("OUT\n");
 459         return(0);
 460 }
 461
 462 /*
 463  * Do whatever is needed during a system shutdown.
 464  */
 465 int
 466 smartpqi_shutdown(void *arg)
 467 {
 468         struct pqisrc_softstate *softs = NULL;
 469         int rval = 0;
 470
 471         DBG_FUNC("IN\n");
 472
 473         softs = (struct pqisrc_softstate *)arg;
 474
 475         rval = pqisrc_flush_cache(softs, PQISRC_SHUTDOWN);
 476         if (rval != PQI_STATUS_SUCCESS) {
 477                 DBG_ERR("Unable to flush adapter cache! rval = %d", rval);
 478         }
 479
 480         DBG_FUNC("OUT\n");
 481
 482         return rval;
 483 }
 484
 485 static int      smartpqi_probe(device_t dev);
 486 static int      smartpqi_attach(device_t dev);
 487 static int      smartpqi_detach(device_t dev);
 488 static int      smartpqi_suspend(device_t dev);
 489 static int      smartpqi_resume(device_t dev);
 490
 491 /*
 492  * PCI bus interface.
 493  */
 494 static device_method_t pqi_methods[] = {
 495         /* Device interface */
 496         DEVMETHOD(device_probe,         smartpqi_probe),
 497         DEVMETHOD(device_attach,        smartpqi_attach),
 498         DEVMETHOD(device_detach,        smartpqi_detach),
 499         DEVMETHOD(device_suspend,       smartpqi_suspend),
 500         DEVMETHOD(device_resume,        smartpqi_resume),
 501         { 0, 0 }
 502 };
 503
 504 static devclass_t       pqi_devclass;
 505 static driver_t smartpqi_pci_driver = {
 506         "smartpqi",
 507         pqi_methods,
 508         sizeof(struct pqisrc_softstate)
 509 };
 510
 511 DRIVER_MODULE(smartpqi, pci, smartpqi_pci_driver, pqi_devclass, 0, 0);
 512 MODULE_DEPEND(smartpqi, pci, 1, 1, 1);