2 * Copyright (c) 2018 Microsemi Corporation.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #ifndef _PQI_STRUCTURES_H
30 #define _PQI_STRUCTURES_H
32 struct bmic_host_wellness_driver_version {
34 uint8_t driver_version_tag[2];
35 uint16_t driver_version_length;
36 char driver_version[32];
41 struct bmic_host_wellness_time {
53 uint8_t dont_write_tag[2];
58 /* As per PQI Spec pqi-2r00a , 6.2.2. */
60 /* device capability register , for admin q table 24 */
61 struct pqi_dev_adminq_cap {
62 uint8_t max_admin_ibq_elem;
63 uint8_t max_admin_obq_elem;
64 uint8_t admin_ibq_elem_len;
65 uint8_t admin_obq_elem_len;
66 uint16_t max_pqi_dev_reset_tmo;
70 /* admin q parameter reg , table 36 */
71 struct admin_q_param {
72 uint8_t num_iq_elements;
73 uint8_t num_oq_elements;
78 struct pqi_registers {
80 uint64_t admin_q_config;
81 uint64_t pqi_dev_adminq_cap;
82 uint32_t legacy_intr_status;
83 uint32_t legacy_intr_mask_set;
84 uint32_t legacy_intr_mask_clr;
86 uint32_t pqi_dev_status;
88 uint64_t admin_ibq_pi_offset;
89 uint64_t admin_obq_ci_offset;
90 uint64_t admin_ibq_elem_array_addr;
91 uint64_t admin_obq_elem_array_addr;
92 uint64_t admin_ibq_ci_addr;
93 uint64_t admin_obq_pi_addr;
94 uint32_t admin_q_param;
98 uint64_t error_details;
100 uint32_t power_action;
102 }OS_ATTRIBUTE_PACKED;
105 * IOA controller registers
106 * Mapped in PCIe BAR 0.
109 struct ioa_registers {
111 uint32_t host_to_ioa_db_mask_clr; /* 18h */
113 uint32_t host_to_ioa_db; /* 20h */
115 uint32_t host_to_ioa_db_clr; /* 28h */
117 uint32_t ioa_to_host_glob_int_mask; /* 34h */
119 uint32_t ioa_to_host_db; /* 9Ch */
120 uint32_t ioa_to_host_db_clr; /* A0h */
122 uint32_t ioa_to_host_db_mask; /* A8h */
123 uint32_t ioa_to_host_db_mask_clr; /* ACh */
124 uint32_t scratchpad0; /* B0h */
125 uint32_t scratchpad1; /* B4h */
126 uint32_t scratchpad2; /* B8h */
127 uint32_t scratchpad3_fw_status; /* BCh */
129 uint32_t scratchpad4; /* C8h */
130 uint8_t res8[0xf34]; /* 0xC8 + 4 + 0xf34 = 1000h */
131 uint32_t mb[8]; /* 1000h */
132 }OS_ATTRIBUTE_PACKED;
134 /* PQI Preferred settings */
135 struct pqi_pref_settings {
136 uint16_t max_cmd_size;
137 uint16_t max_fib_size;
138 }OS_ATTRIBUTE_PACKED;
140 /* pqi capability by sis interface */
142 uint32_t max_sg_elem;
143 uint32_t max_transfer_size;
144 uint32_t max_outstanding_io;
145 uint32_t conf_tab_off;
146 uint32_t conf_tab_sz;
147 }OS_ATTRIBUTE_PACKED;
149 struct pqi_conf_table {
150 uint8_t sign[8]; /* "CFGTABLE" */
151 uint32_t first_section_off;
154 struct pqi_conf_table_section_header {
156 uint16_t next_section_off;
159 struct pqi_conf_table_general_info {
160 struct pqi_conf_table_section_header header;
161 uint32_t section_len;
162 uint32_t max_outstanding_req;
163 uint32_t max_sg_size;
164 uint32_t max_sg_per_req;
167 struct pqi_conf_table_debug {
168 struct pqi_conf_table_section_header header;
172 struct pqi_conf_table_heartbeat {
173 struct pqi_conf_table_section_header header;
174 uint32_t heartbeat_counter;
177 typedef union pqi_reset_reg {
179 uint32_t reset_type : 3;
180 uint32_t reserved : 2;
181 uint32_t reset_action : 3;
182 uint32_t hold_in_pd1 : 1;
183 uint32_t reserved2 : 23;
188 /* Memory descriptor for DMA memory allocation */
189 typedef struct dma_mem {
195 bus_dma_tag_t dma_tag;
196 bus_dmamap_t dma_map;
199 /* Lock should be 8 byte aligned */
201 #ifndef LOCKFREE_STACK
203 typedef struct pqi_taglist {
208 uint32_t *elem_array;
209 boolean_t lockcreated;
210 char lockname[LOCKNAME_SIZE];
211 OS_LOCK_T lock OS_ATTRIBUTE_ALIGNED(8);
214 #else /* LOCKFREE_STACK */
218 uint32_t seq_no; /* To avoid aba problem */
219 uint32_t index; /* Index at the top of the stack */
223 /* lock-free stack used to push and pop the tag used for IO request */
224 typedef struct lockless_stack {
225 uint32_t *next_index_array;
226 uint32_t num_elements;
227 volatile union head_list head OS_ATTRIBUTE_ALIGNED(8);
230 #endif /* LOCKFREE_STACK */
233 * PQI SGL descriptor layouts.
236 * SGL (Scatter Gather List) descriptor Codes
239 #define SGL_DESCRIPTOR_CODE_DATA_BLOCK 0x0
240 #define SGL_DESCRIPTOR_CODE_BIT_BUCKET 0x1
241 #define SGL_DESCRIPTOR_CODE_STANDARD_SEGMENT 0x2
242 #define SGL_DESCRIPTOR_CODE_LAST_STANDARD_SEGMENT 0x3
243 #define SGL_DESCRIPTOR_CODE_LAST_ALTERNATIVE_SGL_SEGMENT 0x4
244 #define SGL_DESCRIPTOR_CODE_VENDOR_SPECIFIC 0xF
246 typedef struct sgl_descriptor
248 uint64_t addr; /* !< Bytes 0-7. The starting 64-bit memory byte address of the data block. */
249 uint32_t length; /* !< Bytes 8-11. The length in bytes of the data block. Set to 0x00000000 specifies that no data be transferred. */
250 uint8_t res[3]; /* !< Bytes 12-14. */
251 uint8_t zero : 4; /* !< Byte 15, Bits 0-3. */
252 uint8_t type : 4; /* !< Byte 15, Bits 4-7. sgl descriptor type */
256 typedef struct iu_header
259 uint8_t comp_feature;
261 }OS_ATTRIBUTE_PACKED iu_header_t;
263 typedef struct general_admin_request /* REPORT_PQI_DEVICE_CAPABILITY, REPORT_MANUFACTURER_INFO, REPORT_OPERATIONAL_IQ, REPORT_OPERATIONAL_OQ all same layout. */
265 iu_header_t header; /* !< Bytes 0-3. */
268 uint16_t req_id; /* !< Bytes 8-9. request identifier */
269 uint8_t fn_code; /* !< Byte 10. which administrator function */
272 uint8_t res2[33]; /* !< Bytes 11-43. function specific */
273 uint32_t buf_size; /* !< Bytes 44-47. size in bytes of the Data-In/Out Buffer */
274 sg_desc_t sg_desc; /* !< Bytes 48-63. SGL */
275 } OS_ATTRIBUTE_PACKED general_func;
281 uint64_t elem_arr_addr;
288 uint32_t vend_specific;
289 } OS_ATTRIBUTE_PACKED create_op_iq;
295 uint64_t elem_arr_addr;
301 uint16_t intr_msg_num;
302 uint16_t coales_count;
303 uint32_t min_coales_time;
304 uint32_t max_coales_time;
306 uint32_t vend_specific;
307 } OS_ATTRIBUTE_PACKED create_op_oq;
313 } OS_ATTRIBUTE_PACKED delete_op_queue;
319 uint32_t vend_specific;
320 } OS_ATTRIBUTE_PACKED change_op_iq_prop;
322 } OS_ATTRIBUTE_PACKED req_type;
324 }OS_ATTRIBUTE_PACKED gen_adm_req_iu_t;
326 typedef struct general_admin_response {
335 uint8_t status_desc[4];
338 } OS_ATTRIBUTE_PACKED create_op_iq;
341 uint8_t status_desc[4];
344 } OS_ATTRIBUTE_PACKED create_op_oq;
345 } OS_ATTRIBUTE_PACKED resp_type;
346 } OS_ATTRIBUTE_PACKED gen_adm_resp_iu_t ;
348 /*report and set Event config IU*/
350 typedef struct pqi_event_config_request {
352 uint16_t response_queue_id; /* specifies the OQ where the response
353 IU is to be delivered */
354 uint8_t work_area[2]; /* reserved for driver use */
357 uint16_t reserved; /* Report event config iu */
358 uint16_t global_event_oq_id; /* Set event config iu */
360 uint32_t buffer_length;
362 }pqi_event_config_request_t;
364 typedef struct pqi_set_event_config_request {
366 uint16_t response_queue_id; /* specifies the OQ where the response
367 IU is to be delivered */
368 uint8_t work_area[2]; /* reserved for driver use */
370 uint16_t global_event_oq_id;
371 uint32_t buffer_length;
373 }pqi_set_event_config_request_t;
376 /* Report/Set event config data-in/data-out buffer structure */
378 #define PQI_MAX_EVENT_DESCRIPTORS 255
380 struct pqi_event_descriptor {
386 typedef struct pqi_event_config {
388 uint8_t num_event_descriptors;
390 struct pqi_event_descriptor descriptors[PQI_MAX_EVENT_DESCRIPTORS];
393 /*management response IUs */
394 typedef struct pqi_management_response{
397 uint8_t work_area[2];
401 uint64_t result_data;
402 }pqi_management_response_t;
403 /*Event response IU*/
404 typedef struct pqi_event_response {
407 uint8_t work_area[2];
409 uint8_t reserved2 : 7;
410 uint8_t request_acknowledge : 1;
412 uint32_t additional_event_id;
414 }pqi_event_response_t;
416 /*event acknowledge IU*/
417 typedef struct pqi_event_acknowledge_request {
420 uint8_t work_area[2];
424 uint32_t additional_event_id;
425 }pqi_event_acknowledge_request_t;
431 uint32_t additional_event_id;
434 typedef struct op_q_params
440 uint16_t int_msg_num;
442 } OS_ATTRIBUTE_PACKED op_q_params;
444 /* Driver will use this structure to interpret the error
445 info element returned from a failed requests */
446 typedef struct raid_path_error_info_elem {
447 uint8_t data_in_result; /* !< Byte 0. See SOP spec Table 77. */
448 uint8_t data_out_result; /* !< Byte 1. See SOP spec Table 78. */
449 uint8_t reserved[3]; /* !< Bytes 2-4. */
450 uint8_t status; /* !< Byte 5. See SAM-5 specification "Status" codes Table 40. Defined in Storport.h */
451 uint16_t status_qual; /* !< Bytes 6-7. See SAM-5 specification Table 43. */
452 uint16_t sense_data_len; /* !< Bytes 8-9. See SOP specification table 79. */
453 uint16_t resp_data_len; /* !< Bytes 10-11. See SOP specification table 79. */
454 uint32_t data_in_transferred; /* !< Bytes 12-15. If "dada_in_result = 0x01 (DATA_IN BUFFER UNDERFLOW)", Indicates the number of contiguous bytes starting with offset zero in Data-In buffer else Ignored. */
455 uint32_t data_out_transferred; /* !< Bytes 16-19. If "data_out_result = 0x01 (DATA_OUT BUFFER UNDERFLOW)", Indicates the number of contiguous bytes starting with offset zero in Data-Out buffer else Ignored. */
456 uint8_t data[256]; /* !< Bytes 20-275. Response Data buffer or Sense Data buffer but not both. */
457 }OS_ATTRIBUTE_PACKED raid_path_error_info_elem_t;
459 #define PQI_ERROR_BUFFER_ELEMENT_LENGTH sizeof(raid_path_error_info_elem_t)
461 typedef enum error_data_present
463 DATA_PRESENT_NO_DATA = 0, /* !< No data present in Data buffer. */
464 DATA_PRESENT_RESPONSE_DATA = 1, /* !< Response data is present in Data buffer. */
465 DATA_PRESENT_SENSE_DATA = 2 /* !< Sense data is present in Data buffer. */
466 } error_data_present_t;
468 typedef struct aio_path_error_info_elem
470 uint8_t status; /* !< Byte 0. See SAM-5 specification "SCSI Status" codes Table 40. Defined in Storport.h */
471 uint8_t service_resp; /* !< Byte 1. SCSI Service Response. */
472 uint8_t data_pres; /* !< Byte 2. Bits [7:2] reserved. Bits [1:0] - 0=No data, 1=Response data, 2=Sense data. */
473 uint8_t reserved1; /* !< Byte 3. Reserved. */
474 uint32_t resd_count; /* !< Bytes 4-7. The residual data length in bytes. Need the original transfer size and if Status is OverRun or UnderRun. */
475 uint16_t data_len; /* !< Bytes 8-9. The amount of Sense data or Response data returned in Response/Sense Data buffer. */
476 uint16_t reserved2; /* !< Bytes 10. Reserved. */
477 uint8_t data[256]; /* !< Bytes 11-267. Response data buffer or Sense data buffer but not both. */
478 uint8_t padding[8]; /* !< Bytes 268-275. Padding to make AIO_PATH_ERROR_INFO_ELEMENT = RAID_PATH_ERROR_INFO_ELEMENT */
479 }OS_ATTRIBUTE_PACKED aio_path_error_info_elem_t;
481 struct init_base_struct {
482 uint32_t revision; /* revision of init structure */
483 uint32_t flags; /* reserved */
484 uint32_t err_buf_paddr_l; /* lower 32 bits of physical address of error buffer */
485 uint32_t err_buf_paddr_h; /* upper 32 bits of physical address of error buffer */
486 uint32_t err_buf_elem_len; /* length of each element in error buffer (in bytes) */
487 uint32_t err_buf_num_elem; /* number of elements in error buffer */
488 }OS_ATTRIBUTE_PACKED;
491 typedef struct ib_queue {
495 char *array_virt_addr;
496 dma_addr_t array_dma_addr;
498 uint32_t pi_register_offset;
499 uint32_t *pi_register_abs;
500 uint32_t *ci_virt_addr;
501 dma_addr_t ci_dma_addr;
503 boolean_t lockcreated;
504 char lockname[LOCKNAME_SIZE];
505 OS_PQILOCK_T lock OS_ATTRIBUTE_ALIGNED(8);
508 typedef struct ob_queue {
512 uint32_t intr_msg_num;
513 char *array_virt_addr;
514 dma_addr_t array_dma_addr;
516 uint32_t ci_register_offset;
517 uint32_t *ci_register_abs;
518 uint32_t *pi_virt_addr;
519 dma_addr_t pi_dma_addr;
523 typedef struct pqisrc_sg_desc{
529 typedef struct pqi_iu_layer_desc {
530 uint8_t ib_spanning_supported : 1;
533 uint16_t max_ib_iu_len;
534 uint8_t ob_spanning_supported : 1;
537 uint16_t max_ob_iu_len;
538 }OS_ATTRIBUTE_PACKED pqi_iu_layer_desc_t;
540 /* Response IU data */
541 typedef struct pqi_device_capabilities {
544 uint8_t ibq_arb_priority_support_bitmask;
548 uint8_t max_arb_burst : 3;
552 uint8_t iq_freeze : 1;
555 uint16_t max_iq_elements;
557 uint16_t max_iq_elem_len;
558 uint16_t min_iq_elem_len;
561 uint16_t max_oq_elements;
562 uint16_t intr_coales_time_granularity;
563 uint16_t max_oq_elem_len;
564 uint16_t min_oq_elem_len;
566 pqi_iu_layer_desc_t iu_layer_desc[32];
567 }OS_ATTRIBUTE_PACKED pqi_dev_cap_t;
571 typedef struct pqi_aio_req {
573 uint16_t response_queue_id;
574 uint8_t work_area[2];
579 uint8_t data_dir : 2;
581 uint8_t mem_type : 1;
583 uint8_t encrypt_enable : 1;
585 uint8_t task_attr : 3;
586 uint8_t cmd_prio : 4;
588 uint16_t encrypt_key_index;
589 uint32_t encrypt_twk_low;
590 uint32_t encrypt_twk_high;
598 }OS_ATTRIBUTE_PACKED pqi_aio_req_t;
600 typedef struct pqisrc_raid_request {
602 uint16_t response_queue_id; /* specifies the OQ where the response
603 IU is to be delivered */
604 uint8_t work_area[2]; /* reserved for driver use */
607 uint32_t buffer_length;
608 uint8_t lun_number[8];
609 uint16_t protocol_spec;
610 uint8_t data_direction : 2;
612 uint8_t reserved1 : 4;
614 uint16_t error_index;
616 uint8_t task_attribute : 3;
617 uint8_t command_priority : 4;
618 uint8_t reserved3 : 1;
619 uint8_t reserved4 : 2;
620 uint8_t additional_cdb_bytes_usage : 3;
621 uint8_t reserved5 : 3;
623 uint8_t additional_cdb_bytes[16];
624 sgt_t sg_descriptors[4];
625 }OS_ATTRIBUTE_PACKED pqisrc_raid_req_t;
627 typedef struct pqi_tmf_req {
630 uint8_t work_area[2];
635 uint16_t protocol_spec;
636 uint16_t obq_id_to_manage;
637 uint16_t req_id_to_manage;
641 }OS_ATTRIBUTE_PACKED pqi_tmf_req_t;
643 typedef struct pqi_tmf_resp {
646 uint8_t work_area[2];
649 uint8_t add_resp_info[3];
653 struct pqi_io_response {
656 uint8_t work_area[2];
658 uint16_t error_index;
660 }OS_ATTRIBUTE_PACKED;
662 struct pqi_enc_info {
663 uint16_t data_enc_key_index;
664 uint32_t encrypt_tweak_lower;
665 uint32_t encrypt_tweak_upper;
668 typedef struct pqi_scsi_device {
669 device_type_t devtype; /* as reported by INQUIRY commmand */
670 uint8_t device_type; /* as reported by
671 BMIC_IDENTIFY_PHYSICAL_DEVICE - only
672 valid for devtype = TYPE_DISK */
677 uint8_t scsi3addr[8];
679 uint8_t is_physical_device : 1;
680 uint8_t is_external_raid_device : 1;
681 uint8_t target_lun_valid : 1;
682 uint8_t expose_device : 1;
683 uint8_t no_uld_attach : 1;
684 uint8_t is_obdr_device : 1;
685 uint8_t aio_enabled : 1;
686 uint8_t device_gone : 1;
687 uint8_t new_device : 1;
688 uint8_t volume_offline : 1;
689 uint8_t vendor[8]; /* bytes 8-15 of inquiry data */
690 uint8_t model[16]; /* bytes 16-31 of inquiry data */
691 uint64_t sas_address;
693 uint16_t queue_depth; /* max. queue_depth for this device */
694 uint16_t advertised_queue_depth;
695 uint32_t ioaccel_handle;
696 uint8_t volume_status;
697 uint8_t active_path_index;
701 uint16_t phys_connector[8];
702 int offload_config; /* I/O accel RAID offload configured */
703 int offload_enabled; /* I/O accel RAID offload enabled */
704 int offload_enabled_pending;
705 int offload_to_mirror; /* Send next I/O accelerator RAID
706 offload request to mirror drive. */
707 struct raid_map *raid_map; /* I/O accelerator RAID map */
708 int reset_in_progress;
709 os_dev_info_t *dip; /*os specific scsi device information*/
713 struct sense_header_scsi { /* See SPC-3 section 4.5 */
714 uint8_t response_code; /* permit: 0x0, 0x70, 0x71, 0x72, 0x73 */
721 uint8_t additional_length; /* always 0 for fixed sense format */
722 }OS_ATTRIBUTE_PACKED;
724 typedef struct report_lun_header {
725 uint32_t list_length;
726 uint8_t extended_response;
728 }OS_ATTRIBUTE_PACKED reportlun_header_t;
730 typedef struct report_lun_ext_entry {
734 uint8_t device_flags;
735 uint8_t lun_count; /* number of LUNs in a multi-LUN device */
736 uint8_t redundant_paths;
737 uint32_t ioaccel_handle;
738 }OS_ATTRIBUTE_PACKED reportlun_ext_entry_t;
740 typedef struct report_lun_data_ext {
741 reportlun_header_t header;
742 reportlun_ext_entry_t lun_entries[1];
743 }OS_ATTRIBUTE_PACKED reportlun_data_ext_t;
745 typedef struct raidmap_data {
746 uint32_t ioaccel_handle;
749 }OS_ATTRIBUTE_PACKED raidmap_data_t;
751 typedef struct raid_map {
752 uint32_t structure_size; /* size of entire structure in bytes */
753 uint32_t volume_blk_size; /* bytes / block in the volume */
754 uint64_t volume_blk_cnt; /* logical blocks on the volume */
755 uint8_t phys_blk_shift; /* shift factor to convert between
756 units of logical blocks and physical
758 uint8_t parity_rotation_shift; /* shift factor to convert between units
759 of logical stripes and physical
761 uint16_t strip_size; /* blocks used on each disk / stripe */
762 uint64_t disk_starting_blk; /* first disk block used in volume */
763 uint64_t disk_blk_cnt; /* disk blocks used by volume / disk */
764 uint16_t data_disks_per_row; /* data disk entries / row in the map */
765 uint16_t metadata_disks_per_row; /* mirror/parity disk entries / row
767 uint16_t row_cnt; /* rows in each layout map */
768 uint16_t layout_map_count; /* layout maps (1 map per mirror/parity
771 uint16_t data_encryption_key_index;
772 uint8_t reserved[16];
773 raidmap_data_t dev_data[RAID_MAP_MAX_ENTRIES];
774 }OS_ATTRIBUTE_PACKED pqisrc_raid_map_t;
776 typedef struct bmic_ident_ctrl {
777 uint8_t conf_ld_count;
779 uint8_t fw_version[4];
780 uint8_t rom_fw_rev[4];
782 uint8_t reserved[140];
783 uint16_t extended_lun_count;
784 uint8_t reserved1[34];
785 uint16_t fw_build_number;
786 uint8_t reserved2[100];
788 uint8_t reserved3[32];
789 }OS_ATTRIBUTE_PACKED bmic_ident_ctrl_t;
791 typedef struct bmic_identify_physical_device {
792 uint8_t scsi_bus; /* SCSI Bus number on controller */
793 uint8_t scsi_id; /* SCSI ID on this bus */
794 uint16_t block_size; /* sector size in bytes */
795 uint32_t total_blocks; /* number for sectors on drive */
796 uint32_t reserved_blocks; /* controller reserved (RIS) */
797 uint8_t model[40]; /* Physical Drive Model */
798 uint8_t serial_number[40]; /* Drive Serial Number */
799 uint8_t firmware_revision[8]; /* drive firmware revision */
800 uint8_t scsi_inquiry_bits; /* inquiry byte 7 bits */
801 uint8_t compaq_drive_stamp; /* 0 means drive not stamped */
802 uint8_t last_failure_reason;
805 uint8_t scsi_lun; /* SCSI LUN for phys drive */
806 uint8_t yet_more_flags;
807 uint8_t even_more_flags;
808 uint32_t spi_speed_rules;
809 uint8_t phys_connector[2]; /* connector number on controller */
810 uint8_t phys_box_on_bus; /* phys enclosure this drive resides */
811 uint8_t phys_bay_in_box; /* phys drv bay this drive resides */
812 uint32_t rpm; /* drive rotational speed in RPM */
813 uint8_t device_type; /* type of drive */
814 uint8_t sata_version; /* only valid when device_type =
815 BMIC_DEVICE_TYPE_SATA */
816 uint64_t big_total_block_count;
817 uint64_t ris_starting_lba;
820 uint8_t controller_phy_map[32];
822 uint8_t phy_connected_dev_type[256];
823 uint8_t phy_to_drive_bay_num[256];
824 uint16_t phy_to_attached_dev_index[256];
827 uint16_t extra_physical_drive_flags;
828 uint8_t negotiated_link_rate[256];
829 uint8_t phy_to_phy_map[256];
830 uint8_t redundant_path_present_map;
831 uint8_t redundant_path_failure_map;
832 uint8_t active_path_number;
833 uint16_t alternate_paths_phys_connector[8];
834 uint8_t alternate_paths_phys_box_on_port[8];
835 uint8_t multi_lun_device_lun_count;
836 uint8_t minimum_good_fw_revision[8];
837 uint8_t unique_inquiry_bytes[20];
838 uint8_t current_temperature_degreesC;
839 uint8_t temperature_threshold_degreesC;
840 uint8_t max_temperature_degreesC;
841 uint8_t logical_blocks_per_phys_block_exp;
842 uint16_t current_queue_depth_limit;
843 uint8_t switch_name[10];
844 uint16_t switch_port;
845 uint8_t alternate_paths_switch_name[40];
846 uint8_t alternate_paths_switch_port[8];
847 uint16_t power_on_hours;
848 uint16_t percent_endurance_used;
849 uint8_t drive_authentication;
850 uint8_t smart_carrier_authentication;
851 uint8_t smart_carrier_app_fw_version;
852 uint8_t smart_carrier_bootloader_fw_version;
853 uint8_t encryption_key_name[64];
854 uint32_t misc_drive_flags;
856 uint8_t padding[112];
857 }OS_ATTRIBUTE_PACKED bmic_ident_physdev_t;
859 typedef struct pqisrc_bmic_flush_cache {
860 uint8_t disable_cache;
861 uint8_t power_action;
862 uint8_t ndu_flush_cache;
864 uint8_t reserved[28];
865 } OS_ATTRIBUTE_PACKED pqisrc_bmic_flush_cache_t;
867 /* for halt_event member of pqisrc_bmic_flush_cache_t */
868 enum pqisrc_flush_cache_event_type {
869 PQISRC_NONE_CACHE_FLUSH_ONLY = 0,
871 PQISRC_HIBERNATE = 2,
876 struct pqisrc_softstate;
877 struct request_container_block;
878 typedef void (*success_callback)(struct pqisrc_softstate *, struct request_container_block *);
879 typedef void (*error_callback)(struct pqisrc_softstate *, struct request_container_block *, uint16_t);
881 /* Request container block */
882 typedef struct request_container_block {
885 REQUEST_STATUS_T status;
887 sgt_t *sg_chain_virt;
888 dma_addr_t sg_chain_dma;
891 struct pqisrc_softstate *softs;
892 success_callback success_cmp_callback;
893 error_callback error_cmp_callback;
896 uint32_t bcount; /* buffer size in byte */
897 uint32_t ioaccel_handle;
898 boolean_t encrypt_enable;
899 struct pqi_enc_info enc_info;
901 void *cm_data; /* pointer to data in kernel space */
902 bus_dmamap_t cm_datamap;
905 sgt_t *sgt; /* sg table */
907 boolean_t req_pending;
910 typedef struct tid_pool {
911 int tid[PQI_MAX_PHYSICALS];
915 typedef struct pqisrc_softstate {
916 OS_SPECIFIC_T os_specific;
917 struct ioa_registers *ioa_reg;
918 struct pqi_registers *pqi_reg;
919 char *pci_mem_base_vaddr;
920 PCI_ACC_HANDLE_T pci_mem_handle;
921 struct pqi_cap pqi_cap;
922 struct pqi_pref_settings pref_settings;
924 uint16_t fw_build_number;
925 uint32_t card; /* index to aac_cards */
926 uint16_t vendid; /* vendor id */
927 uint16_t subvendid; /* sub vendor id */
928 uint16_t devid; /* device id */
929 uint16_t subsysid; /* sub system id */
930 controller_state_t ctlr_state;
931 struct dma_mem err_buf_dma_mem;
932 struct dma_mem admin_queue_dma_mem;
933 struct dma_mem op_ibq_dma_mem;
934 struct dma_mem op_obq_dma_mem;
935 struct dma_mem event_q_dma_mem;
936 struct dma_mem sg_dma_desc[PQISRC_MAX_OUTSTANDING_REQ];
937 ib_queue_t admin_ib_queue;
938 ob_queue_t admin_ob_queue;
940 ob_queue_t op_ob_q[PQISRC_MAX_SUPPORTED_OP_OB_Q - 1];/* 1 event queue */
941 ib_queue_t op_raid_ib_q[PQISRC_MAX_SUPPORTED_OP_RAID_IB_Q];
942 ib_queue_t op_aio_ib_q[PQISRC_MAX_SUPPORTED_OP_AIO_IB_Q];
943 uint32_t max_outstanding_io;
944 uint32_t max_io_for_scsi_ml;
945 uint32_t num_op_raid_ibq;
946 uint32_t num_op_aio_ibq;
948 uint32_t num_elem_per_op_ibq;
949 uint32_t num_elem_per_op_obq;
950 uint32_t ibq_elem_size;
951 uint32_t obq_elem_size;
952 pqi_dev_cap_t pqi_dev_cap;
953 uint16_t max_ib_iu_length_per_fw;
954 uint16_t max_ib_iu_length;
955 unsigned max_sg_per_iu;
956 uint8_t ib_spanning_supported : 1;
957 uint8_t ob_spanning_supported : 1;
958 pqi_event_config_t event_config;
959 struct pqi_event pending_events[PQI_NUM_SUPPORTED_EVENTS];
963 boolean_t share_opq_and_eventq;
965 #ifndef LOCKFREE_STACK
966 pqi_taglist_t taglist;
968 lockless_stack_t taglist;
969 #endif /* LOCKFREE_STACK */
970 boolean_t devlist_lockcreated;
971 OS_LOCK_T devlist_lock OS_ATTRIBUTE_ALIGNED(8);
972 char devlist_lock_name[LOCKNAME_SIZE];
973 pqi_scsi_dev_t *device_list[PQI_MAX_DEVICES][PQI_MAX_MULTILUN];
974 OS_SEMA_LOCK_T scan_lock;
975 uint8_t lun_count[PQI_MAX_DEVICES];
976 uint64_t target_sas_addr[PQI_MAX_EXT_TARGETS];
977 OS_ATOMIC64_T num_intrs;
978 uint64_t prev_num_intrs;
979 uint64_t prev_heartbeat_count;
980 uint64_t *heartbeat_counter_abs_addr;
981 uint64_t heartbeat_counter_off;
982 uint64_t num_heartbeats_requested;
987 boolean_t ctrl_online;
988 uint8_t pqi_reset_quiesce_allowed : 1;
989 boolean_t ctrl_in_pqi_mode;