sys/dev/smc/if_smc.c

   1 /*-
   2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
   3  *
   4  * Copyright (c) 2008 Benno Rice.  All rights reserved.
   5  *
   6  * Redistribution and use in source and binary forms, with or without
   7  * modification, are permitted provided that the following conditions
   8  * are met:
   9  * 1. Redistributions of source code must retain the above copyright
  10  *    notice, this list of conditions and the following disclaimer.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25  */
  26
  27 #include <sys/cdefs.h>
  28 __FBSDID("$FreeBSD$");
  29
  30 /*
  31  * Driver for SMSC LAN91C111, may work for older variants.
  32  */
  33
  34 #ifdef HAVE_KERNEL_OPTION_HEADERS
  35 #include "opt_device_polling.h"
  36 #endif
  37
  38 #include <sys/param.h>
  39 #include <sys/systm.h>
  40 #include <sys/errno.h>
  41 #include <sys/kernel.h>
  42 #include <sys/sockio.h>
  43 #include <sys/malloc.h>
  44 #include <sys/mbuf.h>
  45 #include <sys/queue.h>
  46 #include <sys/socket.h>
  47 #include <sys/syslog.h>
  48 #include <sys/taskqueue.h>
  49
  50 #include <sys/module.h>
  51 #include <sys/bus.h>
  52
  53 #include <machine/bus.h>
  54 #include <machine/resource.h>
  55 #include <sys/rman.h>
  56
  57 #include <net/ethernet.h>
  58 #include <net/if.h>
  59 #include <net/if_var.h>
  60 #include <net/if_arp.h>
  61 #include <net/if_dl.h>
  62 #include <net/if_types.h>
  63 #include <net/if_mib.h>
  64 #include <net/if_media.h>
  65
  66 #ifdef INET
  67 #include <netinet/in.h>
  68 #include <netinet/in_systm.h>
  69 #include <netinet/in_var.h>
  70 #include <netinet/ip.h>
  71 #endif
  72
  73 #include <net/bpf.h>
  74 #include <net/bpfdesc.h>
  75
  76 #include <dev/smc/if_smcreg.h>
  77 #include <dev/smc/if_smcvar.h>
  78
  79 #include <dev/mii/mii.h>
  80 #include <dev/mii/mii_bitbang.h>
  81 #include <dev/mii/miivar.h>
  82
  83 #include "miibus_if.h"
  84
  85 #define SMC_LOCK(sc)            mtx_lock(&(sc)->smc_mtx)
  86 #define SMC_UNLOCK(sc)          mtx_unlock(&(sc)->smc_mtx)
  87 #define SMC_ASSERT_LOCKED(sc)   mtx_assert(&(sc)->smc_mtx, MA_OWNED)
  88
  89 #define SMC_INTR_PRIORITY       0
  90 #define SMC_RX_PRIORITY         5
  91 #define SMC_TX_PRIORITY         10
  92
  93 devclass_t      smc_devclass;
  94
  95 static const char *smc_chip_ids[16] = {
  96         NULL, NULL, NULL,
  97         /* 3 */ "SMSC LAN91C90 or LAN91C92",
  98         /* 4 */ "SMSC LAN91C94",
  99         /* 5 */ "SMSC LAN91C95",
 100         /* 6 */ "SMSC LAN91C96",
 101         /* 7 */ "SMSC LAN91C100",
 102         /* 8 */ "SMSC LAN91C100FD",
 103         /* 9 */ "SMSC LAN91C110FD or LAN91C111FD",
 104         NULL, NULL, NULL,
 105         NULL, NULL, NULL
 106 };
 107
 108 static void     smc_init(void *);
 109 static void     smc_start(struct ifnet *);
 110 static void     smc_stop(struct smc_softc *);
 111 static int      smc_ioctl(struct ifnet *, u_long, caddr_t);
 112
 113 static void     smc_init_locked(struct smc_softc *);
 114 static void     smc_start_locked(struct ifnet *);
 115 static void     smc_reset(struct smc_softc *);
 116 static int      smc_mii_ifmedia_upd(struct ifnet *);
 117 static void     smc_mii_ifmedia_sts(struct ifnet *, struct ifmediareq *);
 118 static void     smc_mii_tick(void *);
 119 static void     smc_mii_mediachg(struct smc_softc *);
 120 static int      smc_mii_mediaioctl(struct smc_softc *, struct ifreq *, u_long);
 121
 122 static void     smc_task_intr(void *, int);
 123 static void     smc_task_rx(void *, int);
 124 static void     smc_task_tx(void *, int);
 125
 126 static driver_filter_t  smc_intr;
 127 static callout_func_t   smc_watchdog;
 128 #ifdef DEVICE_POLLING
 129 static poll_handler_t   smc_poll;
 130 #endif
 131
 132 /*
 133  * MII bit-bang glue
 134  */
 135 static uint32_t smc_mii_bitbang_read(device_t);
 136 static void smc_mii_bitbang_write(device_t, uint32_t);
 137
 138 static const struct mii_bitbang_ops smc_mii_bitbang_ops = {
 139         smc_mii_bitbang_read,
 140         smc_mii_bitbang_write,
 141         {
 142                 MGMT_MDO,       /* MII_BIT_MDO */
 143                 MGMT_MDI,       /* MII_BIT_MDI */
 144                 MGMT_MCLK,      /* MII_BIT_MDC */
 145                 MGMT_MDOE,      /* MII_BIT_DIR_HOST_PHY */
 146                 0,              /* MII_BIT_DIR_PHY_HOST */
 147         }
 148 };
 149
 150 static __inline void
 151 smc_select_bank(struct smc_softc *sc, uint16_t bank)
 152 {
 153
 154         bus_barrier(sc->smc_reg, BSR, 2,
 155             BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 156         bus_write_2(sc->smc_reg, BSR, bank & BSR_BANK_MASK);
 157         bus_barrier(sc->smc_reg, BSR, 2,
 158             BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 159 }
 160
 161 /* Never call this when not in bank 2. */
 162 static __inline void
 163 smc_mmu_wait(struct smc_softc *sc)
 164 {
 165
 166         KASSERT((bus_read_2(sc->smc_reg, BSR) &
 167             BSR_BANK_MASK) == 2, ("%s: smc_mmu_wait called when not in bank 2",
 168             device_get_nameunit(sc->smc_dev)));
 169         while (bus_read_2(sc->smc_reg, MMUCR) & MMUCR_BUSY)
 170                 ;
 171 }
 172
 173 static __inline uint8_t
 174 smc_read_1(struct smc_softc *sc, bus_size_t offset)
 175 {
 176
 177         return (bus_read_1(sc->smc_reg, offset));
 178 }
 179
 180 static __inline void
 181 smc_write_1(struct smc_softc *sc, bus_size_t offset, uint8_t val)
 182 {
 183
 184         bus_write_1(sc->smc_reg, offset, val);
 185 }
 186
 187 static __inline uint16_t
 188 smc_read_2(struct smc_softc *sc, bus_size_t offset)
 189 {
 190
 191         return (bus_read_2(sc->smc_reg, offset));
 192 }
 193
 194 static __inline void
 195 smc_write_2(struct smc_softc *sc, bus_size_t offset, uint16_t val)
 196 {
 197
 198         bus_write_2(sc->smc_reg, offset, val);
 199 }
 200
 201 static __inline void
 202 smc_read_multi_2(struct smc_softc *sc, bus_size_t offset, uint16_t *datap,
 203     bus_size_t count)
 204 {
 205
 206         bus_read_multi_2(sc->smc_reg, offset, datap, count);
 207 }
 208
 209 static __inline void
 210 smc_write_multi_2(struct smc_softc *sc, bus_size_t offset, uint16_t *datap,
 211     bus_size_t count)
 212 {
 213
 214         bus_write_multi_2(sc->smc_reg, offset, datap, count);
 215 }
 216
 217 static __inline void
 218 smc_barrier(struct smc_softc *sc, bus_size_t offset, bus_size_t length,
 219     int flags)
 220 {
 221
 222         bus_barrier(sc->smc_reg, offset, length, flags);
 223 }
 224
 225 int
 226 smc_probe(device_t dev)
 227 {
 228         int                     rid, type, error;
 229         uint16_t                val;
 230         struct smc_softc        *sc;
 231         struct resource         *reg;
 232
 233         sc = device_get_softc(dev);
 234         rid = 0;
 235         type = SYS_RES_IOPORT;
 236         error = 0;
 237
 238         if (sc->smc_usemem)
 239                 type = SYS_RES_MEMORY;
 240
 241         reg = bus_alloc_resource_anywhere(dev, type, &rid, 16, RF_ACTIVE);
 242         if (reg == NULL) {
 243                 if (bootverbose)
 244                         device_printf(dev,
 245                             "could not allocate I/O resource for probe\n");
 246                 return (ENXIO);
 247         }
 248
 249         /* Check for the identification value in the BSR. */
 250         val = bus_read_2(reg, BSR);
 251         if ((val & BSR_IDENTIFY_MASK) != BSR_IDENTIFY) {
 252                 if (bootverbose)
 253                         device_printf(dev, "identification value not in BSR\n");
 254                 error = ENXIO;
 255                 goto done;
 256         }
 257
 258         /*
 259          * Try switching banks and make sure we still get the identification
 260          * value.
 261          */
 262         bus_write_2(reg, BSR, 0);
 263         val = bus_read_2(reg, BSR);
 264         if ((val & BSR_IDENTIFY_MASK) != BSR_IDENTIFY) {
 265                 if (bootverbose)
 266                         device_printf(dev,
 267                             "identification value not in BSR after write\n");
 268                 error = ENXIO;
 269                 goto done;
 270         }
 271
 272 #if 0
 273         /* Check the BAR. */
 274         bus_write_2(reg, BSR, 1);
 275         val = bus_read_2(reg, BAR);
 276         val = BAR_ADDRESS(val);
 277         if (rman_get_start(reg) != val) {
 278                 if (bootverbose)
 279                         device_printf(dev, "BAR address %x does not match "
 280                             "I/O resource address %lx\n", val,
 281                             rman_get_start(reg));
 282                 error = ENXIO;
 283                 goto done;
 284         }
 285 #endif
 286
 287         /* Compare REV against known chip revisions. */
 288         bus_write_2(reg, BSR, 3);
 289         val = bus_read_2(reg, REV);
 290         val = (val & REV_CHIP_MASK) >> REV_CHIP_SHIFT;
 291         if (smc_chip_ids[val] == NULL) {
 292                 if (bootverbose)
 293                         device_printf(dev, "Unknown chip revision: %d\n", val);
 294                 error = ENXIO;
 295                 goto done;
 296         }
 297
 298         device_set_desc(dev, smc_chip_ids[val]);
 299
 300 done:
 301         bus_release_resource(dev, type, rid, reg);
 302         return (error);
 303 }
 304
 305 int
 306 smc_attach(device_t dev)
 307 {
 308         int                     type, error;
 309         uint16_t                val;
 310         u_char                  eaddr[ETHER_ADDR_LEN];
 311         struct smc_softc        *sc;
 312         struct ifnet            *ifp;
 313
 314         sc = device_get_softc(dev);
 315         error = 0;
 316
 317         sc->smc_dev = dev;
 318
 319         ifp = sc->smc_ifp = if_alloc(IFT_ETHER);
 320         if (ifp == NULL) {
 321                 error = ENOSPC;
 322                 goto done;
 323         }
 324
 325         mtx_init(&sc->smc_mtx, device_get_nameunit(dev), NULL, MTX_DEF);
 326
 327         /* Set up watchdog callout. */
 328         callout_init_mtx(&sc->smc_watchdog, &sc->smc_mtx, 0);
 329
 330         type = SYS_RES_IOPORT;
 331         if (sc->smc_usemem)
 332                 type = SYS_RES_MEMORY;
 333
 334         sc->smc_reg_rid = 0;
 335         sc->smc_reg = bus_alloc_resource_anywhere(dev, type, &sc->smc_reg_rid,
 336             16, RF_ACTIVE);
 337         if (sc->smc_reg == NULL) {
 338                 error = ENXIO;
 339                 goto done;
 340         }
 341
 342         sc->smc_irq = bus_alloc_resource_anywhere(dev, SYS_RES_IRQ,
 343             &sc->smc_irq_rid, 1, RF_ACTIVE | RF_SHAREABLE);
 344         if (sc->smc_irq == NULL) {
 345                 error = ENXIO;
 346                 goto done;
 347         }
 348
 349         SMC_LOCK(sc);
 350         smc_reset(sc);
 351         SMC_UNLOCK(sc);
 352
 353         smc_select_bank(sc, 3);
 354         val = smc_read_2(sc, REV);
 355         sc->smc_chip = (val & REV_CHIP_MASK) >> REV_CHIP_SHIFT;
 356         sc->smc_rev = (val * REV_REV_MASK) >> REV_REV_SHIFT;
 357         if (bootverbose)
 358                 device_printf(dev, "revision %x\n", sc->smc_rev);
 359
 360         callout_init_mtx(&sc->smc_mii_tick_ch, &sc->smc_mtx,
 361             CALLOUT_RETURNUNLOCKED);
 362         if (sc->smc_chip >= REV_CHIP_91110FD) {
 363                 (void)mii_attach(dev, &sc->smc_miibus, ifp,
 364                     smc_mii_ifmedia_upd, smc_mii_ifmedia_sts, BMSR_DEFCAPMASK,
 365                     MII_PHY_ANY, MII_OFFSET_ANY, 0);
 366                 if (sc->smc_miibus != NULL) {
 367                         sc->smc_mii_tick = smc_mii_tick;
 368                         sc->smc_mii_mediachg = smc_mii_mediachg;
 369                         sc->smc_mii_mediaioctl = smc_mii_mediaioctl;
 370                 }
 371         }
 372
 373         smc_select_bank(sc, 1);
 374         eaddr[0] = smc_read_1(sc, IAR0);
 375         eaddr[1] = smc_read_1(sc, IAR1);
 376         eaddr[2] = smc_read_1(sc, IAR2);
 377         eaddr[3] = smc_read_1(sc, IAR3);
 378         eaddr[4] = smc_read_1(sc, IAR4);
 379         eaddr[5] = smc_read_1(sc, IAR5);
 380
 381         if_initname(ifp, device_get_name(dev), device_get_unit(dev));
 382         ifp->if_softc = sc;
 383         ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
 384         ifp->if_init = smc_init;
 385         ifp->if_ioctl = smc_ioctl;
 386         ifp->if_start = smc_start;
 387         IFQ_SET_MAXLEN(&ifp->if_snd, ifqmaxlen);
 388         IFQ_SET_READY(&ifp->if_snd);
 389
 390         ifp->if_capabilities = ifp->if_capenable = 0;
 391
 392 #ifdef DEVICE_POLLING
 393         ifp->if_capabilities |= IFCAP_POLLING;
 394 #endif
 395
 396         ether_ifattach(ifp, eaddr);
 397
 398         /* Set up taskqueue */
 399         TASK_INIT(&sc->smc_intr, SMC_INTR_PRIORITY, smc_task_intr, ifp);
 400         NET_TASK_INIT(&sc->smc_rx, SMC_RX_PRIORITY, smc_task_rx, ifp);
 401         TASK_INIT(&sc->smc_tx, SMC_TX_PRIORITY, smc_task_tx, ifp);
 402         sc->smc_tq = taskqueue_create_fast("smc_taskq", M_NOWAIT,
 403             taskqueue_thread_enqueue, &sc->smc_tq);
 404         taskqueue_start_threads(&sc->smc_tq, 1, PI_NET, "%s taskq",
 405             device_get_nameunit(sc->smc_dev));
 406
 407         /* Mask all interrupts. */
 408         sc->smc_mask = 0;
 409         smc_write_1(sc, MSK, 0);
 410
 411         /* Wire up interrupt */
 412         error = bus_setup_intr(dev, sc->smc_irq,
 413             INTR_TYPE_NET|INTR_MPSAFE, smc_intr, NULL, sc, &sc->smc_ih);
 414         if (error != 0)
 415                 goto done;
 416
 417 done:
 418         if (error != 0)
 419                 smc_detach(dev);
 420         return (error);
 421 }
 422
 423 int
 424 smc_detach(device_t dev)
 425 {
 426         int                     type;
 427         struct smc_softc        *sc;
 428
 429         sc = device_get_softc(dev);
 430         SMC_LOCK(sc);
 431         smc_stop(sc);
 432         SMC_UNLOCK(sc);
 433
 434         if (sc->smc_ifp != NULL) {
 435                 ether_ifdetach(sc->smc_ifp);
 436         }
 437
 438         callout_drain(&sc->smc_watchdog);
 439         callout_drain(&sc->smc_mii_tick_ch);
 440
 441 #ifdef DEVICE_POLLING
 442         if (sc->smc_ifp->if_capenable & IFCAP_POLLING)
 443                 ether_poll_deregister(sc->smc_ifp);
 444 #endif
 445
 446         if (sc->smc_ih != NULL)
 447                 bus_teardown_intr(sc->smc_dev, sc->smc_irq, sc->smc_ih);
 448
 449         if (sc->smc_tq != NULL) {
 450                 taskqueue_drain(sc->smc_tq, &sc->smc_intr);
 451                 taskqueue_drain(sc->smc_tq, &sc->smc_rx);
 452                 taskqueue_drain(sc->smc_tq, &sc->smc_tx);
 453                 taskqueue_free(sc->smc_tq);
 454                 sc->smc_tq = NULL;
 455         }
 456
 457         if (sc->smc_ifp != NULL) {
 458                 if_free(sc->smc_ifp);
 459         }
 460
 461         if (sc->smc_miibus != NULL) {
 462                 device_delete_child(sc->smc_dev, sc->smc_miibus);
 463                 bus_generic_detach(sc->smc_dev);
 464         }
 465
 466         if (sc->smc_reg != NULL) {
 467                 type = SYS_RES_IOPORT;
 468                 if (sc->smc_usemem)
 469                         type = SYS_RES_MEMORY;
 470
 471                 bus_release_resource(sc->smc_dev, type, sc->smc_reg_rid,
 472                     sc->smc_reg);
 473         }
 474
 475         if (sc->smc_irq != NULL)
 476                 bus_release_resource(sc->smc_dev, SYS_RES_IRQ, sc->smc_irq_rid,
 477                    sc->smc_irq);
 478
 479         if (mtx_initialized(&sc->smc_mtx))
 480                 mtx_destroy(&sc->smc_mtx);
 481
 482         return (0);
 483 }
 484
 485 static device_method_t smc_methods[] = {
 486         /* Device interface */
 487         DEVMETHOD(device_attach,        smc_attach),
 488         DEVMETHOD(device_detach,        smc_detach),
 489
 490         /* MII interface */
 491         DEVMETHOD(miibus_readreg,       smc_miibus_readreg),
 492         DEVMETHOD(miibus_writereg,      smc_miibus_writereg),
 493         DEVMETHOD(miibus_statchg,       smc_miibus_statchg),
 494
 495         { 0, 0 }
 496 };
 497
 498 driver_t smc_driver = {
 499         "smc",
 500         smc_methods,
 501         sizeof(struct smc_softc),
 502 };
 503
 504 DRIVER_MODULE(miibus, smc, miibus_driver, miibus_devclass, 0, 0);
 505
 506 static void
 507 smc_start(struct ifnet *ifp)
 508 {
 509         struct smc_softc        *sc;
 510
 511         sc = ifp->if_softc;
 512         SMC_LOCK(sc);
 513         smc_start_locked(ifp);
 514         SMC_UNLOCK(sc);
 515 }
 516
 517 static void
 518 smc_start_locked(struct ifnet *ifp)
 519 {
 520         struct smc_softc        *sc;
 521         struct mbuf             *m;
 522         u_int                   len, npages, spin_count;
 523
 524         sc = ifp->if_softc;
 525         SMC_ASSERT_LOCKED(sc);
 526
 527         if (ifp->if_drv_flags & IFF_DRV_OACTIVE)
 528                 return;
 529         if (IFQ_IS_EMPTY(&ifp->if_snd))
 530                 return;
 531
 532         /*
 533          * Grab the next packet.  If it's too big, drop it.
 534          */
 535         IFQ_DRV_DEQUEUE(&ifp->if_snd, m);
 536         len = m_length(m, NULL);
 537         len += (len & 1);
 538         if (len > ETHER_MAX_LEN - ETHER_CRC_LEN) {
 539                 if_printf(ifp, "large packet discarded\n");
 540                 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
 541                 m_freem(m);
 542                 return; /* XXX readcheck? */
 543         }
 544
 545         /*
 546          * Flag that we're busy.
 547          */
 548         ifp->if_drv_flags |= IFF_DRV_OACTIVE;
 549         sc->smc_pending = m;
 550
 551         /*
 552          * Work out how many 256 byte "pages" we need.  We have to include the
 553          * control data for the packet in this calculation.
 554          */
 555         npages = (len + PKT_CTRL_DATA_LEN) >> 8;
 556         if (npages == 0)
 557                 npages = 1;
 558
 559         /*
 560          * Request memory.
 561          */
 562         smc_select_bank(sc, 2);
 563         smc_mmu_wait(sc);
 564         smc_write_2(sc, MMUCR, MMUCR_CMD_TX_ALLOC | npages);
 565
 566         /*
 567          * Spin briefly to see if the allocation succeeds.
 568          */
 569         spin_count = TX_ALLOC_WAIT_TIME;
 570         do {
 571                 if (smc_read_1(sc, IST) & ALLOC_INT) {
 572                         smc_write_1(sc, ACK, ALLOC_INT);
 573                         break;
 574                 }
 575         } while (--spin_count);
 576
 577         /*
 578          * If the allocation is taking too long, unmask the alloc interrupt
 579          * and wait.
 580          */
 581         if (spin_count == 0) {
 582                 sc->smc_mask |= ALLOC_INT;
 583                 if ((ifp->if_capenable & IFCAP_POLLING) == 0)
 584                         smc_write_1(sc, MSK, sc->smc_mask);
 585                 return;
 586         }
 587
 588         taskqueue_enqueue(sc->smc_tq, &sc->smc_tx);
 589 }
 590
 591 static void
 592 smc_task_tx(void *context, int pending)
 593 {
 594         struct ifnet            *ifp;
 595         struct smc_softc        *sc;
 596         struct mbuf             *m, *m0;
 597         u_int                   packet, len;
 598         int                     last_len;
 599         uint8_t                 *data;
 600
 601         (void)pending;
 602         ifp = (struct ifnet *)context;
 603         sc = ifp->if_softc;
 604
 605         SMC_LOCK(sc);
 606
 607         if (sc->smc_pending == NULL) {
 608                 SMC_UNLOCK(sc);
 609                 goto next_packet;
 610         }
 611
 612         m = m0 = sc->smc_pending;
 613         sc->smc_pending = NULL;
 614         smc_select_bank(sc, 2);
 615
 616         /*
 617          * Check the allocation result.
 618          */
 619         packet = smc_read_1(sc, ARR);
 620
 621         /*
 622          * If the allocation failed, requeue the packet and retry.
 623          */
 624         if (packet & ARR_FAILED) {
 625                 IFQ_DRV_PREPEND(&ifp->if_snd, m);
 626                 if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
 627                 ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
 628                 smc_start_locked(ifp);
 629                 SMC_UNLOCK(sc);
 630                 return;
 631         }
 632
 633         /*
 634          * Tell the device to write to our packet number.
 635          */
 636         smc_write_1(sc, PNR, packet);
 637         smc_write_2(sc, PTR, 0 | PTR_AUTO_INCR);
 638
 639         /*
 640          * Tell the device how long the packet is (including control data).
 641          */
 642         len = m_length(m, 0);
 643         len += PKT_CTRL_DATA_LEN;
 644         smc_write_2(sc, DATA0, 0);
 645         smc_write_2(sc, DATA0, len);
 646
 647         /*
 648          * Push the data out to the device.
 649          */
 650         data = NULL;
 651         last_len = 0;
 652         for (; m != NULL; m = m->m_next) {
 653                 data = mtod(m, uint8_t *);
 654                 smc_write_multi_2(sc, DATA0, (uint16_t *)data, m->m_len / 2);
 655                 last_len = m->m_len;
 656         }
 657
 658         /*
 659          * Push out the control byte and and the odd byte if needed.
 660          */
 661         if ((len & 1) != 0 && data != NULL)
 662                 smc_write_2(sc, DATA0, (CTRL_ODD << 8) | data[last_len - 1]);
 663         else
 664                 smc_write_2(sc, DATA0, 0);
 665
 666         /*
 667          * Unmask the TX empty interrupt.
 668          */
 669         sc->smc_mask |= TX_EMPTY_INT;
 670         if ((ifp->if_capenable & IFCAP_POLLING) == 0)
 671                 smc_write_1(sc, MSK, sc->smc_mask);
 672
 673         /*
 674          * Enqueue the packet.
 675          */
 676         smc_mmu_wait(sc);
 677         smc_write_2(sc, MMUCR, MMUCR_CMD_ENQUEUE);
 678         callout_reset(&sc->smc_watchdog, hz * 2, smc_watchdog, sc);
 679
 680         /*
 681          * Finish up.
 682          */
 683         if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
 684         ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
 685         SMC_UNLOCK(sc);
 686         BPF_MTAP(ifp, m0);
 687         m_freem(m0);
 688
 689 next_packet:
 690         /*
 691          * See if there's anything else to do.
 692          */
 693         smc_start(ifp);
 694 }
 695
 696 static void
 697 smc_task_rx(void *context, int pending)
 698 {
 699         u_int                   packet, status, len;
 700         uint8_t                 *data;
 701         struct ifnet            *ifp;
 702         struct smc_softc        *sc;
 703         struct mbuf             *m, *mhead, *mtail;
 704
 705         (void)pending;
 706         ifp = (struct ifnet *)context;
 707         sc = ifp->if_softc;
 708         mhead = mtail = NULL;
 709
 710         SMC_LOCK(sc);
 711
 712         packet = smc_read_1(sc, FIFO_RX);
 713         while ((packet & FIFO_EMPTY) == 0) {
 714                 /*
 715                  * Grab an mbuf and attach a cluster.
 716                  */
 717                 MGETHDR(m, M_NOWAIT, MT_DATA);
 718                 if (m == NULL) {
 719                         break;
 720                 }
 721                 if (!(MCLGET(m, M_NOWAIT))) {
 722                         m_freem(m);
 723                         break;
 724                 }
 725
 726                 /*
 727                  * Point to the start of the packet.
 728                  */
 729                 smc_select_bank(sc, 2);
 730                 smc_write_1(sc, PNR, packet);
 731                 smc_write_2(sc, PTR, 0 | PTR_READ | PTR_RCV | PTR_AUTO_INCR);
 732
 733                 /*
 734                  * Grab status and packet length.
 735                  */
 736                 status = smc_read_2(sc, DATA0);
 737                 len = smc_read_2(sc, DATA0) & RX_LEN_MASK;
 738                 len -= 6;
 739                 if (status & RX_ODDFRM)
 740                         len += 1;
 741
 742                 /*
 743                  * Check for errors.
 744                  */
 745                 if (status & (RX_TOOSHORT | RX_TOOLNG | RX_BADCRC | RX_ALGNERR)) {
 746                         smc_mmu_wait(sc);
 747                         smc_write_2(sc, MMUCR, MMUCR_CMD_RELEASE);
 748                         if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
 749                         m_freem(m);
 750                         break;
 751                 }
 752
 753                 /*
 754                  * Set the mbuf up the way we want it.
 755                  */
 756                 m->m_pkthdr.rcvif = ifp;
 757                 m->m_pkthdr.len = m->m_len = len + 2; /* XXX: Is this right? */
 758                 m_adj(m, ETHER_ALIGN);
 759
 760                 /*
 761                  * Pull the packet out of the device.  Make sure we're in the
 762                  * right bank first as things may have changed while we were
 763                  * allocating our mbuf.
 764                  */
 765                 smc_select_bank(sc, 2);
 766                 smc_write_1(sc, PNR, packet);
 767                 smc_write_2(sc, PTR, 4 | PTR_READ | PTR_RCV | PTR_AUTO_INCR);
 768                 data = mtod(m, uint8_t *);
 769                 smc_read_multi_2(sc, DATA0, (uint16_t *)data, len >> 1);
 770                 if (len & 1) {
 771                         data += len & ~1;
 772                         *data = smc_read_1(sc, DATA0);
 773                 }
 774
 775                 /*
 776                  * Tell the device we're done.
 777                  */
 778                 smc_mmu_wait(sc);
 779                 smc_write_2(sc, MMUCR, MMUCR_CMD_RELEASE);
 780                 if (m == NULL) {
 781                         break;
 782                 }
 783
 784                 if (mhead == NULL) {
 785                         mhead = mtail = m;
 786                         m->m_next = NULL;
 787                 } else {
 788                         mtail->m_next = m;
 789                         mtail = m;
 790                 }
 791                 packet = smc_read_1(sc, FIFO_RX);
 792         }
 793
 794         sc->smc_mask |= RCV_INT;
 795         if ((ifp->if_capenable & IFCAP_POLLING) == 0)
 796                 smc_write_1(sc, MSK, sc->smc_mask);
 797
 798         SMC_UNLOCK(sc);
 799
 800         while (mhead != NULL) {
 801                 m = mhead;
 802                 mhead = mhead->m_next;
 803                 m->m_next = NULL;
 804                 if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1);
 805                 (*ifp->if_input)(ifp, m);
 806         }
 807 }
 808
 809 #ifdef DEVICE_POLLING
 810 static int
 811 smc_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
 812 {
 813         struct smc_softc        *sc;
 814
 815         sc = ifp->if_softc;
 816
 817         SMC_LOCK(sc);
 818         if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
 819                 SMC_UNLOCK(sc);
 820                 return (0);
 821         }
 822         SMC_UNLOCK(sc);
 823
 824         if (cmd == POLL_AND_CHECK_STATUS)
 825                 taskqueue_enqueue(sc->smc_tq, &sc->smc_intr);
 826         return (0);
 827 }
 828 #endif
 829
 830 static int
 831 smc_intr(void *context)
 832 {
 833         struct smc_softc        *sc;
 834         uint32_t curbank;
 835
 836         sc = (struct smc_softc *)context;
 837
 838         /*
 839          * Save current bank and restore later in this function
 840          */
 841         curbank = (smc_read_2(sc, BSR) & BSR_BANK_MASK);
 842
 843         /*
 844          * Block interrupts in order to let smc_task_intr to kick in
 845          */
 846         smc_select_bank(sc, 2);
 847         smc_write_1(sc, MSK, 0);
 848
 849         /* Restore bank */
 850         smc_select_bank(sc, curbank);
 851
 852         taskqueue_enqueue(sc->smc_tq, &sc->smc_intr);
 853         return (FILTER_HANDLED);
 854 }
 855
 856 static void
 857 smc_task_intr(void *context, int pending)
 858 {
 859         struct smc_softc        *sc;
 860         struct ifnet            *ifp;
 861         u_int                   status, packet, counter, tcr;
 862
 863         (void)pending;
 864         ifp = (struct ifnet *)context;
 865         sc = ifp->if_softc;
 866
 867         SMC_LOCK(sc);
 868
 869         smc_select_bank(sc, 2);
 870
 871         /*
 872          * Find out what interrupts are flagged.
 873          */
 874         status = smc_read_1(sc, IST) & sc->smc_mask;
 875
 876         /*
 877          * Transmit error
 878          */
 879         if (status & TX_INT) {
 880                 /*
 881                  * Kill off the packet if there is one and re-enable transmit.
 882                  */
 883                 packet = smc_read_1(sc, FIFO_TX);
 884                 if ((packet & FIFO_EMPTY) == 0) {
 885                         callout_stop(&sc->smc_watchdog);
 886                         smc_select_bank(sc, 2);
 887                         smc_write_1(sc, PNR, packet);
 888                         smc_write_2(sc, PTR, 0 | PTR_READ |
 889                             PTR_AUTO_INCR);
 890                         smc_select_bank(sc, 0);
 891                         tcr = smc_read_2(sc, EPHSR);
 892 #if 0
 893                         if ((tcr & EPHSR_TX_SUC) == 0)
 894                                 device_printf(sc->smc_dev,
 895                                     "bad packet\n");
 896 #endif
 897                         smc_select_bank(sc, 2);
 898                         smc_mmu_wait(sc);
 899                         smc_write_2(sc, MMUCR, MMUCR_CMD_RELEASE_PKT);
 900
 901                         smc_select_bank(sc, 0);
 902                         tcr = smc_read_2(sc, TCR);
 903                         tcr |= TCR_TXENA | TCR_PAD_EN;
 904                         smc_write_2(sc, TCR, tcr);
 905                         smc_select_bank(sc, 2);
 906                         taskqueue_enqueue(sc->smc_tq, &sc->smc_tx);
 907                 }
 908
 909                 /*
 910                  * Ack the interrupt.
 911                  */
 912                 smc_write_1(sc, ACK, TX_INT);
 913         }
 914
 915         /*
 916          * Receive
 917          */
 918         if (status & RCV_INT) {
 919                 smc_write_1(sc, ACK, RCV_INT);
 920                 sc->smc_mask &= ~RCV_INT;
 921                 taskqueue_enqueue(sc->smc_tq, &sc->smc_rx);
 922         }
 923
 924         /*
 925          * Allocation
 926          */
 927         if (status & ALLOC_INT) {
 928                 smc_write_1(sc, ACK, ALLOC_INT);
 929                 sc->smc_mask &= ~ALLOC_INT;
 930                 taskqueue_enqueue(sc->smc_tq, &sc->smc_tx);
 931         }
 932
 933         /*
 934          * Receive overrun
 935          */
 936         if (status & RX_OVRN_INT) {
 937                 smc_write_1(sc, ACK, RX_OVRN_INT);
 938                 if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
 939         }
 940
 941         /*
 942          * Transmit empty
 943          */
 944         if (status & TX_EMPTY_INT) {
 945                 smc_write_1(sc, ACK, TX_EMPTY_INT);
 946                 sc->smc_mask &= ~TX_EMPTY_INT;
 947                 callout_stop(&sc->smc_watchdog);
 948
 949                 /*
 950                  * Update collision stats.
 951                  */
 952                 smc_select_bank(sc, 0);
 953                 counter = smc_read_2(sc, ECR);
 954                 smc_select_bank(sc, 2);
 955                 if_inc_counter(ifp, IFCOUNTER_COLLISIONS,
 956                     ((counter & ECR_SNGLCOL_MASK) >> ECR_SNGLCOL_SHIFT) +
 957                     ((counter & ECR_MULCOL_MASK) >> ECR_MULCOL_SHIFT));
 958
 959                 /*
 960                  * See if there are any packets to transmit.
 961                  */
 962                 taskqueue_enqueue(sc->smc_tq, &sc->smc_tx);
 963         }
 964
 965         /*
 966          * Update the interrupt mask.
 967          */
 968         smc_select_bank(sc, 2);
 969         if ((ifp->if_capenable & IFCAP_POLLING) == 0)
 970                 smc_write_1(sc, MSK, sc->smc_mask);
 971
 972         SMC_UNLOCK(sc);
 973 }
 974
 975 static uint32_t
 976 smc_mii_bitbang_read(device_t dev)
 977 {
 978         struct smc_softc        *sc;
 979         uint32_t                val;
 980
 981         sc = device_get_softc(dev);
 982
 983         SMC_ASSERT_LOCKED(sc);
 984         KASSERT((smc_read_2(sc, BSR) & BSR_BANK_MASK) == 3,
 985             ("%s: smc_mii_bitbang_read called with bank %d (!= 3)",
 986             device_get_nameunit(sc->smc_dev),
 987             smc_read_2(sc, BSR) & BSR_BANK_MASK));
 988
 989         val = smc_read_2(sc, MGMT);
 990         smc_barrier(sc, MGMT, 2,
 991             BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 992
 993         return (val);
 994 }
 995
 996 static void
 997 smc_mii_bitbang_write(device_t dev, uint32_t val)
 998 {
 999         struct smc_softc        *sc;
1000
1001         sc = device_get_softc(dev);
1002
1003         SMC_ASSERT_LOCKED(sc);
1004         KASSERT((smc_read_2(sc, BSR) & BSR_BANK_MASK) == 3,
1005             ("%s: smc_mii_bitbang_write called with bank %d (!= 3)",
1006             device_get_nameunit(sc->smc_dev),
1007             smc_read_2(sc, BSR) & BSR_BANK_MASK));
1008
1009         smc_write_2(sc, MGMT, val);
1010         smc_barrier(sc, MGMT, 2,
1011             BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
1012 }
1013
1014 int
1015 smc_miibus_readreg(device_t dev, int phy, int reg)
1016 {
1017         struct smc_softc        *sc;
1018         int                     val;
1019
1020         sc = device_get_softc(dev);
1021
1022         SMC_LOCK(sc);
1023
1024         smc_select_bank(sc, 3);
1025
1026         val = mii_bitbang_readreg(dev, &smc_mii_bitbang_ops, phy, reg);
1027
1028         SMC_UNLOCK(sc);
1029         return (val);
1030 }
1031
1032 int
1033 smc_miibus_writereg(device_t dev, int phy, int reg, int data)
1034 {
1035         struct smc_softc        *sc;
1036
1037         sc = device_get_softc(dev);
1038
1039         SMC_LOCK(sc);
1040
1041         smc_select_bank(sc, 3);
1042
1043         mii_bitbang_writereg(dev, &smc_mii_bitbang_ops, phy, reg, data);
1044
1045         SMC_UNLOCK(sc);
1046         return (0);
1047 }
1048
1049 void
1050 smc_miibus_statchg(device_t dev)
1051 {
1052         struct smc_softc        *sc;
1053         struct mii_data         *mii;
1054         uint16_t                tcr;
1055
1056         sc = device_get_softc(dev);
1057         mii = device_get_softc(sc->smc_miibus);
1058
1059         SMC_LOCK(sc);
1060
1061         smc_select_bank(sc, 0);
1062         tcr = smc_read_2(sc, TCR);
1063
1064         if ((IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) != 0)
1065                 tcr |= TCR_SWFDUP;
1066         else
1067                 tcr &= ~TCR_SWFDUP;
1068
1069         smc_write_2(sc, TCR, tcr);
1070
1071         SMC_UNLOCK(sc);
1072 }
1073
1074 static int
1075 smc_mii_ifmedia_upd(struct ifnet *ifp)
1076 {
1077         struct smc_softc        *sc;
1078         struct mii_data         *mii;
1079
1080         sc = ifp->if_softc;
1081         if (sc->smc_miibus == NULL)
1082                 return (ENXIO);
1083
1084         mii = device_get_softc(sc->smc_miibus);
1085         return (mii_mediachg(mii));
1086 }
1087
1088 static void
1089 smc_mii_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr)
1090 {
1091         struct smc_softc        *sc;
1092         struct mii_data         *mii;
1093
1094         sc = ifp->if_softc;
1095         if (sc->smc_miibus == NULL)
1096                 return;
1097
1098         mii = device_get_softc(sc->smc_miibus);
1099         mii_pollstat(mii);
1100         ifmr->ifm_active = mii->mii_media_active;
1101         ifmr->ifm_status = mii->mii_media_status;
1102 }
1103
1104 static void
1105 smc_mii_tick(void *context)
1106 {
1107         struct smc_softc        *sc;
1108
1109         sc = (struct smc_softc *)context;
1110
1111         if (sc->smc_miibus == NULL)
1112                 return;
1113
1114         SMC_UNLOCK(sc);
1115
1116         mii_tick(device_get_softc(sc->smc_miibus));
1117         callout_reset(&sc->smc_mii_tick_ch, hz, smc_mii_tick, sc);
1118 }
1119
1120 static void
1121 smc_mii_mediachg(struct smc_softc *sc)
1122 {
1123
1124         if (sc->smc_miibus == NULL)
1125                 return;
1126         mii_mediachg(device_get_softc(sc->smc_miibus));
1127 }
1128
1129 static int
1130 smc_mii_mediaioctl(struct smc_softc *sc, struct ifreq *ifr, u_long command)
1131 {
1132         struct mii_data *mii;
1133
1134         if (sc->smc_miibus == NULL)
1135                 return (EINVAL);
1136
1137         mii = device_get_softc(sc->smc_miibus);
1138         return (ifmedia_ioctl(sc->smc_ifp, ifr, &mii->mii_media, command));
1139 }
1140
1141 static void
1142 smc_reset(struct smc_softc *sc)
1143 {
1144         u_int   ctr;
1145
1146         SMC_ASSERT_LOCKED(sc);
1147
1148         smc_select_bank(sc, 2);
1149
1150         /*
1151          * Mask all interrupts.
1152          */
1153         smc_write_1(sc, MSK, 0);
1154
1155         /*
1156          * Tell the device to reset.
1157          */
1158         smc_select_bank(sc, 0);
1159         smc_write_2(sc, RCR, RCR_SOFT_RST);
1160
1161         /*
1162          * Set up the configuration register.
1163          */
1164         smc_select_bank(sc, 1);
1165         smc_write_2(sc, CR, CR_EPH_POWER_EN);
1166         DELAY(1);
1167
1168         /*
1169          * Turn off transmit and receive.
1170          */
1171         smc_select_bank(sc, 0);
1172         smc_write_2(sc, TCR, 0);
1173         smc_write_2(sc, RCR, 0);
1174
1175         /*
1176          * Set up the control register.
1177          */
1178         smc_select_bank(sc, 1);
1179         ctr = smc_read_2(sc, CTR);
1180         ctr |= CTR_LE_ENABLE | CTR_AUTO_RELEASE;
1181         smc_write_2(sc, CTR, ctr);
1182
1183         /*
1184          * Reset the MMU.
1185          */
1186         smc_select_bank(sc, 2);
1187         smc_mmu_wait(sc);
1188         smc_write_2(sc, MMUCR, MMUCR_CMD_MMU_RESET);
1189 }
1190
1191 static void
1192 smc_enable(struct smc_softc *sc)
1193 {
1194         struct ifnet            *ifp;
1195
1196         SMC_ASSERT_LOCKED(sc);
1197         ifp = sc->smc_ifp;
1198
1199         /*
1200          * Set up the receive/PHY control register.
1201          */
1202         smc_select_bank(sc, 0);
1203         smc_write_2(sc, RPCR, RPCR_ANEG | (RPCR_LED_LINK_ANY << RPCR_LSA_SHIFT)
1204             | (RPCR_LED_ACT_ANY << RPCR_LSB_SHIFT));
1205
1206         /*
1207          * Set up the transmit and receive control registers.
1208          */
1209         smc_write_2(sc, TCR, TCR_TXENA | TCR_PAD_EN);
1210         smc_write_2(sc, RCR, RCR_RXEN | RCR_STRIP_CRC);
1211
1212         /*
1213          * Set up the interrupt mask.
1214          */
1215         smc_select_bank(sc, 2);
1216         sc->smc_mask = EPH_INT | RX_OVRN_INT | RCV_INT | TX_INT;
1217         if ((ifp->if_capenable & IFCAP_POLLING) != 0)
1218                 smc_write_1(sc, MSK, sc->smc_mask);
1219 }
1220
1221 static void
1222 smc_stop(struct smc_softc *sc)
1223 {
1224
1225         SMC_ASSERT_LOCKED(sc);
1226
1227         /*
1228          * Turn off callouts.
1229          */
1230         callout_stop(&sc->smc_watchdog);
1231         callout_stop(&sc->smc_mii_tick_ch);
1232
1233         /*
1234          * Mask all interrupts.
1235          */
1236         smc_select_bank(sc, 2);
1237         sc->smc_mask = 0;
1238         smc_write_1(sc, MSK, 0);
1239 #ifdef DEVICE_POLLING
1240         ether_poll_deregister(sc->smc_ifp);
1241         sc->smc_ifp->if_capenable &= ~IFCAP_POLLING;
1242 #endif
1243
1244         /*
1245          * Disable transmit and receive.
1246          */
1247         smc_select_bank(sc, 0);
1248         smc_write_2(sc, TCR, 0);
1249         smc_write_2(sc, RCR, 0);
1250
1251         sc->smc_ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
1252 }
1253
1254 static void
1255 smc_watchdog(void *arg)
1256 {
1257         struct smc_softc        *sc;
1258
1259         sc = (struct smc_softc *)arg;
1260         device_printf(sc->smc_dev, "watchdog timeout\n");
1261         taskqueue_enqueue(sc->smc_tq, &sc->smc_intr);
1262 }
1263
1264 static void
1265 smc_init(void *context)
1266 {
1267         struct smc_softc        *sc;
1268
1269         sc = (struct smc_softc *)context;
1270         SMC_LOCK(sc);
1271         smc_init_locked(sc);
1272         SMC_UNLOCK(sc);
1273 }
1274
1275 static void
1276 smc_init_locked(struct smc_softc *sc)
1277 {
1278         struct ifnet    *ifp;
1279
1280         SMC_ASSERT_LOCKED(sc);
1281         ifp = sc->smc_ifp;
1282         if ((ifp->if_drv_flags & IFF_DRV_RUNNING) != 0)
1283                 return;
1284
1285         smc_reset(sc);
1286         smc_enable(sc);
1287
1288         ifp->if_drv_flags |= IFF_DRV_RUNNING;
1289         ifp->if_drv_flags &= ~IFF_DRV_OACTIVE;
1290
1291         smc_start_locked(ifp);
1292
1293         if (sc->smc_mii_tick != NULL)
1294                 callout_reset(&sc->smc_mii_tick_ch, hz, sc->smc_mii_tick, sc);
1295
1296 #ifdef DEVICE_POLLING
1297         SMC_UNLOCK(sc);
1298         ether_poll_register(smc_poll, ifp);
1299         SMC_LOCK(sc);
1300         ifp->if_capenable |= IFCAP_POLLING;
1301 #endif
1302 }
1303
1304 static int
1305 smc_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1306 {
1307         struct smc_softc        *sc;
1308         int                     error;
1309
1310         sc = ifp->if_softc;
1311         error = 0;
1312
1313         switch (cmd) {
1314         case SIOCSIFFLAGS:
1315                 if ((ifp->if_flags & IFF_UP) == 0 &&
1316                     (ifp->if_drv_flags & IFF_DRV_RUNNING) != 0) {
1317                         SMC_LOCK(sc);
1318                         smc_stop(sc);
1319                         SMC_UNLOCK(sc);
1320                 } else {
1321                         smc_init(sc);
1322                         if (sc->smc_mii_mediachg != NULL)
1323                                 sc->smc_mii_mediachg(sc);
1324                 }
1325                 break;
1326
1327         case SIOCADDMULTI:
1328         case SIOCDELMULTI:
1329                 /* XXX
1330                 SMC_LOCK(sc);
1331                 smc_setmcast(sc);
1332                 SMC_UNLOCK(sc);
1333                 */
1334                 error = EINVAL;
1335                 break;
1336
1337         case SIOCGIFMEDIA:
1338         case SIOCSIFMEDIA:
1339                 if (sc->smc_mii_mediaioctl == NULL) {
1340                         error = EINVAL;
1341                         break;
1342                 }
1343                 sc->smc_mii_mediaioctl(sc, (struct ifreq *)data, cmd);
1344                 break;
1345
1346         default:
1347                 error = ether_ioctl(ifp, cmd, data);
1348                 break;
1349         }
1350
1351         return (error);
1352 }