1 /* $NecBSD: dp83932subr.c,v 1.5.6.2 1999/10/09 05:47:23 kmatsuda Exp $ */
5 * Copyright (c) 1997, 1998, 1999
6 * Kouichi Matsuda. All rights reserved.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Kouichi Matsuda for
20 * 4. The name of the author may not be used to endorse or promote products
21 * derived from this software without specific prior written permission
23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
35 #include <sys/cdefs.h>
36 __FBSDID("$FreeBSD$");
38 * Routines of NEC PC-9801-83, 84, 103, 104, PC-9801N-25 and PC-9801N-J02, J02R
39 * Ethernet interface for NetBSD/pc98, ported by Kouichi Matsuda.
41 * These cards use National Semiconductor DP83934AVQB as Ethernet Controller
42 * and National Semiconductor NS46C46 as (64 * 16 bits) Microwire Serial EEPROM.
46 * Modified for FreeBSD(98) 4.0 from NetBSD/pc98 1.4.2 by Motomichi Matsuzaki.
49 #include <sys/param.h>
50 #include <sys/systm.h>
51 #include <sys/protosw.h>
52 #include <sys/socket.h>
54 #include <net/ethernet.h>
56 #include <net/if_arp.h>
57 #include <net/if_media.h>
60 #include <netinet/in.h>
61 #include <netinet/in_systm.h>
62 #include <netinet/in_var.h>
63 #include <netinet/ip.h>
64 #include <netinet/if_inarp.h>
69 #include <machine/bus.h>
71 #include <dev/snc/dp83932reg.h>
72 #include <dev/snc/dp83932var.h>
73 #include <dev/snc/if_sncreg.h>
74 #include <dev/snc/dp83932subr.h>
76 integrate u_int16_t snc_nec16_select_bank
77 (struct snc_softc *, u_int32_t, u_int32_t);
80 * Interface exists: make available by filling in network interface
81 * record. System will initialize the interface when it is ready
94 * Put the pup in reset mode (sncinit() will fix it later),
95 * stop the timer, disable all interrupts and clear any interrupts.
97 NIC_PUT(sc, SNCR_CR, CR_STP);
99 NIC_PUT(sc, SNCR_CR, CR_RST);
101 NIC_PUT(sc, SNCR_IMR, 0);
103 NIC_PUT(sc, SNCR_ISR, ISR_ALL);
107 * because the SONIC is basically 16bit device it 'concatenates'
108 * a higher buffer address to a 16 bit offset--this will cause wrap
109 * around problems near the end of 64k !!
113 for (i = 0; i < NRRA; i++) {
114 sc->v_rra[i] = SONIC_GETDMA(p);
115 p += RXRSRC_SIZE(sc);
117 sc->v_rea = SONIC_GETDMA(p);
121 sc->v_cda = SONIC_GETDMA(p);
126 for (i = 0; i < NTDA; i++) {
127 struct mtd *mtdp = &sc->mtda[i];
128 mtdp->mtd_vtxp = SONIC_GETDMA(p);
134 if ((p - pp) > NBPG) {
135 device_printf (sc->sc_dev, "sizeof RRA (%ld) + CDA (%ld) +"
136 "TDA (%ld) > NBPG (%d). Punt!\n",
137 (ulong)sc->v_cda - (ulong)sc->v_rra[0],
138 (ulong)sc->mtda[0].mtd_vtxp - (ulong)sc->v_cda,
139 (ulong)p - (ulong)sc->mtda[0].mtd_vtxp,
147 sc->sc_nrda = NBPG / RXPKT_SIZE(sc);
148 sc->v_rda = SONIC_GETDMA(p);
152 for (i = 0; i < NRBA; i++) {
159 for (i = 0; i < NTDA; i++) {
160 struct mtd *mtdp = &sc->mtda[i];
162 mtdp->mtd_vbuf = SONIC_GETDMA(p);
177 * miscellaneous NEC/SONIC detect functions.
181 * check if a specified irq is acceptable.
184 snc_nec16_validate_irq(irq)
187 const u_int8_t encoded_irq[16] = {
188 -1, -1, -1, 0, -1, 1, 2, -1, -1, 3, 4, -1, 5, 6, -1, -1
191 return encoded_irq[irq];
195 * specify irq to board.
198 snc_nec16_register_irq(sc, irq)
199 struct snc_softc *sc;
202 bus_space_tag_t iot = sc->sc_iot;
203 bus_space_handle_t ioh = sc->sc_ioh;
204 u_int8_t encoded_irq;
206 encoded_irq = snc_nec16_validate_irq(irq);
207 if (encoded_irq == (u_int8_t) -1) {
208 printf("snc_nec16_register_irq: unsupported irq (%d)\n", irq);
212 /* select SNECR_IRQSEL register */
213 bus_space_write_1(iot, ioh, SNEC_ADDR, SNECR_IRQSEL);
214 /* write encoded irq value */
215 bus_space_write_1(iot, ioh, SNEC_CTRLB, encoded_irq);
221 * check if a specified memory base address is acceptable.
224 snc_nec16_validate_mem(maddr)
228 /* Check on Normal mode with max range, only */
229 if ((maddr & ~0x1E000) != 0xC0000) {
230 printf("snc_nec16_validate_mem: "
231 "unsupported window base (0x%x)\n", maddr);
239 * specify memory base address to board and map to first bank.
242 snc_nec16_register_mem(sc, maddr)
243 struct snc_softc *sc;
246 bus_space_tag_t iot = sc->sc_iot;
247 bus_space_handle_t ioh = sc->sc_ioh;
249 if (snc_nec16_validate_mem(maddr) == 0)
252 /* select SNECR_MEMSEL register */
253 bus_space_write_1(iot, ioh, SNEC_ADDR, SNECR_MEMSEL);
254 /* write encoded memory base select value */
255 bus_space_write_1(iot, ioh, SNEC_CTRLB, SNECR_MEMSEL_PHYS2EN(maddr));
258 * set current bank to 0 (bottom) and map
260 /* select SNECR_MEMBS register */
261 bus_space_write_1(iot, ioh, SNEC_ADDR, SNECR_MEMBS);
262 /* select new bank */
263 bus_space_write_1(iot, ioh, SNEC_CTRLB,
264 SNECR_MEMBS_B2EB(0) | SNECR_MEMBS_BSEN);
265 /* set current bank to 0 */
272 snc_nec16_check_memory(iot, ioh, memt, memh)
274 bus_space_handle_t ioh;
275 bus_space_tag_t memt;
276 bus_space_handle_t memh;
282 for (i = 0; i < SNEC_NBANK; i++) {
283 /* select new bank */
284 bus_space_write_1(iot, ioh, SNEC_ADDR, SNECR_MEMBS);
285 bus_space_write_1(iot, ioh, SNEC_CTRLB,
286 SNECR_MEMBS_B2EB(i) | SNECR_MEMBS_BSEN);
288 /* write test pattern */
289 for (j = 0; j < SNEC_NMEMS / 2; j++) {
290 bus_space_write_2(memt, memh, j * 2, val + j);
296 for (i = 0; i < SNEC_NBANK; i++) {
297 /* select new bank */
298 bus_space_write_1(iot, ioh, SNEC_ADDR, SNECR_MEMBS);
299 bus_space_write_1(iot, ioh, SNEC_CTRLB,
300 SNECR_MEMBS_B2EB(i) | SNECR_MEMBS_BSEN);
302 /* read test pattern */
303 for (j = 0; j < SNEC_NMEMS / 2; j++) {
304 if (bus_space_read_2(memt, memh, j * 2) != val + j)
308 if (j < SNEC_NMEMS / 2) {
309 printf("snc_nec16_check_memory: "
310 "memory check failed at 0x%04x%04x"
311 "val 0x%04x != expected 0x%04x\n", i, j,
312 bus_space_read_2(memt, memh, j * 2),
320 for (i = 0; i < SNEC_NBANK; i++) {
321 /* select new bank */
322 bus_space_write_1(iot, ioh, SNEC_ADDR, SNECR_MEMBS);
323 bus_space_write_1(iot, ioh, SNEC_CTRLB,
324 SNECR_MEMBS_B2EB(i) | SNECR_MEMBS_BSEN);
326 bus_space_set_region_4(memt, memh, 0, 0, SNEC_NMEMS >> 2);
329 /* again read test if these are 0 */
330 for (i = 0; i < SNEC_NBANK; i++) {
331 /* select new bank */
332 bus_space_write_1(iot, ioh, SNEC_ADDR, SNECR_MEMBS);
333 bus_space_write_1(iot, ioh, SNEC_CTRLB,
334 SNECR_MEMBS_B2EB(i) | SNECR_MEMBS_BSEN);
336 /* check if cleared */
337 for (j = 0; j < SNEC_NMEMS; j += 2) {
338 if (bus_space_read_2(memt, memh, j) != 0)
342 if (j != SNEC_NMEMS) {
343 printf("snc_nec16_check_memory: "
344 "memory zero clear failed at 0x%04x%04x\n", i, j);
353 snc_nec16_detectsubr(iot, ioh, memt, memh, irq, maddr, type)
355 bus_space_handle_t ioh;
356 bus_space_tag_t memt;
357 bus_space_handle_t memh;
366 if (snc_nec16_validate_irq(irq) == (u_int8_t) -1)
368 /* XXX: maddr already checked */
369 if (snc_nec16_validate_mem(maddr) == 0)
372 bus_space_write_1(iot, ioh, SNEC_ADDR, SNECR_IDENT);
373 ident = bus_space_read_1(iot, ioh, SNEC_CTRLB);
374 if (ident == 0xff || ident == 0x00) {
380 case SNEC_TYPE_LEGACY:
381 rv = (ident == SNECR_IDENT_LEGACY_CBUS);
384 rv = ((ident == SNECR_IDENT_PNP_CBUS) ||
385 (ident == SNECR_IDENT_PNP_PCMCIABUS));
392 printf("snc_nec16_detectsubr: parent bus mismatch\n");
396 /* select SONIC register SNCR_CR */
397 bus_space_write_1(iot, ioh, SNEC_ADDR, SNCR_CR);
398 bus_space_write_2(iot, ioh, SNEC_CTRL, CR_RXDIS | CR_STP | CR_RST);
401 cr = bus_space_read_2(iot, ioh, SNEC_CTRL);
402 if (cr != (CR_RXDIS | CR_STP | CR_RST)) {
404 printf("snc_nec16_detectsubr: card reset failed, cr = 0x%04x\n",
410 if (snc_nec16_check_memory(iot, ioh, memt, memh) == 0)
417 #define SNC_VENDOR_NEC 0x00004c
418 #define SNC_NEC_SERIES_LEGACY_CBUS 0xa5
419 #define SNC_NEC_SERIES_PNP_PCMCIA 0xd5
420 #define SNC_NEC_SERIES_PNP_PCMCIA2 0x6d /* XXX */
421 #define SNC_NEC_SERIES_PNP_CBUS 0x0d
422 #define SNC_NEC_SERIES_PNP_CBUS2 0x3d
425 snc_nec16_detect_type(myea)
428 u_int32_t vendor = (myea[0] << 16) | (myea[1] << 8) | myea[2];
429 u_int8_t series = myea[3];
430 u_int8_t type = myea[4] & 0x80;
436 case SNC_NEC_SERIES_LEGACY_CBUS:
438 typestr = "NEC PC-9801-84";
440 typestr = "NEC PC-9801-83";
442 case SNC_NEC_SERIES_PNP_CBUS:
443 case SNC_NEC_SERIES_PNP_CBUS2:
445 typestr = "NEC PC-9801-104";
447 typestr = "NEC PC-9801-103";
449 case SNC_NEC_SERIES_PNP_PCMCIA:
450 case SNC_NEC_SERIES_PNP_PCMCIA2:
453 typestr = "NEC PC-9801N-J02R";
455 typestr = "NEC PC-9801N-J02";
458 typestr = "NEC unknown (PC-9801N-25?)";
463 typestr = "unknown (3rd vendor?)";
471 snc_nec16_get_enaddr(iot, ioh, myea)
473 bus_space_handle_t ioh;
476 u_int8_t eeprom[SNEC_EEPROM_SIZE];
477 u_int8_t rom_sum, sum = 0x00;
480 snc_nec16_read_eeprom(iot, ioh, eeprom);
482 for (i = SNEC_EEPROM_KEY0; i < SNEC_EEPROM_CKSUM; i++) {
483 sum = sum ^ eeprom[i];
486 rom_sum = eeprom[SNEC_EEPROM_CKSUM];
488 if (sum != rom_sum) {
489 printf("snc_nec16_get_enaddr: "
490 "checksum mismatch; calculated %02x != read %02x",
495 for (i = 0; i < ETHER_ADDR_LEN; i++)
496 myea[i] = eeprom[SNEC_EEPROM_SA0 + i];
502 * read from NEC/SONIC NIC register.
505 snc_nec16_nic_get(sc, reg)
506 struct snc_softc *sc;
511 /* select SONIC register */
512 bus_space_write_1(sc->sc_iot, sc->sc_ioh, SNEC_ADDR, reg);
513 val = bus_space_read_2(sc->sc_iot, sc->sc_ioh, SNEC_CTRL);
519 * write to NEC/SONIC NIC register.
522 snc_nec16_nic_put(sc, reg, val)
523 struct snc_softc *sc;
528 /* select SONIC register */
529 bus_space_write_1(sc->sc_iot, sc->sc_ioh, SNEC_ADDR, reg);
530 bus_space_write_2(sc->sc_iot, sc->sc_ioh, SNEC_CTRL, val);
535 * select memory bank and map
536 * where exists specified (internal buffer memory) offset.
539 snc_nec16_select_bank(sc, base, offset)
540 struct snc_softc *sc;
544 bus_space_tag_t iot = sc->sc_iot;
545 bus_space_handle_t ioh = sc->sc_ioh;
549 /* bitmode is fixed to 16 bit. */
550 bank = (base + offset * 2) >> 13;
551 noffset = (base + offset * 2) & (SNEC_NMEMS - 1);
555 device_printf(sc->sc_dev, "noffset is odd (0x%04x)\n",
558 #endif /* SNCDEBUG */
560 if (sc->curbank != bank) {
561 /* select SNECR_MEMBS register */
562 bus_space_write_1(iot, ioh, SNEC_ADDR, SNECR_MEMBS);
563 /* select new bank */
564 bus_space_write_1(iot, ioh, SNEC_CTRLB,
565 SNECR_MEMBS_B2EB(bank) | SNECR_MEMBS_BSEN);
566 /* update current bank */
574 * write to SONIC descriptors.
577 snc_nec16_writetodesc(sc, base, offset, val)
578 struct snc_softc *sc;
583 bus_space_tag_t memt = sc->sc_memt;
584 bus_space_handle_t memh = sc->sc_memh;
587 noffset = snc_nec16_select_bank(sc, base, offset);
589 bus_space_write_2(memt, memh, noffset, val);
593 * read from SONIC descriptors.
596 snc_nec16_readfromdesc(sc, base, offset)
597 struct snc_softc *sc;
601 bus_space_tag_t memt = sc->sc_memt;
602 bus_space_handle_t memh = sc->sc_memh;
605 noffset = snc_nec16_select_bank(sc, base, offset);
607 return bus_space_read_2(memt, memh, noffset);
611 * read from SONIC data buffer.
614 snc_nec16_copyfrombuf(sc, dst, offset, size)
615 struct snc_softc *sc;
620 bus_space_tag_t memt = sc->sc_memt;
621 bus_space_handle_t memh = sc->sc_memh;
623 u_int8_t* bptr = dst;
625 noffset = snc_nec16_select_bank(sc, offset, 0);
627 /* XXX: should check if offset + size < 0x2000. */
629 bus_space_barrier(memt, memh, noffset, size,
630 BUS_SPACE_BARRIER_READ);
634 size_t asize = 4 - (noffset & 3);
636 bus_space_read_region_1(memt, memh, noffset,
642 bus_space_read_region_4(memt, memh, noffset,
643 (u_int32_t *) bptr, size >> 2);
645 noffset += size & ~3;
649 bus_space_read_region_1(memt, memh, noffset, bptr, size);
653 * write to SONIC data buffer.
656 snc_nec16_copytobuf(sc, src, offset, size)
657 struct snc_softc *sc;
662 bus_space_tag_t memt = sc->sc_memt;
663 bus_space_handle_t memh = sc->sc_memh;
664 u_int16_t noffset, onoffset;
666 u_int8_t* bptr = src;
668 noffset = snc_nec16_select_bank(sc, offset, 0);
671 /* XXX: should check if offset + size < 0x2000. */
675 size_t asize = 4 - (noffset & 3);
677 bus_space_write_region_1(memt, memh, noffset,
683 bus_space_write_region_4(memt, memh, noffset,
684 (u_int32_t *)bptr, size >> 2);
686 noffset += size & ~3;
690 bus_space_write_region_1(memt, memh, noffset, bptr, size);
692 bus_space_barrier(memt, memh, onoffset, osize,
693 BUS_SPACE_BARRIER_WRITE);
697 * write (fill) 0 to SONIC data buffer.
700 snc_nec16_zerobuf(sc, offset, size)
701 struct snc_softc *sc;
705 bus_space_tag_t memt = sc->sc_memt;
706 bus_space_handle_t memh = sc->sc_memh;
707 u_int16_t noffset, onoffset;
710 noffset = snc_nec16_select_bank(sc, offset, 0);
713 /* XXX: should check if offset + size < 0x2000. */
717 size_t asize = 4 - (noffset & 3);
719 bus_space_set_region_1(memt, memh, noffset, 0, asize);
723 bus_space_set_region_4(memt, memh, noffset, 0, size >> 2);
724 noffset += size & ~3;
728 bus_space_set_region_1(memt, memh, noffset, 0, size);
730 bus_space_barrier(memt, memh, onoffset, osize,
731 BUS_SPACE_BARRIER_WRITE);
736 * Routines to read bytes sequentially from EEPROM through NEC PC-9801-83,
737 * 84, 103, 104, PC-9801N-25 and PC-9801N-J02, J02R for NetBSD/pc98.
738 * Ported by Kouichi Matsuda.
740 * This algorism is generic to read data sequentially from 4-Wire
741 * Microwire Serial EEPROM.
744 #define SNEC_EEP_DELAY 1000
747 snc_nec16_read_eeprom(iot, ioh, data)
749 bus_space_handle_t ioh;
752 u_int8_t n, val, bit;
754 /* Read bytes from EEPROM; two bytes per an iteration. */
755 for (n = 0; n < SNEC_EEPROM_SIZE / 2; n++) {
756 /* select SNECR_EEP */
757 bus_space_write_1(iot, ioh, SNEC_ADDR, SNECR_EEP);
759 bus_space_write_1(iot, ioh, SNEC_CTRLB, 0x00);
760 delay(SNEC_EEP_DELAY);
762 /* Start EEPROM access. */
763 bus_space_write_1(iot, ioh, SNEC_CTRLB, SNECR_EEP_CS);
764 delay(SNEC_EEP_DELAY);
766 bus_space_write_1(iot, ioh, SNEC_CTRLB,
767 SNECR_EEP_CS | SNECR_EEP_SK);
768 delay(SNEC_EEP_DELAY);
770 bus_space_write_1(iot, ioh, SNEC_CTRLB,
771 SNECR_EEP_CS | SNECR_EEP_DI);
772 delay(SNEC_EEP_DELAY);
774 bus_space_write_1(iot, ioh, SNEC_CTRLB,
775 SNECR_EEP_CS | SNECR_EEP_SK | SNECR_EEP_DI);
776 delay(SNEC_EEP_DELAY);
778 bus_space_write_1(iot, ioh, SNEC_CTRLB,
779 SNECR_EEP_CS | SNECR_EEP_DI);
780 delay(SNEC_EEP_DELAY);
782 bus_space_write_1(iot, ioh, SNEC_CTRLB,
783 SNECR_EEP_CS | SNECR_EEP_SK | SNECR_EEP_DI);
784 delay(SNEC_EEP_DELAY);
786 bus_space_write_1(iot, ioh, SNEC_CTRLB, SNECR_EEP_CS);
787 delay(SNEC_EEP_DELAY);
789 bus_space_write_1(iot, ioh, SNEC_CTRLB,
790 SNECR_EEP_CS | SNECR_EEP_SK);
791 delay(SNEC_EEP_DELAY);
793 /* Pass the iteration count to the chip. */
794 for (bit = 0x20; bit != 0x00; bit >>= 1) {
795 bus_space_write_1(iot, ioh, SNEC_CTRLB, SNECR_EEP_CS |
796 ((n & bit) ? SNECR_EEP_DI : 0x00));
797 delay(SNEC_EEP_DELAY);
799 bus_space_write_1(iot, ioh, SNEC_CTRLB,
800 SNECR_EEP_CS | SNECR_EEP_SK |
801 ((n & bit) ? SNECR_EEP_DI : 0x00));
802 delay(SNEC_EEP_DELAY);
805 bus_space_write_1(iot, ioh, SNEC_CTRLB, SNECR_EEP_CS);
806 (void) bus_space_read_1(iot, ioh, SNEC_CTRLB); /* ACK */
807 delay(SNEC_EEP_DELAY);
811 for (bit = 0x80; bit != 0x00; bit >>= 1) {
812 bus_space_write_1(iot, ioh, SNEC_CTRLB,
813 SNECR_EEP_CS | SNECR_EEP_SK);
814 delay(SNEC_EEP_DELAY);
816 bus_space_write_1(iot, ioh, SNEC_CTRLB, SNECR_EEP_CS);
818 if (bus_space_read_1(iot, ioh, SNEC_CTRLB) & SNECR_EEP_DO)
823 /* Read one more byte. */
825 for (bit = 0x80; bit != 0x00; bit >>= 1) {
826 bus_space_write_1(iot, ioh, SNEC_CTRLB,
827 SNECR_EEP_CS | SNECR_EEP_SK);
828 delay(SNEC_EEP_DELAY);
830 bus_space_write_1(iot, ioh, SNEC_CTRLB, SNECR_EEP_CS);
832 if (bus_space_read_1(iot, ioh, SNEC_CTRLB) & SNECR_EEP_DO)
837 bus_space_write_1(iot, ioh, SNEC_CTRLB, 0x00);
838 delay(SNEC_EEP_DELAY);
842 /* Report what we got. */
843 data -= SNEC_EEPROM_SIZE;
844 log(LOG_INFO, "%s: EEPROM:"
845 " %02x%02x%02x%02x %02x%02x%02x%02x -"
846 " %02x%02x%02x%02x %02x%02x%02x%02x -"
847 " %02x%02x%02x%02x %02x%02x%02x%02x -"
848 " %02x%02x%02x%02x %02x%02x%02x%02x\n",
849 "snc_nec16_read_eeprom",
850 data[ 0], data[ 1], data[ 2], data[ 3],
851 data[ 4], data[ 5], data[ 6], data[ 7],
852 data[ 8], data[ 9], data[10], data[11],
853 data[12], data[13], data[14], data[15],
854 data[16], data[17], data[18], data[19],
855 data[20], data[21], data[22], data[23],
856 data[24], data[25], data[26], data[27],
857 data[28], data[29], data[30], data[31]);
863 snc_nec16_dump_reg(iot, ioh)
865 bus_space_handle_t ioh;
870 printf("SONIC registers (word):");
871 for (n = 0; n < SNC_NREGS; n++) {
872 /* select required SONIC register */
873 bus_space_write_1(iot, ioh, SNEC_ADDR, n);
875 val = bus_space_read_2(iot, ioh, SNEC_CTRL);
877 printf("\n%04x ", val);
879 printf("%04x ", val);
883 printf("NEC/SONIC registers (byte):\n");
884 for (n = SNECR_MEMBS; n <= SNECR_IDENT; n += 2) {
885 /* select required SONIC register */
886 bus_space_write_1(iot, ioh, SNEC_ADDR, n);
888 val = (u_int16_t) bus_space_read_1(iot, ioh, SNEC_CTRLB);
889 printf("%04x ", val);
894 #endif /* SNCDEBUG */