2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
4 * Copyright 2008 by Marco Trillo. All rights reserved.
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * Apple DAVbus audio controller.
34 #ifndef _SOUND_DAVBUS_H
35 #define _SOUND_DAVBUS_H
37 /* DAVbus controller registers. */
38 #define DAVBUS_SOUND_CTRL 0x00
39 #define DAVBUS_CODEC_CTRL 0x10
40 #define DAVBUS_CODEC_STATUS 0x20
41 #define DAVBUS_CLIP_COUNT 0x30
42 #define DAVBUS_BYTE_SWAP 0x40
45 * The DAVbus uses a serial bus time multiplexed in four subframes,
46 * but the controller itself uses subframe 0 to communicate with the codec.
47 * In some machines, the other subframes may be used by external devices
48 * thorugh the DAV interface.
50 /* DAVBUS_SOUND_CTRL bit definitions. */
51 #define DAVBUS_INPUT_SUBFRAME0 0x00000001
52 #define DAVBUS_INPUT_SUBFRAME1 0x00000002
53 #define DAVBUS_INPUT_SUBFRAME2 0x00000004
54 #define DAVBUS_INPUT_SUBFRAME3 0x00000008
56 #define DAVBUS_OUTPUT_SUBFRAME0 0x00000010
57 #define DAVBUS_OUTPUT_SUBFRAME1 0x00000020
58 #define DAVBUS_OUTPUT_SUBFRAME2 0x00000040
59 #define DAVBUS_OUTPUT_SUBFRAME3 0x00000080
61 #define DAVBUS_RATE_44100 0x00000000
62 #define DAVBUS_RATE_29400 0x00000100
63 #define DAVBUS_RATE_22050 0x00000200
64 #define DAVBUS_RATE_17640 0x00000300
65 #define DAVBUS_RATE_14700 0x00000400
66 #define DAVBUS_RATE_11025 0x00000500
67 #define DAVBUS_RATE_8820 0x00000600
68 #define DAVBUS_RATE_7350 0x00000700
69 #define DAVBUS_RATE_MASK 0x00000700
71 #define DAVBUS_ERROR 0x00000800
72 #define DAVBUS_PORTCHG 0x00001000
73 #define DAVBUS_INTR_ERROR 0x00002000 /* interrupt on error */
74 #define DAVBUS_INTR_PORTCHG 0x00004000 /* interrupt on port change */
76 #define DAVBUS_STATUS_SUBFRAME 0x00018000 /* mask */
78 /* DAVBUS_CODEC_CTRL bit definitions. */
79 #define DAVBUS_CODEC_BUSY 0x01000000
83 * Burgundy Codec Control Bits
86 /* Burgundy transaction bits. */
87 #define BURGUNDY_CTRL_RESET 0x00100000
88 #define BURGUNDY_CTRL_WRITE 0x00200000
90 /* Mute control for each analog output port. */
91 #define BURGUNDY_MUTE_REG 0x16000
92 #define BURGUNDY_P13M_EN 0x01
93 #define BURGUNDY_P14L_EN 0x02
94 #define BURGUNDY_P14R_EN 0x04
95 #define BURGUNDY_P15L_EN 0x08
96 #define BURGUNDY_P15R_EN 0x10
97 #define BURGUNDY_P16L_EN 0x20
98 #define BURGUNDY_P16R_EN 0x40
99 #define BURGUNDY_P17M_EN 0x80
101 /* Attenuation of each analog output port. */
102 #define BURGUNDY_OL13_REG 0x16100
103 #define BURGUNDY_OL14_REG 0x16200
104 #define BURGUNDY_OL15_REG 0x16300
105 #define BURGUNDY_OL16_REG 0x16400
106 #define BURGUNDY_OL17_REG 0x16500
108 /* Inputs of four digital mixers. */
109 #define BURGUNDY_MIX0_REG 0x42900
110 #define BURGUNDY_MIX1_REG 0x42A00
111 #define BURGUNDY_MIX2_REG 0x42B00
112 #define BURGUNDY_MIX3_REG 0x42C00
113 #define BURGUNDY_MIX_IS0 0x00010001
114 #define BURGUNDY_MIX_IS1 0x00020002
115 #define BURGUNDY_MIX_IS2 0x00040004
116 #define BURGUNDY_MIX_IS3 0x00080008
117 #define BURGUNDY_MIX_IS4 0x00100010
118 #define BURGUNDY_MIX_ISA 0x01000100 /* Digital stream ISA. */
119 #define BURGUNDY_MIX_ISB 0x02000200 /* Digital stream ISB. */
120 #define BURGUNDY_MIX_ISC 0x04000400 /* Digital stream ISC. */
121 #define BURGUNDY_MIX_ISD 0x08000800 /* Digital stream ISD. */
122 #define BURGUNDY_MIX_ISE 0x10001000 /* Digital stream ISE. */
123 #define BURGUNDY_MIX_ISF 0x20002000 /* Digital stream ISF. */
124 #define BURGUNDY_MIX_ISG 0x40004000 /* Digital stream ISG. */
125 #define BURGUNDY_MIX_ISH 0x80008000 /* Digital stream ISH. */
127 /* A digital scalar at the output of each mixer. */
128 #define BURGUNDY_MXS0L_REG 0x12D00
129 #define BURGUNDY_MXS0R_REG 0x12D01
130 #define BURGUNDY_MXS1L_REG 0x12D02
131 #define BURGUNDY_MXS1R_REG 0x12D03
132 #define BURGUNDY_MXS2L_REG 0x12E00
133 #define BURGUNDY_MXS2R_REG 0x12E01
134 #define BURGUNDY_MXS3L_REG 0x12E02
135 #define BURGUNDY_MXS3R_REG 0x12E03
136 #define BURGUNDY_MXS_UNITY 0xDF
138 /* Demultiplexer. Routes the mixer 0-3 (see above) to output sources.
139 Output sources 0-2 can be converted to analog. */
140 #define BURGUNDY_OS_REG 0x42F00
141 #define BURGUNDY_OS0_MIX0 0x00000000
142 #define BURGUNDY_OS0_MIX1 0x00000001
143 #define BURGUNDY_OS0_MIX2 0x00000002
144 #define BURGUNDY_OS0_MIX3 0x00000003
145 #define BURGUNDY_OS1_MIX0 0x00000000
146 #define BURGUNDY_OS1_MIX1 0x00000004
147 #define BURGUNDY_OS1_MIX2 0x00000008
148 #define BURGUNDY_OS1_MIX3 0x0000000C
149 #define BURGUNDY_OS2_MIX0 0x00000000
150 #define BURGUNDY_OS2_MIX1 0x00000010
151 #define BURGUNDY_OS2_MIX2 0x00000020
152 #define BURGUNDY_OS2_MIX3 0x00000030
153 #define BURGUNDY_OS3_MIX0 0x00000000
154 #define BURGUNDY_OS3_MIX1 0x00000040
155 #define BURGUNDY_OS3_MIX2 0x00000080
156 #define BURGUNDY_OS3_MIX3 0x000000C0
157 #define BURGUNDY_OSA_MIX0 0x00000000
158 #define BURGUNDY_OSA_MIX1 0x00010000
159 #define BURGUNDY_OSA_MIX2 0x00020000
160 #define BURGUNDY_OSA_MIX3 0x00030000
161 #define BURGUNDY_OSB_MIX0 0x00000000
162 #define BURGUNDY_OSB_MIX1 0x00040000
163 #define BURGUNDY_OSB_MIX2 0x00080000
164 #define BURGUNDY_OSB_MIX3 0x000C0000
165 #define BURGUNDY_OSC_MIX0 0x00000000
166 #define BURGUNDY_OSC_MIX1 0x00100000
167 #define BURGUNDY_OSC_MIX2 0x00200000
168 #define BURGUNDY_OSC_MIX3 0x00300000
169 #define BURGUNDY_OSD_MIX0 0x00000000
170 #define BURGUNDY_OSD_MIX1 0x00400000
171 #define BURGUNDY_OSD_MIX2 0x00800000
172 #define BURGUNDY_OSD_MIX3 0x00C00000
173 #define BURGUNDY_OSE_MIX0 0x00000000
174 #define BURGUNDY_OSE_MIX1 0x01000000
175 #define BURGUNDY_OSE_MIX2 0x02000000
176 #define BURGUNDY_OSE_MIX3 0x03000000
177 #define BURGUNDY_OSF_MIX0 0x00000000
178 #define BURGUNDY_OSF_MIX1 0x04000000
179 #define BURGUNDY_OSF_MIX2 0x08000000
180 #define BURGUNDY_OSF_MIX3 0x0C000000
181 #define BURGUNDY_OSG_MIX0 0x00000000
182 #define BURGUNDY_OSG_MIX1 0x10000000
183 #define BURGUNDY_OSG_MIX2 0x20000000
184 #define BURGUNDY_OSG_MIX3 0x30000000
185 #define BURGUNDY_OSH_MIX0 0x00000000
186 #define BURGUNDY_OSH_MIX1 0x40000000
187 #define BURGUNDY_OSH_MIX2 0x80000000
188 #define BURGUNDY_OSH_MIX3 0xC0000000
190 /* A digital scalar for output sources 0 to 3. */
191 #define BURGUNDY_OSS0L_REG 0x13000
192 #define BURGUNDY_OSS0R_REG 0x13001
193 #define BURGUNDY_OSS1L_REG 0x13002
194 #define BURGUNDY_OSS1R_REG 0x13003
195 #define BURGUNDY_OSS2L_REG 0x13100
196 #define BURGUNDY_OSS2R_REG 0x13101
197 #define BURGUNDY_OSS3L_REG 0x13102
198 #define BURGUNDY_OSS3R_REG 0x13103
199 #define BURGUNDY_OSS_UNITY 0xDF
201 /* Digital input streams ISA-ISC. A stream may be derived from data coming
202 from the controller in subframes 0 to 3 as well as from internal
203 output sources OSA-OSD. */
204 #define BURGUNDY_SDIN_REG 0x17800
205 #define BURGUNDY_ISA_SF0 0x00
206 #define BURGUNDY_ISA_OSA 0x02
207 #define BURGUNDY_ISB_SF1 0x00
208 #define BURGUNDY_ISB_OSB 0x08
209 #define BURGUNDY_ISC_SF2 0x00
210 #define BURGUNDY_ISC_OSC 0x20
211 #define BURGUNDY_ISD_SF3 0x00
212 #define BURGUNDY_ISD_OSD 0x80
214 /* A digital scaler for input streams 0-4 A-H. */
215 #define BURGUNDY_ISSAL_REG 0x12500
216 #define BURGUNDY_ISSAR_REG 0x12501
217 #define BURGUNDY_ISS_UNITY 0xDF
220 * Screamer codec control bits
221 * This codec has the following 12-bit control registers:
222 * cc0 cc1 cc2 cc4 cc5 cc6 cc7
225 /* screamer transaction bits. */
226 #define SCREAMER_CODEC_ADDR0 0x00000000
227 #define SCREAMER_CODEC_ADDR1 0x00001000
228 #define SCREAMER_CODEC_ADDR2 0x00002000
229 #define SCREAMER_CODEC_ADDR4 0x00004000
230 #define SCREAMER_CODEC_ADDR5 0x00005000
231 #define SCREAMER_CODEC_ADDR6 0x00006000
232 #define SCREAMER_CODEC_ADDR7 0x00007000
233 #define SCREAMER_CODEC_EMSEL0 0x00000000
234 #define SCREAMER_CODEC_EMSEL1 0x00400000
235 #define SCREAMER_CODEC_EMSEL2 0x00800000
236 #define SCREAMER_CODEC_EMSEL4 0x00c00000
241 * Bits 7-4 specify the left ADC input gain;
242 * bits 3-0 specify the right ADC input gain.
244 * The gain is a 4-bit value expressed in units of 1.5 dB,
245 * ranging from 0 dB (0) to +22.5 dB (15).
247 #define SCREAMER_DEFAULT_CD_GAIN 0x000000bb /* +16.5 dB */
248 #define SCREAMER_INPUT_CD 0x00000200
249 #define SCREAMER_INPUT_LINE 0x00000400
250 #define SCREAMER_INPUT_MICROPHONE 0x00000800
251 #define SCREAMER_INPUT_MASK 0x00000e00
254 #define SCREAMER_LOOP_THROUGH 0x00000040
255 #define SCREAMER_MUTE_SPEAKER 0x00000080
256 #define SCREAMER_MUTE_HEADPHONES 0x00000200
257 #define SCREAMER_PARALLEL_OUTPUT 0x00000c00
258 #define SCREAMER_PROG_OUTPUT0 0x00000400
259 #define SCREAMER_PROG_OUTPUT1 0x00000800
261 /* cc2: headphones/external port attenuation */
262 /* cc4: internal speaker attenuation */
264 * Bits 9-6 specify left DAC output attenuation.
265 * Bits 3-0 specify right DAC output attenuation.
267 * The attenuation is a 4-bit value expressed in units of -1.5 dB,
268 * ranging from 0 dB (0) to -22.5 dB (15).
271 /* screamer codec status bits. */
272 #define SCREAMER_STATUS_MASK 0x00FFFFFF
273 #define SCREAMER_STATUS_SENSEMASK 0x0000000F
274 #define SCREAMER_STATUS_SENSE0 0x00000008
275 #define SCREAMER_STATUS_SENSE1 0x00000004
276 #define SCREAMER_STATUS_SENSE2 0x00000002
277 #define SCREAMER_STATUS_SENSE3 0x00000001
278 #define SCREAMER_STATUS_PARTMASK 0x00000300
279 #define SCREAMER_STATUS_PARTSHFT 8
280 #define SCREAMER_PART_CRYSTAL 0x00000100
281 #define SCREAMER_PART_NATIONAL 0x00000200
282 #define SCREAMER_PART_TI 0x00000300
283 #define SCREAMER_STATUS_REVMASK 0x0000F000
284 #define SCREAMER_STATUS_REVSHFT 12
286 #endif /* _SOUND_DAVBUS_H */